com.c revision 1.234.2.7
1 /* $NetBSD: com.c,v 1.234.2.7 2008/01/21 09:42:57 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.234.2.7 2008/01/21 09:42:57 yamt Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 #include <sys/kauth.h> 125 #include <sys/intr.h> 126 127 #include <sys/bus.h> 128 129 #include <dev/ic/comreg.h> 130 #include <dev/ic/comvar.h> 131 #include <dev/ic/ns16550reg.h> 132 #include <dev/ic/st16650reg.h> 133 #ifdef COM_HAYESP 134 #include <dev/ic/hayespreg.h> 135 #endif 136 #define com_lcr com_cfcr 137 #include <dev/cons.h> 138 139 #ifdef COM_REGMAP 140 #define CSR_WRITE_1(r, o, v) \ 141 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 142 #define CSR_READ_1(r, o) \ 143 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 144 #define CSR_WRITE_2(r, o, v) \ 145 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 146 #define CSR_READ_2(r, o) \ 147 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 148 #define CSR_WRITE_MULTI(r, o, p, n) \ 149 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], p, n) 150 #else 151 #define CSR_WRITE_1(r, o, v) \ 152 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, o, v) 153 #define CSR_READ_1(r, o) \ 154 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, o) 155 #define CSR_WRITE_2(r, o, v) \ 156 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, o, v) 157 #define CSR_READ_2(r, o) \ 158 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, o) 159 #define CSR_WRITE_MULTI(r, o, p, n) \ 160 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, o, p, n) 161 #endif 162 163 164 static void com_enable_debugport(struct com_softc *); 165 166 void com_config(struct com_softc *); 167 void com_shutdown(struct com_softc *); 168 int comspeed(long, long, int); 169 static u_char cflag2lcr(tcflag_t); 170 int comparam(struct tty *, struct termios *); 171 void comstart(struct tty *); 172 int comhwiflow(struct tty *, int); 173 174 void com_loadchannelregs(struct com_softc *); 175 void com_hwiflow(struct com_softc *); 176 void com_break(struct com_softc *, int); 177 void com_modem(struct com_softc *, int); 178 void tiocm_to_com(struct com_softc *, u_long, int); 179 int com_to_tiocm(struct com_softc *); 180 void com_iflush(struct com_softc *); 181 182 int com_common_getc(dev_t, struct com_regs *); 183 void com_common_putc(dev_t, struct com_regs *, int); 184 185 int cominit(struct com_regs *, int, int, int, tcflag_t); 186 187 int comcngetc(dev_t); 188 void comcnputc(dev_t, int); 189 void comcnpollc(dev_t, int); 190 191 #define integrate static inline 192 void comsoft(void *); 193 integrate void com_rxsoft(struct com_softc *, struct tty *); 194 integrate void com_txsoft(struct com_softc *, struct tty *); 195 integrate void com_stsoft(struct com_softc *, struct tty *); 196 integrate void com_schedrx(struct com_softc *); 197 void comdiag(void *); 198 199 extern struct cfdriver com_cd; 200 201 dev_type_open(comopen); 202 dev_type_close(comclose); 203 dev_type_read(comread); 204 dev_type_write(comwrite); 205 dev_type_ioctl(comioctl); 206 dev_type_stop(comstop); 207 dev_type_tty(comtty); 208 dev_type_poll(compoll); 209 210 const struct cdevsw com_cdevsw = { 211 comopen, comclose, comread, comwrite, comioctl, 212 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 213 }; 214 215 /* 216 * Make this an option variable one can patch. 217 * But be warned: this must be a power of 2! 218 */ 219 u_int com_rbuf_size = COM_RING_SIZE; 220 221 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 222 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 223 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 224 225 static struct com_regs comconsregs; 226 static int comconsattached; 227 static int comconsrate; 228 static tcflag_t comconscflag; 229 static struct cnm_state com_cnm_state; 230 231 #ifdef KGDB 232 #include <sys/kgdb.h> 233 234 static struct com_regs comkgdbregs; 235 static int com_kgdb_attached; 236 237 int com_kgdb_getc(void *); 238 void com_kgdb_putc(void *, int); 239 #endif /* KGDB */ 240 241 #ifdef COM_REGMAP 242 /* initializer for typical 16550-ish hardware */ 243 #define COM_REG_16550 { \ 244 com_data, com_data, com_dlbl, com_dlbh, com_ier, com_iir, com_fifo, \ 245 com_efr, com_lcr, com_mcr, com_lsr, com_msr } 246 247 const bus_size_t com_std_map[16] = COM_REG_16550; 248 #endif /* COM_REGMAP */ 249 250 #define COMUNIT_MASK 0x7ffff 251 #define COMDIALOUT_MASK 0x80000 252 253 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 254 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 255 256 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 257 device_is_active(&(sc)->sc_dev)) 258 259 #define BR BUS_SPACE_BARRIER_READ 260 #define BW BUS_SPACE_BARRIER_WRITE 261 #define COM_BARRIER(r, f) \ 262 bus_space_barrier((r)->cr_iot, (r)->cr_ioh, 0, (r)->cr_nports, (f)) 263 264 /*ARGSUSED*/ 265 int 266 comspeed(long speed, long frequency, int type) 267 { 268 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 269 270 int x, err; 271 272 #if 0 273 if (speed == 0) 274 return (0); 275 #endif 276 if (speed <= 0) 277 return (-1); 278 x = divrnd(frequency / 16, speed); 279 if (x <= 0) 280 return (-1); 281 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 282 if (err < 0) 283 err = -err; 284 if (err > COM_TOLERANCE) 285 return (-1); 286 return (x); 287 288 #undef divrnd 289 } 290 291 #ifdef COM_DEBUG 292 int com_debug = 0; 293 294 void comstatus(struct com_softc *, const char *); 295 void 296 comstatus(struct com_softc *sc, const char *str) 297 { 298 struct tty *tp = sc->sc_tty; 299 300 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 301 sc->sc_dev.dv_xname, str, 302 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 303 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 304 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 305 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 306 sc->sc_tx_stopped ? '+' : '-'); 307 308 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 309 sc->sc_dev.dv_xname, str, 310 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 311 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 312 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 313 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 314 sc->sc_rx_flags); 315 } 316 #endif 317 318 int 319 com_probe_subr(struct com_regs *regs) 320 { 321 322 /* force access to id reg */ 323 CSR_WRITE_1(regs, COM_REG_LCR, LCR_8BITS); 324 CSR_WRITE_1(regs, COM_REG_IIR, 0); 325 if ((CSR_READ_1(regs, COM_REG_LCR) != LCR_8BITS) || 326 (CSR_READ_1(regs, COM_REG_IIR) & 0x38)) 327 return (0); 328 329 return (1); 330 } 331 332 int 333 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 334 { 335 struct com_regs regs; 336 337 regs.cr_iot = iot; 338 regs.cr_ioh = ioh; 339 #ifdef COM_REGMAP 340 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map));; 341 #endif 342 343 return com_probe_subr(®s); 344 } 345 346 /* 347 * No locking in this routine; it is only called during attach, 348 * or with the port already locked. 349 */ 350 static void 351 com_enable_debugport(struct com_softc *sc) 352 { 353 354 /* Turn on line break interrupt, set carrier. */ 355 sc->sc_ier = IER_ERXRDY; 356 if (sc->sc_type == COM_TYPE_PXA2x0) 357 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 358 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 359 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 360 CSR_WRITE_1(&sc->sc_regs, COM_REG_MCR, sc->sc_mcr); 361 } 362 363 void 364 com_attach_subr(struct com_softc *sc) 365 { 366 struct com_regs *regsp = &sc->sc_regs; 367 struct tty *tp; 368 #ifdef COM_16650 369 u_int8_t lcr; 370 #endif 371 const char *fifo_msg = NULL; 372 373 aprint_naive("\n"); 374 375 callout_init(&sc->sc_diag_callout, 0); 376 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 377 378 /* Disable interrupts before configuring the device. */ 379 if (sc->sc_type == COM_TYPE_PXA2x0) 380 sc->sc_ier = IER_EUART; 381 else 382 sc->sc_ier = 0; 383 384 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 385 386 if (regsp->cr_iot == comconsregs.cr_iot && 387 regsp->cr_iobase == comconsregs.cr_iobase) { 388 comconsattached = 1; 389 390 /* Make sure the console is always "hardwired". */ 391 delay(10000); /* wait for output to finish */ 392 SET(sc->sc_hwflags, COM_HW_CONSOLE); 393 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 394 } 395 396 /* Probe for FIFO */ 397 switch (sc->sc_type) { 398 case COM_TYPE_HAYESP: 399 goto fifodone; 400 401 case COM_TYPE_AU1x00: 402 sc->sc_fifolen = 16; 403 fifo_msg = "Au1X00 UART, working fifo"; 404 SET(sc->sc_hwflags, COM_HW_FIFO); 405 goto fifodelay; 406 } 407 408 sc->sc_fifolen = 1; 409 /* look for a NS 16550AF UART with FIFOs */ 410 CSR_WRITE_1(regsp, COM_REG_FIFO, 411 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 412 delay(100); 413 if (ISSET(CSR_READ_1(regsp, COM_REG_IIR), IIR_FIFO_MASK) 414 == IIR_FIFO_MASK) 415 if (ISSET(CSR_READ_1(regsp, COM_REG_FIFO), FIFO_TRIGGER_14) 416 == FIFO_TRIGGER_14) { 417 SET(sc->sc_hwflags, COM_HW_FIFO); 418 419 #ifdef COM_16650 420 /* 421 * IIR changes into the EFR if LCR is set to LCR_EERS 422 * on 16650s. We also know IIR != 0 at this point. 423 * Write 0 into the EFR, and read it. If the result 424 * is 0, we have a 16650. 425 * 426 * Older 16650s were broken; the test to detect them 427 * is taken from the Linux driver. Apparently 428 * setting DLAB enable gives access to the EFR on 429 * these chips. 430 */ 431 lcr = CSR_READ_1(regsp, COM_REG_LCR); 432 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 433 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 434 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 435 CSR_WRITE_1(regsp, COM_REG_LCR, 436 lcr | LCR_DLAB); 437 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 438 CLR(sc->sc_hwflags, COM_HW_FIFO); 439 sc->sc_fifolen = 0; 440 } else { 441 SET(sc->sc_hwflags, COM_HW_FLOW); 442 sc->sc_fifolen = 32; 443 } 444 } else 445 #endif 446 sc->sc_fifolen = 16; 447 448 #ifdef COM_16650 449 CSR_WRITE_1(regsp, COM_REG_LCR, lcr); 450 if (sc->sc_fifolen == 0) 451 fifo_msg = "st16650, broken fifo"; 452 else if (sc->sc_fifolen == 32) 453 fifo_msg = "st16650a, working fifo"; 454 else 455 #endif 456 fifo_msg = "ns16550a, working fifo"; 457 } else 458 fifo_msg = "ns16550, broken fifo"; 459 else 460 fifo_msg = "ns8250 or ns16450, no fifo"; 461 CSR_WRITE_1(regsp, COM_REG_FIFO, 0); 462 fifodelay: 463 /* 464 * Some chips will clear down both Tx and Rx FIFOs when zero is 465 * written to com_fifo. If this chip is the console, writing zero 466 * results in some of the chip/FIFO description being lost, so delay 467 * printing it until now. 468 */ 469 delay(10); 470 aprint_normal(": %s\n", fifo_msg); 471 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 472 sc->sc_fifolen = 1; 473 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 474 } 475 476 fifodone: 477 478 tp = ttymalloc(); 479 tp->t_oproc = comstart; 480 tp->t_param = comparam; 481 tp->t_hwiflow = comhwiflow; 482 483 sc->sc_tty = tp; 484 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 485 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 486 sc->sc_rbavail = com_rbuf_size; 487 if (sc->sc_rbuf == NULL) { 488 aprint_error("%s: unable to allocate ring buffer\n", 489 sc->sc_dev.dv_xname); 490 return; 491 } 492 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 493 494 tty_attach(tp); 495 496 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 497 SET(sc->sc_mcr, MCR_IENABLE); 498 499 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 500 int maj; 501 502 /* locate the major number */ 503 maj = cdevsw_lookup_major(&com_cdevsw); 504 505 tp->t_dev = cn_tab->cn_dev = makedev(maj, 506 device_unit(&sc->sc_dev)); 507 508 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 509 } 510 511 #ifdef KGDB 512 /* 513 * Allow kgdb to "take over" this port. If this is 514 * not the console and is the kgdb device, it has 515 * exclusive use. If it's the console _and_ the 516 * kgdb device, it doesn't. 517 */ 518 if (regsp->cr_iot == comkgdbregs.cr_iot && 519 regsp->cr_iobase == comkgdbregs.cr_iobase) { 520 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 521 com_kgdb_attached = 1; 522 523 SET(sc->sc_hwflags, COM_HW_KGDB); 524 } 525 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 526 } 527 #endif 528 529 sc->sc_si = softint_establish(SOFTINT_SERIAL, comsoft, sc); 530 531 #if NRND > 0 && defined(RND_COM) 532 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 533 RND_TYPE_TTY, 0); 534 #endif 535 536 /* if there are no enable/disable functions, assume the device 537 is always enabled */ 538 if (!sc->enable) 539 sc->enabled = 1; 540 541 com_config(sc); 542 543 SET(sc->sc_hwflags, COM_HW_DEV_OK); 544 } 545 546 void 547 com_config(struct com_softc *sc) 548 { 549 struct com_regs *regsp = &sc->sc_regs; 550 551 /* Disable interrupts before configuring the device. */ 552 if (sc->sc_type == COM_TYPE_PXA2x0) 553 sc->sc_ier = IER_EUART; 554 else 555 sc->sc_ier = 0; 556 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 557 (void) CSR_READ_1(regsp, COM_REG_IIR); 558 559 #ifdef COM_HAYESP 560 /* Look for a Hayes ESP board. */ 561 if (sc->sc_type == COM_TYPE_HAYESP) { 562 563 /* Set 16550 compatibility mode */ 564 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 565 HAYESP_SETMODE); 566 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 567 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 568 HAYESP_MODE_SCALE); 569 570 /* Set RTS/CTS flow control */ 571 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 572 HAYESP_SETFLOWTYPE); 573 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 574 HAYESP_FLOW_RTS); 575 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 576 HAYESP_FLOW_CTS); 577 578 /* Set flow control levels */ 579 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 580 HAYESP_SETRXFLOW); 581 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 582 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 583 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 584 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 585 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 586 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 587 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 588 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 589 } 590 #endif 591 592 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 593 com_enable_debugport(sc); 594 } 595 596 int 597 com_detach(struct device *self, int flags) 598 { 599 struct com_softc *sc = (struct com_softc *)self; 600 int maj, mn; 601 602 /* locate the major number */ 603 maj = cdevsw_lookup_major(&com_cdevsw); 604 605 /* Nuke the vnodes for any open instances. */ 606 mn = device_unit(self); 607 vdevgone(maj, mn, mn, VCHR); 608 609 mn |= COMDIALOUT_MASK; 610 vdevgone(maj, mn, mn, VCHR); 611 612 if (sc->sc_rbuf == NULL) { 613 /* 614 * Ring buffer allocation failed in the com_attach_subr, 615 * only the tty is allocated, and nothing else. 616 */ 617 ttyfree(sc->sc_tty); 618 return 0; 619 } 620 621 /* Free the receive buffer. */ 622 free(sc->sc_rbuf, M_DEVBUF); 623 624 /* Detach and free the tty. */ 625 tty_detach(sc->sc_tty); 626 ttyfree(sc->sc_tty); 627 628 /* Unhook the soft interrupt handler. */ 629 softint_disestablish(sc->sc_si); 630 631 #if NRND > 0 && defined(RND_COM) 632 /* Unhook the entropy source. */ 633 rnd_detach_source(&sc->rnd_source); 634 #endif 635 636 return (0); 637 } 638 639 int 640 com_activate(struct device *self, enum devact act) 641 { 642 struct com_softc *sc = (struct com_softc *)self; 643 int rv = 0; 644 645 switch (act) { 646 case DVACT_ACTIVATE: 647 rv = EOPNOTSUPP; 648 break; 649 650 case DVACT_DEACTIVATE: 651 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 652 rv = EBUSY; 653 break; 654 } 655 656 if (sc->disable != NULL && sc->enabled != 0) { 657 (*sc->disable)(sc); 658 sc->enabled = 0; 659 } 660 break; 661 } 662 663 return (rv); 664 } 665 666 void 667 com_shutdown(struct com_softc *sc) 668 { 669 struct tty *tp = sc->sc_tty; 670 671 mutex_spin_enter(&sc->sc_lock); 672 673 /* If we were asserting flow control, then deassert it. */ 674 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 675 com_hwiflow(sc); 676 677 /* Clear any break condition set with TIOCSBRK. */ 678 com_break(sc, 0); 679 680 /* 681 * Hang up if necessary. Wait a bit, so the other side has time to 682 * notice even if we immediately open the port again. 683 * Avoid tsleeping above splhigh(). 684 */ 685 if (ISSET(tp->t_cflag, HUPCL)) { 686 com_modem(sc, 0); 687 mutex_spin_exit(&sc->sc_lock); 688 /* XXX will only timeout */ 689 (void) kpause(ttclos, false, hz, NULL); 690 mutex_spin_enter(&sc->sc_lock); 691 } 692 693 /* Turn off interrupts. */ 694 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 695 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 696 if (sc->sc_type == COM_TYPE_PXA2x0) 697 sc->sc_ier |= IER_ERXTOUT; 698 } else 699 sc->sc_ier = 0; 700 701 if (sc->sc_type == COM_TYPE_PXA2x0) 702 sc->sc_ier |= IER_EUART; 703 704 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 705 706 mutex_spin_exit(&sc->sc_lock); 707 708 if (sc->disable) { 709 #ifdef DIAGNOSTIC 710 if (!sc->enabled) 711 panic("com_shutdown: not enabled?"); 712 #endif 713 (*sc->disable)(sc); 714 sc->enabled = 0; 715 } 716 } 717 718 int 719 comopen(dev_t dev, int flag, int mode, struct lwp *l) 720 { 721 struct com_softc *sc; 722 struct tty *tp; 723 int s; 724 int error; 725 726 sc = device_lookup(&com_cd, COMUNIT(dev)); 727 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 728 sc->sc_rbuf == NULL) 729 return (ENXIO); 730 731 if (!device_is_active(&sc->sc_dev)) 732 return (ENXIO); 733 734 #ifdef KGDB 735 /* 736 * If this is the kgdb port, no other use is permitted. 737 */ 738 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 739 return (EBUSY); 740 #endif 741 742 tp = sc->sc_tty; 743 744 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 745 return (EBUSY); 746 747 s = spltty(); 748 749 /* 750 * Do the following iff this is a first open. 751 */ 752 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 753 struct termios t; 754 755 tp->t_dev = dev; 756 757 758 if (sc->enable) { 759 if ((*sc->enable)(sc)) { 760 splx(s); 761 printf("%s: device enable failed\n", 762 sc->sc_dev.dv_xname); 763 return (EIO); 764 } 765 mutex_spin_enter(&sc->sc_lock); 766 sc->enabled = 1; 767 com_config(sc); 768 } else { 769 mutex_spin_enter(&sc->sc_lock); 770 } 771 772 /* Turn on interrupts. */ 773 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 774 if (sc->sc_type == COM_TYPE_PXA2x0) 775 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 776 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 777 778 /* Fetch the current modem control status, needed later. */ 779 sc->sc_msr = CSR_READ_1(&sc->sc_regs, COM_REG_MSR); 780 781 /* Clear PPS capture state on first open. */ 782 memset(&sc->sc_pps_state, 0, sizeof(sc->sc_pps_state)); 783 sc->sc_pps_state.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 784 pps_init(&sc->sc_pps_state); 785 786 mutex_spin_exit(&sc->sc_lock); 787 788 /* 789 * Initialize the termios status to the defaults. Add in the 790 * sticky bits from TIOCSFLAGS. 791 */ 792 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 793 t.c_ospeed = comconsrate; 794 t.c_cflag = comconscflag; 795 } else { 796 t.c_ospeed = TTYDEF_SPEED; 797 t.c_cflag = TTYDEF_CFLAG; 798 } 799 t.c_ispeed = t.c_ospeed; 800 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 801 SET(t.c_cflag, CLOCAL); 802 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 803 SET(t.c_cflag, CRTSCTS); 804 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 805 SET(t.c_cflag, MDMBUF); 806 /* Make sure comparam() will do something. */ 807 tp->t_ospeed = 0; 808 (void) comparam(tp, &t); 809 tp->t_iflag = TTYDEF_IFLAG; 810 tp->t_oflag = TTYDEF_OFLAG; 811 tp->t_lflag = TTYDEF_LFLAG; 812 ttychars(tp); 813 ttsetwater(tp); 814 815 mutex_spin_enter(&sc->sc_lock); 816 817 /* 818 * Turn on DTR. We must always do this, even if carrier is not 819 * present, because otherwise we'd have to use TIOCSDTR 820 * immediately after setting CLOCAL, which applications do not 821 * expect. We always assert DTR while the device is open 822 * unless explicitly requested to deassert it. 823 */ 824 com_modem(sc, 1); 825 826 /* Clear the input ring, and unblock. */ 827 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 828 sc->sc_rbavail = com_rbuf_size; 829 com_iflush(sc); 830 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 831 com_hwiflow(sc); 832 833 #ifdef COM_DEBUG 834 if (com_debug) 835 comstatus(sc, "comopen "); 836 #endif 837 838 mutex_spin_exit(&sc->sc_lock); 839 } 840 841 splx(s); 842 843 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 844 if (error) 845 goto bad; 846 847 error = (*tp->t_linesw->l_open)(dev, tp); 848 if (error) 849 goto bad; 850 851 return (0); 852 853 bad: 854 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 855 /* 856 * We failed to open the device, and nobody else had it opened. 857 * Clean up the state as appropriate. 858 */ 859 com_shutdown(sc); 860 } 861 862 return (error); 863 } 864 865 int 866 comclose(dev_t dev, int flag, int mode, struct lwp *l) 867 { 868 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 869 struct tty *tp = sc->sc_tty; 870 871 /* XXX This is for cons.c. */ 872 if (!ISSET(tp->t_state, TS_ISOPEN)) 873 return (0); 874 875 (*tp->t_linesw->l_close)(tp, flag); 876 ttyclose(tp); 877 878 if (COM_ISALIVE(sc) == 0) 879 return (0); 880 881 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 882 /* 883 * Although we got a last close, the device may still be in 884 * use; e.g. if this was the dialout node, and there are still 885 * processes waiting for carrier on the non-dialout node. 886 */ 887 com_shutdown(sc); 888 } 889 890 return (0); 891 } 892 893 int 894 comread(dev_t dev, struct uio *uio, int flag) 895 { 896 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 897 struct tty *tp = sc->sc_tty; 898 899 if (COM_ISALIVE(sc) == 0) 900 return (EIO); 901 902 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 903 } 904 905 int 906 comwrite(dev_t dev, struct uio *uio, int flag) 907 { 908 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 909 struct tty *tp = sc->sc_tty; 910 911 if (COM_ISALIVE(sc) == 0) 912 return (EIO); 913 914 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 915 } 916 917 int 918 compoll(dev_t dev, int events, struct lwp *l) 919 { 920 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 921 struct tty *tp = sc->sc_tty; 922 923 if (COM_ISALIVE(sc) == 0) 924 return (POLLHUP); 925 926 return ((*tp->t_linesw->l_poll)(tp, events, l)); 927 } 928 929 struct tty * 930 comtty(dev_t dev) 931 { 932 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 933 struct tty *tp = sc->sc_tty; 934 935 return (tp); 936 } 937 938 int 939 comioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 940 { 941 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 942 struct tty *tp = sc->sc_tty; 943 int error; 944 945 if (COM_ISALIVE(sc) == 0) 946 return (EIO); 947 948 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 949 if (error != EPASSTHROUGH) 950 return (error); 951 952 error = ttioctl(tp, cmd, data, flag, l); 953 if (error != EPASSTHROUGH) 954 return (error); 955 956 error = 0; 957 switch (cmd) { 958 case TIOCSFLAGS: 959 error = kauth_authorize_device_tty(l->l_cred, 960 KAUTH_DEVICE_TTY_PRIVSET, tp); 961 break; 962 default: 963 /* nothing */ 964 break; 965 } 966 if (error) { 967 return error; 968 } 969 970 mutex_spin_enter(&sc->sc_lock); 971 972 switch (cmd) { 973 case TIOCSBRK: 974 com_break(sc, 1); 975 break; 976 977 case TIOCCBRK: 978 com_break(sc, 0); 979 break; 980 981 case TIOCSDTR: 982 com_modem(sc, 1); 983 break; 984 985 case TIOCCDTR: 986 com_modem(sc, 0); 987 break; 988 989 case TIOCGFLAGS: 990 *(int *)data = sc->sc_swflags; 991 break; 992 993 case TIOCSFLAGS: 994 sc->sc_swflags = *(int *)data; 995 break; 996 997 case TIOCMSET: 998 case TIOCMBIS: 999 case TIOCMBIC: 1000 tiocm_to_com(sc, cmd, *(int *)data); 1001 break; 1002 1003 case TIOCMGET: 1004 *(int *)data = com_to_tiocm(sc); 1005 break; 1006 1007 case PPS_IOC_CREATE: 1008 case PPS_IOC_DESTROY: 1009 case PPS_IOC_GETPARAMS: 1010 case PPS_IOC_SETPARAMS: 1011 case PPS_IOC_GETCAP: 1012 case PPS_IOC_FETCH: 1013 #ifdef PPS_SYNC 1014 case PPS_IOC_KCBIND: 1015 #endif 1016 error = pps_ioctl(cmd, data, &sc->sc_pps_state); 1017 break; 1018 1019 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1020 #ifndef PPS_TRAILING_EDGE 1021 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1022 &sc->sc_pps_state.ppsinfo.assert_timestamp); 1023 #else 1024 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1025 &sc->sc_pps_state.ppsinfo.clear_timestamp); 1026 #endif 1027 break; 1028 1029 default: 1030 error = EPASSTHROUGH; 1031 break; 1032 } 1033 1034 mutex_spin_exit(&sc->sc_lock); 1035 1036 #ifdef COM_DEBUG 1037 if (com_debug) 1038 comstatus(sc, "comioctl "); 1039 #endif 1040 1041 return (error); 1042 } 1043 1044 integrate void 1045 com_schedrx(struct com_softc *sc) 1046 { 1047 1048 sc->sc_rx_ready = 1; 1049 1050 /* Wake up the poller. */ 1051 softint_schedule(sc->sc_si); 1052 } 1053 1054 void 1055 com_break(struct com_softc *sc, int onoff) 1056 { 1057 1058 if (onoff) 1059 SET(sc->sc_lcr, LCR_SBREAK); 1060 else 1061 CLR(sc->sc_lcr, LCR_SBREAK); 1062 1063 if (!sc->sc_heldchange) { 1064 if (sc->sc_tx_busy) { 1065 sc->sc_heldtbc = sc->sc_tbc; 1066 sc->sc_tbc = 0; 1067 sc->sc_heldchange = 1; 1068 } else 1069 com_loadchannelregs(sc); 1070 } 1071 } 1072 1073 void 1074 com_modem(struct com_softc *sc, int onoff) 1075 { 1076 1077 if (sc->sc_mcr_dtr == 0) 1078 return; 1079 1080 if (onoff) 1081 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1082 else 1083 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1084 1085 if (!sc->sc_heldchange) { 1086 if (sc->sc_tx_busy) { 1087 sc->sc_heldtbc = sc->sc_tbc; 1088 sc->sc_tbc = 0; 1089 sc->sc_heldchange = 1; 1090 } else 1091 com_loadchannelregs(sc); 1092 } 1093 } 1094 1095 void 1096 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1097 { 1098 u_char combits; 1099 1100 combits = 0; 1101 if (ISSET(ttybits, TIOCM_DTR)) 1102 SET(combits, MCR_DTR); 1103 if (ISSET(ttybits, TIOCM_RTS)) 1104 SET(combits, MCR_RTS); 1105 1106 switch (how) { 1107 case TIOCMBIC: 1108 CLR(sc->sc_mcr, combits); 1109 break; 1110 1111 case TIOCMBIS: 1112 SET(sc->sc_mcr, combits); 1113 break; 1114 1115 case TIOCMSET: 1116 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1117 SET(sc->sc_mcr, combits); 1118 break; 1119 } 1120 1121 if (!sc->sc_heldchange) { 1122 if (sc->sc_tx_busy) { 1123 sc->sc_heldtbc = sc->sc_tbc; 1124 sc->sc_tbc = 0; 1125 sc->sc_heldchange = 1; 1126 } else 1127 com_loadchannelregs(sc); 1128 } 1129 } 1130 1131 int 1132 com_to_tiocm(struct com_softc *sc) 1133 { 1134 u_char combits; 1135 int ttybits = 0; 1136 1137 combits = sc->sc_mcr; 1138 if (ISSET(combits, MCR_DTR)) 1139 SET(ttybits, TIOCM_DTR); 1140 if (ISSET(combits, MCR_RTS)) 1141 SET(ttybits, TIOCM_RTS); 1142 1143 combits = sc->sc_msr; 1144 if (ISSET(combits, MSR_DCD)) 1145 SET(ttybits, TIOCM_CD); 1146 if (ISSET(combits, MSR_CTS)) 1147 SET(ttybits, TIOCM_CTS); 1148 if (ISSET(combits, MSR_DSR)) 1149 SET(ttybits, TIOCM_DSR); 1150 if (ISSET(combits, MSR_RI | MSR_TERI)) 1151 SET(ttybits, TIOCM_RI); 1152 1153 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1154 SET(ttybits, TIOCM_LE); 1155 1156 return (ttybits); 1157 } 1158 1159 static u_char 1160 cflag2lcr(tcflag_t cflag) 1161 { 1162 u_char lcr = 0; 1163 1164 switch (ISSET(cflag, CSIZE)) { 1165 case CS5: 1166 SET(lcr, LCR_5BITS); 1167 break; 1168 case CS6: 1169 SET(lcr, LCR_6BITS); 1170 break; 1171 case CS7: 1172 SET(lcr, LCR_7BITS); 1173 break; 1174 case CS8: 1175 SET(lcr, LCR_8BITS); 1176 break; 1177 } 1178 if (ISSET(cflag, PARENB)) { 1179 SET(lcr, LCR_PENAB); 1180 if (!ISSET(cflag, PARODD)) 1181 SET(lcr, LCR_PEVEN); 1182 } 1183 if (ISSET(cflag, CSTOPB)) 1184 SET(lcr, LCR_STOPB); 1185 1186 return (lcr); 1187 } 1188 1189 int 1190 comparam(struct tty *tp, struct termios *t) 1191 { 1192 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1193 int ospeed; 1194 u_char lcr; 1195 1196 if (COM_ISALIVE(sc) == 0) 1197 return (EIO); 1198 1199 #ifdef COM_HAYESP 1200 if (sc->sc_type == COM_TYPE_HAYESP) { 1201 int prescaler, speed; 1202 1203 /* 1204 * Calculate UART clock prescaler. It should be in 1205 * range of 0 .. 3. 1206 */ 1207 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1208 prescaler++, speed /= 2) 1209 if ((ospeed = comspeed(speed, sc->sc_frequency, 1210 sc->sc_type)) > 0) 1211 break; 1212 1213 if (prescaler == 4) 1214 return (EINVAL); 1215 sc->sc_prescaler = prescaler; 1216 } else 1217 #endif 1218 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1219 1220 /* Check requested parameters. */ 1221 if (ospeed < 0) 1222 return (EINVAL); 1223 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1224 return (EINVAL); 1225 1226 /* 1227 * For the console, always force CLOCAL and !HUPCL, so that the port 1228 * is always active. 1229 */ 1230 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1231 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1232 SET(t->c_cflag, CLOCAL); 1233 CLR(t->c_cflag, HUPCL); 1234 } 1235 1236 /* 1237 * If there were no changes, don't do anything. This avoids dropping 1238 * input and improves performance when all we did was frob things like 1239 * VMIN and VTIME. 1240 */ 1241 if (tp->t_ospeed == t->c_ospeed && 1242 tp->t_cflag == t->c_cflag) 1243 return (0); 1244 1245 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1246 1247 mutex_spin_enter(&sc->sc_lock); 1248 1249 sc->sc_lcr = lcr; 1250 1251 /* 1252 * If we're not in a mode that assumes a connection is present, then 1253 * ignore carrier changes. 1254 */ 1255 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1256 sc->sc_msr_dcd = 0; 1257 else 1258 sc->sc_msr_dcd = MSR_DCD; 1259 /* 1260 * Set the flow control pins depending on the current flow control 1261 * mode. 1262 */ 1263 if (ISSET(t->c_cflag, CRTSCTS)) { 1264 sc->sc_mcr_dtr = MCR_DTR; 1265 sc->sc_mcr_rts = MCR_RTS; 1266 sc->sc_msr_cts = MSR_CTS; 1267 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1268 } else if (ISSET(t->c_cflag, MDMBUF)) { 1269 /* 1270 * For DTR/DCD flow control, make sure we don't toggle DTR for 1271 * carrier detection. 1272 */ 1273 sc->sc_mcr_dtr = 0; 1274 sc->sc_mcr_rts = MCR_DTR; 1275 sc->sc_msr_cts = MSR_DCD; 1276 sc->sc_efr = 0; 1277 } else { 1278 /* 1279 * If no flow control, then always set RTS. This will make 1280 * the other side happy if it mistakenly thinks we're doing 1281 * RTS/CTS flow control. 1282 */ 1283 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1284 sc->sc_mcr_rts = 0; 1285 sc->sc_msr_cts = 0; 1286 sc->sc_efr = 0; 1287 if (ISSET(sc->sc_mcr, MCR_DTR)) 1288 SET(sc->sc_mcr, MCR_RTS); 1289 else 1290 CLR(sc->sc_mcr, MCR_RTS); 1291 } 1292 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1293 1294 #if 0 1295 if (ospeed == 0) 1296 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1297 else 1298 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1299 #endif 1300 1301 sc->sc_dlbl = ospeed; 1302 sc->sc_dlbh = ospeed >> 8; 1303 1304 /* 1305 * Set the FIFO threshold based on the receive speed. 1306 * 1307 * * If it's a low speed, it's probably a mouse or some other 1308 * interactive device, so set the threshold low. 1309 * * If it's a high speed, trim the trigger level down to prevent 1310 * overflows. 1311 * * Otherwise set it a bit higher. 1312 */ 1313 if (sc->sc_type == COM_TYPE_HAYESP) 1314 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1315 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1316 sc->sc_fifo = FIFO_ENABLE | 1317 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8); 1318 else 1319 sc->sc_fifo = 0; 1320 1321 /* And copy to tty. */ 1322 tp->t_ispeed = t->c_ospeed; 1323 tp->t_ospeed = t->c_ospeed; 1324 tp->t_cflag = t->c_cflag; 1325 1326 if (!sc->sc_heldchange) { 1327 if (sc->sc_tx_busy) { 1328 sc->sc_heldtbc = sc->sc_tbc; 1329 sc->sc_tbc = 0; 1330 sc->sc_heldchange = 1; 1331 } else 1332 com_loadchannelregs(sc); 1333 } 1334 1335 if (!ISSET(t->c_cflag, CHWFLOW)) { 1336 /* Disable the high water mark. */ 1337 sc->sc_r_hiwat = 0; 1338 sc->sc_r_lowat = 0; 1339 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1340 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1341 com_schedrx(sc); 1342 } 1343 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1344 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1345 com_hwiflow(sc); 1346 } 1347 } else { 1348 sc->sc_r_hiwat = com_rbuf_hiwat; 1349 sc->sc_r_lowat = com_rbuf_lowat; 1350 } 1351 1352 mutex_spin_exit(&sc->sc_lock); 1353 1354 /* 1355 * Update the tty layer's idea of the carrier bit, in case we changed 1356 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1357 * explicit request. 1358 */ 1359 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1360 1361 #ifdef COM_DEBUG 1362 if (com_debug) 1363 comstatus(sc, "comparam "); 1364 #endif 1365 1366 if (!ISSET(t->c_cflag, CHWFLOW)) { 1367 if (sc->sc_tx_stopped) { 1368 sc->sc_tx_stopped = 0; 1369 comstart(tp); 1370 } 1371 } 1372 1373 return (0); 1374 } 1375 1376 void 1377 com_iflush(struct com_softc *sc) 1378 { 1379 struct com_regs *regsp = &sc->sc_regs; 1380 #ifdef DIAGNOSTIC 1381 int reg; 1382 #endif 1383 int timo; 1384 1385 #ifdef DIAGNOSTIC 1386 reg = 0xffff; 1387 #endif 1388 timo = 50000; 1389 /* flush any pending I/O */ 1390 while (ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY) 1391 && --timo) 1392 #ifdef DIAGNOSTIC 1393 reg = 1394 #else 1395 (void) 1396 #endif 1397 CSR_READ_1(regsp, COM_REG_RXDATA); 1398 #ifdef DIAGNOSTIC 1399 if (!timo) 1400 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1401 reg); 1402 #endif 1403 } 1404 1405 void 1406 com_loadchannelregs(struct com_softc *sc) 1407 { 1408 struct com_regs *regsp = &sc->sc_regs; 1409 1410 /* XXXXX necessary? */ 1411 com_iflush(sc); 1412 1413 if (sc->sc_type == COM_TYPE_PXA2x0) 1414 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 1415 else 1416 CSR_WRITE_1(regsp, COM_REG_IER, 0); 1417 1418 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1419 if (sc->sc_type != COM_TYPE_AU1x00) { /* no EFR on alchemy */ 1420 CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr); 1421 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 1422 } 1423 } 1424 if (sc->sc_type == COM_TYPE_AU1x00) { 1425 /* alchemy has single separate 16-bit clock divisor register */ 1426 CSR_WRITE_2(regsp, COM_REG_DLBL, sc->sc_dlbl + 1427 (sc->sc_dlbh << 8)); 1428 } else { 1429 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB); 1430 CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl); 1431 CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh); 1432 } 1433 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr); 1434 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active = sc->sc_mcr); 1435 CSR_WRITE_1(regsp, COM_REG_FIFO, sc->sc_fifo); 1436 #ifdef COM_HAYESP 1437 if (sc->sc_type == COM_TYPE_HAYESP) { 1438 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 1439 HAYESP_SETPRESCALER); 1440 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 1441 sc->sc_prescaler); 1442 } 1443 #endif 1444 1445 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1446 } 1447 1448 int 1449 comhwiflow(struct tty *tp, int block) 1450 { 1451 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1452 1453 if (COM_ISALIVE(sc) == 0) 1454 return (0); 1455 1456 if (sc->sc_mcr_rts == 0) 1457 return (0); 1458 1459 mutex_spin_enter(&sc->sc_lock); 1460 1461 if (block) { 1462 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1463 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1464 com_hwiflow(sc); 1465 } 1466 } else { 1467 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1468 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1469 com_schedrx(sc); 1470 } 1471 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1472 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1473 com_hwiflow(sc); 1474 } 1475 } 1476 1477 mutex_spin_exit(&sc->sc_lock); 1478 return (1); 1479 } 1480 1481 /* 1482 * (un)block input via hw flowcontrol 1483 */ 1484 void 1485 com_hwiflow(struct com_softc *sc) 1486 { 1487 struct com_regs *regsp= &sc->sc_regs; 1488 1489 if (sc->sc_mcr_rts == 0) 1490 return; 1491 1492 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1493 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1494 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1495 } else { 1496 SET(sc->sc_mcr, sc->sc_mcr_rts); 1497 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1498 } 1499 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active); 1500 } 1501 1502 1503 void 1504 comstart(struct tty *tp) 1505 { 1506 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1507 struct com_regs *regsp = &sc->sc_regs; 1508 int s; 1509 1510 if (COM_ISALIVE(sc) == 0) 1511 return; 1512 1513 s = spltty(); 1514 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1515 goto out; 1516 if (sc->sc_tx_stopped) 1517 goto out; 1518 if (!ttypull(tp)) 1519 goto out; 1520 1521 /* Grab the first contiguous region of buffer space. */ 1522 { 1523 u_char *tba; 1524 int tbc; 1525 1526 tba = tp->t_outq.c_cf; 1527 tbc = ndqb(&tp->t_outq, 0); 1528 1529 mutex_spin_enter(&sc->sc_lock); 1530 1531 sc->sc_tba = tba; 1532 sc->sc_tbc = tbc; 1533 } 1534 1535 SET(tp->t_state, TS_BUSY); 1536 sc->sc_tx_busy = 1; 1537 1538 /* Enable transmit completion interrupts if necessary. */ 1539 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1540 SET(sc->sc_ier, IER_ETXRDY); 1541 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1542 } 1543 1544 /* Output the first chunk of the contiguous buffer. */ 1545 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1546 u_int n; 1547 1548 n = sc->sc_tbc; 1549 if (n > sc->sc_fifolen) 1550 n = sc->sc_fifolen; 1551 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1552 sc->sc_tbc -= n; 1553 sc->sc_tba += n; 1554 } 1555 1556 mutex_spin_exit(&sc->sc_lock); 1557 out: 1558 splx(s); 1559 return; 1560 } 1561 1562 /* 1563 * Stop output on a line. 1564 */ 1565 void 1566 comstop(struct tty *tp, int flag) 1567 { 1568 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1569 1570 mutex_spin_enter(&sc->sc_lock); 1571 if (ISSET(tp->t_state, TS_BUSY)) { 1572 /* Stop transmitting at the next chunk. */ 1573 sc->sc_tbc = 0; 1574 sc->sc_heldtbc = 0; 1575 if (!ISSET(tp->t_state, TS_TTSTOP)) 1576 SET(tp->t_state, TS_FLUSH); 1577 } 1578 mutex_spin_exit(&sc->sc_lock); 1579 } 1580 1581 void 1582 comdiag(void *arg) 1583 { 1584 struct com_softc *sc = arg; 1585 int overflows, floods; 1586 1587 mutex_spin_enter(&sc->sc_lock); 1588 overflows = sc->sc_overflows; 1589 sc->sc_overflows = 0; 1590 floods = sc->sc_floods; 1591 sc->sc_floods = 0; 1592 sc->sc_errors = 0; 1593 mutex_spin_exit(&sc->sc_lock); 1594 1595 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1596 sc->sc_dev.dv_xname, 1597 overflows, overflows == 1 ? "" : "s", 1598 floods, floods == 1 ? "" : "s"); 1599 } 1600 1601 integrate void 1602 com_rxsoft(struct com_softc *sc, struct tty *tp) 1603 { 1604 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1605 u_char *get, *end; 1606 u_int cc, scc; 1607 u_char lsr; 1608 int code; 1609 1610 end = sc->sc_ebuf; 1611 get = sc->sc_rbget; 1612 scc = cc = com_rbuf_size - sc->sc_rbavail; 1613 1614 if (cc == com_rbuf_size) { 1615 sc->sc_floods++; 1616 if (sc->sc_errors++ == 0) 1617 callout_reset(&sc->sc_diag_callout, 60 * hz, 1618 comdiag, sc); 1619 } 1620 1621 /* If not yet open, drop the entire buffer content here */ 1622 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1623 get += cc << 1; 1624 if (get >= end) 1625 get -= com_rbuf_size << 1; 1626 cc = 0; 1627 } 1628 while (cc) { 1629 code = get[0]; 1630 lsr = get[1]; 1631 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1632 if (ISSET(lsr, LSR_OE)) { 1633 sc->sc_overflows++; 1634 if (sc->sc_errors++ == 0) 1635 callout_reset(&sc->sc_diag_callout, 1636 60 * hz, comdiag, sc); 1637 } 1638 if (ISSET(lsr, LSR_BI | LSR_FE)) 1639 SET(code, TTY_FE); 1640 if (ISSET(lsr, LSR_PE)) 1641 SET(code, TTY_PE); 1642 } 1643 if ((*rint)(code, tp) == -1) { 1644 /* 1645 * The line discipline's buffer is out of space. 1646 */ 1647 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1648 /* 1649 * We're either not using flow control, or the 1650 * line discipline didn't tell us to block for 1651 * some reason. Either way, we have no way to 1652 * know when there's more space available, so 1653 * just drop the rest of the data. 1654 */ 1655 get += cc << 1; 1656 if (get >= end) 1657 get -= com_rbuf_size << 1; 1658 cc = 0; 1659 } else { 1660 /* 1661 * Don't schedule any more receive processing 1662 * until the line discipline tells us there's 1663 * space available (through comhwiflow()). 1664 * Leave the rest of the data in the input 1665 * buffer. 1666 */ 1667 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1668 } 1669 break; 1670 } 1671 get += 2; 1672 if (get >= end) 1673 get = sc->sc_rbuf; 1674 cc--; 1675 } 1676 1677 if (cc != scc) { 1678 sc->sc_rbget = get; 1679 mutex_spin_enter(&sc->sc_lock); 1680 1681 cc = sc->sc_rbavail += scc - cc; 1682 /* Buffers should be ok again, release possible block. */ 1683 if (cc >= sc->sc_r_lowat) { 1684 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1685 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1686 SET(sc->sc_ier, IER_ERXRDY); 1687 #ifdef COM_PXA2X0 1688 if (sc->sc_type == COM_TYPE_PXA2x0) 1689 SET(sc->sc_ier, IER_ERXTOUT); 1690 #endif 1691 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 1692 } 1693 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1694 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1695 com_hwiflow(sc); 1696 } 1697 } 1698 mutex_spin_exit(&sc->sc_lock); 1699 } 1700 } 1701 1702 integrate void 1703 com_txsoft(struct com_softc *sc, struct tty *tp) 1704 { 1705 1706 CLR(tp->t_state, TS_BUSY); 1707 if (ISSET(tp->t_state, TS_FLUSH)) 1708 CLR(tp->t_state, TS_FLUSH); 1709 else 1710 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1711 (*tp->t_linesw->l_start)(tp); 1712 } 1713 1714 integrate void 1715 com_stsoft(struct com_softc *sc, struct tty *tp) 1716 { 1717 u_char msr, delta; 1718 1719 mutex_spin_enter(&sc->sc_lock); 1720 msr = sc->sc_msr; 1721 delta = sc->sc_msr_delta; 1722 sc->sc_msr_delta = 0; 1723 mutex_spin_exit(&sc->sc_lock); 1724 1725 if (ISSET(delta, sc->sc_msr_dcd)) { 1726 /* 1727 * Inform the tty layer that carrier detect changed. 1728 */ 1729 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1730 } 1731 1732 if (ISSET(delta, sc->sc_msr_cts)) { 1733 /* Block or unblock output according to flow control. */ 1734 if (ISSET(msr, sc->sc_msr_cts)) { 1735 sc->sc_tx_stopped = 0; 1736 (*tp->t_linesw->l_start)(tp); 1737 } else { 1738 sc->sc_tx_stopped = 1; 1739 } 1740 } 1741 1742 #ifdef COM_DEBUG 1743 if (com_debug) 1744 comstatus(sc, "com_stsoft"); 1745 #endif 1746 } 1747 1748 void 1749 comsoft(void *arg) 1750 { 1751 struct com_softc *sc = arg; 1752 struct tty *tp; 1753 1754 if (COM_ISALIVE(sc) == 0) 1755 return; 1756 1757 tp = sc->sc_tty; 1758 1759 if (sc->sc_rx_ready) { 1760 sc->sc_rx_ready = 0; 1761 com_rxsoft(sc, tp); 1762 } 1763 1764 if (sc->sc_st_check) { 1765 sc->sc_st_check = 0; 1766 com_stsoft(sc, tp); 1767 } 1768 1769 if (sc->sc_tx_done) { 1770 sc->sc_tx_done = 0; 1771 com_txsoft(sc, tp); 1772 } 1773 } 1774 1775 int 1776 comintr(void *arg) 1777 { 1778 struct com_softc *sc = arg; 1779 struct com_regs *regsp = &sc->sc_regs; 1780 1781 u_char *put, *end; 1782 u_int cc; 1783 u_char lsr, iir; 1784 1785 if (COM_ISALIVE(sc) == 0) 1786 return (0); 1787 1788 mutex_spin_enter(&sc->sc_lock); 1789 iir = CSR_READ_1(regsp, COM_REG_IIR); 1790 if (ISSET(iir, IIR_NOPEND)) { 1791 mutex_spin_exit(&sc->sc_lock); 1792 return (0); 1793 } 1794 1795 end = sc->sc_ebuf; 1796 put = sc->sc_rbput; 1797 cc = sc->sc_rbavail; 1798 1799 again: do { 1800 u_char msr, delta; 1801 1802 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1803 if (ISSET(lsr, LSR_BI)) { 1804 int cn_trapped = 0; 1805 1806 cn_check_magic(sc->sc_tty->t_dev, 1807 CNC_BREAK, com_cnm_state); 1808 if (cn_trapped) 1809 continue; 1810 #if defined(KGDB) && !defined(DDB) 1811 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1812 kgdb_connect(1); 1813 continue; 1814 } 1815 #endif 1816 } 1817 1818 if (ISSET(lsr, LSR_RCV_MASK) && 1819 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1820 while (cc > 0) { 1821 int cn_trapped = 0; 1822 put[0] = CSR_READ_1(regsp, COM_REG_RXDATA); 1823 put[1] = lsr; 1824 cn_check_magic(sc->sc_tty->t_dev, 1825 put[0], com_cnm_state); 1826 if (cn_trapped) 1827 goto next; 1828 put += 2; 1829 if (put >= end) 1830 put = sc->sc_rbuf; 1831 cc--; 1832 next: 1833 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1834 if (!ISSET(lsr, LSR_RCV_MASK)) 1835 break; 1836 } 1837 1838 /* 1839 * Current string of incoming characters ended because 1840 * no more data was available or we ran out of space. 1841 * Schedule a receive event if any data was received. 1842 * If we're out of space, turn off receive interrupts. 1843 */ 1844 sc->sc_rbput = put; 1845 sc->sc_rbavail = cc; 1846 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1847 sc->sc_rx_ready = 1; 1848 1849 /* 1850 * See if we are in danger of overflowing a buffer. If 1851 * so, use hardware flow control to ease the pressure. 1852 */ 1853 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1854 cc < sc->sc_r_hiwat) { 1855 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1856 com_hwiflow(sc); 1857 } 1858 1859 /* 1860 * If we're out of space, disable receive interrupts 1861 * until the queue has drained a bit. 1862 */ 1863 if (!cc) { 1864 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1865 #ifdef COM_PXA2X0 1866 if (sc->sc_type == COM_TYPE_PXA2x0) 1867 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 1868 else 1869 #endif 1870 CLR(sc->sc_ier, IER_ERXRDY); 1871 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1872 } 1873 } else { 1874 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 1875 (void) CSR_READ_1(regsp, COM_REG_RXDATA); 1876 continue; 1877 } 1878 } 1879 1880 msr = CSR_READ_1(regsp, COM_REG_MSR); 1881 delta = msr ^ sc->sc_msr; 1882 sc->sc_msr = msr; 1883 if ((sc->sc_pps_state.ppsparam.mode & PPS_CAPTUREBOTH) && 1884 (delta & MSR_DCD)) { 1885 pps_capture(&sc->sc_pps_state); 1886 pps_event(&sc->sc_pps_state, 1887 (msr & MSR_DCD) ? 1888 PPS_CAPTUREASSERT : 1889 PPS_CAPTURECLEAR); 1890 } 1891 1892 /* 1893 * Process normal status changes 1894 */ 1895 if (ISSET(delta, sc->sc_msr_mask)) { 1896 SET(sc->sc_msr_delta, delta); 1897 1898 /* 1899 * Stop output immediately if we lose the output 1900 * flow control signal or carrier detect. 1901 */ 1902 if (ISSET(~msr, sc->sc_msr_mask)) { 1903 sc->sc_tbc = 0; 1904 sc->sc_heldtbc = 0; 1905 #ifdef COM_DEBUG 1906 if (com_debug) 1907 comstatus(sc, "comintr "); 1908 #endif 1909 } 1910 1911 sc->sc_st_check = 1; 1912 } 1913 } while (!ISSET((iir = 1914 CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND) && 1915 /* 1916 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 1917 * by IIR read, so we can't do this way: `process all interrupts, 1918 * then do TX if possble'. 1919 */ 1920 (iir & IIR_IMASK) != IIR_TXRDY); 1921 1922 /* 1923 * Read LSR again, since there may be an interrupt between 1924 * the last LSR read and IIR read above. 1925 */ 1926 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1927 1928 /* 1929 * See if data can be transmitted as well. 1930 * Schedule tx done event if no data left 1931 * and tty was marked busy. 1932 */ 1933 if (ISSET(lsr, LSR_TXRDY)) { 1934 /* 1935 * If we've delayed a parameter change, do it now, and restart 1936 * output. 1937 */ 1938 if (sc->sc_heldchange) { 1939 com_loadchannelregs(sc); 1940 sc->sc_heldchange = 0; 1941 sc->sc_tbc = sc->sc_heldtbc; 1942 sc->sc_heldtbc = 0; 1943 } 1944 1945 /* Output the next chunk of the contiguous buffer, if any. */ 1946 if (sc->sc_tbc > 0) { 1947 u_int n; 1948 1949 n = sc->sc_tbc; 1950 if (n > sc->sc_fifolen) 1951 n = sc->sc_fifolen; 1952 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1953 sc->sc_tbc -= n; 1954 sc->sc_tba += n; 1955 } else { 1956 /* Disable transmit completion interrupts if necessary. */ 1957 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1958 CLR(sc->sc_ier, IER_ETXRDY); 1959 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1960 } 1961 if (sc->sc_tx_busy) { 1962 sc->sc_tx_busy = 0; 1963 sc->sc_tx_done = 1; 1964 } 1965 } 1966 } 1967 1968 if (!ISSET((iir = CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND)) 1969 goto again; 1970 1971 mutex_spin_exit(&sc->sc_lock); 1972 1973 /* Wake up the poller. */ 1974 softint_schedule(sc->sc_si); 1975 1976 #if NRND > 0 && defined(RND_COM) 1977 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1978 #endif 1979 1980 return (1); 1981 } 1982 1983 /* 1984 * The following functions are polled getc and putc routines, shared 1985 * by the console and kgdb glue. 1986 * 1987 * The read-ahead code is so that you can detect pending in-band 1988 * cn_magic in polled mode while doing output rather than having to 1989 * wait until the kernel decides it needs input. 1990 */ 1991 1992 #define MAX_READAHEAD 20 1993 static int com_readahead[MAX_READAHEAD]; 1994 static int com_readaheadcount = 0; 1995 1996 int 1997 com_common_getc(dev_t dev, struct com_regs *regsp) 1998 { 1999 int s = splserial(); 2000 u_char stat, c; 2001 2002 /* got a character from reading things earlier */ 2003 if (com_readaheadcount > 0) { 2004 int i; 2005 2006 c = com_readahead[0]; 2007 for (i = 1; i < com_readaheadcount; i++) { 2008 com_readahead[i-1] = com_readahead[i]; 2009 } 2010 com_readaheadcount--; 2011 splx(s); 2012 return (c); 2013 } 2014 2015 /* block until a character becomes available */ 2016 while (!ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) 2017 ; 2018 2019 c = CSR_READ_1(regsp, COM_REG_RXDATA); 2020 stat = CSR_READ_1(regsp, COM_REG_IIR); 2021 { 2022 int cn_trapped = 0; /* unused */ 2023 #ifdef DDB 2024 extern int db_active; 2025 if (!db_active) 2026 #endif 2027 cn_check_magic(dev, c, com_cnm_state); 2028 } 2029 splx(s); 2030 return (c); 2031 } 2032 2033 void 2034 com_common_putc(dev_t dev, struct com_regs *regsp, int c) 2035 { 2036 int s = splserial(); 2037 int cin, stat, timo; 2038 2039 if (com_readaheadcount < MAX_READAHEAD 2040 && ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) { 2041 int cn_trapped = 0; 2042 cin = CSR_READ_1(regsp, COM_REG_RXDATA); 2043 stat = CSR_READ_1(regsp, COM_REG_IIR); 2044 cn_check_magic(dev, cin, com_cnm_state); 2045 com_readahead[com_readaheadcount++] = cin; 2046 } 2047 2048 /* wait for any pending transmission to finish */ 2049 timo = 150000; 2050 while (!ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_TXRDY) && --timo) 2051 continue; 2052 2053 CSR_WRITE_1(regsp, COM_REG_TXDATA, c); 2054 COM_BARRIER(regsp, BR | BW); 2055 2056 splx(s); 2057 } 2058 2059 /* 2060 * Initialize UART for use as console or KGDB line. 2061 */ 2062 int 2063 cominit(struct com_regs *regsp, int rate, int frequency, int type, 2064 tcflag_t cflag) 2065 { 2066 2067 if (bus_space_map(regsp->cr_iot, regsp->cr_iobase, regsp->cr_nports, 0, 2068 ®sp->cr_ioh)) 2069 return (ENOMEM); /* ??? */ 2070 2071 rate = comspeed(rate, frequency, type); 2072 if (type != COM_TYPE_AU1x00) { 2073 /* no EFR on alchemy */ 2074 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 2075 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 2076 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_DLAB); 2077 CSR_WRITE_1(regsp, COM_REG_DLBL, rate & 0xff); 2078 CSR_WRITE_1(regsp, COM_REG_DLBH, rate >> 8); 2079 } else { 2080 CSR_WRITE_1(regsp, COM_REG_DLBL, rate); 2081 } 2082 CSR_WRITE_1(regsp, COM_REG_LCR, cflag2lcr(cflag)); 2083 CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS); 2084 CSR_WRITE_1(regsp, COM_REG_FIFO, 2085 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2086 #ifdef COM_PXA2X0 2087 if (type == COM_TYPE_PXA2x0) 2088 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 2089 else 2090 #endif 2091 CSR_WRITE_1(regsp, COM_REG_IER, 0); 2092 2093 return (0); 2094 } 2095 2096 /* 2097 * Following are all routines needed for COM to act as console 2098 */ 2099 struct consdev comcons = { 2100 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2101 NODEV, CN_NORMAL 2102 }; 2103 2104 2105 int 2106 comcnattach1(struct com_regs *regsp, int rate, int frequency, int type, 2107 tcflag_t cflag) 2108 { 2109 int res; 2110 2111 comconsregs = *regsp; 2112 2113 res = cominit(&comconsregs, rate, frequency, type, cflag); 2114 if (res) 2115 return (res); 2116 2117 cn_tab = &comcons; 2118 cn_init_magic(&com_cnm_state); 2119 cn_set_magic("\047\001"); /* default magic is BREAK */ 2120 2121 comconsrate = rate; 2122 comconscflag = cflag; 2123 2124 return (0); 2125 } 2126 2127 int 2128 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2129 int type, tcflag_t cflag) 2130 { 2131 struct com_regs regs; 2132 2133 memset(®s, 0, sizeof regs); 2134 regs.cr_iot = iot; 2135 regs.cr_iobase = iobase; 2136 regs.cr_nports = COM_NPORTS; 2137 #ifdef COM_REGMAP 2138 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2139 #endif 2140 2141 return comcnattach1(®s, rate, frequency, type, cflag); 2142 } 2143 2144 int 2145 comcngetc(dev_t dev) 2146 { 2147 2148 return (com_common_getc(dev, &comconsregs)); 2149 } 2150 2151 /* 2152 * Console kernel output character routine. 2153 */ 2154 void 2155 comcnputc(dev_t dev, int c) 2156 { 2157 2158 com_common_putc(dev, &comconsregs, c); 2159 } 2160 2161 void 2162 comcnpollc(dev_t dev, int on) 2163 { 2164 2165 } 2166 2167 #ifdef KGDB 2168 int 2169 com_kgdb_attach1(struct com_regs *regsp, int rate, int frequency, int type, 2170 tcflag_t cflag) 2171 { 2172 int res; 2173 2174 if (regsp->cr_iot == comconsregs.cr_iot && 2175 regsp->cr_iobase == comconsregs.cr_iobase) { 2176 #if !defined(DDB) 2177 return (EBUSY); /* cannot share with console */ 2178 #else 2179 comkgdbregs = *regsp; 2180 comkgdbregs.cr_ioh = comconsregs.cr_ioh; 2181 #endif 2182 } else { 2183 comkgdbregs = *regsp; 2184 res = cominit(&comkgdbregs, rate, frequency, type, cflag); 2185 if (res) 2186 return (res); 2187 2188 /* 2189 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2190 * expects this to be initialized 2191 */ 2192 cn_init_magic(&com_cnm_state); 2193 cn_set_magic("\047\001"); 2194 } 2195 2196 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2197 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2198 2199 return (0); 2200 } 2201 2202 int 2203 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2204 int frequency, int type, tcflag_t cflag) 2205 { 2206 struct com_regs regs; 2207 2208 regs.cr_iot = iot; 2209 regs.cr_nports = COM_NPORTS; 2210 regs.cr_iobase = iobase; 2211 #ifdef COM_REGMAP 2212 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2213 #endif 2214 2215 return com_kgdb_attach1(®s, rate, frequency, type, cflag); 2216 } 2217 2218 /* ARGSUSED */ 2219 int 2220 com_kgdb_getc(void *arg) 2221 { 2222 2223 return (com_common_getc(NODEV, &comkgdbregs)); 2224 } 2225 2226 /* ARGSUSED */ 2227 void 2228 com_kgdb_putc(void *arg, int c) 2229 { 2230 2231 com_common_putc(NODEV, &comkgdbregs, c); 2232 } 2233 #endif /* KGDB */ 2234 2235 /* helper function to identify the com ports used by 2236 console or KGDB (and not yet autoconf attached) */ 2237 int 2238 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2239 { 2240 bus_space_handle_t help; 2241 2242 if (!comconsattached && 2243 iot == comconsregs.cr_iot && iobase == comconsregs.cr_iobase) 2244 help = comconsregs.cr_ioh; 2245 #ifdef KGDB 2246 else if (!com_kgdb_attached && 2247 iot == comkgdbregs.cr_iot && iobase == comkgdbregs.cr_iobase) 2248 help = comkgdbregs.cr_ioh; 2249 #endif 2250 else 2251 return (0); 2252 2253 if (ioh) 2254 *ioh = help; 2255 return (1); 2256 } 2257 2258 /* 2259 * this routine exists to serve as a shutdown hook for systems that 2260 * have firmware which doesn't interact properly with a com device in 2261 * FIFO mode. 2262 */ 2263 void 2264 com_cleanup(void *arg) 2265 { 2266 struct com_softc *sc = arg; 2267 2268 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 2269 CSR_WRITE_1(&sc->sc_regs, COM_REG_FIFO, 0); 2270 } 2271 2272 bool 2273 com_resume(device_t dev) 2274 { 2275 struct com_softc *sc = device_private(dev); 2276 2277 mutex_spin_enter(&sc->sc_lock); 2278 com_loadchannelregs(sc); 2279 mutex_spin_exit(&sc->sc_lock); 2280 2281 return true; 2282 } 2283
Indexes created Sun Oct 19 22:09:57 GMT 2025