com.c revision 1.235
1 /* $NetBSD: com.c,v 1.235 2005/09/04 09:48:53 kleink Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.235 2005/09/04 09:48:53 kleink Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 125 #include <machine/intr.h> 126 #include <machine/bus.h> 127 128 #include <dev/ic/comreg.h> 129 #include <dev/ic/comvar.h> 130 #include <dev/ic/ns16550reg.h> 131 #include <dev/ic/st16650reg.h> 132 #ifdef COM_HAYESP 133 #include <dev/ic/hayespreg.h> 134 #endif 135 #define com_lcr com_cfcr 136 #include <dev/cons.h> 137 138 #ifdef COM_HAYESP 139 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 140 #endif 141 142 static void com_enable_debugport(struct com_softc *); 143 144 void com_config(struct com_softc *); 145 void com_shutdown(struct com_softc *); 146 int comspeed(long, long, int); 147 static u_char cflag2lcr(tcflag_t); 148 int comparam(struct tty *, struct termios *); 149 void comstart(struct tty *); 150 int comhwiflow(struct tty *, int); 151 152 void com_loadchannelregs(struct com_softc *); 153 void com_hwiflow(struct com_softc *); 154 void com_break(struct com_softc *, int); 155 void com_modem(struct com_softc *, int); 156 void tiocm_to_com(struct com_softc *, u_long, int); 157 int com_to_tiocm(struct com_softc *); 158 void com_iflush(struct com_softc *); 159 160 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 161 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 162 163 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 164 bus_space_handle_t *); 165 166 int comcngetc(dev_t); 167 void comcnputc(dev_t, int); 168 void comcnpollc(dev_t, int); 169 170 #define integrate static inline 171 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 172 void comsoft(void *); 173 #else 174 #ifndef __NO_SOFT_SERIAL_INTERRUPT 175 void comsoft(void); 176 #else 177 void comsoft(void *); 178 static struct callout comsoft_callout = CALLOUT_INITIALIZER; 179 #endif 180 #endif 181 integrate void com_rxsoft(struct com_softc *, struct tty *); 182 integrate void com_txsoft(struct com_softc *, struct tty *); 183 integrate void com_stsoft(struct com_softc *, struct tty *); 184 integrate void com_schedrx(struct com_softc *); 185 void comdiag(void *); 186 187 extern struct cfdriver com_cd; 188 189 dev_type_open(comopen); 190 dev_type_close(comclose); 191 dev_type_read(comread); 192 dev_type_write(comwrite); 193 dev_type_ioctl(comioctl); 194 dev_type_stop(comstop); 195 dev_type_tty(comtty); 196 dev_type_poll(compoll); 197 198 const struct cdevsw com_cdevsw = { 199 comopen, comclose, comread, comwrite, comioctl, 200 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 201 }; 202 203 /* 204 * Make this an option variable one can patch. 205 * But be warned: this must be a power of 2! 206 */ 207 u_int com_rbuf_size = COM_RING_SIZE; 208 209 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 210 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 211 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 212 213 static bus_addr_t comconsaddr; 214 static bus_space_tag_t comconstag; 215 static bus_space_handle_t comconsioh; 216 static int comconsattached; 217 static int comconsrate; 218 static tcflag_t comconscflag; 219 static struct cnm_state com_cnm_state; 220 221 static int ppscap = 222 PPS_TSFMT_TSPEC | 223 PPS_CAPTUREASSERT | 224 PPS_CAPTURECLEAR | 225 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 226 227 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 228 #ifdef __NO_SOFT_SERIAL_INTERRUPT 229 volatile int com_softintr_scheduled; 230 #endif 231 #endif 232 233 #ifdef KGDB 234 #include <sys/kgdb.h> 235 236 static bus_addr_t com_kgdb_addr; 237 static bus_space_tag_t com_kgdb_iot; 238 static bus_space_handle_t com_kgdb_ioh; 239 static int com_kgdb_attached; 240 241 int com_kgdb_getc(void *); 242 void com_kgdb_putc(void *, int); 243 #endif /* KGDB */ 244 245 #define COMUNIT_MASK 0x7ffff 246 #define COMDIALOUT_MASK 0x80000 247 248 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 249 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 250 251 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 252 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 253 254 #define BR BUS_SPACE_BARRIER_READ 255 #define BW BUS_SPACE_BARRIER_WRITE 256 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 257 258 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 259 260 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 261 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 262 263 #else 264 265 #define COM_LOCK(sc) 266 #define COM_UNLOCK(sc) 267 268 #endif 269 270 /*ARGSUSED*/ 271 int 272 comspeed(long speed, long frequency, int type) 273 { 274 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 275 276 int x, err; 277 278 #if 0 279 if (speed == 0) 280 return (0); 281 #endif 282 if (speed <= 0) 283 return (-1); 284 x = divrnd(frequency / 16, speed); 285 if (x <= 0) 286 return (-1); 287 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 288 if (err < 0) 289 err = -err; 290 if (err > COM_TOLERANCE) 291 return (-1); 292 return (x); 293 294 #undef divrnd 295 } 296 297 #ifdef COM_DEBUG 298 int com_debug = 0; 299 300 void comstatus(struct com_softc *, const char *); 301 void 302 comstatus(struct com_softc *sc, const char *str) 303 { 304 struct tty *tp = sc->sc_tty; 305 306 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 307 sc->sc_dev.dv_xname, str, 308 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 309 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 310 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 311 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 312 sc->sc_tx_stopped ? '+' : '-'); 313 314 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 315 sc->sc_dev.dv_xname, str, 316 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 317 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 318 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 319 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 320 sc->sc_rx_flags); 321 } 322 #endif 323 324 int 325 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 326 { 327 328 /* force access to id reg */ 329 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 330 bus_space_write_1(iot, ioh, com_iir, 0); 331 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 332 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 333 return (0); 334 335 return (1); 336 } 337 338 #ifdef COM_HAYESP 339 int 340 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 341 { 342 char val, dips; 343 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 344 bus_space_tag_t iot = sc->sc_iot; 345 346 /* 347 * Hayes ESP cards have two iobases. One is for compatibility with 348 * 16550 serial chips, and at the same ISA PC base addresses. The 349 * other is for ESP-specific enhanced features, and lies at a 350 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 351 */ 352 353 /* Test for ESP signature */ 354 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 355 return (0); 356 357 /* 358 * ESP is present at ESP enhanced base address; unknown com port 359 */ 360 361 /* Get the dip-switch configurations */ 362 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 363 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 364 365 /* Determine which com port this ESP card services: bits 0,1 of */ 366 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 367 if (sc->sc_iobase != combaselist[dips & 0x03]) 368 return (0); 369 370 printf(": ESP"); 371 372 /* Check ESP Self Test bits. */ 373 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 374 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 375 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 376 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 377 if ((val & 0x70) < 0x20) { 378 printf("-old (%o)", val & 0x70); 379 /* we do not support the necessary features */ 380 return (0); 381 } 382 383 /* Check for ability to emulate 16550: bit 8 == 1 */ 384 if ((dips & 0x80) == 0) { 385 printf(" slave"); 386 /* XXX Does slave really mean no 16550 support?? */ 387 return (0); 388 } 389 390 /* 391 * If we made it this far, we are a full-featured ESP v2.0 (or 392 * better), at the correct com port address. 393 */ 394 395 sc->sc_type = COM_TYPE_HAYESP; 396 printf(", 1024 byte fifo\n"); 397 return (1); 398 } 399 #endif 400 401 static void 402 com_enable_debugport(struct com_softc *sc) 403 { 404 int s; 405 406 /* Turn on line break interrupt, set carrier. */ 407 s = splserial(); 408 COM_LOCK(sc); 409 sc->sc_ier = IER_ERXRDY; 410 #ifdef COM_PXA2X0 411 if (sc->sc_type == COM_TYPE_PXA2x0) 412 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 413 #endif 414 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 415 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 416 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 417 COM_UNLOCK(sc); 418 splx(s); 419 } 420 421 void 422 com_attach_subr(struct com_softc *sc) 423 { 424 bus_addr_t iobase = sc->sc_iobase; 425 bus_space_tag_t iot = sc->sc_iot; 426 bus_space_handle_t ioh = sc->sc_ioh; 427 struct tty *tp; 428 #ifdef COM_16650 429 u_int8_t lcr; 430 #endif 431 #ifdef COM_HAYESP 432 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 433 int *hayespp; 434 #endif 435 const char *fifo_msg = NULL; 436 437 callout_init(&sc->sc_diag_callout); 438 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 439 simple_lock_init(&sc->sc_lock); 440 #endif 441 442 /* Disable interrupts before configuring the device. */ 443 #ifdef COM_PXA2X0 444 if (sc->sc_type == COM_TYPE_PXA2x0) 445 sc->sc_ier = IER_EUART; 446 else 447 #endif 448 sc->sc_ier = 0; 449 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 450 451 if (iot == comconstag && iobase == comconsaddr) { 452 comconsattached = 1; 453 454 /* Make sure the console is always "hardwired". */ 455 delay(10000); /* wait for output to finish */ 456 SET(sc->sc_hwflags, COM_HW_CONSOLE); 457 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 458 } 459 460 #ifdef COM_HAYESP 461 sc->sc_prescaler = 0; /* set prescaler to x1. */ 462 463 /* Look for a Hayes ESP board. */ 464 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 465 bus_space_handle_t hayespioh; 466 467 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 468 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 469 continue; 470 if (comprobeHAYESP(hayespioh, sc)) { 471 sc->sc_hayespioh = hayespioh; 472 sc->sc_fifolen = 1024; 473 474 break; 475 } 476 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 477 } 478 /* No ESP; look for other things. */ 479 if (sc->sc_type != COM_TYPE_HAYESP) { 480 #endif 481 sc->sc_fifolen = 1; 482 /* look for a NS 16550AF UART with FIFOs */ 483 bus_space_write_1(iot, ioh, com_fifo, 484 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 485 delay(100); 486 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 487 == IIR_FIFO_MASK) 488 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 489 == FIFO_TRIGGER_14) { 490 SET(sc->sc_hwflags, COM_HW_FIFO); 491 492 #ifdef COM_16650 493 /* 494 * IIR changes into the EFR if LCR is set to LCR_EERS 495 * on 16650s. We also know IIR != 0 at this point. 496 * Write 0 into the EFR, and read it. If the result 497 * is 0, we have a 16650. 498 * 499 * Older 16650s were broken; the test to detect them 500 * is taken from the Linux driver. Apparently 501 * setting DLAB enable gives access to the EFR on 502 * these chips. 503 */ 504 lcr = bus_space_read_1(iot, ioh, com_lcr); 505 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 506 bus_space_write_1(iot, ioh, com_efr, 0); 507 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 508 bus_space_write_1(iot, ioh, com_lcr, 509 lcr | LCR_DLAB); 510 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 511 CLR(sc->sc_hwflags, COM_HW_FIFO); 512 sc->sc_fifolen = 0; 513 } else { 514 SET(sc->sc_hwflags, COM_HW_FLOW); 515 sc->sc_fifolen = 32; 516 } 517 } else 518 #endif 519 sc->sc_fifolen = 16; 520 521 #ifdef COM_16650 522 bus_space_write_1(iot, ioh, com_lcr, lcr); 523 if (sc->sc_fifolen == 0) 524 fifo_msg = "st16650, broken fifo"; 525 else if (sc->sc_fifolen == 32) 526 fifo_msg = "st16650a, working fifo"; 527 else 528 #endif 529 fifo_msg = "ns16550a, working fifo"; 530 } else 531 fifo_msg = "ns16550, broken fifo"; 532 else 533 fifo_msg = "ns8250 or ns16450, no fifo"; 534 bus_space_write_1(iot, ioh, com_fifo, 0); 535 /* 536 * Some chips will clear down both Tx and Rx FIFOs when zero is 537 * written to com_fifo. If this chip is the console, writing zero 538 * results in some of the chip/FIFO description being lost, so delay 539 * printing it until now. 540 */ 541 delay(10); 542 aprint_normal(": %s\n", fifo_msg); 543 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 544 sc->sc_fifolen = 1; 545 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 546 } 547 #ifdef COM_HAYESP 548 } 549 #endif 550 551 tp = ttymalloc(); 552 tp->t_oproc = comstart; 553 tp->t_param = comparam; 554 tp->t_hwiflow = comhwiflow; 555 556 sc->sc_tty = tp; 557 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 558 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 559 sc->sc_rbavail = com_rbuf_size; 560 if (sc->sc_rbuf == NULL) { 561 aprint_error("%s: unable to allocate ring buffer\n", 562 sc->sc_dev.dv_xname); 563 return; 564 } 565 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 566 567 tty_attach(tp); 568 569 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 570 SET(sc->sc_mcr, MCR_IENABLE); 571 572 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 573 int maj; 574 575 /* locate the major number */ 576 maj = cdevsw_lookup_major(&com_cdevsw); 577 578 tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 579 580 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 581 } 582 583 #ifdef KGDB 584 /* 585 * Allow kgdb to "take over" this port. If this is 586 * not the console and is the kgdb device, it has 587 * exclusive use. If it's the console _and_ the 588 * kgdb device, it doesn't. 589 */ 590 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 591 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 592 com_kgdb_attached = 1; 593 594 SET(sc->sc_hwflags, COM_HW_KGDB); 595 } 596 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 597 } 598 #endif 599 600 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 601 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 602 #endif 603 604 #if NRND > 0 && defined(RND_COM) 605 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 606 RND_TYPE_TTY, 0); 607 #endif 608 609 /* if there are no enable/disable functions, assume the device 610 is always enabled */ 611 if (!sc->enable) 612 sc->enabled = 1; 613 614 com_config(sc); 615 616 SET(sc->sc_hwflags, COM_HW_DEV_OK); 617 } 618 619 void 620 com_config(struct com_softc *sc) 621 { 622 bus_space_tag_t iot = sc->sc_iot; 623 bus_space_handle_t ioh = sc->sc_ioh; 624 625 /* Disable interrupts before configuring the device. */ 626 #ifdef COM_PXA2X0 627 if (sc->sc_type == COM_TYPE_PXA2x0) 628 sc->sc_ier = IER_EUART; 629 else 630 #endif 631 sc->sc_ier = 0; 632 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 633 (void) bus_space_read_1(iot, ioh, com_iir); 634 635 #ifdef COM_HAYESP 636 /* Look for a Hayes ESP board. */ 637 if (sc->sc_type == COM_TYPE_HAYESP) { 638 sc->sc_fifolen = 1024; 639 640 /* Set 16550 compatibility mode */ 641 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 642 HAYESP_SETMODE); 643 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 644 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 645 HAYESP_MODE_SCALE); 646 647 /* Set RTS/CTS flow control */ 648 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 649 HAYESP_SETFLOWTYPE); 650 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 651 HAYESP_FLOW_RTS); 652 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 653 HAYESP_FLOW_CTS); 654 655 /* Set flow control levels */ 656 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 657 HAYESP_SETRXFLOW); 658 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 659 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 660 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 661 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 662 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 663 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 664 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 665 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 666 } 667 #endif 668 669 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 670 com_enable_debugport(sc); 671 } 672 673 int 674 com_detach(struct device *self, int flags) 675 { 676 struct com_softc *sc = (struct com_softc *)self; 677 int maj, mn; 678 679 /* locate the major number */ 680 maj = cdevsw_lookup_major(&com_cdevsw); 681 682 /* Nuke the vnodes for any open instances. */ 683 mn = self->dv_unit; 684 vdevgone(maj, mn, mn, VCHR); 685 686 mn |= COMDIALOUT_MASK; 687 vdevgone(maj, mn, mn, VCHR); 688 689 if (sc->sc_rbuf == NULL) { 690 /* 691 * Ring buffer allocation failed in the com_attach_subr, 692 * only the tty is allocated, and nothing else. 693 */ 694 ttyfree(sc->sc_tty); 695 return 0; 696 } 697 698 /* Free the receive buffer. */ 699 free(sc->sc_rbuf, M_DEVBUF); 700 701 /* Detach and free the tty. */ 702 tty_detach(sc->sc_tty); 703 ttyfree(sc->sc_tty); 704 705 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 706 /* Unhook the soft interrupt handler. */ 707 softintr_disestablish(sc->sc_si); 708 #endif 709 710 #if NRND > 0 && defined(RND_COM) 711 /* Unhook the entropy source. */ 712 rnd_detach_source(&sc->rnd_source); 713 #endif 714 715 return (0); 716 } 717 718 int 719 com_activate(struct device *self, enum devact act) 720 { 721 struct com_softc *sc = (struct com_softc *)self; 722 int s, rv = 0; 723 724 s = splserial(); 725 COM_LOCK(sc); 726 switch (act) { 727 case DVACT_ACTIVATE: 728 rv = EOPNOTSUPP; 729 break; 730 731 case DVACT_DEACTIVATE: 732 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 733 rv = EBUSY; 734 break; 735 } 736 737 if (sc->disable != NULL && sc->enabled != 0) { 738 (*sc->disable)(sc); 739 sc->enabled = 0; 740 } 741 break; 742 } 743 744 COM_UNLOCK(sc); 745 splx(s); 746 return (rv); 747 } 748 749 void 750 com_shutdown(struct com_softc *sc) 751 { 752 struct tty *tp = sc->sc_tty; 753 int s; 754 755 s = splserial(); 756 COM_LOCK(sc); 757 758 /* If we were asserting flow control, then deassert it. */ 759 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 760 com_hwiflow(sc); 761 762 /* Clear any break condition set with TIOCSBRK. */ 763 com_break(sc, 0); 764 765 /* Turn off PPS capture on last close. */ 766 sc->sc_ppsmask = 0; 767 sc->ppsparam.mode = 0; 768 769 /* 770 * Hang up if necessary. Wait a bit, so the other side has time to 771 * notice even if we immediately open the port again. 772 * Avoid tsleeping above splhigh(). 773 */ 774 if (ISSET(tp->t_cflag, HUPCL)) { 775 com_modem(sc, 0); 776 COM_UNLOCK(sc); 777 splx(s); 778 /* XXX tsleep will only timeout */ 779 (void) tsleep(sc, TTIPRI, ttclos, hz); 780 s = splserial(); 781 COM_LOCK(sc); 782 } 783 784 /* Turn off interrupts. */ 785 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 786 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 787 #ifdef COM_PXA2X0 788 if (sc->sc_type == COM_TYPE_PXA2x0) 789 sc->sc_ier |= IER_ERXTOUT; 790 #endif 791 } else 792 sc->sc_ier = 0; 793 794 #ifdef COM_PXA2X0 795 if (sc->sc_type == COM_TYPE_PXA2x0) 796 sc->sc_ier |= IER_EUART; 797 #endif 798 799 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 800 801 if (sc->disable) { 802 #ifdef DIAGNOSTIC 803 if (!sc->enabled) 804 panic("com_shutdown: not enabled?"); 805 #endif 806 (*sc->disable)(sc); 807 sc->enabled = 0; 808 } 809 COM_UNLOCK(sc); 810 splx(s); 811 } 812 813 int 814 comopen(dev_t dev, int flag, int mode, struct proc *p) 815 { 816 struct com_softc *sc; 817 struct tty *tp; 818 int s, s2; 819 int error; 820 821 sc = device_lookup(&com_cd, COMUNIT(dev)); 822 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 823 sc->sc_rbuf == NULL) 824 return (ENXIO); 825 826 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 827 return (ENXIO); 828 829 #ifdef KGDB 830 /* 831 * If this is the kgdb port, no other use is permitted. 832 */ 833 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 834 return (EBUSY); 835 #endif 836 837 tp = sc->sc_tty; 838 839 if (ISSET(tp->t_state, TS_ISOPEN) && 840 ISSET(tp->t_state, TS_XCLUDE) && 841 p->p_ucred->cr_uid != 0) 842 return (EBUSY); 843 844 s = spltty(); 845 846 /* 847 * Do the following iff this is a first open. 848 */ 849 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 850 struct termios t; 851 852 tp->t_dev = dev; 853 854 s2 = splserial(); 855 COM_LOCK(sc); 856 857 if (sc->enable) { 858 if ((*sc->enable)(sc)) { 859 COM_UNLOCK(sc); 860 splx(s2); 861 splx(s); 862 printf("%s: device enable failed\n", 863 sc->sc_dev.dv_xname); 864 return (EIO); 865 } 866 sc->enabled = 1; 867 com_config(sc); 868 } 869 870 /* Turn on interrupts. */ 871 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 872 #ifdef COM_PXA2X0 873 if (sc->sc_type == COM_TYPE_PXA2x0) 874 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 875 #endif 876 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 877 878 /* Fetch the current modem control status, needed later. */ 879 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 880 881 /* Clear PPS capture state on first open. */ 882 sc->sc_ppsmask = 0; 883 sc->ppsparam.mode = 0; 884 885 COM_UNLOCK(sc); 886 splx(s2); 887 888 /* 889 * Initialize the termios status to the defaults. Add in the 890 * sticky bits from TIOCSFLAGS. 891 */ 892 t.c_ispeed = 0; 893 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 894 t.c_ospeed = comconsrate; 895 t.c_cflag = comconscflag; 896 } else { 897 t.c_ospeed = TTYDEF_SPEED; 898 t.c_cflag = TTYDEF_CFLAG; 899 } 900 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 901 SET(t.c_cflag, CLOCAL); 902 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 903 SET(t.c_cflag, CRTSCTS); 904 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 905 SET(t.c_cflag, MDMBUF); 906 /* Make sure comparam() will do something. */ 907 tp->t_ospeed = 0; 908 (void) comparam(tp, &t); 909 tp->t_iflag = TTYDEF_IFLAG; 910 tp->t_oflag = TTYDEF_OFLAG; 911 tp->t_lflag = TTYDEF_LFLAG; 912 ttychars(tp); 913 ttsetwater(tp); 914 915 s2 = splserial(); 916 COM_LOCK(sc); 917 918 /* 919 * Turn on DTR. We must always do this, even if carrier is not 920 * present, because otherwise we'd have to use TIOCSDTR 921 * immediately after setting CLOCAL, which applications do not 922 * expect. We always assert DTR while the device is open 923 * unless explicitly requested to deassert it. 924 */ 925 com_modem(sc, 1); 926 927 /* Clear the input ring, and unblock. */ 928 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 929 sc->sc_rbavail = com_rbuf_size; 930 com_iflush(sc); 931 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 932 com_hwiflow(sc); 933 934 #ifdef COM_DEBUG 935 if (com_debug) 936 comstatus(sc, "comopen "); 937 #endif 938 939 COM_UNLOCK(sc); 940 splx(s2); 941 } 942 943 splx(s); 944 945 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 946 if (error) 947 goto bad; 948 949 error = (*tp->t_linesw->l_open)(dev, tp); 950 if (error) 951 goto bad; 952 953 return (0); 954 955 bad: 956 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 957 /* 958 * We failed to open the device, and nobody else had it opened. 959 * Clean up the state as appropriate. 960 */ 961 com_shutdown(sc); 962 } 963 964 return (error); 965 } 966 967 int 968 comclose(dev_t dev, int flag, int mode, struct proc *p) 969 { 970 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 971 struct tty *tp = sc->sc_tty; 972 973 /* XXX This is for cons.c. */ 974 if (!ISSET(tp->t_state, TS_ISOPEN)) 975 return (0); 976 977 (*tp->t_linesw->l_close)(tp, flag); 978 ttyclose(tp); 979 980 if (COM_ISALIVE(sc) == 0) 981 return (0); 982 983 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 984 /* 985 * Although we got a last close, the device may still be in 986 * use; e.g. if this was the dialout node, and there are still 987 * processes waiting for carrier on the non-dialout node. 988 */ 989 com_shutdown(sc); 990 } 991 992 return (0); 993 } 994 995 int 996 comread(dev_t dev, struct uio *uio, int flag) 997 { 998 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 999 struct tty *tp = sc->sc_tty; 1000 1001 if (COM_ISALIVE(sc) == 0) 1002 return (EIO); 1003 1004 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 1005 } 1006 1007 int 1008 comwrite(dev_t dev, struct uio *uio, int flag) 1009 { 1010 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1011 struct tty *tp = sc->sc_tty; 1012 1013 if (COM_ISALIVE(sc) == 0) 1014 return (EIO); 1015 1016 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1017 } 1018 1019 int 1020 compoll(dev_t dev, int events, struct proc *p) 1021 { 1022 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1023 struct tty *tp = sc->sc_tty; 1024 1025 if (COM_ISALIVE(sc) == 0) 1026 return (POLLHUP); 1027 1028 return ((*tp->t_linesw->l_poll)(tp, events, p)); 1029 } 1030 1031 struct tty * 1032 comtty(dev_t dev) 1033 { 1034 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1035 struct tty *tp = sc->sc_tty; 1036 1037 return (tp); 1038 } 1039 1040 int 1041 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 1042 { 1043 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1044 struct tty *tp = sc->sc_tty; 1045 int error; 1046 int s; 1047 1048 if (COM_ISALIVE(sc) == 0) 1049 return (EIO); 1050 1051 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1052 if (error != EPASSTHROUGH) 1053 return (error); 1054 1055 error = ttioctl(tp, cmd, data, flag, p); 1056 if (error != EPASSTHROUGH) 1057 return (error); 1058 1059 error = 0; 1060 1061 s = splserial(); 1062 COM_LOCK(sc); 1063 1064 switch (cmd) { 1065 case TIOCSBRK: 1066 com_break(sc, 1); 1067 break; 1068 1069 case TIOCCBRK: 1070 com_break(sc, 0); 1071 break; 1072 1073 case TIOCSDTR: 1074 com_modem(sc, 1); 1075 break; 1076 1077 case TIOCCDTR: 1078 com_modem(sc, 0); 1079 break; 1080 1081 case TIOCGFLAGS: 1082 *(int *)data = sc->sc_swflags; 1083 break; 1084 1085 case TIOCSFLAGS: 1086 error = suser(p->p_ucred, &p->p_acflag); 1087 if (error) 1088 break; 1089 sc->sc_swflags = *(int *)data; 1090 break; 1091 1092 case TIOCMSET: 1093 case TIOCMBIS: 1094 case TIOCMBIC: 1095 tiocm_to_com(sc, cmd, *(int *)data); 1096 break; 1097 1098 case TIOCMGET: 1099 *(int *)data = com_to_tiocm(sc); 1100 break; 1101 1102 case PPS_IOC_CREATE: 1103 break; 1104 1105 case PPS_IOC_DESTROY: 1106 break; 1107 1108 case PPS_IOC_GETPARAMS: { 1109 pps_params_t *pp; 1110 pp = (pps_params_t *)data; 1111 *pp = sc->ppsparam; 1112 break; 1113 } 1114 1115 case PPS_IOC_SETPARAMS: { 1116 pps_params_t *pp; 1117 int mode; 1118 pp = (pps_params_t *)data; 1119 if (pp->mode & ~ppscap) { 1120 error = EINVAL; 1121 break; 1122 } 1123 sc->ppsparam = *pp; 1124 /* 1125 * Compute msr masks from user-specified timestamp state. 1126 */ 1127 mode = sc->ppsparam.mode; 1128 switch (mode & PPS_CAPTUREBOTH) { 1129 case 0: 1130 sc->sc_ppsmask = 0; 1131 break; 1132 1133 case PPS_CAPTUREASSERT: 1134 sc->sc_ppsmask = MSR_DCD; 1135 sc->sc_ppsassert = MSR_DCD; 1136 sc->sc_ppsclear = -1; 1137 break; 1138 1139 case PPS_CAPTURECLEAR: 1140 sc->sc_ppsmask = MSR_DCD; 1141 sc->sc_ppsassert = -1; 1142 sc->sc_ppsclear = 0; 1143 break; 1144 1145 case PPS_CAPTUREBOTH: 1146 sc->sc_ppsmask = MSR_DCD; 1147 sc->sc_ppsassert = MSR_DCD; 1148 sc->sc_ppsclear = 0; 1149 break; 1150 1151 default: 1152 error = EINVAL; 1153 break; 1154 } 1155 break; 1156 } 1157 1158 case PPS_IOC_GETCAP: 1159 *(int*)data = ppscap; 1160 break; 1161 1162 case PPS_IOC_FETCH: { 1163 pps_info_t *pi; 1164 pi = (pps_info_t *)data; 1165 *pi = sc->ppsinfo; 1166 break; 1167 } 1168 1169 #ifdef PPS_SYNC 1170 case PPS_IOC_KCBIND: { 1171 int edge = (*(int *)data) & PPS_CAPTUREBOTH; 1172 1173 if (edge == 0) { 1174 /* 1175 * remove binding for this source; ignore 1176 * the request if this is not the current 1177 * hardpps source 1178 */ 1179 if (pps_kc_hardpps_source == sc) { 1180 pps_kc_hardpps_source = NULL; 1181 pps_kc_hardpps_mode = 0; 1182 } 1183 } else { 1184 /* 1185 * bind hardpps to this source, replacing any 1186 * previously specified source or edges 1187 */ 1188 pps_kc_hardpps_source = sc; 1189 pps_kc_hardpps_mode = edge; 1190 } 1191 break; 1192 } 1193 #endif /* PPS_SYNC */ 1194 1195 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1196 /* 1197 * Some GPS clocks models use the falling rather than 1198 * rising edge as the on-the-second signal. 1199 * The old API has no way to specify PPS polarity. 1200 */ 1201 sc->sc_ppsmask = MSR_DCD; 1202 #ifndef PPS_TRAILING_EDGE 1203 sc->sc_ppsassert = MSR_DCD; 1204 sc->sc_ppsclear = -1; 1205 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1206 &sc->ppsinfo.assert_timestamp); 1207 #else 1208 sc->sc_ppsassert = -1; 1209 sc->sc_ppsclear = 0; 1210 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1211 &sc->ppsinfo.clear_timestamp); 1212 #endif 1213 break; 1214 1215 default: 1216 error = EPASSTHROUGH; 1217 break; 1218 } 1219 1220 COM_UNLOCK(sc); 1221 splx(s); 1222 1223 #ifdef COM_DEBUG 1224 if (com_debug) 1225 comstatus(sc, "comioctl "); 1226 #endif 1227 1228 return (error); 1229 } 1230 1231 integrate void 1232 com_schedrx(struct com_softc *sc) 1233 { 1234 1235 sc->sc_rx_ready = 1; 1236 1237 /* Wake up the poller. */ 1238 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1239 softintr_schedule(sc->sc_si); 1240 #else 1241 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1242 setsoftserial(); 1243 #else 1244 if (!com_softintr_scheduled) { 1245 com_softintr_scheduled = 1; 1246 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1247 } 1248 #endif 1249 #endif 1250 } 1251 1252 void 1253 com_break(struct com_softc *sc, int onoff) 1254 { 1255 1256 if (onoff) 1257 SET(sc->sc_lcr, LCR_SBREAK); 1258 else 1259 CLR(sc->sc_lcr, LCR_SBREAK); 1260 1261 if (!sc->sc_heldchange) { 1262 if (sc->sc_tx_busy) { 1263 sc->sc_heldtbc = sc->sc_tbc; 1264 sc->sc_tbc = 0; 1265 sc->sc_heldchange = 1; 1266 } else 1267 com_loadchannelregs(sc); 1268 } 1269 } 1270 1271 void 1272 com_modem(struct com_softc *sc, int onoff) 1273 { 1274 1275 if (sc->sc_mcr_dtr == 0) 1276 return; 1277 1278 if (onoff) 1279 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1280 else 1281 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1282 1283 if (!sc->sc_heldchange) { 1284 if (sc->sc_tx_busy) { 1285 sc->sc_heldtbc = sc->sc_tbc; 1286 sc->sc_tbc = 0; 1287 sc->sc_heldchange = 1; 1288 } else 1289 com_loadchannelregs(sc); 1290 } 1291 } 1292 1293 void 1294 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1295 { 1296 u_char combits; 1297 1298 combits = 0; 1299 if (ISSET(ttybits, TIOCM_DTR)) 1300 SET(combits, MCR_DTR); 1301 if (ISSET(ttybits, TIOCM_RTS)) 1302 SET(combits, MCR_RTS); 1303 1304 switch (how) { 1305 case TIOCMBIC: 1306 CLR(sc->sc_mcr, combits); 1307 break; 1308 1309 case TIOCMBIS: 1310 SET(sc->sc_mcr, combits); 1311 break; 1312 1313 case TIOCMSET: 1314 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1315 SET(sc->sc_mcr, combits); 1316 break; 1317 } 1318 1319 if (!sc->sc_heldchange) { 1320 if (sc->sc_tx_busy) { 1321 sc->sc_heldtbc = sc->sc_tbc; 1322 sc->sc_tbc = 0; 1323 sc->sc_heldchange = 1; 1324 } else 1325 com_loadchannelregs(sc); 1326 } 1327 } 1328 1329 int 1330 com_to_tiocm(struct com_softc *sc) 1331 { 1332 u_char combits; 1333 int ttybits = 0; 1334 1335 combits = sc->sc_mcr; 1336 if (ISSET(combits, MCR_DTR)) 1337 SET(ttybits, TIOCM_DTR); 1338 if (ISSET(combits, MCR_RTS)) 1339 SET(ttybits, TIOCM_RTS); 1340 1341 combits = sc->sc_msr; 1342 if (ISSET(combits, MSR_DCD)) 1343 SET(ttybits, TIOCM_CD); 1344 if (ISSET(combits, MSR_CTS)) 1345 SET(ttybits, TIOCM_CTS); 1346 if (ISSET(combits, MSR_DSR)) 1347 SET(ttybits, TIOCM_DSR); 1348 if (ISSET(combits, MSR_RI | MSR_TERI)) 1349 SET(ttybits, TIOCM_RI); 1350 1351 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1352 SET(ttybits, TIOCM_LE); 1353 1354 return (ttybits); 1355 } 1356 1357 static u_char 1358 cflag2lcr(tcflag_t cflag) 1359 { 1360 u_char lcr = 0; 1361 1362 switch (ISSET(cflag, CSIZE)) { 1363 case CS5: 1364 SET(lcr, LCR_5BITS); 1365 break; 1366 case CS6: 1367 SET(lcr, LCR_6BITS); 1368 break; 1369 case CS7: 1370 SET(lcr, LCR_7BITS); 1371 break; 1372 case CS8: 1373 SET(lcr, LCR_8BITS); 1374 break; 1375 } 1376 if (ISSET(cflag, PARENB)) { 1377 SET(lcr, LCR_PENAB); 1378 if (!ISSET(cflag, PARODD)) 1379 SET(lcr, LCR_PEVEN); 1380 } 1381 if (ISSET(cflag, CSTOPB)) 1382 SET(lcr, LCR_STOPB); 1383 1384 return (lcr); 1385 } 1386 1387 int 1388 comparam(struct tty *tp, struct termios *t) 1389 { 1390 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1391 int ospeed; 1392 u_char lcr; 1393 int s; 1394 1395 if (COM_ISALIVE(sc) == 0) 1396 return (EIO); 1397 1398 #ifdef COM_HAYESP 1399 if (sc->sc_type == COM_TYPE_HAYESP) { 1400 int prescaler, speed; 1401 1402 /* 1403 * Calculate UART clock prescaler. It should be in 1404 * range of 0 .. 3. 1405 */ 1406 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1407 prescaler++, speed /= 2) 1408 if ((ospeed = comspeed(speed, sc->sc_frequency, 1409 sc->sc_type)) > 0) 1410 break; 1411 1412 if (prescaler == 4) 1413 return (EINVAL); 1414 sc->sc_prescaler = prescaler; 1415 } else 1416 #endif 1417 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1418 1419 /* Check requested parameters. */ 1420 if (ospeed < 0) 1421 return (EINVAL); 1422 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1423 return (EINVAL); 1424 1425 /* 1426 * For the console, always force CLOCAL and !HUPCL, so that the port 1427 * is always active. 1428 */ 1429 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1430 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1431 SET(t->c_cflag, CLOCAL); 1432 CLR(t->c_cflag, HUPCL); 1433 } 1434 1435 /* 1436 * If there were no changes, don't do anything. This avoids dropping 1437 * input and improves performance when all we did was frob things like 1438 * VMIN and VTIME. 1439 */ 1440 if (tp->t_ospeed == t->c_ospeed && 1441 tp->t_cflag == t->c_cflag) 1442 return (0); 1443 1444 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1445 1446 s = splserial(); 1447 COM_LOCK(sc); 1448 1449 sc->sc_lcr = lcr; 1450 1451 /* 1452 * If we're not in a mode that assumes a connection is present, then 1453 * ignore carrier changes. 1454 */ 1455 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1456 sc->sc_msr_dcd = 0; 1457 else 1458 sc->sc_msr_dcd = MSR_DCD; 1459 /* 1460 * Set the flow control pins depending on the current flow control 1461 * mode. 1462 */ 1463 if (ISSET(t->c_cflag, CRTSCTS)) { 1464 sc->sc_mcr_dtr = MCR_DTR; 1465 sc->sc_mcr_rts = MCR_RTS; 1466 sc->sc_msr_cts = MSR_CTS; 1467 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1468 } else if (ISSET(t->c_cflag, MDMBUF)) { 1469 /* 1470 * For DTR/DCD flow control, make sure we don't toggle DTR for 1471 * carrier detection. 1472 */ 1473 sc->sc_mcr_dtr = 0; 1474 sc->sc_mcr_rts = MCR_DTR; 1475 sc->sc_msr_cts = MSR_DCD; 1476 sc->sc_efr = 0; 1477 } else { 1478 /* 1479 * If no flow control, then always set RTS. This will make 1480 * the other side happy if it mistakenly thinks we're doing 1481 * RTS/CTS flow control. 1482 */ 1483 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1484 sc->sc_mcr_rts = 0; 1485 sc->sc_msr_cts = 0; 1486 sc->sc_efr = 0; 1487 if (ISSET(sc->sc_mcr, MCR_DTR)) 1488 SET(sc->sc_mcr, MCR_RTS); 1489 else 1490 CLR(sc->sc_mcr, MCR_RTS); 1491 } 1492 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1493 1494 #if 0 1495 if (ospeed == 0) 1496 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1497 else 1498 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1499 #endif 1500 1501 sc->sc_dlbl = ospeed; 1502 sc->sc_dlbh = ospeed >> 8; 1503 1504 /* 1505 * Set the FIFO threshold based on the receive speed. 1506 * 1507 * * If it's a low speed, it's probably a mouse or some other 1508 * interactive device, so set the threshold low. 1509 * * If it's a high speed, trim the trigger level down to prevent 1510 * overflows. 1511 * * Otherwise set it a bit higher. 1512 */ 1513 if (sc->sc_type == COM_TYPE_HAYESP) 1514 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1515 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1516 sc->sc_fifo = FIFO_ENABLE | 1517 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8); 1518 else 1519 sc->sc_fifo = 0; 1520 1521 /* And copy to tty. */ 1522 tp->t_ispeed = 0; 1523 tp->t_ospeed = t->c_ospeed; 1524 tp->t_cflag = t->c_cflag; 1525 1526 if (!sc->sc_heldchange) { 1527 if (sc->sc_tx_busy) { 1528 sc->sc_heldtbc = sc->sc_tbc; 1529 sc->sc_tbc = 0; 1530 sc->sc_heldchange = 1; 1531 } else 1532 com_loadchannelregs(sc); 1533 } 1534 1535 if (!ISSET(t->c_cflag, CHWFLOW)) { 1536 /* Disable the high water mark. */ 1537 sc->sc_r_hiwat = 0; 1538 sc->sc_r_lowat = 0; 1539 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1540 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1541 com_schedrx(sc); 1542 } 1543 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1544 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1545 com_hwiflow(sc); 1546 } 1547 } else { 1548 sc->sc_r_hiwat = com_rbuf_hiwat; 1549 sc->sc_r_lowat = com_rbuf_lowat; 1550 } 1551 1552 COM_UNLOCK(sc); 1553 splx(s); 1554 1555 /* 1556 * Update the tty layer's idea of the carrier bit, in case we changed 1557 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1558 * explicit request. 1559 */ 1560 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1561 1562 #ifdef COM_DEBUG 1563 if (com_debug) 1564 comstatus(sc, "comparam "); 1565 #endif 1566 1567 if (!ISSET(t->c_cflag, CHWFLOW)) { 1568 if (sc->sc_tx_stopped) { 1569 sc->sc_tx_stopped = 0; 1570 comstart(tp); 1571 } 1572 } 1573 1574 return (0); 1575 } 1576 1577 void 1578 com_iflush(struct com_softc *sc) 1579 { 1580 bus_space_tag_t iot = sc->sc_iot; 1581 bus_space_handle_t ioh = sc->sc_ioh; 1582 #ifdef DIAGNOSTIC 1583 int reg; 1584 #endif 1585 int timo; 1586 1587 #ifdef DIAGNOSTIC 1588 reg = 0xffff; 1589 #endif 1590 timo = 50000; 1591 /* flush any pending I/O */ 1592 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1593 && --timo) 1594 #ifdef DIAGNOSTIC 1595 reg = 1596 #else 1597 (void) 1598 #endif 1599 bus_space_read_1(iot, ioh, com_data); 1600 #ifdef DIAGNOSTIC 1601 if (!timo) 1602 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1603 reg); 1604 #endif 1605 } 1606 1607 void 1608 com_loadchannelregs(struct com_softc *sc) 1609 { 1610 bus_space_tag_t iot = sc->sc_iot; 1611 bus_space_handle_t ioh = sc->sc_ioh; 1612 1613 /* XXXXX necessary? */ 1614 com_iflush(sc); 1615 1616 #ifdef COM_PXA2X0 1617 if (sc->sc_type == COM_TYPE_PXA2x0) 1618 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1619 else 1620 #endif 1621 bus_space_write_1(iot, ioh, com_ier, 0); 1622 1623 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1624 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1625 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1626 } 1627 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1628 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1629 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1630 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1631 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1632 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1633 #ifdef COM_HAYESP 1634 if (sc->sc_type == COM_TYPE_HAYESP) { 1635 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1636 HAYESP_SETPRESCALER); 1637 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1638 sc->sc_prescaler); 1639 } 1640 #endif 1641 1642 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1643 } 1644 1645 int 1646 comhwiflow(struct tty *tp, int block) 1647 { 1648 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1649 int s; 1650 1651 if (COM_ISALIVE(sc) == 0) 1652 return (0); 1653 1654 if (sc->sc_mcr_rts == 0) 1655 return (0); 1656 1657 s = splserial(); 1658 COM_LOCK(sc); 1659 1660 if (block) { 1661 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1662 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1663 com_hwiflow(sc); 1664 } 1665 } else { 1666 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1667 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1668 com_schedrx(sc); 1669 } 1670 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1671 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1672 com_hwiflow(sc); 1673 } 1674 } 1675 1676 COM_UNLOCK(sc); 1677 splx(s); 1678 return (1); 1679 } 1680 1681 /* 1682 * (un)block input via hw flowcontrol 1683 */ 1684 void 1685 com_hwiflow(struct com_softc *sc) 1686 { 1687 bus_space_tag_t iot = sc->sc_iot; 1688 bus_space_handle_t ioh = sc->sc_ioh; 1689 1690 if (sc->sc_mcr_rts == 0) 1691 return; 1692 1693 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1694 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1695 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1696 } else { 1697 SET(sc->sc_mcr, sc->sc_mcr_rts); 1698 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1699 } 1700 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1701 } 1702 1703 1704 void 1705 comstart(struct tty *tp) 1706 { 1707 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1708 bus_space_tag_t iot = sc->sc_iot; 1709 bus_space_handle_t ioh = sc->sc_ioh; 1710 int s; 1711 1712 if (COM_ISALIVE(sc) == 0) 1713 return; 1714 1715 s = spltty(); 1716 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1717 goto out; 1718 if (sc->sc_tx_stopped) 1719 goto out; 1720 1721 if (tp->t_outq.c_cc <= tp->t_lowat) { 1722 if (ISSET(tp->t_state, TS_ASLEEP)) { 1723 CLR(tp->t_state, TS_ASLEEP); 1724 wakeup(&tp->t_outq); 1725 } 1726 selwakeup(&tp->t_wsel); 1727 if (tp->t_outq.c_cc == 0) 1728 goto out; 1729 } 1730 1731 /* Grab the first contiguous region of buffer space. */ 1732 { 1733 u_char *tba; 1734 int tbc; 1735 1736 tba = tp->t_outq.c_cf; 1737 tbc = ndqb(&tp->t_outq, 0); 1738 1739 (void)splserial(); 1740 COM_LOCK(sc); 1741 1742 sc->sc_tba = tba; 1743 sc->sc_tbc = tbc; 1744 } 1745 1746 SET(tp->t_state, TS_BUSY); 1747 sc->sc_tx_busy = 1; 1748 1749 /* Enable transmit completion interrupts if necessary. */ 1750 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1751 SET(sc->sc_ier, IER_ETXRDY); 1752 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1753 } 1754 1755 /* Output the first chunk of the contiguous buffer. */ 1756 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1757 u_int n; 1758 1759 n = sc->sc_tbc; 1760 if (n > sc->sc_fifolen) 1761 n = sc->sc_fifolen; 1762 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1763 sc->sc_tbc -= n; 1764 sc->sc_tba += n; 1765 } 1766 1767 COM_UNLOCK(sc); 1768 out: 1769 splx(s); 1770 return; 1771 } 1772 1773 /* 1774 * Stop output on a line. 1775 */ 1776 void 1777 comstop(struct tty *tp, int flag) 1778 { 1779 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1780 int s; 1781 1782 s = splserial(); 1783 COM_LOCK(sc); 1784 if (ISSET(tp->t_state, TS_BUSY)) { 1785 /* Stop transmitting at the next chunk. */ 1786 sc->sc_tbc = 0; 1787 sc->sc_heldtbc = 0; 1788 if (!ISSET(tp->t_state, TS_TTSTOP)) 1789 SET(tp->t_state, TS_FLUSH); 1790 } 1791 COM_UNLOCK(sc); 1792 splx(s); 1793 } 1794 1795 void 1796 comdiag(void *arg) 1797 { 1798 struct com_softc *sc = arg; 1799 int overflows, floods; 1800 int s; 1801 1802 s = splserial(); 1803 COM_LOCK(sc); 1804 overflows = sc->sc_overflows; 1805 sc->sc_overflows = 0; 1806 floods = sc->sc_floods; 1807 sc->sc_floods = 0; 1808 sc->sc_errors = 0; 1809 COM_UNLOCK(sc); 1810 splx(s); 1811 1812 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1813 sc->sc_dev.dv_xname, 1814 overflows, overflows == 1 ? "" : "s", 1815 floods, floods == 1 ? "" : "s"); 1816 } 1817 1818 integrate void 1819 com_rxsoft(struct com_softc *sc, struct tty *tp) 1820 { 1821 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1822 u_char *get, *end; 1823 u_int cc, scc; 1824 u_char lsr; 1825 int code; 1826 int s; 1827 1828 end = sc->sc_ebuf; 1829 get = sc->sc_rbget; 1830 scc = cc = com_rbuf_size - sc->sc_rbavail; 1831 1832 if (cc == com_rbuf_size) { 1833 sc->sc_floods++; 1834 if (sc->sc_errors++ == 0) 1835 callout_reset(&sc->sc_diag_callout, 60 * hz, 1836 comdiag, sc); 1837 } 1838 1839 /* If not yet open, drop the entire buffer content here */ 1840 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1841 get += cc << 1; 1842 if (get >= end) 1843 get -= com_rbuf_size << 1; 1844 cc = 0; 1845 } 1846 while (cc) { 1847 code = get[0]; 1848 lsr = get[1]; 1849 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1850 if (ISSET(lsr, LSR_OE)) { 1851 sc->sc_overflows++; 1852 if (sc->sc_errors++ == 0) 1853 callout_reset(&sc->sc_diag_callout, 1854 60 * hz, comdiag, sc); 1855 } 1856 if (ISSET(lsr, LSR_BI | LSR_FE)) 1857 SET(code, TTY_FE); 1858 if (ISSET(lsr, LSR_PE)) 1859 SET(code, TTY_PE); 1860 } 1861 if ((*rint)(code, tp) == -1) { 1862 /* 1863 * The line discipline's buffer is out of space. 1864 */ 1865 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1866 /* 1867 * We're either not using flow control, or the 1868 * line discipline didn't tell us to block for 1869 * some reason. Either way, we have no way to 1870 * know when there's more space available, so 1871 * just drop the rest of the data. 1872 */ 1873 get += cc << 1; 1874 if (get >= end) 1875 get -= com_rbuf_size << 1; 1876 cc = 0; 1877 } else { 1878 /* 1879 * Don't schedule any more receive processing 1880 * until the line discipline tells us there's 1881 * space available (through comhwiflow()). 1882 * Leave the rest of the data in the input 1883 * buffer. 1884 */ 1885 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1886 } 1887 break; 1888 } 1889 get += 2; 1890 if (get >= end) 1891 get = sc->sc_rbuf; 1892 cc--; 1893 } 1894 1895 if (cc != scc) { 1896 sc->sc_rbget = get; 1897 s = splserial(); 1898 COM_LOCK(sc); 1899 1900 cc = sc->sc_rbavail += scc - cc; 1901 /* Buffers should be ok again, release possible block. */ 1902 if (cc >= sc->sc_r_lowat) { 1903 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1904 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1905 SET(sc->sc_ier, IER_ERXRDY); 1906 #ifdef COM_PXA2X0 1907 if (sc->sc_type == COM_TYPE_PXA2x0) 1908 SET(sc->sc_ier, IER_ERXTOUT); 1909 #endif 1910 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1911 com_ier, sc->sc_ier); 1912 } 1913 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1914 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1915 com_hwiflow(sc); 1916 } 1917 } 1918 COM_UNLOCK(sc); 1919 splx(s); 1920 } 1921 } 1922 1923 integrate void 1924 com_txsoft(struct com_softc *sc, struct tty *tp) 1925 { 1926 1927 CLR(tp->t_state, TS_BUSY); 1928 if (ISSET(tp->t_state, TS_FLUSH)) 1929 CLR(tp->t_state, TS_FLUSH); 1930 else 1931 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1932 (*tp->t_linesw->l_start)(tp); 1933 } 1934 1935 integrate void 1936 com_stsoft(struct com_softc *sc, struct tty *tp) 1937 { 1938 u_char msr, delta; 1939 int s; 1940 1941 s = splserial(); 1942 COM_LOCK(sc); 1943 msr = sc->sc_msr; 1944 delta = sc->sc_msr_delta; 1945 sc->sc_msr_delta = 0; 1946 COM_UNLOCK(sc); 1947 splx(s); 1948 1949 if (ISSET(delta, sc->sc_msr_dcd)) { 1950 /* 1951 * Inform the tty layer that carrier detect changed. 1952 */ 1953 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1954 } 1955 1956 if (ISSET(delta, sc->sc_msr_cts)) { 1957 /* Block or unblock output according to flow control. */ 1958 if (ISSET(msr, sc->sc_msr_cts)) { 1959 sc->sc_tx_stopped = 0; 1960 (*tp->t_linesw->l_start)(tp); 1961 } else { 1962 sc->sc_tx_stopped = 1; 1963 } 1964 } 1965 1966 #ifdef COM_DEBUG 1967 if (com_debug) 1968 comstatus(sc, "com_stsoft"); 1969 #endif 1970 } 1971 1972 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1973 void 1974 comsoft(void *arg) 1975 { 1976 struct com_softc *sc = arg; 1977 struct tty *tp; 1978 1979 if (COM_ISALIVE(sc) == 0) 1980 return; 1981 1982 { 1983 #else 1984 void 1985 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1986 comsoft(void) 1987 #else 1988 comsoft(void *arg) 1989 #endif 1990 { 1991 struct com_softc *sc; 1992 struct tty *tp; 1993 int unit; 1994 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1995 int s; 1996 1997 s = splsoftserial(); 1998 com_softintr_scheduled = 0; 1999 #endif 2000 2001 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 2002 sc = device_lookup(&com_cd, unit); 2003 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 2004 continue; 2005 2006 if (COM_ISALIVE(sc) == 0) 2007 continue; 2008 2009 tp = sc->sc_tty; 2010 if (tp == NULL) 2011 continue; 2012 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2013 continue; 2014 #endif 2015 tp = sc->sc_tty; 2016 2017 if (sc->sc_rx_ready) { 2018 sc->sc_rx_ready = 0; 2019 com_rxsoft(sc, tp); 2020 } 2021 2022 if (sc->sc_st_check) { 2023 sc->sc_st_check = 0; 2024 com_stsoft(sc, tp); 2025 } 2026 2027 if (sc->sc_tx_done) { 2028 sc->sc_tx_done = 0; 2029 com_txsoft(sc, tp); 2030 } 2031 } 2032 2033 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2034 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2035 splx(s); 2036 #endif 2037 #endif 2038 } 2039 2040 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2041 /* there has got to be a better way to do comsoft() */ 2042 }} 2043 #endif 2044 2045 int 2046 comintr(void *arg) 2047 { 2048 struct com_softc *sc = arg; 2049 bus_space_tag_t iot = sc->sc_iot; 2050 bus_space_handle_t ioh = sc->sc_ioh; 2051 u_char *put, *end; 2052 u_int cc; 2053 u_char lsr, iir; 2054 2055 if (COM_ISALIVE(sc) == 0) 2056 return (0); 2057 2058 COM_LOCK(sc); 2059 iir = bus_space_read_1(iot, ioh, com_iir); 2060 if (ISSET(iir, IIR_NOPEND)) { 2061 COM_UNLOCK(sc); 2062 return (0); 2063 } 2064 2065 end = sc->sc_ebuf; 2066 put = sc->sc_rbput; 2067 cc = sc->sc_rbavail; 2068 2069 again: do { 2070 u_char msr, delta; 2071 2072 lsr = bus_space_read_1(iot, ioh, com_lsr); 2073 if (ISSET(lsr, LSR_BI)) { 2074 int cn_trapped = 0; 2075 2076 cn_check_magic(sc->sc_tty->t_dev, 2077 CNC_BREAK, com_cnm_state); 2078 if (cn_trapped) 2079 continue; 2080 #if defined(KGDB) && !defined(DDB) 2081 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2082 kgdb_connect(1); 2083 continue; 2084 } 2085 #endif 2086 } 2087 2088 if (ISSET(lsr, LSR_RCV_MASK) && 2089 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2090 while (cc > 0) { 2091 int cn_trapped = 0; 2092 put[0] = bus_space_read_1(iot, ioh, com_data); 2093 put[1] = lsr; 2094 cn_check_magic(sc->sc_tty->t_dev, 2095 put[0], com_cnm_state); 2096 if (cn_trapped) 2097 goto next; 2098 put += 2; 2099 if (put >= end) 2100 put = sc->sc_rbuf; 2101 cc--; 2102 next: 2103 lsr = bus_space_read_1(iot, ioh, com_lsr); 2104 if (!ISSET(lsr, LSR_RCV_MASK)) 2105 break; 2106 } 2107 2108 /* 2109 * Current string of incoming characters ended because 2110 * no more data was available or we ran out of space. 2111 * Schedule a receive event if any data was received. 2112 * If we're out of space, turn off receive interrupts. 2113 */ 2114 sc->sc_rbput = put; 2115 sc->sc_rbavail = cc; 2116 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2117 sc->sc_rx_ready = 1; 2118 2119 /* 2120 * See if we are in danger of overflowing a buffer. If 2121 * so, use hardware flow control to ease the pressure. 2122 */ 2123 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2124 cc < sc->sc_r_hiwat) { 2125 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2126 com_hwiflow(sc); 2127 } 2128 2129 /* 2130 * If we're out of space, disable receive interrupts 2131 * until the queue has drained a bit. 2132 */ 2133 if (!cc) { 2134 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2135 #ifdef COM_PXA2X0 2136 if (sc->sc_type == COM_TYPE_PXA2x0) 2137 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 2138 else 2139 #endif 2140 CLR(sc->sc_ier, IER_ERXRDY); 2141 bus_space_write_1(iot, ioh, com_ier, 2142 sc->sc_ier); 2143 } 2144 } else { 2145 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 2146 (void) bus_space_read_1(iot, ioh, com_data); 2147 continue; 2148 } 2149 } 2150 2151 msr = bus_space_read_1(iot, ioh, com_msr); 2152 delta = msr ^ sc->sc_msr; 2153 sc->sc_msr = msr; 2154 /* 2155 * Pulse-per-second (PSS) signals on edge of DCD? 2156 * Process these even if line discipline is ignoring DCD. 2157 */ 2158 if (delta & sc->sc_ppsmask) { 2159 struct timeval tv; 2160 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2161 /* XXX nanotime() */ 2162 microtime(&tv); 2163 TIMEVAL_TO_TIMESPEC(&tv, 2164 &sc->ppsinfo.assert_timestamp); 2165 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2166 timespecadd(&sc->ppsinfo.assert_timestamp, 2167 &sc->ppsparam.assert_offset, 2168 &sc->ppsinfo.assert_timestamp); 2169 } 2170 2171 #ifdef PPS_SYNC 2172 if (pps_kc_hardpps_source == sc && 2173 pps_kc_hardpps_mode & PPS_CAPTUREASSERT) { 2174 hardpps(&tv, tv.tv_usec); 2175 } 2176 #endif 2177 sc->ppsinfo.assert_sequence++; 2178 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2179 2180 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2181 /* XXX nanotime() */ 2182 microtime(&tv); 2183 TIMEVAL_TO_TIMESPEC(&tv, 2184 &sc->ppsinfo.clear_timestamp); 2185 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2186 timespecadd(&sc->ppsinfo.clear_timestamp, 2187 &sc->ppsparam.clear_offset, 2188 &sc->ppsinfo.clear_timestamp); 2189 } 2190 2191 #ifdef PPS_SYNC 2192 if (pps_kc_hardpps_source == sc && 2193 pps_kc_hardpps_mode & PPS_CAPTURECLEAR) { 2194 hardpps(&tv, tv.tv_usec); 2195 } 2196 #endif 2197 sc->ppsinfo.clear_sequence++; 2198 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2199 } 2200 } 2201 2202 /* 2203 * Process normal status changes 2204 */ 2205 if (ISSET(delta, sc->sc_msr_mask)) { 2206 SET(sc->sc_msr_delta, delta); 2207 2208 /* 2209 * Stop output immediately if we lose the output 2210 * flow control signal or carrier detect. 2211 */ 2212 if (ISSET(~msr, sc->sc_msr_mask)) { 2213 sc->sc_tbc = 0; 2214 sc->sc_heldtbc = 0; 2215 #ifdef COM_DEBUG 2216 if (com_debug) 2217 comstatus(sc, "comintr "); 2218 #endif 2219 } 2220 2221 sc->sc_st_check = 1; 2222 } 2223 } while (!ISSET((iir = 2224 bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND) && 2225 /* 2226 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 2227 * by IIR read, so we can't do this way: `process all interrupts, 2228 * then do TX if possble'. 2229 */ 2230 (iir & IIR_IMASK) != IIR_TXRDY); 2231 2232 /* 2233 * Read LSR again, since there may be an interrupt between 2234 * the last LSR read and IIR read above. 2235 */ 2236 lsr = bus_space_read_1(iot, ioh, com_lsr); 2237 2238 /* 2239 * See if data can be transmitted as well. 2240 * Schedule tx done event if no data left 2241 * and tty was marked busy. 2242 */ 2243 if (ISSET(lsr, LSR_TXRDY)) { 2244 /* 2245 * If we've delayed a parameter change, do it now, and restart 2246 * output. 2247 */ 2248 if (sc->sc_heldchange) { 2249 com_loadchannelregs(sc); 2250 sc->sc_heldchange = 0; 2251 sc->sc_tbc = sc->sc_heldtbc; 2252 sc->sc_heldtbc = 0; 2253 } 2254 2255 /* Output the next chunk of the contiguous buffer, if any. */ 2256 if (sc->sc_tbc > 0) { 2257 u_int n; 2258 2259 n = sc->sc_tbc; 2260 if (n > sc->sc_fifolen) 2261 n = sc->sc_fifolen; 2262 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2263 sc->sc_tbc -= n; 2264 sc->sc_tba += n; 2265 } else { 2266 /* Disable transmit completion interrupts if necessary. */ 2267 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2268 CLR(sc->sc_ier, IER_ETXRDY); 2269 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2270 } 2271 if (sc->sc_tx_busy) { 2272 sc->sc_tx_busy = 0; 2273 sc->sc_tx_done = 1; 2274 } 2275 } 2276 } 2277 2278 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2279 goto again; 2280 2281 COM_UNLOCK(sc); 2282 2283 /* Wake up the poller. */ 2284 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2285 softintr_schedule(sc->sc_si); 2286 #else 2287 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2288 setsoftserial(); 2289 #else 2290 if (!com_softintr_scheduled) { 2291 com_softintr_scheduled = 1; 2292 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2293 } 2294 #endif 2295 #endif 2296 2297 #if NRND > 0 && defined(RND_COM) 2298 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2299 #endif 2300 2301 return (1); 2302 } 2303 2304 /* 2305 * The following functions are polled getc and putc routines, shared 2306 * by the console and kgdb glue. 2307 * 2308 * The read-ahead code is so that you can detect pending in-band 2309 * cn_magic in polled mode while doing output rather than having to 2310 * wait until the kernel decides it needs input. 2311 */ 2312 2313 #define MAX_READAHEAD 20 2314 static int com_readahead[MAX_READAHEAD]; 2315 static int com_readaheadcount = 0; 2316 2317 int 2318 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2319 { 2320 int s = splserial(); 2321 u_char stat, c; 2322 2323 /* got a character from reading things earlier */ 2324 if (com_readaheadcount > 0) { 2325 int i; 2326 2327 c = com_readahead[0]; 2328 for (i = 1; i < com_readaheadcount; i++) { 2329 com_readahead[i-1] = com_readahead[i]; 2330 } 2331 com_readaheadcount--; 2332 splx(s); 2333 return (c); 2334 } 2335 2336 /* block until a character becomes available */ 2337 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2338 ; 2339 2340 c = bus_space_read_1(iot, ioh, com_data); 2341 stat = bus_space_read_1(iot, ioh, com_iir); 2342 { 2343 int cn_trapped = 0; /* unused */ 2344 #ifdef DDB 2345 extern int db_active; 2346 if (!db_active) 2347 #endif 2348 cn_check_magic(dev, c, com_cnm_state); 2349 } 2350 splx(s); 2351 return (c); 2352 } 2353 2354 void 2355 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2356 { 2357 int s = splserial(); 2358 int cin, stat, timo; 2359 2360 if (com_readaheadcount < MAX_READAHEAD 2361 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2362 int cn_trapped = 0; 2363 cin = bus_space_read_1(iot, ioh, com_data); 2364 stat = bus_space_read_1(iot, ioh, com_iir); 2365 cn_check_magic(dev, cin, com_cnm_state); 2366 com_readahead[com_readaheadcount++] = cin; 2367 } 2368 2369 /* wait for any pending transmission to finish */ 2370 timo = 150000; 2371 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2372 continue; 2373 2374 bus_space_write_1(iot, ioh, com_data, c); 2375 COM_BARRIER(iot, ioh, BR | BW); 2376 2377 splx(s); 2378 } 2379 2380 /* 2381 * Initialize UART for use as console or KGDB line. 2382 */ 2383 int 2384 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2385 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2386 { 2387 bus_space_handle_t ioh; 2388 2389 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2390 return (ENOMEM); /* ??? */ 2391 2392 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2393 bus_space_write_1(iot, ioh, com_efr, 0); 2394 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2395 rate = comspeed(rate, frequency, type); 2396 bus_space_write_1(iot, ioh, com_dlbl, rate); 2397 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2398 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2399 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2400 bus_space_write_1(iot, ioh, com_fifo, 2401 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2402 #ifdef COM_PXA2X0 2403 if (type == COM_TYPE_PXA2x0) 2404 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 2405 else 2406 #endif 2407 bus_space_write_1(iot, ioh, com_ier, 0); 2408 2409 *iohp = ioh; 2410 return (0); 2411 } 2412 2413 /* 2414 * Following are all routines needed for COM to act as console 2415 */ 2416 struct consdev comcons = { 2417 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2418 NODEV, CN_NORMAL 2419 }; 2420 2421 2422 int 2423 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2424 int type, tcflag_t cflag) 2425 { 2426 int res; 2427 2428 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2429 if (res) 2430 return (res); 2431 2432 cn_tab = &comcons; 2433 cn_init_magic(&com_cnm_state); 2434 cn_set_magic("\047\001"); /* default magic is BREAK */ 2435 2436 comconstag = iot; 2437 comconsaddr = iobase; 2438 comconsrate = rate; 2439 comconscflag = cflag; 2440 2441 return (0); 2442 } 2443 2444 int 2445 comcngetc(dev_t dev) 2446 { 2447 2448 return (com_common_getc(dev, comconstag, comconsioh)); 2449 } 2450 2451 /* 2452 * Console kernel output character routine. 2453 */ 2454 void 2455 comcnputc(dev_t dev, int c) 2456 { 2457 2458 com_common_putc(dev, comconstag, comconsioh, c); 2459 } 2460 2461 void 2462 comcnpollc(dev_t dev, int on) 2463 { 2464 2465 } 2466 2467 #ifdef KGDB 2468 int 2469 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2470 int frequency, int type, tcflag_t cflag) 2471 { 2472 int res; 2473 2474 if (iot == comconstag && iobase == comconsaddr) { 2475 #if !defined(DDB) 2476 return (EBUSY); /* cannot share with console */ 2477 #else 2478 com_kgdb_ioh = comconsioh; 2479 #endif 2480 } else { 2481 res = cominit(iot, iobase, rate, frequency, type, cflag, 2482 &com_kgdb_ioh); 2483 if (res) 2484 return (res); 2485 2486 /* 2487 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2488 * expects this to be initialized 2489 */ 2490 cn_init_magic(&com_cnm_state); 2491 cn_set_magic("\047\001"); 2492 } 2493 2494 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2495 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2496 2497 com_kgdb_iot = iot; 2498 com_kgdb_addr = iobase; 2499 2500 return (0); 2501 } 2502 2503 /* ARGSUSED */ 2504 int 2505 com_kgdb_getc(void *arg) 2506 { 2507 2508 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2509 } 2510 2511 /* ARGSUSED */ 2512 void 2513 com_kgdb_putc(void *arg, int c) 2514 { 2515 2516 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2517 } 2518 #endif /* KGDB */ 2519 2520 /* helper function to identify the com ports used by 2521 console or KGDB (and not yet autoconf attached) */ 2522 int 2523 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2524 { 2525 bus_space_handle_t help; 2526 2527 if (!comconsattached && 2528 iot == comconstag && iobase == comconsaddr) 2529 help = comconsioh; 2530 #ifdef KGDB 2531 else if (!com_kgdb_attached && 2532 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2533 help = com_kgdb_ioh; 2534 #endif 2535 else 2536 return (0); 2537 2538 if (ioh) 2539 *ioh = help; 2540 return (1); 2541 } 2542
Indexes created Sun Sep 21 20:09:37 GMT 2025