com.c revision 1.238
1 /* $NetBSD: com.c,v 1.238 2005/12/11 12:21:26 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.238 2005/12/11 12:21:26 christos Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 125 #include <machine/intr.h> 126 #include <machine/bus.h> 127 128 #include <dev/ic/comreg.h> 129 #include <dev/ic/comvar.h> 130 #include <dev/ic/ns16550reg.h> 131 #include <dev/ic/st16650reg.h> 132 #ifdef COM_HAYESP 133 #include <dev/ic/hayespreg.h> 134 #endif 135 #define com_lcr com_cfcr 136 #include <dev/cons.h> 137 138 #ifdef COM_HAYESP 139 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 140 #endif 141 142 static void com_enable_debugport(struct com_softc *); 143 144 void com_config(struct com_softc *); 145 void com_shutdown(struct com_softc *); 146 int comspeed(long, long, int); 147 static u_char cflag2lcr(tcflag_t); 148 int comparam(struct tty *, struct termios *); 149 void comstart(struct tty *); 150 int comhwiflow(struct tty *, int); 151 152 void com_loadchannelregs(struct com_softc *); 153 void com_hwiflow(struct com_softc *); 154 void com_break(struct com_softc *, int); 155 void com_modem(struct com_softc *, int); 156 void tiocm_to_com(struct com_softc *, u_long, int); 157 int com_to_tiocm(struct com_softc *); 158 void com_iflush(struct com_softc *); 159 160 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 161 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 162 163 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 164 bus_space_handle_t *); 165 166 int comcngetc(dev_t); 167 void comcnputc(dev_t, int); 168 void comcnpollc(dev_t, int); 169 170 #define integrate static inline 171 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 172 void comsoft(void *); 173 #else 174 #ifndef __NO_SOFT_SERIAL_INTERRUPT 175 void comsoft(void); 176 #else 177 void comsoft(void *); 178 static struct callout comsoft_callout = CALLOUT_INITIALIZER; 179 #endif 180 #endif 181 integrate void com_rxsoft(struct com_softc *, struct tty *); 182 integrate void com_txsoft(struct com_softc *, struct tty *); 183 integrate void com_stsoft(struct com_softc *, struct tty *); 184 integrate void com_schedrx(struct com_softc *); 185 void comdiag(void *); 186 187 extern struct cfdriver com_cd; 188 189 dev_type_open(comopen); 190 dev_type_close(comclose); 191 dev_type_read(comread); 192 dev_type_write(comwrite); 193 dev_type_ioctl(comioctl); 194 dev_type_stop(comstop); 195 dev_type_tty(comtty); 196 dev_type_poll(compoll); 197 198 const struct cdevsw com_cdevsw = { 199 comopen, comclose, comread, comwrite, comioctl, 200 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 201 }; 202 203 /* 204 * Make this an option variable one can patch. 205 * But be warned: this must be a power of 2! 206 */ 207 u_int com_rbuf_size = COM_RING_SIZE; 208 209 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 210 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 211 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 212 213 static bus_addr_t comconsaddr; 214 static bus_space_tag_t comconstag; 215 static bus_space_handle_t comconsioh; 216 static int comconsattached; 217 static int comconsrate; 218 static tcflag_t comconscflag; 219 static struct cnm_state com_cnm_state; 220 221 static int ppscap = 222 PPS_TSFMT_TSPEC | 223 PPS_CAPTUREASSERT | 224 PPS_CAPTURECLEAR | 225 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 226 227 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 228 #ifdef __NO_SOFT_SERIAL_INTERRUPT 229 volatile int com_softintr_scheduled; 230 #endif 231 #endif 232 233 #ifdef KGDB 234 #include <sys/kgdb.h> 235 236 static bus_addr_t com_kgdb_addr; 237 static bus_space_tag_t com_kgdb_iot; 238 static bus_space_handle_t com_kgdb_ioh; 239 static int com_kgdb_attached; 240 241 int com_kgdb_getc(void *); 242 void com_kgdb_putc(void *, int); 243 #endif /* KGDB */ 244 245 #define COMUNIT_MASK 0x7ffff 246 #define COMDIALOUT_MASK 0x80000 247 248 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 249 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 250 251 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 252 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 253 254 #define BR BUS_SPACE_BARRIER_READ 255 #define BW BUS_SPACE_BARRIER_WRITE 256 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 257 258 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 259 260 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 261 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 262 263 #else 264 265 #define COM_LOCK(sc) 266 #define COM_UNLOCK(sc) 267 268 #endif 269 270 /*ARGSUSED*/ 271 int 272 comspeed(long speed, long frequency, int type) 273 { 274 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 275 276 int x, err; 277 278 #if 0 279 if (speed == 0) 280 return (0); 281 #endif 282 if (speed <= 0) 283 return (-1); 284 x = divrnd(frequency / 16, speed); 285 if (x <= 0) 286 return (-1); 287 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 288 if (err < 0) 289 err = -err; 290 if (err > COM_TOLERANCE) 291 return (-1); 292 return (x); 293 294 #undef divrnd 295 } 296 297 #ifdef COM_DEBUG 298 int com_debug = 0; 299 300 void comstatus(struct com_softc *, const char *); 301 void 302 comstatus(struct com_softc *sc, const char *str) 303 { 304 struct tty *tp = sc->sc_tty; 305 306 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 307 sc->sc_dev.dv_xname, str, 308 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 309 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 310 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 311 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 312 sc->sc_tx_stopped ? '+' : '-'); 313 314 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 315 sc->sc_dev.dv_xname, str, 316 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 317 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 318 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 319 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 320 sc->sc_rx_flags); 321 } 322 #endif 323 324 int 325 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 326 { 327 328 /* force access to id reg */ 329 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 330 bus_space_write_1(iot, ioh, com_iir, 0); 331 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 332 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 333 return (0); 334 335 return (1); 336 } 337 338 #ifdef COM_HAYESP 339 int 340 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 341 { 342 char val, dips; 343 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 344 bus_space_tag_t iot = sc->sc_iot; 345 346 /* 347 * Hayes ESP cards have two iobases. One is for compatibility with 348 * 16550 serial chips, and at the same ISA PC base addresses. The 349 * other is for ESP-specific enhanced features, and lies at a 350 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 351 */ 352 353 /* Test for ESP signature */ 354 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 355 return (0); 356 357 /* 358 * ESP is present at ESP enhanced base address; unknown com port 359 */ 360 361 /* Get the dip-switch configurations */ 362 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 363 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 364 365 /* Determine which com port this ESP card services: bits 0,1 of */ 366 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 367 if (sc->sc_iobase != combaselist[dips & 0x03]) 368 return (0); 369 370 printf(": ESP"); 371 372 /* Check ESP Self Test bits. */ 373 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 374 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 375 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 376 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 377 if ((val & 0x70) < 0x20) { 378 printf("-old (%o)", val & 0x70); 379 /* we do not support the necessary features */ 380 return (0); 381 } 382 383 /* Check for ability to emulate 16550: bit 8 == 1 */ 384 if ((dips & 0x80) == 0) { 385 printf(" slave"); 386 /* XXX Does slave really mean no 16550 support?? */ 387 return (0); 388 } 389 390 /* 391 * If we made it this far, we are a full-featured ESP v2.0 (or 392 * better), at the correct com port address. 393 */ 394 395 sc->sc_type = COM_TYPE_HAYESP; 396 printf(", 1024 byte fifo\n"); 397 return (1); 398 } 399 #endif 400 401 static void 402 com_enable_debugport(struct com_softc *sc) 403 { 404 int s; 405 406 /* Turn on line break interrupt, set carrier. */ 407 s = splserial(); 408 COM_LOCK(sc); 409 sc->sc_ier = IER_ERXRDY; 410 #ifdef COM_PXA2X0 411 if (sc->sc_type == COM_TYPE_PXA2x0) 412 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 413 #endif 414 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 415 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 416 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 417 COM_UNLOCK(sc); 418 splx(s); 419 } 420 421 void 422 com_attach_subr(struct com_softc *sc) 423 { 424 bus_addr_t iobase = sc->sc_iobase; 425 bus_space_tag_t iot = sc->sc_iot; 426 bus_space_handle_t ioh = sc->sc_ioh; 427 struct tty *tp; 428 #ifdef COM_16650 429 u_int8_t lcr; 430 #endif 431 #ifdef COM_HAYESP 432 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 433 int *hayespp; 434 #endif 435 const char *fifo_msg = NULL; 436 437 callout_init(&sc->sc_diag_callout); 438 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 439 simple_lock_init(&sc->sc_lock); 440 #endif 441 442 /* Disable interrupts before configuring the device. */ 443 #ifdef COM_PXA2X0 444 if (sc->sc_type == COM_TYPE_PXA2x0) 445 sc->sc_ier = IER_EUART; 446 else 447 #endif 448 sc->sc_ier = 0; 449 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 450 451 if (iot == comconstag && iobase == comconsaddr) { 452 comconsattached = 1; 453 454 /* Make sure the console is always "hardwired". */ 455 delay(10000); /* wait for output to finish */ 456 SET(sc->sc_hwflags, COM_HW_CONSOLE); 457 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 458 } 459 460 #ifdef COM_HAYESP 461 sc->sc_prescaler = 0; /* set prescaler to x1. */ 462 463 /* Look for a Hayes ESP board. */ 464 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 465 bus_space_handle_t hayespioh; 466 467 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 468 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 469 continue; 470 if (comprobeHAYESP(hayespioh, sc)) { 471 sc->sc_hayespioh = hayespioh; 472 sc->sc_fifolen = 1024; 473 474 break; 475 } 476 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 477 } 478 /* No ESP; look for other things. */ 479 if (sc->sc_type != COM_TYPE_HAYESP) { 480 #endif 481 sc->sc_fifolen = 1; 482 /* look for a NS 16550AF UART with FIFOs */ 483 bus_space_write_1(iot, ioh, com_fifo, 484 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 485 delay(100); 486 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 487 == IIR_FIFO_MASK) 488 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 489 == FIFO_TRIGGER_14) { 490 SET(sc->sc_hwflags, COM_HW_FIFO); 491 492 #ifdef COM_16650 493 /* 494 * IIR changes into the EFR if LCR is set to LCR_EERS 495 * on 16650s. We also know IIR != 0 at this point. 496 * Write 0 into the EFR, and read it. If the result 497 * is 0, we have a 16650. 498 * 499 * Older 16650s were broken; the test to detect them 500 * is taken from the Linux driver. Apparently 501 * setting DLAB enable gives access to the EFR on 502 * these chips. 503 */ 504 lcr = bus_space_read_1(iot, ioh, com_lcr); 505 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 506 bus_space_write_1(iot, ioh, com_efr, 0); 507 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 508 bus_space_write_1(iot, ioh, com_lcr, 509 lcr | LCR_DLAB); 510 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 511 CLR(sc->sc_hwflags, COM_HW_FIFO); 512 sc->sc_fifolen = 0; 513 } else { 514 SET(sc->sc_hwflags, COM_HW_FLOW); 515 sc->sc_fifolen = 32; 516 } 517 } else 518 #endif 519 sc->sc_fifolen = 16; 520 521 #ifdef COM_16650 522 bus_space_write_1(iot, ioh, com_lcr, lcr); 523 if (sc->sc_fifolen == 0) 524 fifo_msg = "st16650, broken fifo"; 525 else if (sc->sc_fifolen == 32) 526 fifo_msg = "st16650a, working fifo"; 527 else 528 #endif 529 fifo_msg = "ns16550a, working fifo"; 530 } else 531 fifo_msg = "ns16550, broken fifo"; 532 else 533 fifo_msg = "ns8250 or ns16450, no fifo"; 534 bus_space_write_1(iot, ioh, com_fifo, 0); 535 /* 536 * Some chips will clear down both Tx and Rx FIFOs when zero is 537 * written to com_fifo. If this chip is the console, writing zero 538 * results in some of the chip/FIFO description being lost, so delay 539 * printing it until now. 540 */ 541 delay(10); 542 aprint_normal(": %s\n", fifo_msg); 543 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 544 sc->sc_fifolen = 1; 545 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 546 } 547 #ifdef COM_HAYESP 548 } 549 #endif 550 551 tp = ttymalloc(); 552 tp->t_oproc = comstart; 553 tp->t_param = comparam; 554 tp->t_hwiflow = comhwiflow; 555 556 sc->sc_tty = tp; 557 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 558 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 559 sc->sc_rbavail = com_rbuf_size; 560 if (sc->sc_rbuf == NULL) { 561 aprint_error("%s: unable to allocate ring buffer\n", 562 sc->sc_dev.dv_xname); 563 return; 564 } 565 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 566 567 tty_attach(tp); 568 569 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 570 SET(sc->sc_mcr, MCR_IENABLE); 571 572 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 573 int maj; 574 575 /* locate the major number */ 576 maj = cdevsw_lookup_major(&com_cdevsw); 577 578 tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 579 580 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 581 } 582 583 #ifdef KGDB 584 /* 585 * Allow kgdb to "take over" this port. If this is 586 * not the console and is the kgdb device, it has 587 * exclusive use. If it's the console _and_ the 588 * kgdb device, it doesn't. 589 */ 590 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 591 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 592 com_kgdb_attached = 1; 593 594 SET(sc->sc_hwflags, COM_HW_KGDB); 595 } 596 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 597 } 598 #endif 599 600 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 601 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 602 #endif 603 604 #if NRND > 0 && defined(RND_COM) 605 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 606 RND_TYPE_TTY, 0); 607 #endif 608 609 /* if there are no enable/disable functions, assume the device 610 is always enabled */ 611 if (!sc->enable) 612 sc->enabled = 1; 613 614 com_config(sc); 615 616 SET(sc->sc_hwflags, COM_HW_DEV_OK); 617 } 618 619 void 620 com_config(struct com_softc *sc) 621 { 622 bus_space_tag_t iot = sc->sc_iot; 623 bus_space_handle_t ioh = sc->sc_ioh; 624 625 /* Disable interrupts before configuring the device. */ 626 #ifdef COM_PXA2X0 627 if (sc->sc_type == COM_TYPE_PXA2x0) 628 sc->sc_ier = IER_EUART; 629 else 630 #endif 631 sc->sc_ier = 0; 632 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 633 (void) bus_space_read_1(iot, ioh, com_iir); 634 635 #ifdef COM_HAYESP 636 /* Look for a Hayes ESP board. */ 637 if (sc->sc_type == COM_TYPE_HAYESP) { 638 sc->sc_fifolen = 1024; 639 640 /* Set 16550 compatibility mode */ 641 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 642 HAYESP_SETMODE); 643 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 644 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 645 HAYESP_MODE_SCALE); 646 647 /* Set RTS/CTS flow control */ 648 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 649 HAYESP_SETFLOWTYPE); 650 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 651 HAYESP_FLOW_RTS); 652 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 653 HAYESP_FLOW_CTS); 654 655 /* Set flow control levels */ 656 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 657 HAYESP_SETRXFLOW); 658 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 659 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 660 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 661 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 662 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 663 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 664 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 665 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 666 } 667 #endif 668 669 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 670 com_enable_debugport(sc); 671 } 672 673 int 674 com_detach(struct device *self, int flags) 675 { 676 struct com_softc *sc = (struct com_softc *)self; 677 int maj, mn; 678 679 /* locate the major number */ 680 maj = cdevsw_lookup_major(&com_cdevsw); 681 682 /* Nuke the vnodes for any open instances. */ 683 mn = self->dv_unit; 684 vdevgone(maj, mn, mn, VCHR); 685 686 mn |= COMDIALOUT_MASK; 687 vdevgone(maj, mn, mn, VCHR); 688 689 if (sc->sc_rbuf == NULL) { 690 /* 691 * Ring buffer allocation failed in the com_attach_subr, 692 * only the tty is allocated, and nothing else. 693 */ 694 ttyfree(sc->sc_tty); 695 return 0; 696 } 697 698 /* Free the receive buffer. */ 699 free(sc->sc_rbuf, M_DEVBUF); 700 701 /* Detach and free the tty. */ 702 tty_detach(sc->sc_tty); 703 ttyfree(sc->sc_tty); 704 705 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 706 /* Unhook the soft interrupt handler. */ 707 softintr_disestablish(sc->sc_si); 708 #endif 709 710 #if NRND > 0 && defined(RND_COM) 711 /* Unhook the entropy source. */ 712 rnd_detach_source(&sc->rnd_source); 713 #endif 714 715 return (0); 716 } 717 718 int 719 com_activate(struct device *self, enum devact act) 720 { 721 struct com_softc *sc = (struct com_softc *)self; 722 int s, rv = 0; 723 724 s = splserial(); 725 COM_LOCK(sc); 726 switch (act) { 727 case DVACT_ACTIVATE: 728 rv = EOPNOTSUPP; 729 break; 730 731 case DVACT_DEACTIVATE: 732 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 733 rv = EBUSY; 734 break; 735 } 736 737 if (sc->disable != NULL && sc->enabled != 0) { 738 (*sc->disable)(sc); 739 sc->enabled = 0; 740 } 741 break; 742 } 743 744 COM_UNLOCK(sc); 745 splx(s); 746 return (rv); 747 } 748 749 void 750 com_shutdown(struct com_softc *sc) 751 { 752 struct tty *tp = sc->sc_tty; 753 int s; 754 755 s = splserial(); 756 COM_LOCK(sc); 757 758 /* If we were asserting flow control, then deassert it. */ 759 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 760 com_hwiflow(sc); 761 762 /* Clear any break condition set with TIOCSBRK. */ 763 com_break(sc, 0); 764 765 /* Turn off PPS capture on last close. */ 766 sc->sc_ppsmask = 0; 767 sc->ppsparam.mode = 0; 768 769 /* 770 * Hang up if necessary. Wait a bit, so the other side has time to 771 * notice even if we immediately open the port again. 772 * Avoid tsleeping above splhigh(). 773 */ 774 if (ISSET(tp->t_cflag, HUPCL)) { 775 com_modem(sc, 0); 776 COM_UNLOCK(sc); 777 splx(s); 778 /* XXX tsleep will only timeout */ 779 (void) tsleep(sc, TTIPRI, ttclos, hz); 780 s = splserial(); 781 COM_LOCK(sc); 782 } 783 784 /* Turn off interrupts. */ 785 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 786 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 787 #ifdef COM_PXA2X0 788 if (sc->sc_type == COM_TYPE_PXA2x0) 789 sc->sc_ier |= IER_ERXTOUT; 790 #endif 791 } else 792 sc->sc_ier = 0; 793 794 #ifdef COM_PXA2X0 795 if (sc->sc_type == COM_TYPE_PXA2x0) 796 sc->sc_ier |= IER_EUART; 797 #endif 798 799 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 800 801 if (sc->disable) { 802 #ifdef DIAGNOSTIC 803 if (!sc->enabled) 804 panic("com_shutdown: not enabled?"); 805 #endif 806 (*sc->disable)(sc); 807 sc->enabled = 0; 808 } 809 COM_UNLOCK(sc); 810 splx(s); 811 } 812 813 int 814 comopen(dev_t dev, int flag, int mode, struct lwp *l) 815 { 816 struct com_softc *sc; 817 struct tty *tp; 818 int s, s2; 819 int error; 820 821 sc = device_lookup(&com_cd, COMUNIT(dev)); 822 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 823 sc->sc_rbuf == NULL) 824 return (ENXIO); 825 826 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 827 return (ENXIO); 828 829 #ifdef KGDB 830 /* 831 * If this is the kgdb port, no other use is permitted. 832 */ 833 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 834 return (EBUSY); 835 #endif 836 837 tp = sc->sc_tty; 838 839 if (ISSET(tp->t_state, TS_ISOPEN) && 840 ISSET(tp->t_state, TS_XCLUDE) && 841 suser(l->l_proc->p_ucred, &l->l_proc->p_acflag) != 0) 842 return (EBUSY); 843 844 s = spltty(); 845 846 /* 847 * Do the following iff this is a first open. 848 */ 849 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 850 struct termios t; 851 852 tp->t_dev = dev; 853 854 s2 = splserial(); 855 COM_LOCK(sc); 856 857 if (sc->enable) { 858 if ((*sc->enable)(sc)) { 859 COM_UNLOCK(sc); 860 splx(s2); 861 splx(s); 862 printf("%s: device enable failed\n", 863 sc->sc_dev.dv_xname); 864 return (EIO); 865 } 866 sc->enabled = 1; 867 com_config(sc); 868 } 869 870 /* Turn on interrupts. */ 871 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 872 #ifdef COM_PXA2X0 873 if (sc->sc_type == COM_TYPE_PXA2x0) 874 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 875 #endif 876 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 877 878 /* Fetch the current modem control status, needed later. */ 879 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 880 881 /* Clear PPS capture state on first open. */ 882 sc->sc_ppsmask = 0; 883 sc->ppsparam.mode = 0; 884 885 COM_UNLOCK(sc); 886 splx(s2); 887 888 /* 889 * Initialize the termios status to the defaults. Add in the 890 * sticky bits from TIOCSFLAGS. 891 */ 892 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 893 t.c_ospeed = comconsrate; 894 t.c_cflag = comconscflag; 895 } else { 896 t.c_ospeed = TTYDEF_SPEED; 897 t.c_cflag = TTYDEF_CFLAG; 898 } 899 t.c_ispeed = t.c_ospeed; 900 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 901 SET(t.c_cflag, CLOCAL); 902 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 903 SET(t.c_cflag, CRTSCTS); 904 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 905 SET(t.c_cflag, MDMBUF); 906 /* Make sure comparam() will do something. */ 907 tp->t_ospeed = 0; 908 (void) comparam(tp, &t); 909 tp->t_iflag = TTYDEF_IFLAG; 910 tp->t_oflag = TTYDEF_OFLAG; 911 tp->t_lflag = TTYDEF_LFLAG; 912 ttychars(tp); 913 ttsetwater(tp); 914 915 s2 = splserial(); 916 COM_LOCK(sc); 917 918 /* 919 * Turn on DTR. We must always do this, even if carrier is not 920 * present, because otherwise we'd have to use TIOCSDTR 921 * immediately after setting CLOCAL, which applications do not 922 * expect. We always assert DTR while the device is open 923 * unless explicitly requested to deassert it. 924 */ 925 com_modem(sc, 1); 926 927 /* Clear the input ring, and unblock. */ 928 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 929 sc->sc_rbavail = com_rbuf_size; 930 com_iflush(sc); 931 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 932 com_hwiflow(sc); 933 934 #ifdef COM_DEBUG 935 if (com_debug) 936 comstatus(sc, "comopen "); 937 #endif 938 939 COM_UNLOCK(sc); 940 splx(s2); 941 } 942 943 splx(s); 944 945 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 946 if (error) 947 goto bad; 948 949 error = (*tp->t_linesw->l_open)(dev, tp); 950 if (error) 951 goto bad; 952 953 return (0); 954 955 bad: 956 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 957 /* 958 * We failed to open the device, and nobody else had it opened. 959 * Clean up the state as appropriate. 960 */ 961 com_shutdown(sc); 962 } 963 964 return (error); 965 } 966 967 int 968 comclose(dev_t dev, int flag, int mode, struct lwp *l) 969 { 970 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 971 struct tty *tp = sc->sc_tty; 972 973 /* XXX This is for cons.c. */ 974 if (!ISSET(tp->t_state, TS_ISOPEN)) 975 return (0); 976 977 (*tp->t_linesw->l_close)(tp, flag); 978 ttyclose(tp); 979 980 if (COM_ISALIVE(sc) == 0) 981 return (0); 982 983 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 984 /* 985 * Although we got a last close, the device may still be in 986 * use; e.g. if this was the dialout node, and there are still 987 * processes waiting for carrier on the non-dialout node. 988 */ 989 com_shutdown(sc); 990 } 991 992 return (0); 993 } 994 995 int 996 comread(dev_t dev, struct uio *uio, int flag) 997 { 998 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 999 struct tty *tp = sc->sc_tty; 1000 1001 if (COM_ISALIVE(sc) == 0) 1002 return (EIO); 1003 1004 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 1005 } 1006 1007 int 1008 comwrite(dev_t dev, struct uio *uio, int flag) 1009 { 1010 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1011 struct tty *tp = sc->sc_tty; 1012 1013 if (COM_ISALIVE(sc) == 0) 1014 return (EIO); 1015 1016 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1017 } 1018 1019 int 1020 compoll(dev_t dev, int events, struct lwp *l) 1021 { 1022 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1023 struct tty *tp = sc->sc_tty; 1024 1025 if (COM_ISALIVE(sc) == 0) 1026 return (POLLHUP); 1027 1028 return ((*tp->t_linesw->l_poll)(tp, events, l)); 1029 } 1030 1031 struct tty * 1032 comtty(dev_t dev) 1033 { 1034 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1035 struct tty *tp = sc->sc_tty; 1036 1037 return (tp); 1038 } 1039 1040 int 1041 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 1042 { 1043 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1044 struct tty *tp = sc->sc_tty; 1045 struct proc *p = l->l_proc; 1046 int error; 1047 int s; 1048 1049 if (COM_ISALIVE(sc) == 0) 1050 return (EIO); 1051 1052 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1053 if (error != EPASSTHROUGH) 1054 return (error); 1055 1056 error = ttioctl(tp, cmd, data, flag, l); 1057 if (error != EPASSTHROUGH) 1058 return (error); 1059 1060 error = 0; 1061 1062 s = splserial(); 1063 COM_LOCK(sc); 1064 1065 switch (cmd) { 1066 case TIOCSBRK: 1067 com_break(sc, 1); 1068 break; 1069 1070 case TIOCCBRK: 1071 com_break(sc, 0); 1072 break; 1073 1074 case TIOCSDTR: 1075 com_modem(sc, 1); 1076 break; 1077 1078 case TIOCCDTR: 1079 com_modem(sc, 0); 1080 break; 1081 1082 case TIOCGFLAGS: 1083 *(int *)data = sc->sc_swflags; 1084 break; 1085 1086 case TIOCSFLAGS: 1087 error = suser(p->p_ucred, &p->p_acflag); 1088 if (error) 1089 break; 1090 sc->sc_swflags = *(int *)data; 1091 break; 1092 1093 case TIOCMSET: 1094 case TIOCMBIS: 1095 case TIOCMBIC: 1096 tiocm_to_com(sc, cmd, *(int *)data); 1097 break; 1098 1099 case TIOCMGET: 1100 *(int *)data = com_to_tiocm(sc); 1101 break; 1102 1103 case PPS_IOC_CREATE: 1104 break; 1105 1106 case PPS_IOC_DESTROY: 1107 break; 1108 1109 case PPS_IOC_GETPARAMS: { 1110 pps_params_t *pp; 1111 pp = (pps_params_t *)data; 1112 *pp = sc->ppsparam; 1113 break; 1114 } 1115 1116 case PPS_IOC_SETPARAMS: { 1117 pps_params_t *pp; 1118 int mode; 1119 pp = (pps_params_t *)data; 1120 if (pp->mode & ~ppscap) { 1121 error = EINVAL; 1122 break; 1123 } 1124 sc->ppsparam = *pp; 1125 /* 1126 * Compute msr masks from user-specified timestamp state. 1127 */ 1128 mode = sc->ppsparam.mode; 1129 switch (mode & PPS_CAPTUREBOTH) { 1130 case 0: 1131 sc->sc_ppsmask = 0; 1132 break; 1133 1134 case PPS_CAPTUREASSERT: 1135 sc->sc_ppsmask = MSR_DCD; 1136 sc->sc_ppsassert = MSR_DCD; 1137 sc->sc_ppsclear = -1; 1138 break; 1139 1140 case PPS_CAPTURECLEAR: 1141 sc->sc_ppsmask = MSR_DCD; 1142 sc->sc_ppsassert = -1; 1143 sc->sc_ppsclear = 0; 1144 break; 1145 1146 case PPS_CAPTUREBOTH: 1147 sc->sc_ppsmask = MSR_DCD; 1148 sc->sc_ppsassert = MSR_DCD; 1149 sc->sc_ppsclear = 0; 1150 break; 1151 1152 default: 1153 error = EINVAL; 1154 break; 1155 } 1156 break; 1157 } 1158 1159 case PPS_IOC_GETCAP: 1160 *(int*)data = ppscap; 1161 break; 1162 1163 case PPS_IOC_FETCH: { 1164 pps_info_t *pi; 1165 pi = (pps_info_t *)data; 1166 *pi = sc->ppsinfo; 1167 break; 1168 } 1169 1170 #ifdef PPS_SYNC 1171 case PPS_IOC_KCBIND: { 1172 int edge = (*(int *)data) & PPS_CAPTUREBOTH; 1173 1174 if (edge == 0) { 1175 /* 1176 * remove binding for this source; ignore 1177 * the request if this is not the current 1178 * hardpps source 1179 */ 1180 if (pps_kc_hardpps_source == sc) { 1181 pps_kc_hardpps_source = NULL; 1182 pps_kc_hardpps_mode = 0; 1183 } 1184 } else { 1185 /* 1186 * bind hardpps to this source, replacing any 1187 * previously specified source or edges 1188 */ 1189 pps_kc_hardpps_source = sc; 1190 pps_kc_hardpps_mode = edge; 1191 } 1192 break; 1193 } 1194 #endif /* PPS_SYNC */ 1195 1196 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1197 /* 1198 * Some GPS clocks models use the falling rather than 1199 * rising edge as the on-the-second signal. 1200 * The old API has no way to specify PPS polarity. 1201 */ 1202 sc->sc_ppsmask = MSR_DCD; 1203 #ifndef PPS_TRAILING_EDGE 1204 sc->sc_ppsassert = MSR_DCD; 1205 sc->sc_ppsclear = -1; 1206 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1207 &sc->ppsinfo.assert_timestamp); 1208 #else 1209 sc->sc_ppsassert = -1; 1210 sc->sc_ppsclear = 0; 1211 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1212 &sc->ppsinfo.clear_timestamp); 1213 #endif 1214 break; 1215 1216 default: 1217 error = EPASSTHROUGH; 1218 break; 1219 } 1220 1221 COM_UNLOCK(sc); 1222 splx(s); 1223 1224 #ifdef COM_DEBUG 1225 if (com_debug) 1226 comstatus(sc, "comioctl "); 1227 #endif 1228 1229 return (error); 1230 } 1231 1232 integrate void 1233 com_schedrx(struct com_softc *sc) 1234 { 1235 1236 sc->sc_rx_ready = 1; 1237 1238 /* Wake up the poller. */ 1239 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1240 softintr_schedule(sc->sc_si); 1241 #else 1242 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1243 setsoftserial(); 1244 #else 1245 if (!com_softintr_scheduled) { 1246 com_softintr_scheduled = 1; 1247 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1248 } 1249 #endif 1250 #endif 1251 } 1252 1253 void 1254 com_break(struct com_softc *sc, int onoff) 1255 { 1256 1257 if (onoff) 1258 SET(sc->sc_lcr, LCR_SBREAK); 1259 else 1260 CLR(sc->sc_lcr, LCR_SBREAK); 1261 1262 if (!sc->sc_heldchange) { 1263 if (sc->sc_tx_busy) { 1264 sc->sc_heldtbc = sc->sc_tbc; 1265 sc->sc_tbc = 0; 1266 sc->sc_heldchange = 1; 1267 } else 1268 com_loadchannelregs(sc); 1269 } 1270 } 1271 1272 void 1273 com_modem(struct com_softc *sc, int onoff) 1274 { 1275 1276 if (sc->sc_mcr_dtr == 0) 1277 return; 1278 1279 if (onoff) 1280 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1281 else 1282 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1283 1284 if (!sc->sc_heldchange) { 1285 if (sc->sc_tx_busy) { 1286 sc->sc_heldtbc = sc->sc_tbc; 1287 sc->sc_tbc = 0; 1288 sc->sc_heldchange = 1; 1289 } else 1290 com_loadchannelregs(sc); 1291 } 1292 } 1293 1294 void 1295 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1296 { 1297 u_char combits; 1298 1299 combits = 0; 1300 if (ISSET(ttybits, TIOCM_DTR)) 1301 SET(combits, MCR_DTR); 1302 if (ISSET(ttybits, TIOCM_RTS)) 1303 SET(combits, MCR_RTS); 1304 1305 switch (how) { 1306 case TIOCMBIC: 1307 CLR(sc->sc_mcr, combits); 1308 break; 1309 1310 case TIOCMBIS: 1311 SET(sc->sc_mcr, combits); 1312 break; 1313 1314 case TIOCMSET: 1315 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1316 SET(sc->sc_mcr, combits); 1317 break; 1318 } 1319 1320 if (!sc->sc_heldchange) { 1321 if (sc->sc_tx_busy) { 1322 sc->sc_heldtbc = sc->sc_tbc; 1323 sc->sc_tbc = 0; 1324 sc->sc_heldchange = 1; 1325 } else 1326 com_loadchannelregs(sc); 1327 } 1328 } 1329 1330 int 1331 com_to_tiocm(struct com_softc *sc) 1332 { 1333 u_char combits; 1334 int ttybits = 0; 1335 1336 combits = sc->sc_mcr; 1337 if (ISSET(combits, MCR_DTR)) 1338 SET(ttybits, TIOCM_DTR); 1339 if (ISSET(combits, MCR_RTS)) 1340 SET(ttybits, TIOCM_RTS); 1341 1342 combits = sc->sc_msr; 1343 if (ISSET(combits, MSR_DCD)) 1344 SET(ttybits, TIOCM_CD); 1345 if (ISSET(combits, MSR_CTS)) 1346 SET(ttybits, TIOCM_CTS); 1347 if (ISSET(combits, MSR_DSR)) 1348 SET(ttybits, TIOCM_DSR); 1349 if (ISSET(combits, MSR_RI | MSR_TERI)) 1350 SET(ttybits, TIOCM_RI); 1351 1352 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1353 SET(ttybits, TIOCM_LE); 1354 1355 return (ttybits); 1356 } 1357 1358 static u_char 1359 cflag2lcr(tcflag_t cflag) 1360 { 1361 u_char lcr = 0; 1362 1363 switch (ISSET(cflag, CSIZE)) { 1364 case CS5: 1365 SET(lcr, LCR_5BITS); 1366 break; 1367 case CS6: 1368 SET(lcr, LCR_6BITS); 1369 break; 1370 case CS7: 1371 SET(lcr, LCR_7BITS); 1372 break; 1373 case CS8: 1374 SET(lcr, LCR_8BITS); 1375 break; 1376 } 1377 if (ISSET(cflag, PARENB)) { 1378 SET(lcr, LCR_PENAB); 1379 if (!ISSET(cflag, PARODD)) 1380 SET(lcr, LCR_PEVEN); 1381 } 1382 if (ISSET(cflag, CSTOPB)) 1383 SET(lcr, LCR_STOPB); 1384 1385 return (lcr); 1386 } 1387 1388 int 1389 comparam(struct tty *tp, struct termios *t) 1390 { 1391 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1392 int ospeed; 1393 u_char lcr; 1394 int s; 1395 1396 if (COM_ISALIVE(sc) == 0) 1397 return (EIO); 1398 1399 #ifdef COM_HAYESP 1400 if (sc->sc_type == COM_TYPE_HAYESP) { 1401 int prescaler, speed; 1402 1403 /* 1404 * Calculate UART clock prescaler. It should be in 1405 * range of 0 .. 3. 1406 */ 1407 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1408 prescaler++, speed /= 2) 1409 if ((ospeed = comspeed(speed, sc->sc_frequency, 1410 sc->sc_type)) > 0) 1411 break; 1412 1413 if (prescaler == 4) 1414 return (EINVAL); 1415 sc->sc_prescaler = prescaler; 1416 } else 1417 #endif 1418 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1419 1420 /* Check requested parameters. */ 1421 if (ospeed < 0) 1422 return (EINVAL); 1423 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1424 return (EINVAL); 1425 1426 /* 1427 * For the console, always force CLOCAL and !HUPCL, so that the port 1428 * is always active. 1429 */ 1430 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1431 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1432 SET(t->c_cflag, CLOCAL); 1433 CLR(t->c_cflag, HUPCL); 1434 } 1435 1436 /* 1437 * If there were no changes, don't do anything. This avoids dropping 1438 * input and improves performance when all we did was frob things like 1439 * VMIN and VTIME. 1440 */ 1441 if (tp->t_ospeed == t->c_ospeed && 1442 tp->t_cflag == t->c_cflag) 1443 return (0); 1444 1445 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1446 1447 s = splserial(); 1448 COM_LOCK(sc); 1449 1450 sc->sc_lcr = lcr; 1451 1452 /* 1453 * If we're not in a mode that assumes a connection is present, then 1454 * ignore carrier changes. 1455 */ 1456 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1457 sc->sc_msr_dcd = 0; 1458 else 1459 sc->sc_msr_dcd = MSR_DCD; 1460 /* 1461 * Set the flow control pins depending on the current flow control 1462 * mode. 1463 */ 1464 if (ISSET(t->c_cflag, CRTSCTS)) { 1465 sc->sc_mcr_dtr = MCR_DTR; 1466 sc->sc_mcr_rts = MCR_RTS; 1467 sc->sc_msr_cts = MSR_CTS; 1468 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1469 } else if (ISSET(t->c_cflag, MDMBUF)) { 1470 /* 1471 * For DTR/DCD flow control, make sure we don't toggle DTR for 1472 * carrier detection. 1473 */ 1474 sc->sc_mcr_dtr = 0; 1475 sc->sc_mcr_rts = MCR_DTR; 1476 sc->sc_msr_cts = MSR_DCD; 1477 sc->sc_efr = 0; 1478 } else { 1479 /* 1480 * If no flow control, then always set RTS. This will make 1481 * the other side happy if it mistakenly thinks we're doing 1482 * RTS/CTS flow control. 1483 */ 1484 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1485 sc->sc_mcr_rts = 0; 1486 sc->sc_msr_cts = 0; 1487 sc->sc_efr = 0; 1488 if (ISSET(sc->sc_mcr, MCR_DTR)) 1489 SET(sc->sc_mcr, MCR_RTS); 1490 else 1491 CLR(sc->sc_mcr, MCR_RTS); 1492 } 1493 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1494 1495 #if 0 1496 if (ospeed == 0) 1497 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1498 else 1499 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1500 #endif 1501 1502 sc->sc_dlbl = ospeed; 1503 sc->sc_dlbh = ospeed >> 8; 1504 1505 /* 1506 * Set the FIFO threshold based on the receive speed. 1507 * 1508 * * If it's a low speed, it's probably a mouse or some other 1509 * interactive device, so set the threshold low. 1510 * * If it's a high speed, trim the trigger level down to prevent 1511 * overflows. 1512 * * Otherwise set it a bit higher. 1513 */ 1514 if (sc->sc_type == COM_TYPE_HAYESP) 1515 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1516 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1517 sc->sc_fifo = FIFO_ENABLE | 1518 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8); 1519 else 1520 sc->sc_fifo = 0; 1521 1522 /* And copy to tty. */ 1523 tp->t_ispeed = 0; 1524 tp->t_ospeed = t->c_ospeed; 1525 tp->t_cflag = t->c_cflag; 1526 1527 if (!sc->sc_heldchange) { 1528 if (sc->sc_tx_busy) { 1529 sc->sc_heldtbc = sc->sc_tbc; 1530 sc->sc_tbc = 0; 1531 sc->sc_heldchange = 1; 1532 } else 1533 com_loadchannelregs(sc); 1534 } 1535 1536 if (!ISSET(t->c_cflag, CHWFLOW)) { 1537 /* Disable the high water mark. */ 1538 sc->sc_r_hiwat = 0; 1539 sc->sc_r_lowat = 0; 1540 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1541 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1542 com_schedrx(sc); 1543 } 1544 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1545 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1546 com_hwiflow(sc); 1547 } 1548 } else { 1549 sc->sc_r_hiwat = com_rbuf_hiwat; 1550 sc->sc_r_lowat = com_rbuf_lowat; 1551 } 1552 1553 COM_UNLOCK(sc); 1554 splx(s); 1555 1556 /* 1557 * Update the tty layer's idea of the carrier bit, in case we changed 1558 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1559 * explicit request. 1560 */ 1561 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1562 1563 #ifdef COM_DEBUG 1564 if (com_debug) 1565 comstatus(sc, "comparam "); 1566 #endif 1567 1568 if (!ISSET(t->c_cflag, CHWFLOW)) { 1569 if (sc->sc_tx_stopped) { 1570 sc->sc_tx_stopped = 0; 1571 comstart(tp); 1572 } 1573 } 1574 1575 return (0); 1576 } 1577 1578 void 1579 com_iflush(struct com_softc *sc) 1580 { 1581 bus_space_tag_t iot = sc->sc_iot; 1582 bus_space_handle_t ioh = sc->sc_ioh; 1583 #ifdef DIAGNOSTIC 1584 int reg; 1585 #endif 1586 int timo; 1587 1588 #ifdef DIAGNOSTIC 1589 reg = 0xffff; 1590 #endif 1591 timo = 50000; 1592 /* flush any pending I/O */ 1593 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1594 && --timo) 1595 #ifdef DIAGNOSTIC 1596 reg = 1597 #else 1598 (void) 1599 #endif 1600 bus_space_read_1(iot, ioh, com_data); 1601 #ifdef DIAGNOSTIC 1602 if (!timo) 1603 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1604 reg); 1605 #endif 1606 } 1607 1608 void 1609 com_loadchannelregs(struct com_softc *sc) 1610 { 1611 bus_space_tag_t iot = sc->sc_iot; 1612 bus_space_handle_t ioh = sc->sc_ioh; 1613 1614 /* XXXXX necessary? */ 1615 com_iflush(sc); 1616 1617 #ifdef COM_PXA2X0 1618 if (sc->sc_type == COM_TYPE_PXA2x0) 1619 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1620 else 1621 #endif 1622 bus_space_write_1(iot, ioh, com_ier, 0); 1623 1624 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1625 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1626 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1627 } 1628 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1629 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1630 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1631 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1632 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1633 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1634 #ifdef COM_HAYESP 1635 if (sc->sc_type == COM_TYPE_HAYESP) { 1636 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1637 HAYESP_SETPRESCALER); 1638 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1639 sc->sc_prescaler); 1640 } 1641 #endif 1642 1643 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1644 } 1645 1646 int 1647 comhwiflow(struct tty *tp, int block) 1648 { 1649 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1650 int s; 1651 1652 if (COM_ISALIVE(sc) == 0) 1653 return (0); 1654 1655 if (sc->sc_mcr_rts == 0) 1656 return (0); 1657 1658 s = splserial(); 1659 COM_LOCK(sc); 1660 1661 if (block) { 1662 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1663 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1664 com_hwiflow(sc); 1665 } 1666 } else { 1667 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1668 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1669 com_schedrx(sc); 1670 } 1671 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1672 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1673 com_hwiflow(sc); 1674 } 1675 } 1676 1677 COM_UNLOCK(sc); 1678 splx(s); 1679 return (1); 1680 } 1681 1682 /* 1683 * (un)block input via hw flowcontrol 1684 */ 1685 void 1686 com_hwiflow(struct com_softc *sc) 1687 { 1688 bus_space_tag_t iot = sc->sc_iot; 1689 bus_space_handle_t ioh = sc->sc_ioh; 1690 1691 if (sc->sc_mcr_rts == 0) 1692 return; 1693 1694 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1695 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1696 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1697 } else { 1698 SET(sc->sc_mcr, sc->sc_mcr_rts); 1699 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1700 } 1701 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1702 } 1703 1704 1705 void 1706 comstart(struct tty *tp) 1707 { 1708 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1709 bus_space_tag_t iot = sc->sc_iot; 1710 bus_space_handle_t ioh = sc->sc_ioh; 1711 int s; 1712 1713 if (COM_ISALIVE(sc) == 0) 1714 return; 1715 1716 s = spltty(); 1717 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1718 goto out; 1719 if (sc->sc_tx_stopped) 1720 goto out; 1721 1722 if (tp->t_outq.c_cc <= tp->t_lowat) { 1723 if (ISSET(tp->t_state, TS_ASLEEP)) { 1724 CLR(tp->t_state, TS_ASLEEP); 1725 wakeup(&tp->t_outq); 1726 } 1727 selwakeup(&tp->t_wsel); 1728 if (tp->t_outq.c_cc == 0) 1729 goto out; 1730 } 1731 1732 /* Grab the first contiguous region of buffer space. */ 1733 { 1734 u_char *tba; 1735 int tbc; 1736 1737 tba = tp->t_outq.c_cf; 1738 tbc = ndqb(&tp->t_outq, 0); 1739 1740 (void)splserial(); 1741 COM_LOCK(sc); 1742 1743 sc->sc_tba = tba; 1744 sc->sc_tbc = tbc; 1745 } 1746 1747 SET(tp->t_state, TS_BUSY); 1748 sc->sc_tx_busy = 1; 1749 1750 /* Enable transmit completion interrupts if necessary. */ 1751 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1752 SET(sc->sc_ier, IER_ETXRDY); 1753 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1754 } 1755 1756 /* Output the first chunk of the contiguous buffer. */ 1757 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1758 u_int n; 1759 1760 n = sc->sc_tbc; 1761 if (n > sc->sc_fifolen) 1762 n = sc->sc_fifolen; 1763 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1764 sc->sc_tbc -= n; 1765 sc->sc_tba += n; 1766 } 1767 1768 COM_UNLOCK(sc); 1769 out: 1770 splx(s); 1771 return; 1772 } 1773 1774 /* 1775 * Stop output on a line. 1776 */ 1777 void 1778 comstop(struct tty *tp, int flag) 1779 { 1780 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1781 int s; 1782 1783 s = splserial(); 1784 COM_LOCK(sc); 1785 if (ISSET(tp->t_state, TS_BUSY)) { 1786 /* Stop transmitting at the next chunk. */ 1787 sc->sc_tbc = 0; 1788 sc->sc_heldtbc = 0; 1789 if (!ISSET(tp->t_state, TS_TTSTOP)) 1790 SET(tp->t_state, TS_FLUSH); 1791 } 1792 COM_UNLOCK(sc); 1793 splx(s); 1794 } 1795 1796 void 1797 comdiag(void *arg) 1798 { 1799 struct com_softc *sc = arg; 1800 int overflows, floods; 1801 int s; 1802 1803 s = splserial(); 1804 COM_LOCK(sc); 1805 overflows = sc->sc_overflows; 1806 sc->sc_overflows = 0; 1807 floods = sc->sc_floods; 1808 sc->sc_floods = 0; 1809 sc->sc_errors = 0; 1810 COM_UNLOCK(sc); 1811 splx(s); 1812 1813 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1814 sc->sc_dev.dv_xname, 1815 overflows, overflows == 1 ? "" : "s", 1816 floods, floods == 1 ? "" : "s"); 1817 } 1818 1819 integrate void 1820 com_rxsoft(struct com_softc *sc, struct tty *tp) 1821 { 1822 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1823 u_char *get, *end; 1824 u_int cc, scc; 1825 u_char lsr; 1826 int code; 1827 int s; 1828 1829 end = sc->sc_ebuf; 1830 get = sc->sc_rbget; 1831 scc = cc = com_rbuf_size - sc->sc_rbavail; 1832 1833 if (cc == com_rbuf_size) { 1834 sc->sc_floods++; 1835 if (sc->sc_errors++ == 0) 1836 callout_reset(&sc->sc_diag_callout, 60 * hz, 1837 comdiag, sc); 1838 } 1839 1840 /* If not yet open, drop the entire buffer content here */ 1841 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1842 get += cc << 1; 1843 if (get >= end) 1844 get -= com_rbuf_size << 1; 1845 cc = 0; 1846 } 1847 while (cc) { 1848 code = get[0]; 1849 lsr = get[1]; 1850 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1851 if (ISSET(lsr, LSR_OE)) { 1852 sc->sc_overflows++; 1853 if (sc->sc_errors++ == 0) 1854 callout_reset(&sc->sc_diag_callout, 1855 60 * hz, comdiag, sc); 1856 } 1857 if (ISSET(lsr, LSR_BI | LSR_FE)) 1858 SET(code, TTY_FE); 1859 if (ISSET(lsr, LSR_PE)) 1860 SET(code, TTY_PE); 1861 } 1862 if ((*rint)(code, tp) == -1) { 1863 /* 1864 * The line discipline's buffer is out of space. 1865 */ 1866 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1867 /* 1868 * We're either not using flow control, or the 1869 * line discipline didn't tell us to block for 1870 * some reason. Either way, we have no way to 1871 * know when there's more space available, so 1872 * just drop the rest of the data. 1873 */ 1874 get += cc << 1; 1875 if (get >= end) 1876 get -= com_rbuf_size << 1; 1877 cc = 0; 1878 } else { 1879 /* 1880 * Don't schedule any more receive processing 1881 * until the line discipline tells us there's 1882 * space available (through comhwiflow()). 1883 * Leave the rest of the data in the input 1884 * buffer. 1885 */ 1886 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1887 } 1888 break; 1889 } 1890 get += 2; 1891 if (get >= end) 1892 get = sc->sc_rbuf; 1893 cc--; 1894 } 1895 1896 if (cc != scc) { 1897 sc->sc_rbget = get; 1898 s = splserial(); 1899 COM_LOCK(sc); 1900 1901 cc = sc->sc_rbavail += scc - cc; 1902 /* Buffers should be ok again, release possible block. */ 1903 if (cc >= sc->sc_r_lowat) { 1904 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1905 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1906 SET(sc->sc_ier, IER_ERXRDY); 1907 #ifdef COM_PXA2X0 1908 if (sc->sc_type == COM_TYPE_PXA2x0) 1909 SET(sc->sc_ier, IER_ERXTOUT); 1910 #endif 1911 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1912 com_ier, sc->sc_ier); 1913 } 1914 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1915 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1916 com_hwiflow(sc); 1917 } 1918 } 1919 COM_UNLOCK(sc); 1920 splx(s); 1921 } 1922 } 1923 1924 integrate void 1925 com_txsoft(struct com_softc *sc, struct tty *tp) 1926 { 1927 1928 CLR(tp->t_state, TS_BUSY); 1929 if (ISSET(tp->t_state, TS_FLUSH)) 1930 CLR(tp->t_state, TS_FLUSH); 1931 else 1932 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1933 (*tp->t_linesw->l_start)(tp); 1934 } 1935 1936 integrate void 1937 com_stsoft(struct com_softc *sc, struct tty *tp) 1938 { 1939 u_char msr, delta; 1940 int s; 1941 1942 s = splserial(); 1943 COM_LOCK(sc); 1944 msr = sc->sc_msr; 1945 delta = sc->sc_msr_delta; 1946 sc->sc_msr_delta = 0; 1947 COM_UNLOCK(sc); 1948 splx(s); 1949 1950 if (ISSET(delta, sc->sc_msr_dcd)) { 1951 /* 1952 * Inform the tty layer that carrier detect changed. 1953 */ 1954 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1955 } 1956 1957 if (ISSET(delta, sc->sc_msr_cts)) { 1958 /* Block or unblock output according to flow control. */ 1959 if (ISSET(msr, sc->sc_msr_cts)) { 1960 sc->sc_tx_stopped = 0; 1961 (*tp->t_linesw->l_start)(tp); 1962 } else { 1963 sc->sc_tx_stopped = 1; 1964 } 1965 } 1966 1967 #ifdef COM_DEBUG 1968 if (com_debug) 1969 comstatus(sc, "com_stsoft"); 1970 #endif 1971 } 1972 1973 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1974 void 1975 comsoft(void *arg) 1976 { 1977 struct com_softc *sc = arg; 1978 struct tty *tp; 1979 1980 if (COM_ISALIVE(sc) == 0) 1981 return; 1982 1983 { 1984 #else 1985 void 1986 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1987 comsoft(void) 1988 #else 1989 comsoft(void *arg) 1990 #endif 1991 { 1992 struct com_softc *sc; 1993 struct tty *tp; 1994 int unit; 1995 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1996 int s; 1997 1998 s = splsoftserial(); 1999 com_softintr_scheduled = 0; 2000 #endif 2001 2002 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 2003 sc = device_lookup(&com_cd, unit); 2004 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 2005 continue; 2006 2007 if (COM_ISALIVE(sc) == 0) 2008 continue; 2009 2010 tp = sc->sc_tty; 2011 if (tp == NULL) 2012 continue; 2013 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2014 continue; 2015 #endif 2016 tp = sc->sc_tty; 2017 2018 if (sc->sc_rx_ready) { 2019 sc->sc_rx_ready = 0; 2020 com_rxsoft(sc, tp); 2021 } 2022 2023 if (sc->sc_st_check) { 2024 sc->sc_st_check = 0; 2025 com_stsoft(sc, tp); 2026 } 2027 2028 if (sc->sc_tx_done) { 2029 sc->sc_tx_done = 0; 2030 com_txsoft(sc, tp); 2031 } 2032 } 2033 2034 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2035 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2036 splx(s); 2037 #endif 2038 #endif 2039 } 2040 2041 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2042 /* there has got to be a better way to do comsoft() */ 2043 }} 2044 #endif 2045 2046 int 2047 comintr(void *arg) 2048 { 2049 struct com_softc *sc = arg; 2050 bus_space_tag_t iot = sc->sc_iot; 2051 bus_space_handle_t ioh = sc->sc_ioh; 2052 u_char *put, *end; 2053 u_int cc; 2054 u_char lsr, iir; 2055 2056 if (COM_ISALIVE(sc) == 0) 2057 return (0); 2058 2059 COM_LOCK(sc); 2060 iir = bus_space_read_1(iot, ioh, com_iir); 2061 if (ISSET(iir, IIR_NOPEND)) { 2062 COM_UNLOCK(sc); 2063 return (0); 2064 } 2065 2066 end = sc->sc_ebuf; 2067 put = sc->sc_rbput; 2068 cc = sc->sc_rbavail; 2069 2070 again: do { 2071 u_char msr, delta; 2072 2073 lsr = bus_space_read_1(iot, ioh, com_lsr); 2074 if (ISSET(lsr, LSR_BI)) { 2075 int cn_trapped = 0; 2076 2077 cn_check_magic(sc->sc_tty->t_dev, 2078 CNC_BREAK, com_cnm_state); 2079 if (cn_trapped) 2080 continue; 2081 #if defined(KGDB) && !defined(DDB) 2082 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2083 kgdb_connect(1); 2084 continue; 2085 } 2086 #endif 2087 } 2088 2089 if (ISSET(lsr, LSR_RCV_MASK) && 2090 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2091 while (cc > 0) { 2092 int cn_trapped = 0; 2093 put[0] = bus_space_read_1(iot, ioh, com_data); 2094 put[1] = lsr; 2095 cn_check_magic(sc->sc_tty->t_dev, 2096 put[0], com_cnm_state); 2097 if (cn_trapped) 2098 goto next; 2099 put += 2; 2100 if (put >= end) 2101 put = sc->sc_rbuf; 2102 cc--; 2103 next: 2104 lsr = bus_space_read_1(iot, ioh, com_lsr); 2105 if (!ISSET(lsr, LSR_RCV_MASK)) 2106 break; 2107 } 2108 2109 /* 2110 * Current string of incoming characters ended because 2111 * no more data was available or we ran out of space. 2112 * Schedule a receive event if any data was received. 2113 * If we're out of space, turn off receive interrupts. 2114 */ 2115 sc->sc_rbput = put; 2116 sc->sc_rbavail = cc; 2117 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2118 sc->sc_rx_ready = 1; 2119 2120 /* 2121 * See if we are in danger of overflowing a buffer. If 2122 * so, use hardware flow control to ease the pressure. 2123 */ 2124 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2125 cc < sc->sc_r_hiwat) { 2126 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2127 com_hwiflow(sc); 2128 } 2129 2130 /* 2131 * If we're out of space, disable receive interrupts 2132 * until the queue has drained a bit. 2133 */ 2134 if (!cc) { 2135 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2136 #ifdef COM_PXA2X0 2137 if (sc->sc_type == COM_TYPE_PXA2x0) 2138 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 2139 else 2140 #endif 2141 CLR(sc->sc_ier, IER_ERXRDY); 2142 bus_space_write_1(iot, ioh, com_ier, 2143 sc->sc_ier); 2144 } 2145 } else { 2146 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 2147 (void) bus_space_read_1(iot, ioh, com_data); 2148 continue; 2149 } 2150 } 2151 2152 msr = bus_space_read_1(iot, ioh, com_msr); 2153 delta = msr ^ sc->sc_msr; 2154 sc->sc_msr = msr; 2155 /* 2156 * Pulse-per-second (PSS) signals on edge of DCD? 2157 * Process these even if line discipline is ignoring DCD. 2158 */ 2159 if (delta & sc->sc_ppsmask) { 2160 struct timeval tv; 2161 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2162 /* XXX nanotime() */ 2163 microtime(&tv); 2164 TIMEVAL_TO_TIMESPEC(&tv, 2165 &sc->ppsinfo.assert_timestamp); 2166 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2167 timespecadd(&sc->ppsinfo.assert_timestamp, 2168 &sc->ppsparam.assert_offset, 2169 &sc->ppsinfo.assert_timestamp); 2170 } 2171 2172 #ifdef PPS_SYNC 2173 if (pps_kc_hardpps_source == sc && 2174 pps_kc_hardpps_mode & PPS_CAPTUREASSERT) { 2175 hardpps(&tv, tv.tv_usec); 2176 } 2177 #endif 2178 sc->ppsinfo.assert_sequence++; 2179 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2180 2181 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2182 /* XXX nanotime() */ 2183 microtime(&tv); 2184 TIMEVAL_TO_TIMESPEC(&tv, 2185 &sc->ppsinfo.clear_timestamp); 2186 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2187 timespecadd(&sc->ppsinfo.clear_timestamp, 2188 &sc->ppsparam.clear_offset, 2189 &sc->ppsinfo.clear_timestamp); 2190 } 2191 2192 #ifdef PPS_SYNC 2193 if (pps_kc_hardpps_source == sc && 2194 pps_kc_hardpps_mode & PPS_CAPTURECLEAR) { 2195 hardpps(&tv, tv.tv_usec); 2196 } 2197 #endif 2198 sc->ppsinfo.clear_sequence++; 2199 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2200 } 2201 } 2202 2203 /* 2204 * Process normal status changes 2205 */ 2206 if (ISSET(delta, sc->sc_msr_mask)) { 2207 SET(sc->sc_msr_delta, delta); 2208 2209 /* 2210 * Stop output immediately if we lose the output 2211 * flow control signal or carrier detect. 2212 */ 2213 if (ISSET(~msr, sc->sc_msr_mask)) { 2214 sc->sc_tbc = 0; 2215 sc->sc_heldtbc = 0; 2216 #ifdef COM_DEBUG 2217 if (com_debug) 2218 comstatus(sc, "comintr "); 2219 #endif 2220 } 2221 2222 sc->sc_st_check = 1; 2223 } 2224 } while (!ISSET((iir = 2225 bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND) && 2226 /* 2227 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 2228 * by IIR read, so we can't do this way: `process all interrupts, 2229 * then do TX if possble'. 2230 */ 2231 (iir & IIR_IMASK) != IIR_TXRDY); 2232 2233 /* 2234 * Read LSR again, since there may be an interrupt between 2235 * the last LSR read and IIR read above. 2236 */ 2237 lsr = bus_space_read_1(iot, ioh, com_lsr); 2238 2239 /* 2240 * See if data can be transmitted as well. 2241 * Schedule tx done event if no data left 2242 * and tty was marked busy. 2243 */ 2244 if (ISSET(lsr, LSR_TXRDY)) { 2245 /* 2246 * If we've delayed a parameter change, do it now, and restart 2247 * output. 2248 */ 2249 if (sc->sc_heldchange) { 2250 com_loadchannelregs(sc); 2251 sc->sc_heldchange = 0; 2252 sc->sc_tbc = sc->sc_heldtbc; 2253 sc->sc_heldtbc = 0; 2254 } 2255 2256 /* Output the next chunk of the contiguous buffer, if any. */ 2257 if (sc->sc_tbc > 0) { 2258 u_int n; 2259 2260 n = sc->sc_tbc; 2261 if (n > sc->sc_fifolen) 2262 n = sc->sc_fifolen; 2263 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2264 sc->sc_tbc -= n; 2265 sc->sc_tba += n; 2266 } else { 2267 /* Disable transmit completion interrupts if necessary. */ 2268 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2269 CLR(sc->sc_ier, IER_ETXRDY); 2270 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2271 } 2272 if (sc->sc_tx_busy) { 2273 sc->sc_tx_busy = 0; 2274 sc->sc_tx_done = 1; 2275 } 2276 } 2277 } 2278 2279 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2280 goto again; 2281 2282 COM_UNLOCK(sc); 2283 2284 /* Wake up the poller. */ 2285 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2286 softintr_schedule(sc->sc_si); 2287 #else 2288 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2289 setsoftserial(); 2290 #else 2291 if (!com_softintr_scheduled) { 2292 com_softintr_scheduled = 1; 2293 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2294 } 2295 #endif 2296 #endif 2297 2298 #if NRND > 0 && defined(RND_COM) 2299 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2300 #endif 2301 2302 return (1); 2303 } 2304 2305 /* 2306 * The following functions are polled getc and putc routines, shared 2307 * by the console and kgdb glue. 2308 * 2309 * The read-ahead code is so that you can detect pending in-band 2310 * cn_magic in polled mode while doing output rather than having to 2311 * wait until the kernel decides it needs input. 2312 */ 2313 2314 #define MAX_READAHEAD 20 2315 static int com_readahead[MAX_READAHEAD]; 2316 static int com_readaheadcount = 0; 2317 2318 int 2319 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2320 { 2321 int s = splserial(); 2322 u_char stat, c; 2323 2324 /* got a character from reading things earlier */ 2325 if (com_readaheadcount > 0) { 2326 int i; 2327 2328 c = com_readahead[0]; 2329 for (i = 1; i < com_readaheadcount; i++) { 2330 com_readahead[i-1] = com_readahead[i]; 2331 } 2332 com_readaheadcount--; 2333 splx(s); 2334 return (c); 2335 } 2336 2337 /* block until a character becomes available */ 2338 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2339 ; 2340 2341 c = bus_space_read_1(iot, ioh, com_data); 2342 stat = bus_space_read_1(iot, ioh, com_iir); 2343 { 2344 int cn_trapped = 0; /* unused */ 2345 #ifdef DDB 2346 extern int db_active; 2347 if (!db_active) 2348 #endif 2349 cn_check_magic(dev, c, com_cnm_state); 2350 } 2351 splx(s); 2352 return (c); 2353 } 2354 2355 void 2356 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2357 { 2358 int s = splserial(); 2359 int cin, stat, timo; 2360 2361 if (com_readaheadcount < MAX_READAHEAD 2362 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2363 int cn_trapped = 0; 2364 cin = bus_space_read_1(iot, ioh, com_data); 2365 stat = bus_space_read_1(iot, ioh, com_iir); 2366 cn_check_magic(dev, cin, com_cnm_state); 2367 com_readahead[com_readaheadcount++] = cin; 2368 } 2369 2370 /* wait for any pending transmission to finish */ 2371 timo = 150000; 2372 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2373 continue; 2374 2375 bus_space_write_1(iot, ioh, com_data, c); 2376 COM_BARRIER(iot, ioh, BR | BW); 2377 2378 splx(s); 2379 } 2380 2381 /* 2382 * Initialize UART for use as console or KGDB line. 2383 */ 2384 int 2385 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2386 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2387 { 2388 bus_space_handle_t ioh; 2389 2390 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2391 return (ENOMEM); /* ??? */ 2392 2393 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2394 bus_space_write_1(iot, ioh, com_efr, 0); 2395 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2396 rate = comspeed(rate, frequency, type); 2397 bus_space_write_1(iot, ioh, com_dlbl, rate); 2398 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2399 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2400 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2401 bus_space_write_1(iot, ioh, com_fifo, 2402 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2403 #ifdef COM_PXA2X0 2404 if (type == COM_TYPE_PXA2x0) 2405 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 2406 else 2407 #endif 2408 bus_space_write_1(iot, ioh, com_ier, 0); 2409 2410 *iohp = ioh; 2411 return (0); 2412 } 2413 2414 /* 2415 * Following are all routines needed for COM to act as console 2416 */ 2417 struct consdev comcons = { 2418 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2419 NODEV, CN_NORMAL 2420 }; 2421 2422 2423 int 2424 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2425 int type, tcflag_t cflag) 2426 { 2427 int res; 2428 2429 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2430 if (res) 2431 return (res); 2432 2433 cn_tab = &comcons; 2434 cn_init_magic(&com_cnm_state); 2435 cn_set_magic("\047\001"); /* default magic is BREAK */ 2436 2437 comconstag = iot; 2438 comconsaddr = iobase; 2439 comconsrate = rate; 2440 comconscflag = cflag; 2441 2442 return (0); 2443 } 2444 2445 int 2446 comcngetc(dev_t dev) 2447 { 2448 2449 return (com_common_getc(dev, comconstag, comconsioh)); 2450 } 2451 2452 /* 2453 * Console kernel output character routine. 2454 */ 2455 void 2456 comcnputc(dev_t dev, int c) 2457 { 2458 2459 com_common_putc(dev, comconstag, comconsioh, c); 2460 } 2461 2462 void 2463 comcnpollc(dev_t dev, int on) 2464 { 2465 2466 } 2467 2468 #ifdef KGDB 2469 int 2470 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2471 int frequency, int type, tcflag_t cflag) 2472 { 2473 int res; 2474 2475 if (iot == comconstag && iobase == comconsaddr) { 2476 #if !defined(DDB) 2477 return (EBUSY); /* cannot share with console */ 2478 #else 2479 com_kgdb_ioh = comconsioh; 2480 #endif 2481 } else { 2482 res = cominit(iot, iobase, rate, frequency, type, cflag, 2483 &com_kgdb_ioh); 2484 if (res) 2485 return (res); 2486 2487 /* 2488 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2489 * expects this to be initialized 2490 */ 2491 cn_init_magic(&com_cnm_state); 2492 cn_set_magic("\047\001"); 2493 } 2494 2495 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2496 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2497 2498 com_kgdb_iot = iot; 2499 com_kgdb_addr = iobase; 2500 2501 return (0); 2502 } 2503 2504 /* ARGSUSED */ 2505 int 2506 com_kgdb_getc(void *arg) 2507 { 2508 2509 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2510 } 2511 2512 /* ARGSUSED */ 2513 void 2514 com_kgdb_putc(void *arg, int c) 2515 { 2516 2517 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2518 } 2519 #endif /* KGDB */ 2520 2521 /* helper function to identify the com ports used by 2522 console or KGDB (and not yet autoconf attached) */ 2523 int 2524 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2525 { 2526 bus_space_handle_t help; 2527 2528 if (!comconsattached && 2529 iot == comconstag && iobase == comconsaddr) 2530 help = comconsioh; 2531 #ifdef KGDB 2532 else if (!com_kgdb_attached && 2533 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2534 help = com_kgdb_ioh; 2535 #endif 2536 else 2537 return (0); 2538 2539 if (ioh) 2540 *ioh = help; 2541 return (1); 2542 } 2543
Indexes created Sat Sep 27 14:09:57 GMT 2025