com.c revision 1.240
1 /* $NetBSD: com.c,v 1.240 2006/01/08 22:19:59 dsl Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.240 2006/01/08 22:19:59 dsl Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 125 #include <machine/intr.h> 126 #include <machine/bus.h> 127 128 #include <dev/ic/comreg.h> 129 #include <dev/ic/comvar.h> 130 #include <dev/ic/ns16550reg.h> 131 #include <dev/ic/st16650reg.h> 132 #ifdef COM_HAYESP 133 #include <dev/ic/hayespreg.h> 134 #endif 135 #define com_lcr com_cfcr 136 #include <dev/cons.h> 137 138 #ifdef COM_HAYESP 139 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 140 #endif 141 142 static void com_enable_debugport(struct com_softc *); 143 144 void com_config(struct com_softc *); 145 void com_shutdown(struct com_softc *); 146 int comspeed(long, long, int); 147 static u_char cflag2lcr(tcflag_t); 148 int comparam(struct tty *, struct termios *); 149 void comstart(struct tty *); 150 int comhwiflow(struct tty *, int); 151 152 void com_loadchannelregs(struct com_softc *); 153 void com_hwiflow(struct com_softc *); 154 void com_break(struct com_softc *, int); 155 void com_modem(struct com_softc *, int); 156 void tiocm_to_com(struct com_softc *, u_long, int); 157 int com_to_tiocm(struct com_softc *); 158 void com_iflush(struct com_softc *); 159 160 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 161 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 162 163 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 164 bus_space_handle_t *); 165 166 int comcngetc(dev_t); 167 void comcnputc(dev_t, int); 168 void comcnpollc(dev_t, int); 169 170 #define integrate static inline 171 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 172 void comsoft(void *); 173 #else 174 #ifndef __NO_SOFT_SERIAL_INTERRUPT 175 void comsoft(void); 176 #else 177 void comsoft(void *); 178 static struct callout comsoft_callout = CALLOUT_INITIALIZER; 179 #endif 180 #endif 181 integrate void com_rxsoft(struct com_softc *, struct tty *); 182 integrate void com_txsoft(struct com_softc *, struct tty *); 183 integrate void com_stsoft(struct com_softc *, struct tty *); 184 integrate void com_schedrx(struct com_softc *); 185 void comdiag(void *); 186 187 extern struct cfdriver com_cd; 188 189 dev_type_open(comopen); 190 dev_type_close(comclose); 191 dev_type_read(comread); 192 dev_type_write(comwrite); 193 dev_type_ioctl(comioctl); 194 dev_type_stop(comstop); 195 dev_type_tty(comtty); 196 dev_type_poll(compoll); 197 198 const struct cdevsw com_cdevsw = { 199 comopen, comclose, comread, comwrite, comioctl, 200 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 201 }; 202 203 /* 204 * Make this an option variable one can patch. 205 * But be warned: this must be a power of 2! 206 */ 207 u_int com_rbuf_size = COM_RING_SIZE; 208 209 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 210 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 211 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 212 213 static bus_addr_t comconsaddr; 214 static bus_space_tag_t comconstag; 215 static bus_space_handle_t comconsioh; 216 static int comconsattached; 217 static int comconsrate; 218 static tcflag_t comconscflag; 219 static struct cnm_state com_cnm_state; 220 221 static int ppscap = 222 PPS_TSFMT_TSPEC | 223 PPS_CAPTUREASSERT | 224 PPS_CAPTURECLEAR | 225 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 226 227 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 228 #ifdef __NO_SOFT_SERIAL_INTERRUPT 229 volatile int com_softintr_scheduled; 230 #endif 231 #endif 232 233 #ifdef KGDB 234 #include <sys/kgdb.h> 235 236 static bus_addr_t com_kgdb_addr; 237 static bus_space_tag_t com_kgdb_iot; 238 static bus_space_handle_t com_kgdb_ioh; 239 static int com_kgdb_attached; 240 241 int com_kgdb_getc(void *); 242 void com_kgdb_putc(void *, int); 243 #endif /* KGDB */ 244 245 #define COMUNIT_MASK 0x7ffff 246 #define COMDIALOUT_MASK 0x80000 247 248 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 249 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 250 251 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 252 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 253 254 #define BR BUS_SPACE_BARRIER_READ 255 #define BW BUS_SPACE_BARRIER_WRITE 256 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 257 258 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 259 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 260 261 /*ARGSUSED*/ 262 int 263 comspeed(long speed, long frequency, int type) 264 { 265 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 266 267 int x, err; 268 269 #if 0 270 if (speed == 0) 271 return (0); 272 #endif 273 if (speed <= 0) 274 return (-1); 275 x = divrnd(frequency / 16, speed); 276 if (x <= 0) 277 return (-1); 278 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 279 if (err < 0) 280 err = -err; 281 if (err > COM_TOLERANCE) 282 return (-1); 283 return (x); 284 285 #undef divrnd 286 } 287 288 #ifdef COM_DEBUG 289 int com_debug = 0; 290 291 void comstatus(struct com_softc *, const char *); 292 void 293 comstatus(struct com_softc *sc, const char *str) 294 { 295 struct tty *tp = sc->sc_tty; 296 297 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 298 sc->sc_dev.dv_xname, str, 299 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 300 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 301 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 302 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 303 sc->sc_tx_stopped ? '+' : '-'); 304 305 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 306 sc->sc_dev.dv_xname, str, 307 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 308 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 309 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 310 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 311 sc->sc_rx_flags); 312 } 313 #endif 314 315 int 316 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 317 { 318 319 /* force access to id reg */ 320 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 321 bus_space_write_1(iot, ioh, com_iir, 0); 322 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 323 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 324 return (0); 325 326 return (1); 327 } 328 329 #ifdef COM_HAYESP 330 int 331 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 332 { 333 char val, dips; 334 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 335 bus_space_tag_t iot = sc->sc_iot; 336 337 /* 338 * Hayes ESP cards have two iobases. One is for compatibility with 339 * 16550 serial chips, and at the same ISA PC base addresses. The 340 * other is for ESP-specific enhanced features, and lies at a 341 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 342 */ 343 344 /* Test for ESP signature */ 345 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 346 return (0); 347 348 /* 349 * ESP is present at ESP enhanced base address; unknown com port 350 */ 351 352 /* Get the dip-switch configurations */ 353 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 354 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 355 356 /* Determine which com port this ESP card services: bits 0,1 of */ 357 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 358 if (sc->sc_iobase != combaselist[dips & 0x03]) 359 return (0); 360 361 printf(": ESP"); 362 363 /* Check ESP Self Test bits. */ 364 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 365 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 366 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 367 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 368 if ((val & 0x70) < 0x20) { 369 printf("-old (%o)", val & 0x70); 370 /* we do not support the necessary features */ 371 return (0); 372 } 373 374 /* Check for ability to emulate 16550: bit 8 == 1 */ 375 if ((dips & 0x80) == 0) { 376 printf(" slave"); 377 /* XXX Does slave really mean no 16550 support?? */ 378 return (0); 379 } 380 381 /* 382 * If we made it this far, we are a full-featured ESP v2.0 (or 383 * better), at the correct com port address. 384 */ 385 386 sc->sc_type = COM_TYPE_HAYESP; 387 printf(", 1024 byte fifo\n"); 388 return (1); 389 } 390 #endif 391 392 static void 393 com_enable_debugport(struct com_softc *sc) 394 { 395 int s; 396 397 /* Turn on line break interrupt, set carrier. */ 398 s = splserial(); 399 COM_LOCK(sc); 400 sc->sc_ier = IER_ERXRDY; 401 #ifdef COM_PXA2X0 402 if (sc->sc_type == COM_TYPE_PXA2x0) 403 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 404 #endif 405 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 406 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 407 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 408 COM_UNLOCK(sc); 409 splx(s); 410 } 411 412 void 413 com_attach_subr(struct com_softc *sc) 414 { 415 bus_addr_t iobase = sc->sc_iobase; 416 bus_space_tag_t iot = sc->sc_iot; 417 bus_space_handle_t ioh = sc->sc_ioh; 418 struct tty *tp; 419 #ifdef COM_16650 420 u_int8_t lcr; 421 #endif 422 #ifdef COM_HAYESP 423 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 424 int *hayespp; 425 #endif 426 const char *fifo_msg = NULL; 427 428 callout_init(&sc->sc_diag_callout); 429 simple_lock_init(&sc->sc_lock); 430 431 /* Disable interrupts before configuring the device. */ 432 #ifdef COM_PXA2X0 433 if (sc->sc_type == COM_TYPE_PXA2x0) 434 sc->sc_ier = IER_EUART; 435 else 436 #endif 437 sc->sc_ier = 0; 438 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 439 440 if (iot == comconstag && iobase == comconsaddr) { 441 comconsattached = 1; 442 443 /* Make sure the console is always "hardwired". */ 444 delay(10000); /* wait for output to finish */ 445 SET(sc->sc_hwflags, COM_HW_CONSOLE); 446 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 447 } 448 449 #ifdef COM_HAYESP 450 sc->sc_prescaler = 0; /* set prescaler to x1. */ 451 452 /* Look for a Hayes ESP board. */ 453 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 454 bus_space_handle_t hayespioh; 455 456 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 457 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 458 continue; 459 if (comprobeHAYESP(hayespioh, sc)) { 460 sc->sc_hayespioh = hayespioh; 461 sc->sc_fifolen = 1024; 462 463 break; 464 } 465 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 466 } 467 /* No ESP; look for other things. */ 468 if (sc->sc_type != COM_TYPE_HAYESP) { 469 #endif 470 sc->sc_fifolen = 1; 471 /* look for a NS 16550AF UART with FIFOs */ 472 bus_space_write_1(iot, ioh, com_fifo, 473 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 474 delay(100); 475 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 476 == IIR_FIFO_MASK) 477 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 478 == FIFO_TRIGGER_14) { 479 SET(sc->sc_hwflags, COM_HW_FIFO); 480 481 #ifdef COM_16650 482 /* 483 * IIR changes into the EFR if LCR is set to LCR_EERS 484 * on 16650s. We also know IIR != 0 at this point. 485 * Write 0 into the EFR, and read it. If the result 486 * is 0, we have a 16650. 487 * 488 * Older 16650s were broken; the test to detect them 489 * is taken from the Linux driver. Apparently 490 * setting DLAB enable gives access to the EFR on 491 * these chips. 492 */ 493 lcr = bus_space_read_1(iot, ioh, com_lcr); 494 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 495 bus_space_write_1(iot, ioh, com_efr, 0); 496 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 497 bus_space_write_1(iot, ioh, com_lcr, 498 lcr | LCR_DLAB); 499 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 500 CLR(sc->sc_hwflags, COM_HW_FIFO); 501 sc->sc_fifolen = 0; 502 } else { 503 SET(sc->sc_hwflags, COM_HW_FLOW); 504 sc->sc_fifolen = 32; 505 } 506 } else 507 #endif 508 sc->sc_fifolen = 16; 509 510 #ifdef COM_16650 511 bus_space_write_1(iot, ioh, com_lcr, lcr); 512 if (sc->sc_fifolen == 0) 513 fifo_msg = "st16650, broken fifo"; 514 else if (sc->sc_fifolen == 32) 515 fifo_msg = "st16650a, working fifo"; 516 else 517 #endif 518 fifo_msg = "ns16550a, working fifo"; 519 } else 520 fifo_msg = "ns16550, broken fifo"; 521 else 522 fifo_msg = "ns8250 or ns16450, no fifo"; 523 bus_space_write_1(iot, ioh, com_fifo, 0); 524 /* 525 * Some chips will clear down both Tx and Rx FIFOs when zero is 526 * written to com_fifo. If this chip is the console, writing zero 527 * results in some of the chip/FIFO description being lost, so delay 528 * printing it until now. 529 */ 530 delay(10); 531 aprint_normal(": %s\n", fifo_msg); 532 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 533 sc->sc_fifolen = 1; 534 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 535 } 536 #ifdef COM_HAYESP 537 } 538 #endif 539 540 tp = ttymalloc(); 541 tp->t_oproc = comstart; 542 tp->t_param = comparam; 543 tp->t_hwiflow = comhwiflow; 544 545 sc->sc_tty = tp; 546 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 547 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 548 sc->sc_rbavail = com_rbuf_size; 549 if (sc->sc_rbuf == NULL) { 550 aprint_error("%s: unable to allocate ring buffer\n", 551 sc->sc_dev.dv_xname); 552 return; 553 } 554 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 555 556 tty_attach(tp); 557 558 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 559 SET(sc->sc_mcr, MCR_IENABLE); 560 561 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 562 int maj; 563 564 /* locate the major number */ 565 maj = cdevsw_lookup_major(&com_cdevsw); 566 567 tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 568 569 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 570 } 571 572 #ifdef KGDB 573 /* 574 * Allow kgdb to "take over" this port. If this is 575 * not the console and is the kgdb device, it has 576 * exclusive use. If it's the console _and_ the 577 * kgdb device, it doesn't. 578 */ 579 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 580 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 581 com_kgdb_attached = 1; 582 583 SET(sc->sc_hwflags, COM_HW_KGDB); 584 } 585 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 586 } 587 #endif 588 589 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 590 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 591 #endif 592 593 #if NRND > 0 && defined(RND_COM) 594 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 595 RND_TYPE_TTY, 0); 596 #endif 597 598 /* if there are no enable/disable functions, assume the device 599 is always enabled */ 600 if (!sc->enable) 601 sc->enabled = 1; 602 603 com_config(sc); 604 605 SET(sc->sc_hwflags, COM_HW_DEV_OK); 606 } 607 608 void 609 com_config(struct com_softc *sc) 610 { 611 bus_space_tag_t iot = sc->sc_iot; 612 bus_space_handle_t ioh = sc->sc_ioh; 613 614 /* Disable interrupts before configuring the device. */ 615 #ifdef COM_PXA2X0 616 if (sc->sc_type == COM_TYPE_PXA2x0) 617 sc->sc_ier = IER_EUART; 618 else 619 #endif 620 sc->sc_ier = 0; 621 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 622 (void) bus_space_read_1(iot, ioh, com_iir); 623 624 #ifdef COM_HAYESP 625 /* Look for a Hayes ESP board. */ 626 if (sc->sc_type == COM_TYPE_HAYESP) { 627 sc->sc_fifolen = 1024; 628 629 /* Set 16550 compatibility mode */ 630 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 631 HAYESP_SETMODE); 632 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 633 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 634 HAYESP_MODE_SCALE); 635 636 /* Set RTS/CTS flow control */ 637 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 638 HAYESP_SETFLOWTYPE); 639 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 640 HAYESP_FLOW_RTS); 641 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 642 HAYESP_FLOW_CTS); 643 644 /* Set flow control levels */ 645 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 646 HAYESP_SETRXFLOW); 647 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 648 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 649 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 650 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 651 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 652 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 653 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 654 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 655 } 656 #endif 657 658 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 659 com_enable_debugport(sc); 660 } 661 662 int 663 com_detach(struct device *self, int flags) 664 { 665 struct com_softc *sc = (struct com_softc *)self; 666 int maj, mn; 667 668 /* locate the major number */ 669 maj = cdevsw_lookup_major(&com_cdevsw); 670 671 /* Nuke the vnodes for any open instances. */ 672 mn = self->dv_unit; 673 vdevgone(maj, mn, mn, VCHR); 674 675 mn |= COMDIALOUT_MASK; 676 vdevgone(maj, mn, mn, VCHR); 677 678 if (sc->sc_rbuf == NULL) { 679 /* 680 * Ring buffer allocation failed in the com_attach_subr, 681 * only the tty is allocated, and nothing else. 682 */ 683 ttyfree(sc->sc_tty); 684 return 0; 685 } 686 687 /* Free the receive buffer. */ 688 free(sc->sc_rbuf, M_DEVBUF); 689 690 /* Detach and free the tty. */ 691 tty_detach(sc->sc_tty); 692 ttyfree(sc->sc_tty); 693 694 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 695 /* Unhook the soft interrupt handler. */ 696 softintr_disestablish(sc->sc_si); 697 #endif 698 699 #if NRND > 0 && defined(RND_COM) 700 /* Unhook the entropy source. */ 701 rnd_detach_source(&sc->rnd_source); 702 #endif 703 704 return (0); 705 } 706 707 int 708 com_activate(struct device *self, enum devact act) 709 { 710 struct com_softc *sc = (struct com_softc *)self; 711 int s, rv = 0; 712 713 s = splserial(); 714 COM_LOCK(sc); 715 switch (act) { 716 case DVACT_ACTIVATE: 717 rv = EOPNOTSUPP; 718 break; 719 720 case DVACT_DEACTIVATE: 721 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 722 rv = EBUSY; 723 break; 724 } 725 726 if (sc->disable != NULL && sc->enabled != 0) { 727 (*sc->disable)(sc); 728 sc->enabled = 0; 729 } 730 break; 731 } 732 733 COM_UNLOCK(sc); 734 splx(s); 735 return (rv); 736 } 737 738 void 739 com_shutdown(struct com_softc *sc) 740 { 741 struct tty *tp = sc->sc_tty; 742 int s; 743 744 s = splserial(); 745 COM_LOCK(sc); 746 747 /* If we were asserting flow control, then deassert it. */ 748 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 749 com_hwiflow(sc); 750 751 /* Clear any break condition set with TIOCSBRK. */ 752 com_break(sc, 0); 753 754 /* Turn off PPS capture on last close. */ 755 sc->sc_ppsmask = 0; 756 sc->ppsparam.mode = 0; 757 758 /* 759 * Hang up if necessary. Wait a bit, so the other side has time to 760 * notice even if we immediately open the port again. 761 * Avoid tsleeping above splhigh(). 762 */ 763 if (ISSET(tp->t_cflag, HUPCL)) { 764 com_modem(sc, 0); 765 COM_UNLOCK(sc); 766 splx(s); 767 /* XXX tsleep will only timeout */ 768 (void) tsleep(sc, TTIPRI, ttclos, hz); 769 s = splserial(); 770 COM_LOCK(sc); 771 } 772 773 /* Turn off interrupts. */ 774 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 775 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 776 #ifdef COM_PXA2X0 777 if (sc->sc_type == COM_TYPE_PXA2x0) 778 sc->sc_ier |= IER_ERXTOUT; 779 #endif 780 } else 781 sc->sc_ier = 0; 782 783 #ifdef COM_PXA2X0 784 if (sc->sc_type == COM_TYPE_PXA2x0) 785 sc->sc_ier |= IER_EUART; 786 #endif 787 788 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 789 790 if (sc->disable) { 791 #ifdef DIAGNOSTIC 792 if (!sc->enabled) 793 panic("com_shutdown: not enabled?"); 794 #endif 795 (*sc->disable)(sc); 796 sc->enabled = 0; 797 } 798 COM_UNLOCK(sc); 799 splx(s); 800 } 801 802 int 803 comopen(dev_t dev, int flag, int mode, struct lwp *l) 804 { 805 struct com_softc *sc; 806 struct tty *tp; 807 int s, s2; 808 int error; 809 810 sc = device_lookup(&com_cd, COMUNIT(dev)); 811 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 812 sc->sc_rbuf == NULL) 813 return (ENXIO); 814 815 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 816 return (ENXIO); 817 818 #ifdef KGDB 819 /* 820 * If this is the kgdb port, no other use is permitted. 821 */ 822 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 823 return (EBUSY); 824 #endif 825 826 tp = sc->sc_tty; 827 828 if (ISSET(tp->t_state, TS_ISOPEN) && 829 ISSET(tp->t_state, TS_XCLUDE) && 830 suser(l->l_proc->p_ucred, &l->l_proc->p_acflag) != 0) 831 return (EBUSY); 832 833 s = spltty(); 834 835 /* 836 * Do the following iff this is a first open. 837 */ 838 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 839 struct termios t; 840 841 tp->t_dev = dev; 842 843 s2 = splserial(); 844 COM_LOCK(sc); 845 846 if (sc->enable) { 847 if ((*sc->enable)(sc)) { 848 COM_UNLOCK(sc); 849 splx(s2); 850 splx(s); 851 printf("%s: device enable failed\n", 852 sc->sc_dev.dv_xname); 853 return (EIO); 854 } 855 sc->enabled = 1; 856 com_config(sc); 857 } 858 859 /* Turn on interrupts. */ 860 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 861 #ifdef COM_PXA2X0 862 if (sc->sc_type == COM_TYPE_PXA2x0) 863 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 864 #endif 865 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 866 867 /* Fetch the current modem control status, needed later. */ 868 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 869 870 /* Clear PPS capture state on first open. */ 871 sc->sc_ppsmask = 0; 872 sc->ppsparam.mode = 0; 873 874 COM_UNLOCK(sc); 875 splx(s2); 876 877 /* 878 * Initialize the termios status to the defaults. Add in the 879 * sticky bits from TIOCSFLAGS. 880 */ 881 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 882 t.c_ospeed = comconsrate; 883 t.c_cflag = comconscflag; 884 } else { 885 t.c_ospeed = TTYDEF_SPEED; 886 t.c_cflag = TTYDEF_CFLAG; 887 } 888 t.c_ispeed = t.c_ospeed; 889 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 890 SET(t.c_cflag, CLOCAL); 891 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 892 SET(t.c_cflag, CRTSCTS); 893 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 894 SET(t.c_cflag, MDMBUF); 895 /* Make sure comparam() will do something. */ 896 tp->t_ospeed = 0; 897 (void) comparam(tp, &t); 898 tp->t_iflag = TTYDEF_IFLAG; 899 tp->t_oflag = TTYDEF_OFLAG; 900 tp->t_lflag = TTYDEF_LFLAG; 901 ttychars(tp); 902 ttsetwater(tp); 903 904 s2 = splserial(); 905 COM_LOCK(sc); 906 907 /* 908 * Turn on DTR. We must always do this, even if carrier is not 909 * present, because otherwise we'd have to use TIOCSDTR 910 * immediately after setting CLOCAL, which applications do not 911 * expect. We always assert DTR while the device is open 912 * unless explicitly requested to deassert it. 913 */ 914 com_modem(sc, 1); 915 916 /* Clear the input ring, and unblock. */ 917 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 918 sc->sc_rbavail = com_rbuf_size; 919 com_iflush(sc); 920 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 921 com_hwiflow(sc); 922 923 #ifdef COM_DEBUG 924 if (com_debug) 925 comstatus(sc, "comopen "); 926 #endif 927 928 COM_UNLOCK(sc); 929 splx(s2); 930 } 931 932 splx(s); 933 934 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 935 if (error) 936 goto bad; 937 938 error = (*tp->t_linesw->l_open)(dev, tp); 939 if (error) 940 goto bad; 941 942 return (0); 943 944 bad: 945 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 946 /* 947 * We failed to open the device, and nobody else had it opened. 948 * Clean up the state as appropriate. 949 */ 950 com_shutdown(sc); 951 } 952 953 return (error); 954 } 955 956 int 957 comclose(dev_t dev, int flag, int mode, struct lwp *l) 958 { 959 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 960 struct tty *tp = sc->sc_tty; 961 962 /* XXX This is for cons.c. */ 963 if (!ISSET(tp->t_state, TS_ISOPEN)) 964 return (0); 965 966 (*tp->t_linesw->l_close)(tp, flag); 967 ttyclose(tp); 968 969 if (COM_ISALIVE(sc) == 0) 970 return (0); 971 972 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 973 /* 974 * Although we got a last close, the device may still be in 975 * use; e.g. if this was the dialout node, and there are still 976 * processes waiting for carrier on the non-dialout node. 977 */ 978 com_shutdown(sc); 979 } 980 981 return (0); 982 } 983 984 int 985 comread(dev_t dev, struct uio *uio, int flag) 986 { 987 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 988 struct tty *tp = sc->sc_tty; 989 990 if (COM_ISALIVE(sc) == 0) 991 return (EIO); 992 993 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 994 } 995 996 int 997 comwrite(dev_t dev, struct uio *uio, int flag) 998 { 999 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1000 struct tty *tp = sc->sc_tty; 1001 1002 if (COM_ISALIVE(sc) == 0) 1003 return (EIO); 1004 1005 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1006 } 1007 1008 int 1009 compoll(dev_t dev, int events, struct lwp *l) 1010 { 1011 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1012 struct tty *tp = sc->sc_tty; 1013 1014 if (COM_ISALIVE(sc) == 0) 1015 return (POLLHUP); 1016 1017 return ((*tp->t_linesw->l_poll)(tp, events, l)); 1018 } 1019 1020 struct tty * 1021 comtty(dev_t dev) 1022 { 1023 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1024 struct tty *tp = sc->sc_tty; 1025 1026 return (tp); 1027 } 1028 1029 int 1030 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 1031 { 1032 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1033 struct tty *tp = sc->sc_tty; 1034 struct proc *p = l->l_proc; 1035 int error; 1036 int s; 1037 1038 if (COM_ISALIVE(sc) == 0) 1039 return (EIO); 1040 1041 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1042 if (error != EPASSTHROUGH) 1043 return (error); 1044 1045 error = ttioctl(tp, cmd, data, flag, l); 1046 if (error != EPASSTHROUGH) 1047 return (error); 1048 1049 error = 0; 1050 1051 s = splserial(); 1052 COM_LOCK(sc); 1053 1054 switch (cmd) { 1055 case TIOCSBRK: 1056 com_break(sc, 1); 1057 break; 1058 1059 case TIOCCBRK: 1060 com_break(sc, 0); 1061 break; 1062 1063 case TIOCSDTR: 1064 com_modem(sc, 1); 1065 break; 1066 1067 case TIOCCDTR: 1068 com_modem(sc, 0); 1069 break; 1070 1071 case TIOCGFLAGS: 1072 *(int *)data = sc->sc_swflags; 1073 break; 1074 1075 case TIOCSFLAGS: 1076 error = suser(p->p_ucred, &p->p_acflag); 1077 if (error) 1078 break; 1079 sc->sc_swflags = *(int *)data; 1080 break; 1081 1082 case TIOCMSET: 1083 case TIOCMBIS: 1084 case TIOCMBIC: 1085 tiocm_to_com(sc, cmd, *(int *)data); 1086 break; 1087 1088 case TIOCMGET: 1089 *(int *)data = com_to_tiocm(sc); 1090 break; 1091 1092 case PPS_IOC_CREATE: 1093 break; 1094 1095 case PPS_IOC_DESTROY: 1096 break; 1097 1098 case PPS_IOC_GETPARAMS: { 1099 pps_params_t *pp; 1100 pp = (pps_params_t *)data; 1101 *pp = sc->ppsparam; 1102 break; 1103 } 1104 1105 case PPS_IOC_SETPARAMS: { 1106 pps_params_t *pp; 1107 int mode; 1108 pp = (pps_params_t *)data; 1109 if (pp->mode & ~ppscap) { 1110 error = EINVAL; 1111 break; 1112 } 1113 sc->ppsparam = *pp; 1114 /* 1115 * Compute msr masks from user-specified timestamp state. 1116 */ 1117 mode = sc->ppsparam.mode; 1118 switch (mode & PPS_CAPTUREBOTH) { 1119 case 0: 1120 sc->sc_ppsmask = 0; 1121 break; 1122 1123 case PPS_CAPTUREASSERT: 1124 sc->sc_ppsmask = MSR_DCD; 1125 sc->sc_ppsassert = MSR_DCD; 1126 sc->sc_ppsclear = -1; 1127 break; 1128 1129 case PPS_CAPTURECLEAR: 1130 sc->sc_ppsmask = MSR_DCD; 1131 sc->sc_ppsassert = -1; 1132 sc->sc_ppsclear = 0; 1133 break; 1134 1135 case PPS_CAPTUREBOTH: 1136 sc->sc_ppsmask = MSR_DCD; 1137 sc->sc_ppsassert = MSR_DCD; 1138 sc->sc_ppsclear = 0; 1139 break; 1140 1141 default: 1142 error = EINVAL; 1143 break; 1144 } 1145 break; 1146 } 1147 1148 case PPS_IOC_GETCAP: 1149 *(int*)data = ppscap; 1150 break; 1151 1152 case PPS_IOC_FETCH: { 1153 pps_info_t *pi; 1154 pi = (pps_info_t *)data; 1155 *pi = sc->ppsinfo; 1156 break; 1157 } 1158 1159 #ifdef PPS_SYNC 1160 case PPS_IOC_KCBIND: { 1161 int edge = (*(int *)data) & PPS_CAPTUREBOTH; 1162 1163 if (edge == 0) { 1164 /* 1165 * remove binding for this source; ignore 1166 * the request if this is not the current 1167 * hardpps source 1168 */ 1169 if (pps_kc_hardpps_source == sc) { 1170 pps_kc_hardpps_source = NULL; 1171 pps_kc_hardpps_mode = 0; 1172 } 1173 } else { 1174 /* 1175 * bind hardpps to this source, replacing any 1176 * previously specified source or edges 1177 */ 1178 pps_kc_hardpps_source = sc; 1179 pps_kc_hardpps_mode = edge; 1180 } 1181 break; 1182 } 1183 #endif /* PPS_SYNC */ 1184 1185 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1186 /* 1187 * Some GPS clocks models use the falling rather than 1188 * rising edge as the on-the-second signal. 1189 * The old API has no way to specify PPS polarity. 1190 */ 1191 sc->sc_ppsmask = MSR_DCD; 1192 #ifndef PPS_TRAILING_EDGE 1193 sc->sc_ppsassert = MSR_DCD; 1194 sc->sc_ppsclear = -1; 1195 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1196 &sc->ppsinfo.assert_timestamp); 1197 #else 1198 sc->sc_ppsassert = -1; 1199 sc->sc_ppsclear = 0; 1200 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1201 &sc->ppsinfo.clear_timestamp); 1202 #endif 1203 break; 1204 1205 default: 1206 error = EPASSTHROUGH; 1207 break; 1208 } 1209 1210 COM_UNLOCK(sc); 1211 splx(s); 1212 1213 #ifdef COM_DEBUG 1214 if (com_debug) 1215 comstatus(sc, "comioctl "); 1216 #endif 1217 1218 return (error); 1219 } 1220 1221 integrate void 1222 com_schedrx(struct com_softc *sc) 1223 { 1224 1225 sc->sc_rx_ready = 1; 1226 1227 /* Wake up the poller. */ 1228 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1229 softintr_schedule(sc->sc_si); 1230 #else 1231 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1232 setsoftserial(); 1233 #else 1234 if (!com_softintr_scheduled) { 1235 com_softintr_scheduled = 1; 1236 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1237 } 1238 #endif 1239 #endif 1240 } 1241 1242 void 1243 com_break(struct com_softc *sc, int onoff) 1244 { 1245 1246 if (onoff) 1247 SET(sc->sc_lcr, LCR_SBREAK); 1248 else 1249 CLR(sc->sc_lcr, LCR_SBREAK); 1250 1251 if (!sc->sc_heldchange) { 1252 if (sc->sc_tx_busy) { 1253 sc->sc_heldtbc = sc->sc_tbc; 1254 sc->sc_tbc = 0; 1255 sc->sc_heldchange = 1; 1256 } else 1257 com_loadchannelregs(sc); 1258 } 1259 } 1260 1261 void 1262 com_modem(struct com_softc *sc, int onoff) 1263 { 1264 1265 if (sc->sc_mcr_dtr == 0) 1266 return; 1267 1268 if (onoff) 1269 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1270 else 1271 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1272 1273 if (!sc->sc_heldchange) { 1274 if (sc->sc_tx_busy) { 1275 sc->sc_heldtbc = sc->sc_tbc; 1276 sc->sc_tbc = 0; 1277 sc->sc_heldchange = 1; 1278 } else 1279 com_loadchannelregs(sc); 1280 } 1281 } 1282 1283 void 1284 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1285 { 1286 u_char combits; 1287 1288 combits = 0; 1289 if (ISSET(ttybits, TIOCM_DTR)) 1290 SET(combits, MCR_DTR); 1291 if (ISSET(ttybits, TIOCM_RTS)) 1292 SET(combits, MCR_RTS); 1293 1294 switch (how) { 1295 case TIOCMBIC: 1296 CLR(sc->sc_mcr, combits); 1297 break; 1298 1299 case TIOCMBIS: 1300 SET(sc->sc_mcr, combits); 1301 break; 1302 1303 case TIOCMSET: 1304 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1305 SET(sc->sc_mcr, combits); 1306 break; 1307 } 1308 1309 if (!sc->sc_heldchange) { 1310 if (sc->sc_tx_busy) { 1311 sc->sc_heldtbc = sc->sc_tbc; 1312 sc->sc_tbc = 0; 1313 sc->sc_heldchange = 1; 1314 } else 1315 com_loadchannelregs(sc); 1316 } 1317 } 1318 1319 int 1320 com_to_tiocm(struct com_softc *sc) 1321 { 1322 u_char combits; 1323 int ttybits = 0; 1324 1325 combits = sc->sc_mcr; 1326 if (ISSET(combits, MCR_DTR)) 1327 SET(ttybits, TIOCM_DTR); 1328 if (ISSET(combits, MCR_RTS)) 1329 SET(ttybits, TIOCM_RTS); 1330 1331 combits = sc->sc_msr; 1332 if (ISSET(combits, MSR_DCD)) 1333 SET(ttybits, TIOCM_CD); 1334 if (ISSET(combits, MSR_CTS)) 1335 SET(ttybits, TIOCM_CTS); 1336 if (ISSET(combits, MSR_DSR)) 1337 SET(ttybits, TIOCM_DSR); 1338 if (ISSET(combits, MSR_RI | MSR_TERI)) 1339 SET(ttybits, TIOCM_RI); 1340 1341 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1342 SET(ttybits, TIOCM_LE); 1343 1344 return (ttybits); 1345 } 1346 1347 static u_char 1348 cflag2lcr(tcflag_t cflag) 1349 { 1350 u_char lcr = 0; 1351 1352 switch (ISSET(cflag, CSIZE)) { 1353 case CS5: 1354 SET(lcr, LCR_5BITS); 1355 break; 1356 case CS6: 1357 SET(lcr, LCR_6BITS); 1358 break; 1359 case CS7: 1360 SET(lcr, LCR_7BITS); 1361 break; 1362 case CS8: 1363 SET(lcr, LCR_8BITS); 1364 break; 1365 } 1366 if (ISSET(cflag, PARENB)) { 1367 SET(lcr, LCR_PENAB); 1368 if (!ISSET(cflag, PARODD)) 1369 SET(lcr, LCR_PEVEN); 1370 } 1371 if (ISSET(cflag, CSTOPB)) 1372 SET(lcr, LCR_STOPB); 1373 1374 return (lcr); 1375 } 1376 1377 int 1378 comparam(struct tty *tp, struct termios *t) 1379 { 1380 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1381 int ospeed; 1382 u_char lcr; 1383 int s; 1384 1385 if (COM_ISALIVE(sc) == 0) 1386 return (EIO); 1387 1388 #ifdef COM_HAYESP 1389 if (sc->sc_type == COM_TYPE_HAYESP) { 1390 int prescaler, speed; 1391 1392 /* 1393 * Calculate UART clock prescaler. It should be in 1394 * range of 0 .. 3. 1395 */ 1396 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1397 prescaler++, speed /= 2) 1398 if ((ospeed = comspeed(speed, sc->sc_frequency, 1399 sc->sc_type)) > 0) 1400 break; 1401 1402 if (prescaler == 4) 1403 return (EINVAL); 1404 sc->sc_prescaler = prescaler; 1405 } else 1406 #endif 1407 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1408 1409 /* Check requested parameters. */ 1410 if (ospeed < 0) 1411 return (EINVAL); 1412 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1413 return (EINVAL); 1414 1415 /* 1416 * For the console, always force CLOCAL and !HUPCL, so that the port 1417 * is always active. 1418 */ 1419 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1420 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1421 SET(t->c_cflag, CLOCAL); 1422 CLR(t->c_cflag, HUPCL); 1423 } 1424 1425 /* 1426 * If there were no changes, don't do anything. This avoids dropping 1427 * input and improves performance when all we did was frob things like 1428 * VMIN and VTIME. 1429 */ 1430 if (tp->t_ospeed == t->c_ospeed && 1431 tp->t_cflag == t->c_cflag) 1432 return (0); 1433 1434 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1435 1436 s = splserial(); 1437 COM_LOCK(sc); 1438 1439 sc->sc_lcr = lcr; 1440 1441 /* 1442 * If we're not in a mode that assumes a connection is present, then 1443 * ignore carrier changes. 1444 */ 1445 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1446 sc->sc_msr_dcd = 0; 1447 else 1448 sc->sc_msr_dcd = MSR_DCD; 1449 /* 1450 * Set the flow control pins depending on the current flow control 1451 * mode. 1452 */ 1453 if (ISSET(t->c_cflag, CRTSCTS)) { 1454 sc->sc_mcr_dtr = MCR_DTR; 1455 sc->sc_mcr_rts = MCR_RTS; 1456 sc->sc_msr_cts = MSR_CTS; 1457 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1458 } else if (ISSET(t->c_cflag, MDMBUF)) { 1459 /* 1460 * For DTR/DCD flow control, make sure we don't toggle DTR for 1461 * carrier detection. 1462 */ 1463 sc->sc_mcr_dtr = 0; 1464 sc->sc_mcr_rts = MCR_DTR; 1465 sc->sc_msr_cts = MSR_DCD; 1466 sc->sc_efr = 0; 1467 } else { 1468 /* 1469 * If no flow control, then always set RTS. This will make 1470 * the other side happy if it mistakenly thinks we're doing 1471 * RTS/CTS flow control. 1472 */ 1473 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1474 sc->sc_mcr_rts = 0; 1475 sc->sc_msr_cts = 0; 1476 sc->sc_efr = 0; 1477 if (ISSET(sc->sc_mcr, MCR_DTR)) 1478 SET(sc->sc_mcr, MCR_RTS); 1479 else 1480 CLR(sc->sc_mcr, MCR_RTS); 1481 } 1482 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1483 1484 #if 0 1485 if (ospeed == 0) 1486 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1487 else 1488 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1489 #endif 1490 1491 sc->sc_dlbl = ospeed; 1492 sc->sc_dlbh = ospeed >> 8; 1493 1494 /* 1495 * Set the FIFO threshold based on the receive speed. 1496 * 1497 * * If it's a low speed, it's probably a mouse or some other 1498 * interactive device, so set the threshold low. 1499 * * If it's a high speed, trim the trigger level down to prevent 1500 * overflows. 1501 * * Otherwise set it a bit higher. 1502 */ 1503 if (sc->sc_type == COM_TYPE_HAYESP) 1504 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1505 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1506 sc->sc_fifo = FIFO_ENABLE | 1507 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8); 1508 else 1509 sc->sc_fifo = 0; 1510 1511 /* And copy to tty. */ 1512 tp->t_ispeed = t->c_ospeed; 1513 tp->t_ospeed = t->c_ospeed; 1514 tp->t_cflag = t->c_cflag; 1515 1516 if (!sc->sc_heldchange) { 1517 if (sc->sc_tx_busy) { 1518 sc->sc_heldtbc = sc->sc_tbc; 1519 sc->sc_tbc = 0; 1520 sc->sc_heldchange = 1; 1521 } else 1522 com_loadchannelregs(sc); 1523 } 1524 1525 if (!ISSET(t->c_cflag, CHWFLOW)) { 1526 /* Disable the high water mark. */ 1527 sc->sc_r_hiwat = 0; 1528 sc->sc_r_lowat = 0; 1529 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1530 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1531 com_schedrx(sc); 1532 } 1533 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1534 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1535 com_hwiflow(sc); 1536 } 1537 } else { 1538 sc->sc_r_hiwat = com_rbuf_hiwat; 1539 sc->sc_r_lowat = com_rbuf_lowat; 1540 } 1541 1542 COM_UNLOCK(sc); 1543 splx(s); 1544 1545 /* 1546 * Update the tty layer's idea of the carrier bit, in case we changed 1547 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1548 * explicit request. 1549 */ 1550 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1551 1552 #ifdef COM_DEBUG 1553 if (com_debug) 1554 comstatus(sc, "comparam "); 1555 #endif 1556 1557 if (!ISSET(t->c_cflag, CHWFLOW)) { 1558 if (sc->sc_tx_stopped) { 1559 sc->sc_tx_stopped = 0; 1560 comstart(tp); 1561 } 1562 } 1563 1564 return (0); 1565 } 1566 1567 void 1568 com_iflush(struct com_softc *sc) 1569 { 1570 bus_space_tag_t iot = sc->sc_iot; 1571 bus_space_handle_t ioh = sc->sc_ioh; 1572 #ifdef DIAGNOSTIC 1573 int reg; 1574 #endif 1575 int timo; 1576 1577 #ifdef DIAGNOSTIC 1578 reg = 0xffff; 1579 #endif 1580 timo = 50000; 1581 /* flush any pending I/O */ 1582 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1583 && --timo) 1584 #ifdef DIAGNOSTIC 1585 reg = 1586 #else 1587 (void) 1588 #endif 1589 bus_space_read_1(iot, ioh, com_data); 1590 #ifdef DIAGNOSTIC 1591 if (!timo) 1592 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1593 reg); 1594 #endif 1595 } 1596 1597 void 1598 com_loadchannelregs(struct com_softc *sc) 1599 { 1600 bus_space_tag_t iot = sc->sc_iot; 1601 bus_space_handle_t ioh = sc->sc_ioh; 1602 1603 /* XXXXX necessary? */ 1604 com_iflush(sc); 1605 1606 #ifdef COM_PXA2X0 1607 if (sc->sc_type == COM_TYPE_PXA2x0) 1608 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1609 else 1610 #endif 1611 bus_space_write_1(iot, ioh, com_ier, 0); 1612 1613 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1614 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1615 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1616 } 1617 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1618 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1619 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1620 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1621 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1622 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1623 #ifdef COM_HAYESP 1624 if (sc->sc_type == COM_TYPE_HAYESP) { 1625 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1626 HAYESP_SETPRESCALER); 1627 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1628 sc->sc_prescaler); 1629 } 1630 #endif 1631 1632 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1633 } 1634 1635 int 1636 comhwiflow(struct tty *tp, int block) 1637 { 1638 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1639 int s; 1640 1641 if (COM_ISALIVE(sc) == 0) 1642 return (0); 1643 1644 if (sc->sc_mcr_rts == 0) 1645 return (0); 1646 1647 s = splserial(); 1648 COM_LOCK(sc); 1649 1650 if (block) { 1651 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1652 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1653 com_hwiflow(sc); 1654 } 1655 } else { 1656 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1657 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1658 com_schedrx(sc); 1659 } 1660 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1661 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1662 com_hwiflow(sc); 1663 } 1664 } 1665 1666 COM_UNLOCK(sc); 1667 splx(s); 1668 return (1); 1669 } 1670 1671 /* 1672 * (un)block input via hw flowcontrol 1673 */ 1674 void 1675 com_hwiflow(struct com_softc *sc) 1676 { 1677 bus_space_tag_t iot = sc->sc_iot; 1678 bus_space_handle_t ioh = sc->sc_ioh; 1679 1680 if (sc->sc_mcr_rts == 0) 1681 return; 1682 1683 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1684 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1685 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1686 } else { 1687 SET(sc->sc_mcr, sc->sc_mcr_rts); 1688 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1689 } 1690 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1691 } 1692 1693 1694 void 1695 comstart(struct tty *tp) 1696 { 1697 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1698 bus_space_tag_t iot = sc->sc_iot; 1699 bus_space_handle_t ioh = sc->sc_ioh; 1700 int s; 1701 1702 if (COM_ISALIVE(sc) == 0) 1703 return; 1704 1705 s = spltty(); 1706 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1707 goto out; 1708 if (sc->sc_tx_stopped) 1709 goto out; 1710 1711 if (tp->t_outq.c_cc <= tp->t_lowat) { 1712 if (ISSET(tp->t_state, TS_ASLEEP)) { 1713 CLR(tp->t_state, TS_ASLEEP); 1714 wakeup(&tp->t_outq); 1715 } 1716 selwakeup(&tp->t_wsel); 1717 if (tp->t_outq.c_cc == 0) 1718 goto out; 1719 } 1720 1721 /* Grab the first contiguous region of buffer space. */ 1722 { 1723 u_char *tba; 1724 int tbc; 1725 1726 tba = tp->t_outq.c_cf; 1727 tbc = ndqb(&tp->t_outq, 0); 1728 1729 (void)splserial(); 1730 COM_LOCK(sc); 1731 1732 sc->sc_tba = tba; 1733 sc->sc_tbc = tbc; 1734 } 1735 1736 SET(tp->t_state, TS_BUSY); 1737 sc->sc_tx_busy = 1; 1738 1739 /* Enable transmit completion interrupts if necessary. */ 1740 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1741 SET(sc->sc_ier, IER_ETXRDY); 1742 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1743 } 1744 1745 /* Output the first chunk of the contiguous buffer. */ 1746 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1747 u_int n; 1748 1749 n = sc->sc_tbc; 1750 if (n > sc->sc_fifolen) 1751 n = sc->sc_fifolen; 1752 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1753 sc->sc_tbc -= n; 1754 sc->sc_tba += n; 1755 } 1756 1757 COM_UNLOCK(sc); 1758 out: 1759 splx(s); 1760 return; 1761 } 1762 1763 /* 1764 * Stop output on a line. 1765 */ 1766 void 1767 comstop(struct tty *tp, int flag) 1768 { 1769 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1770 int s; 1771 1772 s = splserial(); 1773 COM_LOCK(sc); 1774 if (ISSET(tp->t_state, TS_BUSY)) { 1775 /* Stop transmitting at the next chunk. */ 1776 sc->sc_tbc = 0; 1777 sc->sc_heldtbc = 0; 1778 if (!ISSET(tp->t_state, TS_TTSTOP)) 1779 SET(tp->t_state, TS_FLUSH); 1780 } 1781 COM_UNLOCK(sc); 1782 splx(s); 1783 } 1784 1785 void 1786 comdiag(void *arg) 1787 { 1788 struct com_softc *sc = arg; 1789 int overflows, floods; 1790 int s; 1791 1792 s = splserial(); 1793 COM_LOCK(sc); 1794 overflows = sc->sc_overflows; 1795 sc->sc_overflows = 0; 1796 floods = sc->sc_floods; 1797 sc->sc_floods = 0; 1798 sc->sc_errors = 0; 1799 COM_UNLOCK(sc); 1800 splx(s); 1801 1802 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1803 sc->sc_dev.dv_xname, 1804 overflows, overflows == 1 ? "" : "s", 1805 floods, floods == 1 ? "" : "s"); 1806 } 1807 1808 integrate void 1809 com_rxsoft(struct com_softc *sc, struct tty *tp) 1810 { 1811 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1812 u_char *get, *end; 1813 u_int cc, scc; 1814 u_char lsr; 1815 int code; 1816 int s; 1817 1818 end = sc->sc_ebuf; 1819 get = sc->sc_rbget; 1820 scc = cc = com_rbuf_size - sc->sc_rbavail; 1821 1822 if (cc == com_rbuf_size) { 1823 sc->sc_floods++; 1824 if (sc->sc_errors++ == 0) 1825 callout_reset(&sc->sc_diag_callout, 60 * hz, 1826 comdiag, sc); 1827 } 1828 1829 /* If not yet open, drop the entire buffer content here */ 1830 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1831 get += cc << 1; 1832 if (get >= end) 1833 get -= com_rbuf_size << 1; 1834 cc = 0; 1835 } 1836 while (cc) { 1837 code = get[0]; 1838 lsr = get[1]; 1839 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1840 if (ISSET(lsr, LSR_OE)) { 1841 sc->sc_overflows++; 1842 if (sc->sc_errors++ == 0) 1843 callout_reset(&sc->sc_diag_callout, 1844 60 * hz, comdiag, sc); 1845 } 1846 if (ISSET(lsr, LSR_BI | LSR_FE)) 1847 SET(code, TTY_FE); 1848 if (ISSET(lsr, LSR_PE)) 1849 SET(code, TTY_PE); 1850 } 1851 if ((*rint)(code, tp) == -1) { 1852 /* 1853 * The line discipline's buffer is out of space. 1854 */ 1855 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1856 /* 1857 * We're either not using flow control, or the 1858 * line discipline didn't tell us to block for 1859 * some reason. Either way, we have no way to 1860 * know when there's more space available, so 1861 * just drop the rest of the data. 1862 */ 1863 get += cc << 1; 1864 if (get >= end) 1865 get -= com_rbuf_size << 1; 1866 cc = 0; 1867 } else { 1868 /* 1869 * Don't schedule any more receive processing 1870 * until the line discipline tells us there's 1871 * space available (through comhwiflow()). 1872 * Leave the rest of the data in the input 1873 * buffer. 1874 */ 1875 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1876 } 1877 break; 1878 } 1879 get += 2; 1880 if (get >= end) 1881 get = sc->sc_rbuf; 1882 cc--; 1883 } 1884 1885 if (cc != scc) { 1886 sc->sc_rbget = get; 1887 s = splserial(); 1888 COM_LOCK(sc); 1889 1890 cc = sc->sc_rbavail += scc - cc; 1891 /* Buffers should be ok again, release possible block. */ 1892 if (cc >= sc->sc_r_lowat) { 1893 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1894 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1895 SET(sc->sc_ier, IER_ERXRDY); 1896 #ifdef COM_PXA2X0 1897 if (sc->sc_type == COM_TYPE_PXA2x0) 1898 SET(sc->sc_ier, IER_ERXTOUT); 1899 #endif 1900 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1901 com_ier, sc->sc_ier); 1902 } 1903 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1904 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1905 com_hwiflow(sc); 1906 } 1907 } 1908 COM_UNLOCK(sc); 1909 splx(s); 1910 } 1911 } 1912 1913 integrate void 1914 com_txsoft(struct com_softc *sc, struct tty *tp) 1915 { 1916 1917 CLR(tp->t_state, TS_BUSY); 1918 if (ISSET(tp->t_state, TS_FLUSH)) 1919 CLR(tp->t_state, TS_FLUSH); 1920 else 1921 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1922 (*tp->t_linesw->l_start)(tp); 1923 } 1924 1925 integrate void 1926 com_stsoft(struct com_softc *sc, struct tty *tp) 1927 { 1928 u_char msr, delta; 1929 int s; 1930 1931 s = splserial(); 1932 COM_LOCK(sc); 1933 msr = sc->sc_msr; 1934 delta = sc->sc_msr_delta; 1935 sc->sc_msr_delta = 0; 1936 COM_UNLOCK(sc); 1937 splx(s); 1938 1939 if (ISSET(delta, sc->sc_msr_dcd)) { 1940 /* 1941 * Inform the tty layer that carrier detect changed. 1942 */ 1943 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1944 } 1945 1946 if (ISSET(delta, sc->sc_msr_cts)) { 1947 /* Block or unblock output according to flow control. */ 1948 if (ISSET(msr, sc->sc_msr_cts)) { 1949 sc->sc_tx_stopped = 0; 1950 (*tp->t_linesw->l_start)(tp); 1951 } else { 1952 sc->sc_tx_stopped = 1; 1953 } 1954 } 1955 1956 #ifdef COM_DEBUG 1957 if (com_debug) 1958 comstatus(sc, "com_stsoft"); 1959 #endif 1960 } 1961 1962 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1963 void 1964 comsoft(void *arg) 1965 { 1966 struct com_softc *sc = arg; 1967 struct tty *tp; 1968 1969 if (COM_ISALIVE(sc) == 0) 1970 return; 1971 1972 { 1973 #else 1974 void 1975 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1976 comsoft(void) 1977 #else 1978 comsoft(void *arg) 1979 #endif 1980 { 1981 struct com_softc *sc; 1982 struct tty *tp; 1983 int unit; 1984 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1985 int s; 1986 1987 s = splsoftserial(); 1988 com_softintr_scheduled = 0; 1989 #endif 1990 1991 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1992 sc = device_lookup(&com_cd, unit); 1993 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1994 continue; 1995 1996 if (COM_ISALIVE(sc) == 0) 1997 continue; 1998 1999 tp = sc->sc_tty; 2000 if (tp == NULL) 2001 continue; 2002 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2003 continue; 2004 #endif 2005 tp = sc->sc_tty; 2006 2007 if (sc->sc_rx_ready) { 2008 sc->sc_rx_ready = 0; 2009 com_rxsoft(sc, tp); 2010 } 2011 2012 if (sc->sc_st_check) { 2013 sc->sc_st_check = 0; 2014 com_stsoft(sc, tp); 2015 } 2016 2017 if (sc->sc_tx_done) { 2018 sc->sc_tx_done = 0; 2019 com_txsoft(sc, tp); 2020 } 2021 } 2022 2023 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2024 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2025 splx(s); 2026 #endif 2027 #endif 2028 } 2029 2030 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2031 /* there has got to be a better way to do comsoft() */ 2032 }} 2033 #endif 2034 2035 int 2036 comintr(void *arg) 2037 { 2038 struct com_softc *sc = arg; 2039 bus_space_tag_t iot = sc->sc_iot; 2040 bus_space_handle_t ioh = sc->sc_ioh; 2041 u_char *put, *end; 2042 u_int cc; 2043 u_char lsr, iir; 2044 2045 if (COM_ISALIVE(sc) == 0) 2046 return (0); 2047 2048 COM_LOCK(sc); 2049 iir = bus_space_read_1(iot, ioh, com_iir); 2050 if (ISSET(iir, IIR_NOPEND)) { 2051 COM_UNLOCK(sc); 2052 return (0); 2053 } 2054 2055 end = sc->sc_ebuf; 2056 put = sc->sc_rbput; 2057 cc = sc->sc_rbavail; 2058 2059 again: do { 2060 u_char msr, delta; 2061 2062 lsr = bus_space_read_1(iot, ioh, com_lsr); 2063 if (ISSET(lsr, LSR_BI)) { 2064 int cn_trapped = 0; 2065 2066 cn_check_magic(sc->sc_tty->t_dev, 2067 CNC_BREAK, com_cnm_state); 2068 if (cn_trapped) 2069 continue; 2070 #if defined(KGDB) && !defined(DDB) 2071 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2072 kgdb_connect(1); 2073 continue; 2074 } 2075 #endif 2076 } 2077 2078 if (ISSET(lsr, LSR_RCV_MASK) && 2079 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2080 while (cc > 0) { 2081 int cn_trapped = 0; 2082 put[0] = bus_space_read_1(iot, ioh, com_data); 2083 put[1] = lsr; 2084 cn_check_magic(sc->sc_tty->t_dev, 2085 put[0], com_cnm_state); 2086 if (cn_trapped) 2087 goto next; 2088 put += 2; 2089 if (put >= end) 2090 put = sc->sc_rbuf; 2091 cc--; 2092 next: 2093 lsr = bus_space_read_1(iot, ioh, com_lsr); 2094 if (!ISSET(lsr, LSR_RCV_MASK)) 2095 break; 2096 } 2097 2098 /* 2099 * Current string of incoming characters ended because 2100 * no more data was available or we ran out of space. 2101 * Schedule a receive event if any data was received. 2102 * If we're out of space, turn off receive interrupts. 2103 */ 2104 sc->sc_rbput = put; 2105 sc->sc_rbavail = cc; 2106 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2107 sc->sc_rx_ready = 1; 2108 2109 /* 2110 * See if we are in danger of overflowing a buffer. If 2111 * so, use hardware flow control to ease the pressure. 2112 */ 2113 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2114 cc < sc->sc_r_hiwat) { 2115 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2116 com_hwiflow(sc); 2117 } 2118 2119 /* 2120 * If we're out of space, disable receive interrupts 2121 * until the queue has drained a bit. 2122 */ 2123 if (!cc) { 2124 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2125 #ifdef COM_PXA2X0 2126 if (sc->sc_type == COM_TYPE_PXA2x0) 2127 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 2128 else 2129 #endif 2130 CLR(sc->sc_ier, IER_ERXRDY); 2131 bus_space_write_1(iot, ioh, com_ier, 2132 sc->sc_ier); 2133 } 2134 } else { 2135 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 2136 (void) bus_space_read_1(iot, ioh, com_data); 2137 continue; 2138 } 2139 } 2140 2141 msr = bus_space_read_1(iot, ioh, com_msr); 2142 delta = msr ^ sc->sc_msr; 2143 sc->sc_msr = msr; 2144 /* 2145 * Pulse-per-second (PSS) signals on edge of DCD? 2146 * Process these even if line discipline is ignoring DCD. 2147 */ 2148 if (delta & sc->sc_ppsmask) { 2149 struct timeval tv; 2150 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2151 /* XXX nanotime() */ 2152 microtime(&tv); 2153 TIMEVAL_TO_TIMESPEC(&tv, 2154 &sc->ppsinfo.assert_timestamp); 2155 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2156 timespecadd(&sc->ppsinfo.assert_timestamp, 2157 &sc->ppsparam.assert_offset, 2158 &sc->ppsinfo.assert_timestamp); 2159 } 2160 2161 #ifdef PPS_SYNC 2162 if (pps_kc_hardpps_source == sc && 2163 pps_kc_hardpps_mode & PPS_CAPTUREASSERT) { 2164 hardpps(&tv, tv.tv_usec); 2165 } 2166 #endif 2167 sc->ppsinfo.assert_sequence++; 2168 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2169 2170 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2171 /* XXX nanotime() */ 2172 microtime(&tv); 2173 TIMEVAL_TO_TIMESPEC(&tv, 2174 &sc->ppsinfo.clear_timestamp); 2175 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2176 timespecadd(&sc->ppsinfo.clear_timestamp, 2177 &sc->ppsparam.clear_offset, 2178 &sc->ppsinfo.clear_timestamp); 2179 } 2180 2181 #ifdef PPS_SYNC 2182 if (pps_kc_hardpps_source == sc && 2183 pps_kc_hardpps_mode & PPS_CAPTURECLEAR) { 2184 hardpps(&tv, tv.tv_usec); 2185 } 2186 #endif 2187 sc->ppsinfo.clear_sequence++; 2188 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2189 } 2190 } 2191 2192 /* 2193 * Process normal status changes 2194 */ 2195 if (ISSET(delta, sc->sc_msr_mask)) { 2196 SET(sc->sc_msr_delta, delta); 2197 2198 /* 2199 * Stop output immediately if we lose the output 2200 * flow control signal or carrier detect. 2201 */ 2202 if (ISSET(~msr, sc->sc_msr_mask)) { 2203 sc->sc_tbc = 0; 2204 sc->sc_heldtbc = 0; 2205 #ifdef COM_DEBUG 2206 if (com_debug) 2207 comstatus(sc, "comintr "); 2208 #endif 2209 } 2210 2211 sc->sc_st_check = 1; 2212 } 2213 } while (!ISSET((iir = 2214 bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND) && 2215 /* 2216 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 2217 * by IIR read, so we can't do this way: `process all interrupts, 2218 * then do TX if possble'. 2219 */ 2220 (iir & IIR_IMASK) != IIR_TXRDY); 2221 2222 /* 2223 * Read LSR again, since there may be an interrupt between 2224 * the last LSR read and IIR read above. 2225 */ 2226 lsr = bus_space_read_1(iot, ioh, com_lsr); 2227 2228 /* 2229 * See if data can be transmitted as well. 2230 * Schedule tx done event if no data left 2231 * and tty was marked busy. 2232 */ 2233 if (ISSET(lsr, LSR_TXRDY)) { 2234 /* 2235 * If we've delayed a parameter change, do it now, and restart 2236 * output. 2237 */ 2238 if (sc->sc_heldchange) { 2239 com_loadchannelregs(sc); 2240 sc->sc_heldchange = 0; 2241 sc->sc_tbc = sc->sc_heldtbc; 2242 sc->sc_heldtbc = 0; 2243 } 2244 2245 /* Output the next chunk of the contiguous buffer, if any. */ 2246 if (sc->sc_tbc > 0) { 2247 u_int n; 2248 2249 n = sc->sc_tbc; 2250 if (n > sc->sc_fifolen) 2251 n = sc->sc_fifolen; 2252 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2253 sc->sc_tbc -= n; 2254 sc->sc_tba += n; 2255 } else { 2256 /* Disable transmit completion interrupts if necessary. */ 2257 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2258 CLR(sc->sc_ier, IER_ETXRDY); 2259 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2260 } 2261 if (sc->sc_tx_busy) { 2262 sc->sc_tx_busy = 0; 2263 sc->sc_tx_done = 1; 2264 } 2265 } 2266 } 2267 2268 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2269 goto again; 2270 2271 COM_UNLOCK(sc); 2272 2273 /* Wake up the poller. */ 2274 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2275 softintr_schedule(sc->sc_si); 2276 #else 2277 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2278 setsoftserial(); 2279 #else 2280 if (!com_softintr_scheduled) { 2281 com_softintr_scheduled = 1; 2282 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2283 } 2284 #endif 2285 #endif 2286 2287 #if NRND > 0 && defined(RND_COM) 2288 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2289 #endif 2290 2291 return (1); 2292 } 2293 2294 /* 2295 * The following functions are polled getc and putc routines, shared 2296 * by the console and kgdb glue. 2297 * 2298 * The read-ahead code is so that you can detect pending in-band 2299 * cn_magic in polled mode while doing output rather than having to 2300 * wait until the kernel decides it needs input. 2301 */ 2302 2303 #define MAX_READAHEAD 20 2304 static int com_readahead[MAX_READAHEAD]; 2305 static int com_readaheadcount = 0; 2306 2307 int 2308 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2309 { 2310 int s = splserial(); 2311 u_char stat, c; 2312 2313 /* got a character from reading things earlier */ 2314 if (com_readaheadcount > 0) { 2315 int i; 2316 2317 c = com_readahead[0]; 2318 for (i = 1; i < com_readaheadcount; i++) { 2319 com_readahead[i-1] = com_readahead[i]; 2320 } 2321 com_readaheadcount--; 2322 splx(s); 2323 return (c); 2324 } 2325 2326 /* block until a character becomes available */ 2327 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2328 ; 2329 2330 c = bus_space_read_1(iot, ioh, com_data); 2331 stat = bus_space_read_1(iot, ioh, com_iir); 2332 { 2333 int cn_trapped = 0; /* unused */ 2334 #ifdef DDB 2335 extern int db_active; 2336 if (!db_active) 2337 #endif 2338 cn_check_magic(dev, c, com_cnm_state); 2339 } 2340 splx(s); 2341 return (c); 2342 } 2343 2344 void 2345 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2346 { 2347 int s = splserial(); 2348 int cin, stat, timo; 2349 2350 if (com_readaheadcount < MAX_READAHEAD 2351 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2352 int cn_trapped = 0; 2353 cin = bus_space_read_1(iot, ioh, com_data); 2354 stat = bus_space_read_1(iot, ioh, com_iir); 2355 cn_check_magic(dev, cin, com_cnm_state); 2356 com_readahead[com_readaheadcount++] = cin; 2357 } 2358 2359 /* wait for any pending transmission to finish */ 2360 timo = 150000; 2361 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2362 continue; 2363 2364 bus_space_write_1(iot, ioh, com_data, c); 2365 COM_BARRIER(iot, ioh, BR | BW); 2366 2367 splx(s); 2368 } 2369 2370 /* 2371 * Initialize UART for use as console or KGDB line. 2372 */ 2373 int 2374 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2375 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2376 { 2377 bus_space_handle_t ioh; 2378 2379 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2380 return (ENOMEM); /* ??? */ 2381 2382 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2383 bus_space_write_1(iot, ioh, com_efr, 0); 2384 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2385 rate = comspeed(rate, frequency, type); 2386 bus_space_write_1(iot, ioh, com_dlbl, rate); 2387 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2388 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2389 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2390 bus_space_write_1(iot, ioh, com_fifo, 2391 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2392 #ifdef COM_PXA2X0 2393 if (type == COM_TYPE_PXA2x0) 2394 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 2395 else 2396 #endif 2397 bus_space_write_1(iot, ioh, com_ier, 0); 2398 2399 *iohp = ioh; 2400 return (0); 2401 } 2402 2403 /* 2404 * Following are all routines needed for COM to act as console 2405 */ 2406 struct consdev comcons = { 2407 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2408 NODEV, CN_NORMAL 2409 }; 2410 2411 2412 int 2413 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2414 int type, tcflag_t cflag) 2415 { 2416 int res; 2417 2418 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2419 if (res) 2420 return (res); 2421 2422 cn_tab = &comcons; 2423 cn_init_magic(&com_cnm_state); 2424 cn_set_magic("\047\001"); /* default magic is BREAK */ 2425 2426 comconstag = iot; 2427 comconsaddr = iobase; 2428 comconsrate = rate; 2429 comconscflag = cflag; 2430 2431 return (0); 2432 } 2433 2434 int 2435 comcngetc(dev_t dev) 2436 { 2437 2438 return (com_common_getc(dev, comconstag, comconsioh)); 2439 } 2440 2441 /* 2442 * Console kernel output character routine. 2443 */ 2444 void 2445 comcnputc(dev_t dev, int c) 2446 { 2447 2448 com_common_putc(dev, comconstag, comconsioh, c); 2449 } 2450 2451 void 2452 comcnpollc(dev_t dev, int on) 2453 { 2454 2455 } 2456 2457 #ifdef KGDB 2458 int 2459 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2460 int frequency, int type, tcflag_t cflag) 2461 { 2462 int res; 2463 2464 if (iot == comconstag && iobase == comconsaddr) { 2465 #if !defined(DDB) 2466 return (EBUSY); /* cannot share with console */ 2467 #else 2468 com_kgdb_ioh = comconsioh; 2469 #endif 2470 } else { 2471 res = cominit(iot, iobase, rate, frequency, type, cflag, 2472 &com_kgdb_ioh); 2473 if (res) 2474 return (res); 2475 2476 /* 2477 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2478 * expects this to be initialized 2479 */ 2480 cn_init_magic(&com_cnm_state); 2481 cn_set_magic("\047\001"); 2482 } 2483 2484 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2485 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2486 2487 com_kgdb_iot = iot; 2488 com_kgdb_addr = iobase; 2489 2490 return (0); 2491 } 2492 2493 /* ARGSUSED */ 2494 int 2495 com_kgdb_getc(void *arg) 2496 { 2497 2498 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2499 } 2500 2501 /* ARGSUSED */ 2502 void 2503 com_kgdb_putc(void *arg, int c) 2504 { 2505 2506 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2507 } 2508 #endif /* KGDB */ 2509 2510 /* helper function to identify the com ports used by 2511 console or KGDB (and not yet autoconf attached) */ 2512 int 2513 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2514 { 2515 bus_space_handle_t help; 2516 2517 if (!comconsattached && 2518 iot == comconstag && iobase == comconsaddr) 2519 help = comconsioh; 2520 #ifdef KGDB 2521 else if (!com_kgdb_attached && 2522 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2523 help = com_kgdb_ioh; 2524 #endif 2525 else 2526 return (0); 2527 2528 if (ioh) 2529 *ioh = help; 2530 return (1); 2531 } 2532
Indexes created Sat Sep 27 14:09:57 GMT 2025