com.c revision 1.240.4.2
1 /* $NetBSD: com.c,v 1.240.4.2 2006/04/22 11:38:55 simonb Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.240.4.2 2006/04/22 11:38:55 simonb Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 125 #include <machine/intr.h> 126 #include <machine/bus.h> 127 128 #include <dev/ic/comreg.h> 129 #include <dev/ic/comvar.h> 130 #include <dev/ic/ns16550reg.h> 131 #include <dev/ic/st16650reg.h> 132 #ifdef COM_HAYESP 133 #include <dev/ic/hayespreg.h> 134 #endif 135 #define com_lcr com_cfcr 136 #include <dev/cons.h> 137 138 #ifdef COM_HAYESP 139 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 140 #endif 141 142 static void com_enable_debugport(struct com_softc *); 143 144 void com_config(struct com_softc *); 145 void com_shutdown(struct com_softc *); 146 int comspeed(long, long, int); 147 static u_char cflag2lcr(tcflag_t); 148 int comparam(struct tty *, struct termios *); 149 void comstart(struct tty *); 150 int comhwiflow(struct tty *, int); 151 152 void com_loadchannelregs(struct com_softc *); 153 void com_hwiflow(struct com_softc *); 154 void com_break(struct com_softc *, int); 155 void com_modem(struct com_softc *, int); 156 void tiocm_to_com(struct com_softc *, u_long, int); 157 int com_to_tiocm(struct com_softc *); 158 void com_iflush(struct com_softc *); 159 160 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 161 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 162 163 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 164 bus_space_handle_t *); 165 166 int comcngetc(dev_t); 167 void comcnputc(dev_t, int); 168 void comcnpollc(dev_t, int); 169 170 #define integrate static inline 171 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 172 void comsoft(void *); 173 #else 174 #ifndef __NO_SOFT_SERIAL_INTERRUPT 175 void comsoft(void); 176 #else 177 void comsoft(void *); 178 static struct callout comsoft_callout = CALLOUT_INITIALIZER; 179 #endif 180 #endif 181 integrate void com_rxsoft(struct com_softc *, struct tty *); 182 integrate void com_txsoft(struct com_softc *, struct tty *); 183 integrate void com_stsoft(struct com_softc *, struct tty *); 184 integrate void com_schedrx(struct com_softc *); 185 void comdiag(void *); 186 187 extern struct cfdriver com_cd; 188 189 dev_type_open(comopen); 190 dev_type_close(comclose); 191 dev_type_read(comread); 192 dev_type_write(comwrite); 193 dev_type_ioctl(comioctl); 194 dev_type_stop(comstop); 195 dev_type_tty(comtty); 196 dev_type_poll(compoll); 197 198 const struct cdevsw com_cdevsw = { 199 comopen, comclose, comread, comwrite, comioctl, 200 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 201 }; 202 203 /* 204 * Make this an option variable one can patch. 205 * But be warned: this must be a power of 2! 206 */ 207 u_int com_rbuf_size = COM_RING_SIZE; 208 209 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 210 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 211 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 212 213 static bus_addr_t comconsaddr; 214 static bus_space_tag_t comconstag; 215 static bus_space_handle_t comconsioh; 216 static int comconsattached; 217 static int comconsrate; 218 static tcflag_t comconscflag; 219 static struct cnm_state com_cnm_state; 220 221 #ifndef __HAVE_TIMECOUNTER 222 static int ppscap = 223 PPS_TSFMT_TSPEC | 224 PPS_CAPTUREASSERT | 225 PPS_CAPTURECLEAR | 226 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 227 #endif /* !__HAVE_TIMECOUNTER */ 228 229 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 230 #ifdef __NO_SOFT_SERIAL_INTERRUPT 231 volatile int com_softintr_scheduled; 232 #endif 233 #endif 234 235 #ifdef KGDB 236 #include <sys/kgdb.h> 237 238 static bus_addr_t com_kgdb_addr; 239 static bus_space_tag_t com_kgdb_iot; 240 static bus_space_handle_t com_kgdb_ioh; 241 static int com_kgdb_attached; 242 243 int com_kgdb_getc(void *); 244 void com_kgdb_putc(void *, int); 245 #endif /* KGDB */ 246 247 #define COMUNIT_MASK 0x7ffff 248 #define COMDIALOUT_MASK 0x80000 249 250 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 251 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 252 253 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 254 device_is_active(&(sc)->sc_dev)) 255 256 #define BR BUS_SPACE_BARRIER_READ 257 #define BW BUS_SPACE_BARRIER_WRITE 258 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 259 260 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 261 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 262 263 /*ARGSUSED*/ 264 int 265 comspeed(long speed, long frequency, int type) 266 { 267 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 268 269 int x, err; 270 271 #if 0 272 if (speed == 0) 273 return (0); 274 #endif 275 if (speed <= 0) 276 return (-1); 277 x = divrnd(frequency / 16, speed); 278 if (x <= 0) 279 return (-1); 280 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 281 if (err < 0) 282 err = -err; 283 if (err > COM_TOLERANCE) 284 return (-1); 285 return (x); 286 287 #undef divrnd 288 } 289 290 #ifdef COM_DEBUG 291 int com_debug = 0; 292 293 void comstatus(struct com_softc *, const char *); 294 void 295 comstatus(struct com_softc *sc, const char *str) 296 { 297 struct tty *tp = sc->sc_tty; 298 299 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 300 sc->sc_dev.dv_xname, str, 301 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 302 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 303 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 304 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 305 sc->sc_tx_stopped ? '+' : '-'); 306 307 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 308 sc->sc_dev.dv_xname, str, 309 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 310 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 311 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 312 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 313 sc->sc_rx_flags); 314 } 315 #endif 316 317 int 318 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 319 { 320 321 /* force access to id reg */ 322 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 323 bus_space_write_1(iot, ioh, com_iir, 0); 324 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 325 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 326 return (0); 327 328 return (1); 329 } 330 331 #ifdef COM_HAYESP 332 int 333 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 334 { 335 char val, dips; 336 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 337 bus_space_tag_t iot = sc->sc_iot; 338 339 /* 340 * Hayes ESP cards have two iobases. One is for compatibility with 341 * 16550 serial chips, and at the same ISA PC base addresses. The 342 * other is for ESP-specific enhanced features, and lies at a 343 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 344 */ 345 346 /* Test for ESP signature */ 347 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 348 return (0); 349 350 /* 351 * ESP is present at ESP enhanced base address; unknown com port 352 */ 353 354 /* Get the dip-switch configurations */ 355 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 356 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 357 358 /* Determine which com port this ESP card services: bits 0,1 of */ 359 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 360 if (sc->sc_iobase != combaselist[dips & 0x03]) 361 return (0); 362 363 printf(": ESP"); 364 365 /* Check ESP Self Test bits. */ 366 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 367 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 368 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 369 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 370 if ((val & 0x70) < 0x20) { 371 printf("-old (%o)", val & 0x70); 372 /* we do not support the necessary features */ 373 return (0); 374 } 375 376 /* Check for ability to emulate 16550: bit 8 == 1 */ 377 if ((dips & 0x80) == 0) { 378 printf(" slave"); 379 /* XXX Does slave really mean no 16550 support?? */ 380 return (0); 381 } 382 383 /* 384 * If we made it this far, we are a full-featured ESP v2.0 (or 385 * better), at the correct com port address. 386 */ 387 388 sc->sc_type = COM_TYPE_HAYESP; 389 printf(", 1024 byte fifo\n"); 390 return (1); 391 } 392 #endif 393 394 static void 395 com_enable_debugport(struct com_softc *sc) 396 { 397 int s; 398 399 /* Turn on line break interrupt, set carrier. */ 400 s = splserial(); 401 COM_LOCK(sc); 402 sc->sc_ier = IER_ERXRDY; 403 #ifdef COM_PXA2X0 404 if (sc->sc_type == COM_TYPE_PXA2x0) 405 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 406 #endif 407 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 408 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 409 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 410 COM_UNLOCK(sc); 411 splx(s); 412 } 413 414 void 415 com_attach_subr(struct com_softc *sc) 416 { 417 bus_addr_t iobase = sc->sc_iobase; 418 bus_space_tag_t iot = sc->sc_iot; 419 bus_space_handle_t ioh = sc->sc_ioh; 420 struct tty *tp; 421 #ifdef COM_16650 422 u_int8_t lcr; 423 #endif 424 #ifdef COM_HAYESP 425 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 426 int *hayespp; 427 #endif 428 const char *fifo_msg = NULL; 429 430 callout_init(&sc->sc_diag_callout); 431 simple_lock_init(&sc->sc_lock); 432 433 /* Disable interrupts before configuring the device. */ 434 #ifdef COM_PXA2X0 435 if (sc->sc_type == COM_TYPE_PXA2x0) 436 sc->sc_ier = IER_EUART; 437 else 438 #endif 439 sc->sc_ier = 0; 440 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 441 442 if (iot == comconstag && iobase == comconsaddr) { 443 comconsattached = 1; 444 445 /* Make sure the console is always "hardwired". */ 446 delay(10000); /* wait for output to finish */ 447 SET(sc->sc_hwflags, COM_HW_CONSOLE); 448 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 449 } 450 451 #ifdef COM_HAYESP 452 sc->sc_prescaler = 0; /* set prescaler to x1. */ 453 454 /* Look for a Hayes ESP board. */ 455 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 456 bus_space_handle_t hayespioh; 457 458 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 459 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 460 continue; 461 if (comprobeHAYESP(hayespioh, sc)) { 462 sc->sc_hayespioh = hayespioh; 463 sc->sc_fifolen = 1024; 464 465 break; 466 } 467 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 468 } 469 /* No ESP; look for other things. */ 470 if (sc->sc_type != COM_TYPE_HAYESP) { 471 #endif 472 sc->sc_fifolen = 1; 473 /* look for a NS 16550AF UART with FIFOs */ 474 bus_space_write_1(iot, ioh, com_fifo, 475 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 476 delay(100); 477 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 478 == IIR_FIFO_MASK) 479 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 480 == FIFO_TRIGGER_14) { 481 SET(sc->sc_hwflags, COM_HW_FIFO); 482 483 #ifdef COM_16650 484 /* 485 * IIR changes into the EFR if LCR is set to LCR_EERS 486 * on 16650s. We also know IIR != 0 at this point. 487 * Write 0 into the EFR, and read it. If the result 488 * is 0, we have a 16650. 489 * 490 * Older 16650s were broken; the test to detect them 491 * is taken from the Linux driver. Apparently 492 * setting DLAB enable gives access to the EFR on 493 * these chips. 494 */ 495 lcr = bus_space_read_1(iot, ioh, com_lcr); 496 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 497 bus_space_write_1(iot, ioh, com_efr, 0); 498 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 499 bus_space_write_1(iot, ioh, com_lcr, 500 lcr | LCR_DLAB); 501 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 502 CLR(sc->sc_hwflags, COM_HW_FIFO); 503 sc->sc_fifolen = 0; 504 } else { 505 SET(sc->sc_hwflags, COM_HW_FLOW); 506 sc->sc_fifolen = 32; 507 } 508 } else 509 #endif 510 sc->sc_fifolen = 16; 511 512 #ifdef COM_16650 513 bus_space_write_1(iot, ioh, com_lcr, lcr); 514 if (sc->sc_fifolen == 0) 515 fifo_msg = "st16650, broken fifo"; 516 else if (sc->sc_fifolen == 32) 517 fifo_msg = "st16650a, working fifo"; 518 else 519 #endif 520 fifo_msg = "ns16550a, working fifo"; 521 } else 522 fifo_msg = "ns16550, broken fifo"; 523 else 524 fifo_msg = "ns8250 or ns16450, no fifo"; 525 bus_space_write_1(iot, ioh, com_fifo, 0); 526 /* 527 * Some chips will clear down both Tx and Rx FIFOs when zero is 528 * written to com_fifo. If this chip is the console, writing zero 529 * results in some of the chip/FIFO description being lost, so delay 530 * printing it until now. 531 */ 532 delay(10); 533 aprint_normal(": %s\n", fifo_msg); 534 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 535 sc->sc_fifolen = 1; 536 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 537 } 538 #ifdef COM_HAYESP 539 } 540 #endif 541 542 tp = ttymalloc(); 543 tp->t_oproc = comstart; 544 tp->t_param = comparam; 545 tp->t_hwiflow = comhwiflow; 546 547 sc->sc_tty = tp; 548 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 549 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 550 sc->sc_rbavail = com_rbuf_size; 551 if (sc->sc_rbuf == NULL) { 552 aprint_error("%s: unable to allocate ring buffer\n", 553 sc->sc_dev.dv_xname); 554 return; 555 } 556 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 557 558 tty_attach(tp); 559 560 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 561 SET(sc->sc_mcr, MCR_IENABLE); 562 563 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 564 int maj; 565 566 /* locate the major number */ 567 maj = cdevsw_lookup_major(&com_cdevsw); 568 569 tp->t_dev = cn_tab->cn_dev = makedev(maj, 570 device_unit(&sc->sc_dev)); 571 572 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 573 } 574 575 #ifdef KGDB 576 /* 577 * Allow kgdb to "take over" this port. If this is 578 * not the console and is the kgdb device, it has 579 * exclusive use. If it's the console _and_ the 580 * kgdb device, it doesn't. 581 */ 582 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 583 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 584 com_kgdb_attached = 1; 585 586 SET(sc->sc_hwflags, COM_HW_KGDB); 587 } 588 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 589 } 590 #endif 591 592 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 593 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 594 #endif 595 596 #if NRND > 0 && defined(RND_COM) 597 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 598 RND_TYPE_TTY, 0); 599 #endif 600 601 /* if there are no enable/disable functions, assume the device 602 is always enabled */ 603 if (!sc->enable) 604 sc->enabled = 1; 605 606 com_config(sc); 607 608 SET(sc->sc_hwflags, COM_HW_DEV_OK); 609 } 610 611 void 612 com_config(struct com_softc *sc) 613 { 614 bus_space_tag_t iot = sc->sc_iot; 615 bus_space_handle_t ioh = sc->sc_ioh; 616 617 /* Disable interrupts before configuring the device. */ 618 #ifdef COM_PXA2X0 619 if (sc->sc_type == COM_TYPE_PXA2x0) 620 sc->sc_ier = IER_EUART; 621 else 622 #endif 623 sc->sc_ier = 0; 624 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 625 (void) bus_space_read_1(iot, ioh, com_iir); 626 627 #ifdef COM_HAYESP 628 /* Look for a Hayes ESP board. */ 629 if (sc->sc_type == COM_TYPE_HAYESP) { 630 sc->sc_fifolen = 1024; 631 632 /* Set 16550 compatibility mode */ 633 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 634 HAYESP_SETMODE); 635 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 636 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 637 HAYESP_MODE_SCALE); 638 639 /* Set RTS/CTS flow control */ 640 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 641 HAYESP_SETFLOWTYPE); 642 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 643 HAYESP_FLOW_RTS); 644 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 645 HAYESP_FLOW_CTS); 646 647 /* Set flow control levels */ 648 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 649 HAYESP_SETRXFLOW); 650 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 651 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 652 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 653 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 654 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 655 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 656 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 657 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 658 } 659 #endif 660 661 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 662 com_enable_debugport(sc); 663 } 664 665 int 666 com_detach(struct device *self, int flags) 667 { 668 struct com_softc *sc = (struct com_softc *)self; 669 int maj, mn; 670 671 /* locate the major number */ 672 maj = cdevsw_lookup_major(&com_cdevsw); 673 674 /* Nuke the vnodes for any open instances. */ 675 mn = device_unit(self); 676 vdevgone(maj, mn, mn, VCHR); 677 678 mn |= COMDIALOUT_MASK; 679 vdevgone(maj, mn, mn, VCHR); 680 681 if (sc->sc_rbuf == NULL) { 682 /* 683 * Ring buffer allocation failed in the com_attach_subr, 684 * only the tty is allocated, and nothing else. 685 */ 686 ttyfree(sc->sc_tty); 687 return 0; 688 } 689 690 /* Free the receive buffer. */ 691 free(sc->sc_rbuf, M_DEVBUF); 692 693 /* Detach and free the tty. */ 694 tty_detach(sc->sc_tty); 695 ttyfree(sc->sc_tty); 696 697 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 698 /* Unhook the soft interrupt handler. */ 699 softintr_disestablish(sc->sc_si); 700 #endif 701 702 #if NRND > 0 && defined(RND_COM) 703 /* Unhook the entropy source. */ 704 rnd_detach_source(&sc->rnd_source); 705 #endif 706 707 return (0); 708 } 709 710 int 711 com_activate(struct device *self, enum devact act) 712 { 713 struct com_softc *sc = (struct com_softc *)self; 714 int s, rv = 0; 715 716 s = splserial(); 717 COM_LOCK(sc); 718 switch (act) { 719 case DVACT_ACTIVATE: 720 rv = EOPNOTSUPP; 721 break; 722 723 case DVACT_DEACTIVATE: 724 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 725 rv = EBUSY; 726 break; 727 } 728 729 if (sc->disable != NULL && sc->enabled != 0) { 730 (*sc->disable)(sc); 731 sc->enabled = 0; 732 } 733 break; 734 } 735 736 COM_UNLOCK(sc); 737 splx(s); 738 return (rv); 739 } 740 741 void 742 com_shutdown(struct com_softc *sc) 743 { 744 struct tty *tp = sc->sc_tty; 745 int s; 746 747 s = splserial(); 748 COM_LOCK(sc); 749 750 /* If we were asserting flow control, then deassert it. */ 751 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 752 com_hwiflow(sc); 753 754 /* Clear any break condition set with TIOCSBRK. */ 755 com_break(sc, 0); 756 757 #ifndef __HAVE_TIMECOUNTER 758 /* Turn off PPS capture on last close. */ 759 sc->sc_ppsmask = 0; 760 sc->ppsparam.mode = 0; 761 #endif /* !__HAVE_TIMECOUNTER */ 762 763 /* 764 * Hang up if necessary. Wait a bit, so the other side has time to 765 * notice even if we immediately open the port again. 766 * Avoid tsleeping above splhigh(). 767 */ 768 if (ISSET(tp->t_cflag, HUPCL)) { 769 com_modem(sc, 0); 770 COM_UNLOCK(sc); 771 splx(s); 772 /* XXX tsleep will only timeout */ 773 (void) tsleep(sc, TTIPRI, ttclos, hz); 774 s = splserial(); 775 COM_LOCK(sc); 776 } 777 778 /* Turn off interrupts. */ 779 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 780 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 781 #ifdef COM_PXA2X0 782 if (sc->sc_type == COM_TYPE_PXA2x0) 783 sc->sc_ier |= IER_ERXTOUT; 784 #endif 785 } else 786 sc->sc_ier = 0; 787 788 #ifdef COM_PXA2X0 789 if (sc->sc_type == COM_TYPE_PXA2x0) 790 sc->sc_ier |= IER_EUART; 791 #endif 792 793 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 794 795 if (sc->disable) { 796 #ifdef DIAGNOSTIC 797 if (!sc->enabled) 798 panic("com_shutdown: not enabled?"); 799 #endif 800 (*sc->disable)(sc); 801 sc->enabled = 0; 802 } 803 COM_UNLOCK(sc); 804 splx(s); 805 } 806 807 int 808 comopen(dev_t dev, int flag, int mode, struct lwp *l) 809 { 810 struct com_softc *sc; 811 struct tty *tp; 812 int s, s2; 813 int error; 814 815 sc = device_lookup(&com_cd, COMUNIT(dev)); 816 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 817 sc->sc_rbuf == NULL) 818 return (ENXIO); 819 820 if (!device_is_active(&sc->sc_dev)) 821 return (ENXIO); 822 823 #ifdef KGDB 824 /* 825 * If this is the kgdb port, no other use is permitted. 826 */ 827 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 828 return (EBUSY); 829 #endif 830 831 tp = sc->sc_tty; 832 833 if (ISSET(tp->t_state, TS_ISOPEN) && 834 ISSET(tp->t_state, TS_XCLUDE) && 835 suser(l->l_proc->p_ucred, &l->l_proc->p_acflag) != 0) 836 return (EBUSY); 837 838 s = spltty(); 839 840 /* 841 * Do the following iff this is a first open. 842 */ 843 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 844 struct termios t; 845 846 tp->t_dev = dev; 847 848 s2 = splserial(); 849 COM_LOCK(sc); 850 851 if (sc->enable) { 852 if ((*sc->enable)(sc)) { 853 COM_UNLOCK(sc); 854 splx(s2); 855 splx(s); 856 printf("%s: device enable failed\n", 857 sc->sc_dev.dv_xname); 858 return (EIO); 859 } 860 sc->enabled = 1; 861 com_config(sc); 862 } 863 864 /* Turn on interrupts. */ 865 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 866 #ifdef COM_PXA2X0 867 if (sc->sc_type == COM_TYPE_PXA2x0) 868 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 869 #endif 870 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 871 872 /* Fetch the current modem control status, needed later. */ 873 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 874 875 /* Clear PPS capture state on first open. */ 876 #ifdef __HAVE_TIMECOUNTER 877 memset(&sc->sc_pps_state, 0, sizeof(sc->sc_pps_state)); 878 sc->sc_pps_state.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 879 pps_init(&sc->sc_pps_state); 880 #else /* !__HAVE_TIMECOUNTER */ 881 sc->sc_ppsmask = 0; 882 sc->ppsparam.mode = 0; 883 #endif /* !__HAVE_TIMECOUNTER */ 884 885 COM_UNLOCK(sc); 886 splx(s2); 887 888 /* 889 * Initialize the termios status to the defaults. Add in the 890 * sticky bits from TIOCSFLAGS. 891 */ 892 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 893 t.c_ospeed = comconsrate; 894 t.c_cflag = comconscflag; 895 } else { 896 t.c_ospeed = TTYDEF_SPEED; 897 t.c_cflag = TTYDEF_CFLAG; 898 } 899 t.c_ispeed = t.c_ospeed; 900 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 901 SET(t.c_cflag, CLOCAL); 902 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 903 SET(t.c_cflag, CRTSCTS); 904 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 905 SET(t.c_cflag, MDMBUF); 906 /* Make sure comparam() will do something. */ 907 tp->t_ospeed = 0; 908 (void) comparam(tp, &t); 909 tp->t_iflag = TTYDEF_IFLAG; 910 tp->t_oflag = TTYDEF_OFLAG; 911 tp->t_lflag = TTYDEF_LFLAG; 912 ttychars(tp); 913 ttsetwater(tp); 914 915 s2 = splserial(); 916 COM_LOCK(sc); 917 918 /* 919 * Turn on DTR. We must always do this, even if carrier is not 920 * present, because otherwise we'd have to use TIOCSDTR 921 * immediately after setting CLOCAL, which applications do not 922 * expect. We always assert DTR while the device is open 923 * unless explicitly requested to deassert it. 924 */ 925 com_modem(sc, 1); 926 927 /* Clear the input ring, and unblock. */ 928 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 929 sc->sc_rbavail = com_rbuf_size; 930 com_iflush(sc); 931 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 932 com_hwiflow(sc); 933 934 #ifdef COM_DEBUG 935 if (com_debug) 936 comstatus(sc, "comopen "); 937 #endif 938 939 COM_UNLOCK(sc); 940 splx(s2); 941 } 942 943 splx(s); 944 945 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 946 if (error) 947 goto bad; 948 949 error = (*tp->t_linesw->l_open)(dev, tp); 950 if (error) 951 goto bad; 952 953 return (0); 954 955 bad: 956 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 957 /* 958 * We failed to open the device, and nobody else had it opened. 959 * Clean up the state as appropriate. 960 */ 961 com_shutdown(sc); 962 } 963 964 return (error); 965 } 966 967 int 968 comclose(dev_t dev, int flag, int mode, struct lwp *l) 969 { 970 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 971 struct tty *tp = sc->sc_tty; 972 973 /* XXX This is for cons.c. */ 974 if (!ISSET(tp->t_state, TS_ISOPEN)) 975 return (0); 976 977 (*tp->t_linesw->l_close)(tp, flag); 978 ttyclose(tp); 979 980 if (COM_ISALIVE(sc) == 0) 981 return (0); 982 983 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 984 /* 985 * Although we got a last close, the device may still be in 986 * use; e.g. if this was the dialout node, and there are still 987 * processes waiting for carrier on the non-dialout node. 988 */ 989 com_shutdown(sc); 990 } 991 992 return (0); 993 } 994 995 int 996 comread(dev_t dev, struct uio *uio, int flag) 997 { 998 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 999 struct tty *tp = sc->sc_tty; 1000 1001 if (COM_ISALIVE(sc) == 0) 1002 return (EIO); 1003 1004 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 1005 } 1006 1007 int 1008 comwrite(dev_t dev, struct uio *uio, int flag) 1009 { 1010 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1011 struct tty *tp = sc->sc_tty; 1012 1013 if (COM_ISALIVE(sc) == 0) 1014 return (EIO); 1015 1016 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1017 } 1018 1019 int 1020 compoll(dev_t dev, int events, struct lwp *l) 1021 { 1022 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1023 struct tty *tp = sc->sc_tty; 1024 1025 if (COM_ISALIVE(sc) == 0) 1026 return (POLLHUP); 1027 1028 return ((*tp->t_linesw->l_poll)(tp, events, l)); 1029 } 1030 1031 struct tty * 1032 comtty(dev_t dev) 1033 { 1034 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1035 struct tty *tp = sc->sc_tty; 1036 1037 return (tp); 1038 } 1039 1040 int 1041 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 1042 { 1043 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1044 struct tty *tp = sc->sc_tty; 1045 struct proc *p = l->l_proc; 1046 int error; 1047 int s; 1048 1049 if (COM_ISALIVE(sc) == 0) 1050 return (EIO); 1051 1052 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1053 if (error != EPASSTHROUGH) 1054 return (error); 1055 1056 error = ttioctl(tp, cmd, data, flag, l); 1057 if (error != EPASSTHROUGH) 1058 return (error); 1059 1060 error = 0; 1061 1062 s = splserial(); 1063 COM_LOCK(sc); 1064 1065 switch (cmd) { 1066 case TIOCSBRK: 1067 com_break(sc, 1); 1068 break; 1069 1070 case TIOCCBRK: 1071 com_break(sc, 0); 1072 break; 1073 1074 case TIOCSDTR: 1075 com_modem(sc, 1); 1076 break; 1077 1078 case TIOCCDTR: 1079 com_modem(sc, 0); 1080 break; 1081 1082 case TIOCGFLAGS: 1083 *(int *)data = sc->sc_swflags; 1084 break; 1085 1086 case TIOCSFLAGS: 1087 error = suser(p->p_ucred, &p->p_acflag); 1088 if (error) 1089 break; 1090 sc->sc_swflags = *(int *)data; 1091 break; 1092 1093 case TIOCMSET: 1094 case TIOCMBIS: 1095 case TIOCMBIC: 1096 tiocm_to_com(sc, cmd, *(int *)data); 1097 break; 1098 1099 case TIOCMGET: 1100 *(int *)data = com_to_tiocm(sc); 1101 break; 1102 1103 #ifdef __HAVE_TIMECOUNTER 1104 case PPS_IOC_CREATE: 1105 case PPS_IOC_DESTROY: 1106 case PPS_IOC_GETPARAMS: 1107 case PPS_IOC_SETPARAMS: 1108 case PPS_IOC_GETCAP: 1109 case PPS_IOC_FETCH: 1110 #ifdef PPS_SYNC 1111 case PPS_IOC_KCBIND: 1112 #endif 1113 error = pps_ioctl(cmd, data, &sc->sc_pps_state); 1114 break; 1115 #else /* !__HAVE_TIMECOUNTER */ 1116 case PPS_IOC_CREATE: 1117 break; 1118 1119 case PPS_IOC_DESTROY: 1120 break; 1121 1122 case PPS_IOC_GETPARAMS: { 1123 pps_params_t *pp; 1124 pp = (pps_params_t *)data; 1125 *pp = sc->ppsparam; 1126 break; 1127 } 1128 1129 case PPS_IOC_SETPARAMS: { 1130 pps_params_t *pp; 1131 int mode; 1132 pp = (pps_params_t *)data; 1133 if (pp->mode & ~ppscap) { 1134 error = EINVAL; 1135 break; 1136 } 1137 sc->ppsparam = *pp; 1138 /* 1139 * Compute msr masks from user-specified timestamp state. 1140 */ 1141 mode = sc->ppsparam.mode; 1142 switch (mode & PPS_CAPTUREBOTH) { 1143 case 0: 1144 sc->sc_ppsmask = 0; 1145 break; 1146 1147 case PPS_CAPTUREASSERT: 1148 sc->sc_ppsmask = MSR_DCD; 1149 sc->sc_ppsassert = MSR_DCD; 1150 sc->sc_ppsclear = -1; 1151 break; 1152 1153 case PPS_CAPTURECLEAR: 1154 sc->sc_ppsmask = MSR_DCD; 1155 sc->sc_ppsassert = -1; 1156 sc->sc_ppsclear = 0; 1157 break; 1158 1159 case PPS_CAPTUREBOTH: 1160 sc->sc_ppsmask = MSR_DCD; 1161 sc->sc_ppsassert = MSR_DCD; 1162 sc->sc_ppsclear = 0; 1163 break; 1164 1165 default: 1166 error = EINVAL; 1167 break; 1168 } 1169 break; 1170 } 1171 1172 case PPS_IOC_GETCAP: 1173 *(int*)data = ppscap; 1174 break; 1175 1176 case PPS_IOC_FETCH: { 1177 pps_info_t *pi; 1178 pi = (pps_info_t *)data; 1179 *pi = sc->ppsinfo; 1180 break; 1181 } 1182 1183 #ifdef PPS_SYNC 1184 case PPS_IOC_KCBIND: { 1185 int edge = (*(int *)data) & PPS_CAPTUREBOTH; 1186 1187 if (edge == 0) { 1188 /* 1189 * remove binding for this source; ignore 1190 * the request if this is not the current 1191 * hardpps source 1192 */ 1193 if (pps_kc_hardpps_source == sc) { 1194 pps_kc_hardpps_source = NULL; 1195 pps_kc_hardpps_mode = 0; 1196 } 1197 } else { 1198 /* 1199 * bind hardpps to this source, replacing any 1200 * previously specified source or edges 1201 */ 1202 pps_kc_hardpps_source = sc; 1203 pps_kc_hardpps_mode = edge; 1204 } 1205 break; 1206 } 1207 #endif /* PPS_SYNC */ 1208 #endif /* !__HAVE_TIMECOUNTER */ 1209 1210 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1211 #ifdef __HAVE_TIMECOUNTER 1212 #ifndef PPS_TRAILING_EDGE 1213 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1214 &sc->sc_pps_state.ppsinfo.assert_timestamp); 1215 #else 1216 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1217 &sc->sc_pps_state.ppsinfo.clear_timestamp); 1218 #endif 1219 #else /* !__HAVE_TIMECOUNTER */ 1220 /* 1221 * Some GPS clocks models use the falling rather than 1222 * rising edge as the on-the-second signal. 1223 * The old API has no way to specify PPS polarity. 1224 */ 1225 sc->sc_ppsmask = MSR_DCD; 1226 #ifndef PPS_TRAILING_EDGE 1227 sc->sc_ppsassert = MSR_DCD; 1228 sc->sc_ppsclear = -1; 1229 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1230 &sc->ppsinfo.assert_timestamp); 1231 #else 1232 sc->sc_ppsassert = -1; 1233 sc->sc_ppsclear = 0; 1234 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1235 &sc->ppsinfo.clear_timestamp); 1236 #endif 1237 #endif /* !__HAVE_TIMECOUNTER */ 1238 break; 1239 1240 default: 1241 error = EPASSTHROUGH; 1242 break; 1243 } 1244 1245 COM_UNLOCK(sc); 1246 splx(s); 1247 1248 #ifdef COM_DEBUG 1249 if (com_debug) 1250 comstatus(sc, "comioctl "); 1251 #endif 1252 1253 return (error); 1254 } 1255 1256 integrate void 1257 com_schedrx(struct com_softc *sc) 1258 { 1259 1260 sc->sc_rx_ready = 1; 1261 1262 /* Wake up the poller. */ 1263 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1264 softintr_schedule(sc->sc_si); 1265 #else 1266 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1267 setsoftserial(); 1268 #else 1269 if (!com_softintr_scheduled) { 1270 com_softintr_scheduled = 1; 1271 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1272 } 1273 #endif 1274 #endif 1275 } 1276 1277 void 1278 com_break(struct com_softc *sc, int onoff) 1279 { 1280 1281 if (onoff) 1282 SET(sc->sc_lcr, LCR_SBREAK); 1283 else 1284 CLR(sc->sc_lcr, LCR_SBREAK); 1285 1286 if (!sc->sc_heldchange) { 1287 if (sc->sc_tx_busy) { 1288 sc->sc_heldtbc = sc->sc_tbc; 1289 sc->sc_tbc = 0; 1290 sc->sc_heldchange = 1; 1291 } else 1292 com_loadchannelregs(sc); 1293 } 1294 } 1295 1296 void 1297 com_modem(struct com_softc *sc, int onoff) 1298 { 1299 1300 if (sc->sc_mcr_dtr == 0) 1301 return; 1302 1303 if (onoff) 1304 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1305 else 1306 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1307 1308 if (!sc->sc_heldchange) { 1309 if (sc->sc_tx_busy) { 1310 sc->sc_heldtbc = sc->sc_tbc; 1311 sc->sc_tbc = 0; 1312 sc->sc_heldchange = 1; 1313 } else 1314 com_loadchannelregs(sc); 1315 } 1316 } 1317 1318 void 1319 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1320 { 1321 u_char combits; 1322 1323 combits = 0; 1324 if (ISSET(ttybits, TIOCM_DTR)) 1325 SET(combits, MCR_DTR); 1326 if (ISSET(ttybits, TIOCM_RTS)) 1327 SET(combits, MCR_RTS); 1328 1329 switch (how) { 1330 case TIOCMBIC: 1331 CLR(sc->sc_mcr, combits); 1332 break; 1333 1334 case TIOCMBIS: 1335 SET(sc->sc_mcr, combits); 1336 break; 1337 1338 case TIOCMSET: 1339 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1340 SET(sc->sc_mcr, combits); 1341 break; 1342 } 1343 1344 if (!sc->sc_heldchange) { 1345 if (sc->sc_tx_busy) { 1346 sc->sc_heldtbc = sc->sc_tbc; 1347 sc->sc_tbc = 0; 1348 sc->sc_heldchange = 1; 1349 } else 1350 com_loadchannelregs(sc); 1351 } 1352 } 1353 1354 int 1355 com_to_tiocm(struct com_softc *sc) 1356 { 1357 u_char combits; 1358 int ttybits = 0; 1359 1360 combits = sc->sc_mcr; 1361 if (ISSET(combits, MCR_DTR)) 1362 SET(ttybits, TIOCM_DTR); 1363 if (ISSET(combits, MCR_RTS)) 1364 SET(ttybits, TIOCM_RTS); 1365 1366 combits = sc->sc_msr; 1367 if (ISSET(combits, MSR_DCD)) 1368 SET(ttybits, TIOCM_CD); 1369 if (ISSET(combits, MSR_CTS)) 1370 SET(ttybits, TIOCM_CTS); 1371 if (ISSET(combits, MSR_DSR)) 1372 SET(ttybits, TIOCM_DSR); 1373 if (ISSET(combits, MSR_RI | MSR_TERI)) 1374 SET(ttybits, TIOCM_RI); 1375 1376 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1377 SET(ttybits, TIOCM_LE); 1378 1379 return (ttybits); 1380 } 1381 1382 static u_char 1383 cflag2lcr(tcflag_t cflag) 1384 { 1385 u_char lcr = 0; 1386 1387 switch (ISSET(cflag, CSIZE)) { 1388 case CS5: 1389 SET(lcr, LCR_5BITS); 1390 break; 1391 case CS6: 1392 SET(lcr, LCR_6BITS); 1393 break; 1394 case CS7: 1395 SET(lcr, LCR_7BITS); 1396 break; 1397 case CS8: 1398 SET(lcr, LCR_8BITS); 1399 break; 1400 } 1401 if (ISSET(cflag, PARENB)) { 1402 SET(lcr, LCR_PENAB); 1403 if (!ISSET(cflag, PARODD)) 1404 SET(lcr, LCR_PEVEN); 1405 } 1406 if (ISSET(cflag, CSTOPB)) 1407 SET(lcr, LCR_STOPB); 1408 1409 return (lcr); 1410 } 1411 1412 int 1413 comparam(struct tty *tp, struct termios *t) 1414 { 1415 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1416 int ospeed; 1417 u_char lcr; 1418 int s; 1419 1420 if (COM_ISALIVE(sc) == 0) 1421 return (EIO); 1422 1423 #ifdef COM_HAYESP 1424 if (sc->sc_type == COM_TYPE_HAYESP) { 1425 int prescaler, speed; 1426 1427 /* 1428 * Calculate UART clock prescaler. It should be in 1429 * range of 0 .. 3. 1430 */ 1431 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1432 prescaler++, speed /= 2) 1433 if ((ospeed = comspeed(speed, sc->sc_frequency, 1434 sc->sc_type)) > 0) 1435 break; 1436 1437 if (prescaler == 4) 1438 return (EINVAL); 1439 sc->sc_prescaler = prescaler; 1440 } else 1441 #endif 1442 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1443 1444 /* Check requested parameters. */ 1445 if (ospeed < 0) 1446 return (EINVAL); 1447 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1448 return (EINVAL); 1449 1450 /* 1451 * For the console, always force CLOCAL and !HUPCL, so that the port 1452 * is always active. 1453 */ 1454 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1455 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1456 SET(t->c_cflag, CLOCAL); 1457 CLR(t->c_cflag, HUPCL); 1458 } 1459 1460 /* 1461 * If there were no changes, don't do anything. This avoids dropping 1462 * input and improves performance when all we did was frob things like 1463 * VMIN and VTIME. 1464 */ 1465 if (tp->t_ospeed == t->c_ospeed && 1466 tp->t_cflag == t->c_cflag) 1467 return (0); 1468 1469 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1470 1471 s = splserial(); 1472 COM_LOCK(sc); 1473 1474 sc->sc_lcr = lcr; 1475 1476 /* 1477 * If we're not in a mode that assumes a connection is present, then 1478 * ignore carrier changes. 1479 */ 1480 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1481 sc->sc_msr_dcd = 0; 1482 else 1483 sc->sc_msr_dcd = MSR_DCD; 1484 /* 1485 * Set the flow control pins depending on the current flow control 1486 * mode. 1487 */ 1488 if (ISSET(t->c_cflag, CRTSCTS)) { 1489 sc->sc_mcr_dtr = MCR_DTR; 1490 sc->sc_mcr_rts = MCR_RTS; 1491 sc->sc_msr_cts = MSR_CTS; 1492 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1493 } else if (ISSET(t->c_cflag, MDMBUF)) { 1494 /* 1495 * For DTR/DCD flow control, make sure we don't toggle DTR for 1496 * carrier detection. 1497 */ 1498 sc->sc_mcr_dtr = 0; 1499 sc->sc_mcr_rts = MCR_DTR; 1500 sc->sc_msr_cts = MSR_DCD; 1501 sc->sc_efr = 0; 1502 } else { 1503 /* 1504 * If no flow control, then always set RTS. This will make 1505 * the other side happy if it mistakenly thinks we're doing 1506 * RTS/CTS flow control. 1507 */ 1508 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1509 sc->sc_mcr_rts = 0; 1510 sc->sc_msr_cts = 0; 1511 sc->sc_efr = 0; 1512 if (ISSET(sc->sc_mcr, MCR_DTR)) 1513 SET(sc->sc_mcr, MCR_RTS); 1514 else 1515 CLR(sc->sc_mcr, MCR_RTS); 1516 } 1517 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1518 1519 #if 0 1520 if (ospeed == 0) 1521 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1522 else 1523 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1524 #endif 1525 1526 sc->sc_dlbl = ospeed; 1527 sc->sc_dlbh = ospeed >> 8; 1528 1529 /* 1530 * Set the FIFO threshold based on the receive speed. 1531 * 1532 * * If it's a low speed, it's probably a mouse or some other 1533 * interactive device, so set the threshold low. 1534 * * If it's a high speed, trim the trigger level down to prevent 1535 * overflows. 1536 * * Otherwise set it a bit higher. 1537 */ 1538 if (sc->sc_type == COM_TYPE_HAYESP) 1539 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1540 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1541 sc->sc_fifo = FIFO_ENABLE | 1542 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8); 1543 else 1544 sc->sc_fifo = 0; 1545 1546 /* And copy to tty. */ 1547 tp->t_ispeed = t->c_ospeed; 1548 tp->t_ospeed = t->c_ospeed; 1549 tp->t_cflag = t->c_cflag; 1550 1551 if (!sc->sc_heldchange) { 1552 if (sc->sc_tx_busy) { 1553 sc->sc_heldtbc = sc->sc_tbc; 1554 sc->sc_tbc = 0; 1555 sc->sc_heldchange = 1; 1556 } else 1557 com_loadchannelregs(sc); 1558 } 1559 1560 if (!ISSET(t->c_cflag, CHWFLOW)) { 1561 /* Disable the high water mark. */ 1562 sc->sc_r_hiwat = 0; 1563 sc->sc_r_lowat = 0; 1564 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1565 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1566 com_schedrx(sc); 1567 } 1568 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1569 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1570 com_hwiflow(sc); 1571 } 1572 } else { 1573 sc->sc_r_hiwat = com_rbuf_hiwat; 1574 sc->sc_r_lowat = com_rbuf_lowat; 1575 } 1576 1577 COM_UNLOCK(sc); 1578 splx(s); 1579 1580 /* 1581 * Update the tty layer's idea of the carrier bit, in case we changed 1582 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1583 * explicit request. 1584 */ 1585 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1586 1587 #ifdef COM_DEBUG 1588 if (com_debug) 1589 comstatus(sc, "comparam "); 1590 #endif 1591 1592 if (!ISSET(t->c_cflag, CHWFLOW)) { 1593 if (sc->sc_tx_stopped) { 1594 sc->sc_tx_stopped = 0; 1595 comstart(tp); 1596 } 1597 } 1598 1599 return (0); 1600 } 1601 1602 void 1603 com_iflush(struct com_softc *sc) 1604 { 1605 bus_space_tag_t iot = sc->sc_iot; 1606 bus_space_handle_t ioh = sc->sc_ioh; 1607 #ifdef DIAGNOSTIC 1608 int reg; 1609 #endif 1610 int timo; 1611 1612 #ifdef DIAGNOSTIC 1613 reg = 0xffff; 1614 #endif 1615 timo = 50000; 1616 /* flush any pending I/O */ 1617 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1618 && --timo) 1619 #ifdef DIAGNOSTIC 1620 reg = 1621 #else 1622 (void) 1623 #endif 1624 bus_space_read_1(iot, ioh, com_data); 1625 #ifdef DIAGNOSTIC 1626 if (!timo) 1627 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1628 reg); 1629 #endif 1630 } 1631 1632 void 1633 com_loadchannelregs(struct com_softc *sc) 1634 { 1635 bus_space_tag_t iot = sc->sc_iot; 1636 bus_space_handle_t ioh = sc->sc_ioh; 1637 1638 /* XXXXX necessary? */ 1639 com_iflush(sc); 1640 1641 #ifdef COM_PXA2X0 1642 if (sc->sc_type == COM_TYPE_PXA2x0) 1643 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1644 else 1645 #endif 1646 bus_space_write_1(iot, ioh, com_ier, 0); 1647 1648 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1649 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1650 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1651 } 1652 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1653 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1654 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1655 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1656 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1657 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1658 #ifdef COM_HAYESP 1659 if (sc->sc_type == COM_TYPE_HAYESP) { 1660 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1661 HAYESP_SETPRESCALER); 1662 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1663 sc->sc_prescaler); 1664 } 1665 #endif 1666 1667 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1668 } 1669 1670 int 1671 comhwiflow(struct tty *tp, int block) 1672 { 1673 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1674 int s; 1675 1676 if (COM_ISALIVE(sc) == 0) 1677 return (0); 1678 1679 if (sc->sc_mcr_rts == 0) 1680 return (0); 1681 1682 s = splserial(); 1683 COM_LOCK(sc); 1684 1685 if (block) { 1686 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1687 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1688 com_hwiflow(sc); 1689 } 1690 } else { 1691 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1692 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1693 com_schedrx(sc); 1694 } 1695 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1696 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1697 com_hwiflow(sc); 1698 } 1699 } 1700 1701 COM_UNLOCK(sc); 1702 splx(s); 1703 return (1); 1704 } 1705 1706 /* 1707 * (un)block input via hw flowcontrol 1708 */ 1709 void 1710 com_hwiflow(struct com_softc *sc) 1711 { 1712 bus_space_tag_t iot = sc->sc_iot; 1713 bus_space_handle_t ioh = sc->sc_ioh; 1714 1715 if (sc->sc_mcr_rts == 0) 1716 return; 1717 1718 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1719 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1720 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1721 } else { 1722 SET(sc->sc_mcr, sc->sc_mcr_rts); 1723 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1724 } 1725 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1726 } 1727 1728 1729 void 1730 comstart(struct tty *tp) 1731 { 1732 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1733 bus_space_tag_t iot = sc->sc_iot; 1734 bus_space_handle_t ioh = sc->sc_ioh; 1735 int s; 1736 1737 if (COM_ISALIVE(sc) == 0) 1738 return; 1739 1740 s = spltty(); 1741 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1742 goto out; 1743 if (sc->sc_tx_stopped) 1744 goto out; 1745 1746 if (tp->t_outq.c_cc <= tp->t_lowat) { 1747 if (ISSET(tp->t_state, TS_ASLEEP)) { 1748 CLR(tp->t_state, TS_ASLEEP); 1749 wakeup(&tp->t_outq); 1750 } 1751 selwakeup(&tp->t_wsel); 1752 if (tp->t_outq.c_cc == 0) 1753 goto out; 1754 } 1755 1756 /* Grab the first contiguous region of buffer space. */ 1757 { 1758 u_char *tba; 1759 int tbc; 1760 1761 tba = tp->t_outq.c_cf; 1762 tbc = ndqb(&tp->t_outq, 0); 1763 1764 (void)splserial(); 1765 COM_LOCK(sc); 1766 1767 sc->sc_tba = tba; 1768 sc->sc_tbc = tbc; 1769 } 1770 1771 SET(tp->t_state, TS_BUSY); 1772 sc->sc_tx_busy = 1; 1773 1774 /* Enable transmit completion interrupts if necessary. */ 1775 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1776 SET(sc->sc_ier, IER_ETXRDY); 1777 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1778 } 1779 1780 /* Output the first chunk of the contiguous buffer. */ 1781 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1782 u_int n; 1783 1784 n = sc->sc_tbc; 1785 if (n > sc->sc_fifolen) 1786 n = sc->sc_fifolen; 1787 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1788 sc->sc_tbc -= n; 1789 sc->sc_tba += n; 1790 } 1791 1792 COM_UNLOCK(sc); 1793 out: 1794 splx(s); 1795 return; 1796 } 1797 1798 /* 1799 * Stop output on a line. 1800 */ 1801 void 1802 comstop(struct tty *tp, int flag) 1803 { 1804 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1805 int s; 1806 1807 s = splserial(); 1808 COM_LOCK(sc); 1809 if (ISSET(tp->t_state, TS_BUSY)) { 1810 /* Stop transmitting at the next chunk. */ 1811 sc->sc_tbc = 0; 1812 sc->sc_heldtbc = 0; 1813 if (!ISSET(tp->t_state, TS_TTSTOP)) 1814 SET(tp->t_state, TS_FLUSH); 1815 } 1816 COM_UNLOCK(sc); 1817 splx(s); 1818 } 1819 1820 void 1821 comdiag(void *arg) 1822 { 1823 struct com_softc *sc = arg; 1824 int overflows, floods; 1825 int s; 1826 1827 s = splserial(); 1828 COM_LOCK(sc); 1829 overflows = sc->sc_overflows; 1830 sc->sc_overflows = 0; 1831 floods = sc->sc_floods; 1832 sc->sc_floods = 0; 1833 sc->sc_errors = 0; 1834 COM_UNLOCK(sc); 1835 splx(s); 1836 1837 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1838 sc->sc_dev.dv_xname, 1839 overflows, overflows == 1 ? "" : "s", 1840 floods, floods == 1 ? "" : "s"); 1841 } 1842 1843 integrate void 1844 com_rxsoft(struct com_softc *sc, struct tty *tp) 1845 { 1846 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1847 u_char *get, *end; 1848 u_int cc, scc; 1849 u_char lsr; 1850 int code; 1851 int s; 1852 1853 end = sc->sc_ebuf; 1854 get = sc->sc_rbget; 1855 scc = cc = com_rbuf_size - sc->sc_rbavail; 1856 1857 if (cc == com_rbuf_size) { 1858 sc->sc_floods++; 1859 if (sc->sc_errors++ == 0) 1860 callout_reset(&sc->sc_diag_callout, 60 * hz, 1861 comdiag, sc); 1862 } 1863 1864 /* If not yet open, drop the entire buffer content here */ 1865 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1866 get += cc << 1; 1867 if (get >= end) 1868 get -= com_rbuf_size << 1; 1869 cc = 0; 1870 } 1871 while (cc) { 1872 code = get[0]; 1873 lsr = get[1]; 1874 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1875 if (ISSET(lsr, LSR_OE)) { 1876 sc->sc_overflows++; 1877 if (sc->sc_errors++ == 0) 1878 callout_reset(&sc->sc_diag_callout, 1879 60 * hz, comdiag, sc); 1880 } 1881 if (ISSET(lsr, LSR_BI | LSR_FE)) 1882 SET(code, TTY_FE); 1883 if (ISSET(lsr, LSR_PE)) 1884 SET(code, TTY_PE); 1885 } 1886 if ((*rint)(code, tp) == -1) { 1887 /* 1888 * The line discipline's buffer is out of space. 1889 */ 1890 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1891 /* 1892 * We're either not using flow control, or the 1893 * line discipline didn't tell us to block for 1894 * some reason. Either way, we have no way to 1895 * know when there's more space available, so 1896 * just drop the rest of the data. 1897 */ 1898 get += cc << 1; 1899 if (get >= end) 1900 get -= com_rbuf_size << 1; 1901 cc = 0; 1902 } else { 1903 /* 1904 * Don't schedule any more receive processing 1905 * until the line discipline tells us there's 1906 * space available (through comhwiflow()). 1907 * Leave the rest of the data in the input 1908 * buffer. 1909 */ 1910 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1911 } 1912 break; 1913 } 1914 get += 2; 1915 if (get >= end) 1916 get = sc->sc_rbuf; 1917 cc--; 1918 } 1919 1920 if (cc != scc) { 1921 sc->sc_rbget = get; 1922 s = splserial(); 1923 COM_LOCK(sc); 1924 1925 cc = sc->sc_rbavail += scc - cc; 1926 /* Buffers should be ok again, release possible block. */ 1927 if (cc >= sc->sc_r_lowat) { 1928 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1929 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1930 SET(sc->sc_ier, IER_ERXRDY); 1931 #ifdef COM_PXA2X0 1932 if (sc->sc_type == COM_TYPE_PXA2x0) 1933 SET(sc->sc_ier, IER_ERXTOUT); 1934 #endif 1935 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1936 com_ier, sc->sc_ier); 1937 } 1938 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1939 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1940 com_hwiflow(sc); 1941 } 1942 } 1943 COM_UNLOCK(sc); 1944 splx(s); 1945 } 1946 } 1947 1948 integrate void 1949 com_txsoft(struct com_softc *sc, struct tty *tp) 1950 { 1951 1952 CLR(tp->t_state, TS_BUSY); 1953 if (ISSET(tp->t_state, TS_FLUSH)) 1954 CLR(tp->t_state, TS_FLUSH); 1955 else 1956 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1957 (*tp->t_linesw->l_start)(tp); 1958 } 1959 1960 integrate void 1961 com_stsoft(struct com_softc *sc, struct tty *tp) 1962 { 1963 u_char msr, delta; 1964 int s; 1965 1966 s = splserial(); 1967 COM_LOCK(sc); 1968 msr = sc->sc_msr; 1969 delta = sc->sc_msr_delta; 1970 sc->sc_msr_delta = 0; 1971 COM_UNLOCK(sc); 1972 splx(s); 1973 1974 if (ISSET(delta, sc->sc_msr_dcd)) { 1975 /* 1976 * Inform the tty layer that carrier detect changed. 1977 */ 1978 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1979 } 1980 1981 if (ISSET(delta, sc->sc_msr_cts)) { 1982 /* Block or unblock output according to flow control. */ 1983 if (ISSET(msr, sc->sc_msr_cts)) { 1984 sc->sc_tx_stopped = 0; 1985 (*tp->t_linesw->l_start)(tp); 1986 } else { 1987 sc->sc_tx_stopped = 1; 1988 } 1989 } 1990 1991 #ifdef COM_DEBUG 1992 if (com_debug) 1993 comstatus(sc, "com_stsoft"); 1994 #endif 1995 } 1996 1997 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1998 void 1999 comsoft(void *arg) 2000 { 2001 struct com_softc *sc = arg; 2002 struct tty *tp; 2003 2004 if (COM_ISALIVE(sc) == 0) 2005 return; 2006 2007 { 2008 #else 2009 void 2010 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2011 comsoft(void) 2012 #else 2013 comsoft(void *arg) 2014 #endif 2015 { 2016 struct com_softc *sc; 2017 struct tty *tp; 2018 int unit; 2019 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2020 int s; 2021 2022 s = splsoftserial(); 2023 com_softintr_scheduled = 0; 2024 #endif 2025 2026 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 2027 sc = device_lookup(&com_cd, unit); 2028 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 2029 continue; 2030 2031 if (COM_ISALIVE(sc) == 0) 2032 continue; 2033 2034 tp = sc->sc_tty; 2035 if (tp == NULL) 2036 continue; 2037 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2038 continue; 2039 #endif 2040 tp = sc->sc_tty; 2041 2042 if (sc->sc_rx_ready) { 2043 sc->sc_rx_ready = 0; 2044 com_rxsoft(sc, tp); 2045 } 2046 2047 if (sc->sc_st_check) { 2048 sc->sc_st_check = 0; 2049 com_stsoft(sc, tp); 2050 } 2051 2052 if (sc->sc_tx_done) { 2053 sc->sc_tx_done = 0; 2054 com_txsoft(sc, tp); 2055 } 2056 } 2057 2058 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2059 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2060 splx(s); 2061 #endif 2062 #endif 2063 } 2064 2065 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2066 /* there has got to be a better way to do comsoft() */ 2067 }} 2068 #endif 2069 2070 int 2071 comintr(void *arg) 2072 { 2073 struct com_softc *sc = arg; 2074 bus_space_tag_t iot = sc->sc_iot; 2075 bus_space_handle_t ioh = sc->sc_ioh; 2076 u_char *put, *end; 2077 u_int cc; 2078 u_char lsr, iir; 2079 2080 if (COM_ISALIVE(sc) == 0) 2081 return (0); 2082 2083 COM_LOCK(sc); 2084 iir = bus_space_read_1(iot, ioh, com_iir); 2085 if (ISSET(iir, IIR_NOPEND)) { 2086 COM_UNLOCK(sc); 2087 return (0); 2088 } 2089 2090 end = sc->sc_ebuf; 2091 put = sc->sc_rbput; 2092 cc = sc->sc_rbavail; 2093 2094 again: do { 2095 u_char msr, delta; 2096 2097 lsr = bus_space_read_1(iot, ioh, com_lsr); 2098 if (ISSET(lsr, LSR_BI)) { 2099 int cn_trapped = 0; 2100 2101 cn_check_magic(sc->sc_tty->t_dev, 2102 CNC_BREAK, com_cnm_state); 2103 if (cn_trapped) 2104 continue; 2105 #if defined(KGDB) && !defined(DDB) 2106 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2107 kgdb_connect(1); 2108 continue; 2109 } 2110 #endif 2111 } 2112 2113 if (ISSET(lsr, LSR_RCV_MASK) && 2114 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2115 while (cc > 0) { 2116 int cn_trapped = 0; 2117 put[0] = bus_space_read_1(iot, ioh, com_data); 2118 put[1] = lsr; 2119 cn_check_magic(sc->sc_tty->t_dev, 2120 put[0], com_cnm_state); 2121 if (cn_trapped) 2122 goto next; 2123 put += 2; 2124 if (put >= end) 2125 put = sc->sc_rbuf; 2126 cc--; 2127 next: 2128 lsr = bus_space_read_1(iot, ioh, com_lsr); 2129 if (!ISSET(lsr, LSR_RCV_MASK)) 2130 break; 2131 } 2132 2133 /* 2134 * Current string of incoming characters ended because 2135 * no more data was available or we ran out of space. 2136 * Schedule a receive event if any data was received. 2137 * If we're out of space, turn off receive interrupts. 2138 */ 2139 sc->sc_rbput = put; 2140 sc->sc_rbavail = cc; 2141 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2142 sc->sc_rx_ready = 1; 2143 2144 /* 2145 * See if we are in danger of overflowing a buffer. If 2146 * so, use hardware flow control to ease the pressure. 2147 */ 2148 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2149 cc < sc->sc_r_hiwat) { 2150 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2151 com_hwiflow(sc); 2152 } 2153 2154 /* 2155 * If we're out of space, disable receive interrupts 2156 * until the queue has drained a bit. 2157 */ 2158 if (!cc) { 2159 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2160 #ifdef COM_PXA2X0 2161 if (sc->sc_type == COM_TYPE_PXA2x0) 2162 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 2163 else 2164 #endif 2165 CLR(sc->sc_ier, IER_ERXRDY); 2166 bus_space_write_1(iot, ioh, com_ier, 2167 sc->sc_ier); 2168 } 2169 } else { 2170 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 2171 (void) bus_space_read_1(iot, ioh, com_data); 2172 continue; 2173 } 2174 } 2175 2176 msr = bus_space_read_1(iot, ioh, com_msr); 2177 delta = msr ^ sc->sc_msr; 2178 sc->sc_msr = msr; 2179 #ifdef __HAVE_TIMECOUNTER 2180 if ((sc->sc_pps_state.ppsparam.mode & PPS_CAPTUREBOTH) && 2181 (delta & MSR_DCD)) { 2182 pps_capture(&sc->sc_pps_state); 2183 pps_event(&sc->sc_pps_state, 2184 (msr & MSR_DCD) ? 2185 PPS_CAPTUREASSERT : 2186 PPS_CAPTURECLEAR); 2187 } 2188 #else /* !__HAVE_TIMECOUNTER */ 2189 /* 2190 * Pulse-per-second (PSS) signals on edge of DCD? 2191 * Process these even if line discipline is ignoring DCD. 2192 */ 2193 if (delta & sc->sc_ppsmask) { 2194 struct timeval tv; 2195 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2196 /* XXX nanotime() */ 2197 microtime(&tv); 2198 TIMEVAL_TO_TIMESPEC(&tv, 2199 &sc->ppsinfo.assert_timestamp); 2200 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2201 timespecadd(&sc->ppsinfo.assert_timestamp, 2202 &sc->ppsparam.assert_offset, 2203 &sc->ppsinfo.assert_timestamp); 2204 } 2205 2206 #ifdef PPS_SYNC 2207 if (pps_kc_hardpps_source == sc && 2208 pps_kc_hardpps_mode & PPS_CAPTUREASSERT) { 2209 hardpps(&tv, tv.tv_usec); 2210 } 2211 #endif 2212 sc->ppsinfo.assert_sequence++; 2213 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2214 2215 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2216 /* XXX nanotime() */ 2217 microtime(&tv); 2218 TIMEVAL_TO_TIMESPEC(&tv, 2219 &sc->ppsinfo.clear_timestamp); 2220 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2221 timespecadd(&sc->ppsinfo.clear_timestamp, 2222 &sc->ppsparam.clear_offset, 2223 &sc->ppsinfo.clear_timestamp); 2224 } 2225 2226 #ifdef PPS_SYNC 2227 if (pps_kc_hardpps_source == sc && 2228 pps_kc_hardpps_mode & PPS_CAPTURECLEAR) { 2229 hardpps(&tv, tv.tv_usec); 2230 } 2231 #endif 2232 sc->ppsinfo.clear_sequence++; 2233 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2234 } 2235 } 2236 #endif /* !__HAVE_TIMECOUNTER */ 2237 2238 /* 2239 * Process normal status changes 2240 */ 2241 if (ISSET(delta, sc->sc_msr_mask)) { 2242 SET(sc->sc_msr_delta, delta); 2243 2244 /* 2245 * Stop output immediately if we lose the output 2246 * flow control signal or carrier detect. 2247 */ 2248 if (ISSET(~msr, sc->sc_msr_mask)) { 2249 sc->sc_tbc = 0; 2250 sc->sc_heldtbc = 0; 2251 #ifdef COM_DEBUG 2252 if (com_debug) 2253 comstatus(sc, "comintr "); 2254 #endif 2255 } 2256 2257 sc->sc_st_check = 1; 2258 } 2259 } while (!ISSET((iir = 2260 bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND) && 2261 /* 2262 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 2263 * by IIR read, so we can't do this way: `process all interrupts, 2264 * then do TX if possble'. 2265 */ 2266 (iir & IIR_IMASK) != IIR_TXRDY); 2267 2268 /* 2269 * Read LSR again, since there may be an interrupt between 2270 * the last LSR read and IIR read above. 2271 */ 2272 lsr = bus_space_read_1(iot, ioh, com_lsr); 2273 2274 /* 2275 * See if data can be transmitted as well. 2276 * Schedule tx done event if no data left 2277 * and tty was marked busy. 2278 */ 2279 if (ISSET(lsr, LSR_TXRDY)) { 2280 /* 2281 * If we've delayed a parameter change, do it now, and restart 2282 * output. 2283 */ 2284 if (sc->sc_heldchange) { 2285 com_loadchannelregs(sc); 2286 sc->sc_heldchange = 0; 2287 sc->sc_tbc = sc->sc_heldtbc; 2288 sc->sc_heldtbc = 0; 2289 } 2290 2291 /* Output the next chunk of the contiguous buffer, if any. */ 2292 if (sc->sc_tbc > 0) { 2293 u_int n; 2294 2295 n = sc->sc_tbc; 2296 if (n > sc->sc_fifolen) 2297 n = sc->sc_fifolen; 2298 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2299 sc->sc_tbc -= n; 2300 sc->sc_tba += n; 2301 } else { 2302 /* Disable transmit completion interrupts if necessary. */ 2303 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2304 CLR(sc->sc_ier, IER_ETXRDY); 2305 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2306 } 2307 if (sc->sc_tx_busy) { 2308 sc->sc_tx_busy = 0; 2309 sc->sc_tx_done = 1; 2310 } 2311 } 2312 } 2313 2314 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2315 goto again; 2316 2317 COM_UNLOCK(sc); 2318 2319 /* Wake up the poller. */ 2320 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2321 softintr_schedule(sc->sc_si); 2322 #else 2323 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2324 setsoftserial(); 2325 #else 2326 if (!com_softintr_scheduled) { 2327 com_softintr_scheduled = 1; 2328 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2329 } 2330 #endif 2331 #endif 2332 2333 #if NRND > 0 && defined(RND_COM) 2334 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2335 #endif 2336 2337 return (1); 2338 } 2339 2340 /* 2341 * The following functions are polled getc and putc routines, shared 2342 * by the console and kgdb glue. 2343 * 2344 * The read-ahead code is so that you can detect pending in-band 2345 * cn_magic in polled mode while doing output rather than having to 2346 * wait until the kernel decides it needs input. 2347 */ 2348 2349 #define MAX_READAHEAD 20 2350 static int com_readahead[MAX_READAHEAD]; 2351 static int com_readaheadcount = 0; 2352 2353 int 2354 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2355 { 2356 int s = splserial(); 2357 u_char stat, c; 2358 2359 /* got a character from reading things earlier */ 2360 if (com_readaheadcount > 0) { 2361 int i; 2362 2363 c = com_readahead[0]; 2364 for (i = 1; i < com_readaheadcount; i++) { 2365 com_readahead[i-1] = com_readahead[i]; 2366 } 2367 com_readaheadcount--; 2368 splx(s); 2369 return (c); 2370 } 2371 2372 /* block until a character becomes available */ 2373 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2374 ; 2375 2376 c = bus_space_read_1(iot, ioh, com_data); 2377 stat = bus_space_read_1(iot, ioh, com_iir); 2378 { 2379 int cn_trapped = 0; /* unused */ 2380 #ifdef DDB 2381 extern int db_active; 2382 if (!db_active) 2383 #endif 2384 cn_check_magic(dev, c, com_cnm_state); 2385 } 2386 splx(s); 2387 return (c); 2388 } 2389 2390 void 2391 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2392 { 2393 int s = splserial(); 2394 int cin, stat, timo; 2395 2396 if (com_readaheadcount < MAX_READAHEAD 2397 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2398 int cn_trapped = 0; 2399 cin = bus_space_read_1(iot, ioh, com_data); 2400 stat = bus_space_read_1(iot, ioh, com_iir); 2401 cn_check_magic(dev, cin, com_cnm_state); 2402 com_readahead[com_readaheadcount++] = cin; 2403 } 2404 2405 /* wait for any pending transmission to finish */ 2406 timo = 150000; 2407 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2408 continue; 2409 2410 bus_space_write_1(iot, ioh, com_data, c); 2411 COM_BARRIER(iot, ioh, BR | BW); 2412 2413 splx(s); 2414 } 2415 2416 /* 2417 * Initialize UART for use as console or KGDB line. 2418 */ 2419 int 2420 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2421 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2422 { 2423 bus_space_handle_t ioh; 2424 2425 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2426 return (ENOMEM); /* ??? */ 2427 2428 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2429 bus_space_write_1(iot, ioh, com_efr, 0); 2430 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2431 rate = comspeed(rate, frequency, type); 2432 bus_space_write_1(iot, ioh, com_dlbl, rate); 2433 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2434 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2435 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2436 bus_space_write_1(iot, ioh, com_fifo, 2437 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2438 #ifdef COM_PXA2X0 2439 if (type == COM_TYPE_PXA2x0) 2440 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 2441 else 2442 #endif 2443 bus_space_write_1(iot, ioh, com_ier, 0); 2444 2445 *iohp = ioh; 2446 return (0); 2447 } 2448 2449 /* 2450 * Following are all routines needed for COM to act as console 2451 */ 2452 struct consdev comcons = { 2453 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2454 NODEV, CN_NORMAL 2455 }; 2456 2457 2458 int 2459 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2460 int type, tcflag_t cflag) 2461 { 2462 int res; 2463 2464 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2465 if (res) 2466 return (res); 2467 2468 cn_tab = &comcons; 2469 cn_init_magic(&com_cnm_state); 2470 cn_set_magic("\047\001"); /* default magic is BREAK */ 2471 2472 comconstag = iot; 2473 comconsaddr = iobase; 2474 comconsrate = rate; 2475 comconscflag = cflag; 2476 2477 return (0); 2478 } 2479 2480 int 2481 comcngetc(dev_t dev) 2482 { 2483 2484 return (com_common_getc(dev, comconstag, comconsioh)); 2485 } 2486 2487 /* 2488 * Console kernel output character routine. 2489 */ 2490 void 2491 comcnputc(dev_t dev, int c) 2492 { 2493 2494 com_common_putc(dev, comconstag, comconsioh, c); 2495 } 2496 2497 void 2498 comcnpollc(dev_t dev, int on) 2499 { 2500 2501 } 2502 2503 #ifdef KGDB 2504 int 2505 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2506 int frequency, int type, tcflag_t cflag) 2507 { 2508 int res; 2509 2510 if (iot == comconstag && iobase == comconsaddr) { 2511 #if !defined(DDB) 2512 return (EBUSY); /* cannot share with console */ 2513 #else 2514 com_kgdb_ioh = comconsioh; 2515 #endif 2516 } else { 2517 res = cominit(iot, iobase, rate, frequency, type, cflag, 2518 &com_kgdb_ioh); 2519 if (res) 2520 return (res); 2521 2522 /* 2523 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2524 * expects this to be initialized 2525 */ 2526 cn_init_magic(&com_cnm_state); 2527 cn_set_magic("\047\001"); 2528 } 2529 2530 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2531 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2532 2533 com_kgdb_iot = iot; 2534 com_kgdb_addr = iobase; 2535 2536 return (0); 2537 } 2538 2539 /* ARGSUSED */ 2540 int 2541 com_kgdb_getc(void *arg) 2542 { 2543 2544 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2545 } 2546 2547 /* ARGSUSED */ 2548 void 2549 com_kgdb_putc(void *arg, int c) 2550 { 2551 2552 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2553 } 2554 #endif /* KGDB */ 2555 2556 /* helper function to identify the com ports used by 2557 console or KGDB (and not yet autoconf attached) */ 2558 int 2559 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2560 { 2561 bus_space_handle_t help; 2562 2563 if (!comconsattached && 2564 iot == comconstag && iobase == comconsaddr) 2565 help = comconsioh; 2566 #ifdef KGDB 2567 else if (!com_kgdb_attached && 2568 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2569 help = com_kgdb_ioh; 2570 #endif 2571 else 2572 return (0); 2573 2574 if (ioh) 2575 *ioh = help; 2576 return (1); 2577 } 2578
Indexes created Thu Oct 23 22:10:10 GMT 2025