com.c revision 1.241.4.1
1 /* $NetBSD: com.c,v 1.241.4.1 2006/03/08 01:44:48 elad Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.241.4.1 2006/03/08 01:44:48 elad Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 #include <sys/kauth.h> 125 126 #include <machine/intr.h> 127 #include <machine/bus.h> 128 129 #include <dev/ic/comreg.h> 130 #include <dev/ic/comvar.h> 131 #include <dev/ic/ns16550reg.h> 132 #include <dev/ic/st16650reg.h> 133 #ifdef COM_HAYESP 134 #include <dev/ic/hayespreg.h> 135 #endif 136 #define com_lcr com_cfcr 137 #include <dev/cons.h> 138 139 #ifdef COM_HAYESP 140 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 141 #endif 142 143 static void com_enable_debugport(struct com_softc *); 144 145 void com_config(struct com_softc *); 146 void com_shutdown(struct com_softc *); 147 int comspeed(long, long, int); 148 static u_char cflag2lcr(tcflag_t); 149 int comparam(struct tty *, struct termios *); 150 void comstart(struct tty *); 151 int comhwiflow(struct tty *, int); 152 153 void com_loadchannelregs(struct com_softc *); 154 void com_hwiflow(struct com_softc *); 155 void com_break(struct com_softc *, int); 156 void com_modem(struct com_softc *, int); 157 void tiocm_to_com(struct com_softc *, u_long, int); 158 int com_to_tiocm(struct com_softc *); 159 void com_iflush(struct com_softc *); 160 161 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 162 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 163 164 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 165 bus_space_handle_t *); 166 167 int comcngetc(dev_t); 168 void comcnputc(dev_t, int); 169 void comcnpollc(dev_t, int); 170 171 #define integrate static inline 172 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 173 void comsoft(void *); 174 #else 175 #ifndef __NO_SOFT_SERIAL_INTERRUPT 176 void comsoft(void); 177 #else 178 void comsoft(void *); 179 static struct callout comsoft_callout = CALLOUT_INITIALIZER; 180 #endif 181 #endif 182 integrate void com_rxsoft(struct com_softc *, struct tty *); 183 integrate void com_txsoft(struct com_softc *, struct tty *); 184 integrate void com_stsoft(struct com_softc *, struct tty *); 185 integrate void com_schedrx(struct com_softc *); 186 void comdiag(void *); 187 188 extern struct cfdriver com_cd; 189 190 dev_type_open(comopen); 191 dev_type_close(comclose); 192 dev_type_read(comread); 193 dev_type_write(comwrite); 194 dev_type_ioctl(comioctl); 195 dev_type_stop(comstop); 196 dev_type_tty(comtty); 197 dev_type_poll(compoll); 198 199 const struct cdevsw com_cdevsw = { 200 comopen, comclose, comread, comwrite, comioctl, 201 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 202 }; 203 204 /* 205 * Make this an option variable one can patch. 206 * But be warned: this must be a power of 2! 207 */ 208 u_int com_rbuf_size = COM_RING_SIZE; 209 210 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 211 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 212 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 213 214 static bus_addr_t comconsaddr; 215 static bus_space_tag_t comconstag; 216 static bus_space_handle_t comconsioh; 217 static int comconsattached; 218 static int comconsrate; 219 static tcflag_t comconscflag; 220 static struct cnm_state com_cnm_state; 221 222 static int ppscap = 223 PPS_TSFMT_TSPEC | 224 PPS_CAPTUREASSERT | 225 PPS_CAPTURECLEAR | 226 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 227 228 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 229 #ifdef __NO_SOFT_SERIAL_INTERRUPT 230 volatile int com_softintr_scheduled; 231 #endif 232 #endif 233 234 #ifdef KGDB 235 #include <sys/kgdb.h> 236 237 static bus_addr_t com_kgdb_addr; 238 static bus_space_tag_t com_kgdb_iot; 239 static bus_space_handle_t com_kgdb_ioh; 240 static int com_kgdb_attached; 241 242 int com_kgdb_getc(void *); 243 void com_kgdb_putc(void *, int); 244 #endif /* KGDB */ 245 246 #define COMUNIT_MASK 0x7ffff 247 #define COMDIALOUT_MASK 0x80000 248 249 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 250 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 251 252 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 253 device_is_active(&(sc)->sc_dev)) 254 255 #define BR BUS_SPACE_BARRIER_READ 256 #define BW BUS_SPACE_BARRIER_WRITE 257 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 258 259 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 260 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 261 262 /*ARGSUSED*/ 263 int 264 comspeed(long speed, long frequency, int type) 265 { 266 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 267 268 int x, err; 269 270 #if 0 271 if (speed == 0) 272 return (0); 273 #endif 274 if (speed <= 0) 275 return (-1); 276 x = divrnd(frequency / 16, speed); 277 if (x <= 0) 278 return (-1); 279 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 280 if (err < 0) 281 err = -err; 282 if (err > COM_TOLERANCE) 283 return (-1); 284 return (x); 285 286 #undef divrnd 287 } 288 289 #ifdef COM_DEBUG 290 int com_debug = 0; 291 292 void comstatus(struct com_softc *, const char *); 293 void 294 comstatus(struct com_softc *sc, const char *str) 295 { 296 struct tty *tp = sc->sc_tty; 297 298 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 299 sc->sc_dev.dv_xname, str, 300 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 301 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 302 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 303 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 304 sc->sc_tx_stopped ? '+' : '-'); 305 306 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 307 sc->sc_dev.dv_xname, str, 308 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 309 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 310 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 311 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 312 sc->sc_rx_flags); 313 } 314 #endif 315 316 int 317 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 318 { 319 320 /* force access to id reg */ 321 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 322 bus_space_write_1(iot, ioh, com_iir, 0); 323 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 324 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 325 return (0); 326 327 return (1); 328 } 329 330 #ifdef COM_HAYESP 331 int 332 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 333 { 334 char val, dips; 335 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 336 bus_space_tag_t iot = sc->sc_iot; 337 338 /* 339 * Hayes ESP cards have two iobases. One is for compatibility with 340 * 16550 serial chips, and at the same ISA PC base addresses. The 341 * other is for ESP-specific enhanced features, and lies at a 342 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 343 */ 344 345 /* Test for ESP signature */ 346 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 347 return (0); 348 349 /* 350 * ESP is present at ESP enhanced base address; unknown com port 351 */ 352 353 /* Get the dip-switch configurations */ 354 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 355 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 356 357 /* Determine which com port this ESP card services: bits 0,1 of */ 358 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 359 if (sc->sc_iobase != combaselist[dips & 0x03]) 360 return (0); 361 362 printf(": ESP"); 363 364 /* Check ESP Self Test bits. */ 365 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 366 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 367 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 368 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 369 if ((val & 0x70) < 0x20) { 370 printf("-old (%o)", val & 0x70); 371 /* we do not support the necessary features */ 372 return (0); 373 } 374 375 /* Check for ability to emulate 16550: bit 8 == 1 */ 376 if ((dips & 0x80) == 0) { 377 printf(" slave"); 378 /* XXX Does slave really mean no 16550 support?? */ 379 return (0); 380 } 381 382 /* 383 * If we made it this far, we are a full-featured ESP v2.0 (or 384 * better), at the correct com port address. 385 */ 386 387 sc->sc_type = COM_TYPE_HAYESP; 388 printf(", 1024 byte fifo\n"); 389 return (1); 390 } 391 #endif 392 393 static void 394 com_enable_debugport(struct com_softc *sc) 395 { 396 int s; 397 398 /* Turn on line break interrupt, set carrier. */ 399 s = splserial(); 400 COM_LOCK(sc); 401 sc->sc_ier = IER_ERXRDY; 402 #ifdef COM_PXA2X0 403 if (sc->sc_type == COM_TYPE_PXA2x0) 404 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 405 #endif 406 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 407 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 408 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 409 COM_UNLOCK(sc); 410 splx(s); 411 } 412 413 void 414 com_attach_subr(struct com_softc *sc) 415 { 416 bus_addr_t iobase = sc->sc_iobase; 417 bus_space_tag_t iot = sc->sc_iot; 418 bus_space_handle_t ioh = sc->sc_ioh; 419 struct tty *tp; 420 #ifdef COM_16650 421 u_int8_t lcr; 422 #endif 423 #ifdef COM_HAYESP 424 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 425 int *hayespp; 426 #endif 427 const char *fifo_msg = NULL; 428 429 callout_init(&sc->sc_diag_callout); 430 simple_lock_init(&sc->sc_lock); 431 432 /* Disable interrupts before configuring the device. */ 433 #ifdef COM_PXA2X0 434 if (sc->sc_type == COM_TYPE_PXA2x0) 435 sc->sc_ier = IER_EUART; 436 else 437 #endif 438 sc->sc_ier = 0; 439 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 440 441 if (iot == comconstag && iobase == comconsaddr) { 442 comconsattached = 1; 443 444 /* Make sure the console is always "hardwired". */ 445 delay(10000); /* wait for output to finish */ 446 SET(sc->sc_hwflags, COM_HW_CONSOLE); 447 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 448 } 449 450 #ifdef COM_HAYESP 451 sc->sc_prescaler = 0; /* set prescaler to x1. */ 452 453 /* Look for a Hayes ESP board. */ 454 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 455 bus_space_handle_t hayespioh; 456 457 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 458 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 459 continue; 460 if (comprobeHAYESP(hayespioh, sc)) { 461 sc->sc_hayespioh = hayespioh; 462 sc->sc_fifolen = 1024; 463 464 break; 465 } 466 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 467 } 468 /* No ESP; look for other things. */ 469 if (sc->sc_type != COM_TYPE_HAYESP) { 470 #endif 471 sc->sc_fifolen = 1; 472 /* look for a NS 16550AF UART with FIFOs */ 473 bus_space_write_1(iot, ioh, com_fifo, 474 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 475 delay(100); 476 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 477 == IIR_FIFO_MASK) 478 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 479 == FIFO_TRIGGER_14) { 480 SET(sc->sc_hwflags, COM_HW_FIFO); 481 482 #ifdef COM_16650 483 /* 484 * IIR changes into the EFR if LCR is set to LCR_EERS 485 * on 16650s. We also know IIR != 0 at this point. 486 * Write 0 into the EFR, and read it. If the result 487 * is 0, we have a 16650. 488 * 489 * Older 16650s were broken; the test to detect them 490 * is taken from the Linux driver. Apparently 491 * setting DLAB enable gives access to the EFR on 492 * these chips. 493 */ 494 lcr = bus_space_read_1(iot, ioh, com_lcr); 495 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 496 bus_space_write_1(iot, ioh, com_efr, 0); 497 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 498 bus_space_write_1(iot, ioh, com_lcr, 499 lcr | LCR_DLAB); 500 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 501 CLR(sc->sc_hwflags, COM_HW_FIFO); 502 sc->sc_fifolen = 0; 503 } else { 504 SET(sc->sc_hwflags, COM_HW_FLOW); 505 sc->sc_fifolen = 32; 506 } 507 } else 508 #endif 509 sc->sc_fifolen = 16; 510 511 #ifdef COM_16650 512 bus_space_write_1(iot, ioh, com_lcr, lcr); 513 if (sc->sc_fifolen == 0) 514 fifo_msg = "st16650, broken fifo"; 515 else if (sc->sc_fifolen == 32) 516 fifo_msg = "st16650a, working fifo"; 517 else 518 #endif 519 fifo_msg = "ns16550a, working fifo"; 520 } else 521 fifo_msg = "ns16550, broken fifo"; 522 else 523 fifo_msg = "ns8250 or ns16450, no fifo"; 524 bus_space_write_1(iot, ioh, com_fifo, 0); 525 /* 526 * Some chips will clear down both Tx and Rx FIFOs when zero is 527 * written to com_fifo. If this chip is the console, writing zero 528 * results in some of the chip/FIFO description being lost, so delay 529 * printing it until now. 530 */ 531 delay(10); 532 aprint_normal(": %s\n", fifo_msg); 533 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 534 sc->sc_fifolen = 1; 535 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 536 } 537 #ifdef COM_HAYESP 538 } 539 #endif 540 541 tp = ttymalloc(); 542 tp->t_oproc = comstart; 543 tp->t_param = comparam; 544 tp->t_hwiflow = comhwiflow; 545 546 sc->sc_tty = tp; 547 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 548 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 549 sc->sc_rbavail = com_rbuf_size; 550 if (sc->sc_rbuf == NULL) { 551 aprint_error("%s: unable to allocate ring buffer\n", 552 sc->sc_dev.dv_xname); 553 return; 554 } 555 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 556 557 tty_attach(tp); 558 559 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 560 SET(sc->sc_mcr, MCR_IENABLE); 561 562 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 563 int maj; 564 565 /* locate the major number */ 566 maj = cdevsw_lookup_major(&com_cdevsw); 567 568 tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 569 570 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 571 } 572 573 #ifdef KGDB 574 /* 575 * Allow kgdb to "take over" this port. If this is 576 * not the console and is the kgdb device, it has 577 * exclusive use. If it's the console _and_ the 578 * kgdb device, it doesn't. 579 */ 580 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 581 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 582 com_kgdb_attached = 1; 583 584 SET(sc->sc_hwflags, COM_HW_KGDB); 585 } 586 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 587 } 588 #endif 589 590 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 591 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 592 #endif 593 594 #if NRND > 0 && defined(RND_COM) 595 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 596 RND_TYPE_TTY, 0); 597 #endif 598 599 /* if there are no enable/disable functions, assume the device 600 is always enabled */ 601 if (!sc->enable) 602 sc->enabled = 1; 603 604 com_config(sc); 605 606 SET(sc->sc_hwflags, COM_HW_DEV_OK); 607 } 608 609 void 610 com_config(struct com_softc *sc) 611 { 612 bus_space_tag_t iot = sc->sc_iot; 613 bus_space_handle_t ioh = sc->sc_ioh; 614 615 /* Disable interrupts before configuring the device. */ 616 #ifdef COM_PXA2X0 617 if (sc->sc_type == COM_TYPE_PXA2x0) 618 sc->sc_ier = IER_EUART; 619 else 620 #endif 621 sc->sc_ier = 0; 622 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 623 (void) bus_space_read_1(iot, ioh, com_iir); 624 625 #ifdef COM_HAYESP 626 /* Look for a Hayes ESP board. */ 627 if (sc->sc_type == COM_TYPE_HAYESP) { 628 sc->sc_fifolen = 1024; 629 630 /* Set 16550 compatibility mode */ 631 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 632 HAYESP_SETMODE); 633 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 634 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 635 HAYESP_MODE_SCALE); 636 637 /* Set RTS/CTS flow control */ 638 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 639 HAYESP_SETFLOWTYPE); 640 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 641 HAYESP_FLOW_RTS); 642 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 643 HAYESP_FLOW_CTS); 644 645 /* Set flow control levels */ 646 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 647 HAYESP_SETRXFLOW); 648 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 649 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 650 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 651 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 652 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 653 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 654 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 655 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 656 } 657 #endif 658 659 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 660 com_enable_debugport(sc); 661 } 662 663 int 664 com_detach(struct device *self, int flags) 665 { 666 struct com_softc *sc = (struct com_softc *)self; 667 int maj, mn; 668 669 /* locate the major number */ 670 maj = cdevsw_lookup_major(&com_cdevsw); 671 672 /* Nuke the vnodes for any open instances. */ 673 mn = self->dv_unit; 674 vdevgone(maj, mn, mn, VCHR); 675 676 mn |= COMDIALOUT_MASK; 677 vdevgone(maj, mn, mn, VCHR); 678 679 if (sc->sc_rbuf == NULL) { 680 /* 681 * Ring buffer allocation failed in the com_attach_subr, 682 * only the tty is allocated, and nothing else. 683 */ 684 ttyfree(sc->sc_tty); 685 return 0; 686 } 687 688 /* Free the receive buffer. */ 689 free(sc->sc_rbuf, M_DEVBUF); 690 691 /* Detach and free the tty. */ 692 tty_detach(sc->sc_tty); 693 ttyfree(sc->sc_tty); 694 695 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 696 /* Unhook the soft interrupt handler. */ 697 softintr_disestablish(sc->sc_si); 698 #endif 699 700 #if NRND > 0 && defined(RND_COM) 701 /* Unhook the entropy source. */ 702 rnd_detach_source(&sc->rnd_source); 703 #endif 704 705 return (0); 706 } 707 708 int 709 com_activate(struct device *self, enum devact act) 710 { 711 struct com_softc *sc = (struct com_softc *)self; 712 int s, rv = 0; 713 714 s = splserial(); 715 COM_LOCK(sc); 716 switch (act) { 717 case DVACT_ACTIVATE: 718 rv = EOPNOTSUPP; 719 break; 720 721 case DVACT_DEACTIVATE: 722 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 723 rv = EBUSY; 724 break; 725 } 726 727 if (sc->disable != NULL && sc->enabled != 0) { 728 (*sc->disable)(sc); 729 sc->enabled = 0; 730 } 731 break; 732 } 733 734 COM_UNLOCK(sc); 735 splx(s); 736 return (rv); 737 } 738 739 void 740 com_shutdown(struct com_softc *sc) 741 { 742 struct tty *tp = sc->sc_tty; 743 int s; 744 745 s = splserial(); 746 COM_LOCK(sc); 747 748 /* If we were asserting flow control, then deassert it. */ 749 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 750 com_hwiflow(sc); 751 752 /* Clear any break condition set with TIOCSBRK. */ 753 com_break(sc, 0); 754 755 /* Turn off PPS capture on last close. */ 756 sc->sc_ppsmask = 0; 757 sc->ppsparam.mode = 0; 758 759 /* 760 * Hang up if necessary. Wait a bit, so the other side has time to 761 * notice even if we immediately open the port again. 762 * Avoid tsleeping above splhigh(). 763 */ 764 if (ISSET(tp->t_cflag, HUPCL)) { 765 com_modem(sc, 0); 766 COM_UNLOCK(sc); 767 splx(s); 768 /* XXX tsleep will only timeout */ 769 (void) tsleep(sc, TTIPRI, ttclos, hz); 770 s = splserial(); 771 COM_LOCK(sc); 772 } 773 774 /* Turn off interrupts. */ 775 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 776 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 777 #ifdef COM_PXA2X0 778 if (sc->sc_type == COM_TYPE_PXA2x0) 779 sc->sc_ier |= IER_ERXTOUT; 780 #endif 781 } else 782 sc->sc_ier = 0; 783 784 #ifdef COM_PXA2X0 785 if (sc->sc_type == COM_TYPE_PXA2x0) 786 sc->sc_ier |= IER_EUART; 787 #endif 788 789 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 790 791 if (sc->disable) { 792 #ifdef DIAGNOSTIC 793 if (!sc->enabled) 794 panic("com_shutdown: not enabled?"); 795 #endif 796 (*sc->disable)(sc); 797 sc->enabled = 0; 798 } 799 COM_UNLOCK(sc); 800 splx(s); 801 } 802 803 int 804 comopen(dev_t dev, int flag, int mode, struct lwp *l) 805 { 806 struct com_softc *sc; 807 struct tty *tp; 808 int s, s2; 809 int error; 810 811 sc = device_lookup(&com_cd, COMUNIT(dev)); 812 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 813 sc->sc_rbuf == NULL) 814 return (ENXIO); 815 816 if (!device_is_active(&sc->sc_dev)) 817 return (ENXIO); 818 819 #ifdef KGDB 820 /* 821 * If this is the kgdb port, no other use is permitted. 822 */ 823 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 824 return (EBUSY); 825 #endif 826 827 tp = sc->sc_tty; 828 829 if (ISSET(tp->t_state, TS_ISOPEN) && 830 ISSET(tp->t_state, TS_XCLUDE) && 831 generic_authorize(l->l_proc->p_cred, 832 KAUTH_GENERIC_ISSUSER, 833 &l->l_proc->p_acflag) != 0) 834 return (EBUSY); 835 836 s = spltty(); 837 838 /* 839 * Do the following iff this is a first open. 840 */ 841 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 842 struct termios t; 843 844 tp->t_dev = dev; 845 846 s2 = splserial(); 847 COM_LOCK(sc); 848 849 if (sc->enable) { 850 if ((*sc->enable)(sc)) { 851 COM_UNLOCK(sc); 852 splx(s2); 853 splx(s); 854 printf("%s: device enable failed\n", 855 sc->sc_dev.dv_xname); 856 return (EIO); 857 } 858 sc->enabled = 1; 859 com_config(sc); 860 } 861 862 /* Turn on interrupts. */ 863 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 864 #ifdef COM_PXA2X0 865 if (sc->sc_type == COM_TYPE_PXA2x0) 866 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 867 #endif 868 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 869 870 /* Fetch the current modem control status, needed later. */ 871 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 872 873 /* Clear PPS capture state on first open. */ 874 sc->sc_ppsmask = 0; 875 sc->ppsparam.mode = 0; 876 877 COM_UNLOCK(sc); 878 splx(s2); 879 880 /* 881 * Initialize the termios status to the defaults. Add in the 882 * sticky bits from TIOCSFLAGS. 883 */ 884 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 885 t.c_ospeed = comconsrate; 886 t.c_cflag = comconscflag; 887 } else { 888 t.c_ospeed = TTYDEF_SPEED; 889 t.c_cflag = TTYDEF_CFLAG; 890 } 891 t.c_ispeed = t.c_ospeed; 892 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 893 SET(t.c_cflag, CLOCAL); 894 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 895 SET(t.c_cflag, CRTSCTS); 896 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 897 SET(t.c_cflag, MDMBUF); 898 /* Make sure comparam() will do something. */ 899 tp->t_ospeed = 0; 900 (void) comparam(tp, &t); 901 tp->t_iflag = TTYDEF_IFLAG; 902 tp->t_oflag = TTYDEF_OFLAG; 903 tp->t_lflag = TTYDEF_LFLAG; 904 ttychars(tp); 905 ttsetwater(tp); 906 907 s2 = splserial(); 908 COM_LOCK(sc); 909 910 /* 911 * Turn on DTR. We must always do this, even if carrier is not 912 * present, because otherwise we'd have to use TIOCSDTR 913 * immediately after setting CLOCAL, which applications do not 914 * expect. We always assert DTR while the device is open 915 * unless explicitly requested to deassert it. 916 */ 917 com_modem(sc, 1); 918 919 /* Clear the input ring, and unblock. */ 920 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 921 sc->sc_rbavail = com_rbuf_size; 922 com_iflush(sc); 923 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 924 com_hwiflow(sc); 925 926 #ifdef COM_DEBUG 927 if (com_debug) 928 comstatus(sc, "comopen "); 929 #endif 930 931 COM_UNLOCK(sc); 932 splx(s2); 933 } 934 935 splx(s); 936 937 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 938 if (error) 939 goto bad; 940 941 error = (*tp->t_linesw->l_open)(dev, tp); 942 if (error) 943 goto bad; 944 945 return (0); 946 947 bad: 948 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 949 /* 950 * We failed to open the device, and nobody else had it opened. 951 * Clean up the state as appropriate. 952 */ 953 com_shutdown(sc); 954 } 955 956 return (error); 957 } 958 959 int 960 comclose(dev_t dev, int flag, int mode, struct lwp *l) 961 { 962 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 963 struct tty *tp = sc->sc_tty; 964 965 /* XXX This is for cons.c. */ 966 if (!ISSET(tp->t_state, TS_ISOPEN)) 967 return (0); 968 969 (*tp->t_linesw->l_close)(tp, flag); 970 ttyclose(tp); 971 972 if (COM_ISALIVE(sc) == 0) 973 return (0); 974 975 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 976 /* 977 * Although we got a last close, the device may still be in 978 * use; e.g. if this was the dialout node, and there are still 979 * processes waiting for carrier on the non-dialout node. 980 */ 981 com_shutdown(sc); 982 } 983 984 return (0); 985 } 986 987 int 988 comread(dev_t dev, struct uio *uio, int flag) 989 { 990 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 991 struct tty *tp = sc->sc_tty; 992 993 if (COM_ISALIVE(sc) == 0) 994 return (EIO); 995 996 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 997 } 998 999 int 1000 comwrite(dev_t dev, struct uio *uio, int flag) 1001 { 1002 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1003 struct tty *tp = sc->sc_tty; 1004 1005 if (COM_ISALIVE(sc) == 0) 1006 return (EIO); 1007 1008 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1009 } 1010 1011 int 1012 compoll(dev_t dev, int events, struct lwp *l) 1013 { 1014 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1015 struct tty *tp = sc->sc_tty; 1016 1017 if (COM_ISALIVE(sc) == 0) 1018 return (POLLHUP); 1019 1020 return ((*tp->t_linesw->l_poll)(tp, events, l)); 1021 } 1022 1023 struct tty * 1024 comtty(dev_t dev) 1025 { 1026 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1027 struct tty *tp = sc->sc_tty; 1028 1029 return (tp); 1030 } 1031 1032 int 1033 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 1034 { 1035 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1036 struct tty *tp = sc->sc_tty; 1037 struct proc *p = l->l_proc; 1038 int error; 1039 int s; 1040 1041 if (COM_ISALIVE(sc) == 0) 1042 return (EIO); 1043 1044 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1045 if (error != EPASSTHROUGH) 1046 return (error); 1047 1048 error = ttioctl(tp, cmd, data, flag, l); 1049 if (error != EPASSTHROUGH) 1050 return (error); 1051 1052 error = 0; 1053 1054 s = splserial(); 1055 COM_LOCK(sc); 1056 1057 switch (cmd) { 1058 case TIOCSBRK: 1059 com_break(sc, 1); 1060 break; 1061 1062 case TIOCCBRK: 1063 com_break(sc, 0); 1064 break; 1065 1066 case TIOCSDTR: 1067 com_modem(sc, 1); 1068 break; 1069 1070 case TIOCCDTR: 1071 com_modem(sc, 0); 1072 break; 1073 1074 case TIOCGFLAGS: 1075 *(int *)data = sc->sc_swflags; 1076 break; 1077 1078 case TIOCSFLAGS: 1079 error = generic_authorize(p->p_cred, 1080 KAUTH_GENERIC_ISSUSER, 1081 &p->p_acflag); 1082 if (error) 1083 break; 1084 sc->sc_swflags = *(int *)data; 1085 break; 1086 1087 case TIOCMSET: 1088 case TIOCMBIS: 1089 case TIOCMBIC: 1090 tiocm_to_com(sc, cmd, *(int *)data); 1091 break; 1092 1093 case TIOCMGET: 1094 *(int *)data = com_to_tiocm(sc); 1095 break; 1096 1097 case PPS_IOC_CREATE: 1098 break; 1099 1100 case PPS_IOC_DESTROY: 1101 break; 1102 1103 case PPS_IOC_GETPARAMS: { 1104 pps_params_t *pp; 1105 pp = (pps_params_t *)data; 1106 *pp = sc->ppsparam; 1107 break; 1108 } 1109 1110 case PPS_IOC_SETPARAMS: { 1111 pps_params_t *pp; 1112 int mode; 1113 pp = (pps_params_t *)data; 1114 if (pp->mode & ~ppscap) { 1115 error = EINVAL; 1116 break; 1117 } 1118 sc->ppsparam = *pp; 1119 /* 1120 * Compute msr masks from user-specified timestamp state. 1121 */ 1122 mode = sc->ppsparam.mode; 1123 switch (mode & PPS_CAPTUREBOTH) { 1124 case 0: 1125 sc->sc_ppsmask = 0; 1126 break; 1127 1128 case PPS_CAPTUREASSERT: 1129 sc->sc_ppsmask = MSR_DCD; 1130 sc->sc_ppsassert = MSR_DCD; 1131 sc->sc_ppsclear = -1; 1132 break; 1133 1134 case PPS_CAPTURECLEAR: 1135 sc->sc_ppsmask = MSR_DCD; 1136 sc->sc_ppsassert = -1; 1137 sc->sc_ppsclear = 0; 1138 break; 1139 1140 case PPS_CAPTUREBOTH: 1141 sc->sc_ppsmask = MSR_DCD; 1142 sc->sc_ppsassert = MSR_DCD; 1143 sc->sc_ppsclear = 0; 1144 break; 1145 1146 default: 1147 error = EINVAL; 1148 break; 1149 } 1150 break; 1151 } 1152 1153 case PPS_IOC_GETCAP: 1154 *(int*)data = ppscap; 1155 break; 1156 1157 case PPS_IOC_FETCH: { 1158 pps_info_t *pi; 1159 pi = (pps_info_t *)data; 1160 *pi = sc->ppsinfo; 1161 break; 1162 } 1163 1164 #ifdef PPS_SYNC 1165 case PPS_IOC_KCBIND: { 1166 int edge = (*(int *)data) & PPS_CAPTUREBOTH; 1167 1168 if (edge == 0) { 1169 /* 1170 * remove binding for this source; ignore 1171 * the request if this is not the current 1172 * hardpps source 1173 */ 1174 if (pps_kc_hardpps_source == sc) { 1175 pps_kc_hardpps_source = NULL; 1176 pps_kc_hardpps_mode = 0; 1177 } 1178 } else { 1179 /* 1180 * bind hardpps to this source, replacing any 1181 * previously specified source or edges 1182 */ 1183 pps_kc_hardpps_source = sc; 1184 pps_kc_hardpps_mode = edge; 1185 } 1186 break; 1187 } 1188 #endif /* PPS_SYNC */ 1189 1190 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1191 /* 1192 * Some GPS clocks models use the falling rather than 1193 * rising edge as the on-the-second signal. 1194 * The old API has no way to specify PPS polarity. 1195 */ 1196 sc->sc_ppsmask = MSR_DCD; 1197 #ifndef PPS_TRAILING_EDGE 1198 sc->sc_ppsassert = MSR_DCD; 1199 sc->sc_ppsclear = -1; 1200 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1201 &sc->ppsinfo.assert_timestamp); 1202 #else 1203 sc->sc_ppsassert = -1; 1204 sc->sc_ppsclear = 0; 1205 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1206 &sc->ppsinfo.clear_timestamp); 1207 #endif 1208 break; 1209 1210 default: 1211 error = EPASSTHROUGH; 1212 break; 1213 } 1214 1215 COM_UNLOCK(sc); 1216 splx(s); 1217 1218 #ifdef COM_DEBUG 1219 if (com_debug) 1220 comstatus(sc, "comioctl "); 1221 #endif 1222 1223 return (error); 1224 } 1225 1226 integrate void 1227 com_schedrx(struct com_softc *sc) 1228 { 1229 1230 sc->sc_rx_ready = 1; 1231 1232 /* Wake up the poller. */ 1233 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1234 softintr_schedule(sc->sc_si); 1235 #else 1236 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1237 setsoftserial(); 1238 #else 1239 if (!com_softintr_scheduled) { 1240 com_softintr_scheduled = 1; 1241 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1242 } 1243 #endif 1244 #endif 1245 } 1246 1247 void 1248 com_break(struct com_softc *sc, int onoff) 1249 { 1250 1251 if (onoff) 1252 SET(sc->sc_lcr, LCR_SBREAK); 1253 else 1254 CLR(sc->sc_lcr, LCR_SBREAK); 1255 1256 if (!sc->sc_heldchange) { 1257 if (sc->sc_tx_busy) { 1258 sc->sc_heldtbc = sc->sc_tbc; 1259 sc->sc_tbc = 0; 1260 sc->sc_heldchange = 1; 1261 } else 1262 com_loadchannelregs(sc); 1263 } 1264 } 1265 1266 void 1267 com_modem(struct com_softc *sc, int onoff) 1268 { 1269 1270 if (sc->sc_mcr_dtr == 0) 1271 return; 1272 1273 if (onoff) 1274 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1275 else 1276 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1277 1278 if (!sc->sc_heldchange) { 1279 if (sc->sc_tx_busy) { 1280 sc->sc_heldtbc = sc->sc_tbc; 1281 sc->sc_tbc = 0; 1282 sc->sc_heldchange = 1; 1283 } else 1284 com_loadchannelregs(sc); 1285 } 1286 } 1287 1288 void 1289 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1290 { 1291 u_char combits; 1292 1293 combits = 0; 1294 if (ISSET(ttybits, TIOCM_DTR)) 1295 SET(combits, MCR_DTR); 1296 if (ISSET(ttybits, TIOCM_RTS)) 1297 SET(combits, MCR_RTS); 1298 1299 switch (how) { 1300 case TIOCMBIC: 1301 CLR(sc->sc_mcr, combits); 1302 break; 1303 1304 case TIOCMBIS: 1305 SET(sc->sc_mcr, combits); 1306 break; 1307 1308 case TIOCMSET: 1309 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1310 SET(sc->sc_mcr, combits); 1311 break; 1312 } 1313 1314 if (!sc->sc_heldchange) { 1315 if (sc->sc_tx_busy) { 1316 sc->sc_heldtbc = sc->sc_tbc; 1317 sc->sc_tbc = 0; 1318 sc->sc_heldchange = 1; 1319 } else 1320 com_loadchannelregs(sc); 1321 } 1322 } 1323 1324 int 1325 com_to_tiocm(struct com_softc *sc) 1326 { 1327 u_char combits; 1328 int ttybits = 0; 1329 1330 combits = sc->sc_mcr; 1331 if (ISSET(combits, MCR_DTR)) 1332 SET(ttybits, TIOCM_DTR); 1333 if (ISSET(combits, MCR_RTS)) 1334 SET(ttybits, TIOCM_RTS); 1335 1336 combits = sc->sc_msr; 1337 if (ISSET(combits, MSR_DCD)) 1338 SET(ttybits, TIOCM_CD); 1339 if (ISSET(combits, MSR_CTS)) 1340 SET(ttybits, TIOCM_CTS); 1341 if (ISSET(combits, MSR_DSR)) 1342 SET(ttybits, TIOCM_DSR); 1343 if (ISSET(combits, MSR_RI | MSR_TERI)) 1344 SET(ttybits, TIOCM_RI); 1345 1346 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1347 SET(ttybits, TIOCM_LE); 1348 1349 return (ttybits); 1350 } 1351 1352 static u_char 1353 cflag2lcr(tcflag_t cflag) 1354 { 1355 u_char lcr = 0; 1356 1357 switch (ISSET(cflag, CSIZE)) { 1358 case CS5: 1359 SET(lcr, LCR_5BITS); 1360 break; 1361 case CS6: 1362 SET(lcr, LCR_6BITS); 1363 break; 1364 case CS7: 1365 SET(lcr, LCR_7BITS); 1366 break; 1367 case CS8: 1368 SET(lcr, LCR_8BITS); 1369 break; 1370 } 1371 if (ISSET(cflag, PARENB)) { 1372 SET(lcr, LCR_PENAB); 1373 if (!ISSET(cflag, PARODD)) 1374 SET(lcr, LCR_PEVEN); 1375 } 1376 if (ISSET(cflag, CSTOPB)) 1377 SET(lcr, LCR_STOPB); 1378 1379 return (lcr); 1380 } 1381 1382 int 1383 comparam(struct tty *tp, struct termios *t) 1384 { 1385 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1386 int ospeed; 1387 u_char lcr; 1388 int s; 1389 1390 if (COM_ISALIVE(sc) == 0) 1391 return (EIO); 1392 1393 #ifdef COM_HAYESP 1394 if (sc->sc_type == COM_TYPE_HAYESP) { 1395 int prescaler, speed; 1396 1397 /* 1398 * Calculate UART clock prescaler. It should be in 1399 * range of 0 .. 3. 1400 */ 1401 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1402 prescaler++, speed /= 2) 1403 if ((ospeed = comspeed(speed, sc->sc_frequency, 1404 sc->sc_type)) > 0) 1405 break; 1406 1407 if (prescaler == 4) 1408 return (EINVAL); 1409 sc->sc_prescaler = prescaler; 1410 } else 1411 #endif 1412 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1413 1414 /* Check requested parameters. */ 1415 if (ospeed < 0) 1416 return (EINVAL); 1417 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1418 return (EINVAL); 1419 1420 /* 1421 * For the console, always force CLOCAL and !HUPCL, so that the port 1422 * is always active. 1423 */ 1424 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1425 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1426 SET(t->c_cflag, CLOCAL); 1427 CLR(t->c_cflag, HUPCL); 1428 } 1429 1430 /* 1431 * If there were no changes, don't do anything. This avoids dropping 1432 * input and improves performance when all we did was frob things like 1433 * VMIN and VTIME. 1434 */ 1435 if (tp->t_ospeed == t->c_ospeed && 1436 tp->t_cflag == t->c_cflag) 1437 return (0); 1438 1439 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1440 1441 s = splserial(); 1442 COM_LOCK(sc); 1443 1444 sc->sc_lcr = lcr; 1445 1446 /* 1447 * If we're not in a mode that assumes a connection is present, then 1448 * ignore carrier changes. 1449 */ 1450 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1451 sc->sc_msr_dcd = 0; 1452 else 1453 sc->sc_msr_dcd = MSR_DCD; 1454 /* 1455 * Set the flow control pins depending on the current flow control 1456 * mode. 1457 */ 1458 if (ISSET(t->c_cflag, CRTSCTS)) { 1459 sc->sc_mcr_dtr = MCR_DTR; 1460 sc->sc_mcr_rts = MCR_RTS; 1461 sc->sc_msr_cts = MSR_CTS; 1462 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1463 } else if (ISSET(t->c_cflag, MDMBUF)) { 1464 /* 1465 * For DTR/DCD flow control, make sure we don't toggle DTR for 1466 * carrier detection. 1467 */ 1468 sc->sc_mcr_dtr = 0; 1469 sc->sc_mcr_rts = MCR_DTR; 1470 sc->sc_msr_cts = MSR_DCD; 1471 sc->sc_efr = 0; 1472 } else { 1473 /* 1474 * If no flow control, then always set RTS. This will make 1475 * the other side happy if it mistakenly thinks we're doing 1476 * RTS/CTS flow control. 1477 */ 1478 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1479 sc->sc_mcr_rts = 0; 1480 sc->sc_msr_cts = 0; 1481 sc->sc_efr = 0; 1482 if (ISSET(sc->sc_mcr, MCR_DTR)) 1483 SET(sc->sc_mcr, MCR_RTS); 1484 else 1485 CLR(sc->sc_mcr, MCR_RTS); 1486 } 1487 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1488 1489 #if 0 1490 if (ospeed == 0) 1491 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1492 else 1493 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1494 #endif 1495 1496 sc->sc_dlbl = ospeed; 1497 sc->sc_dlbh = ospeed >> 8; 1498 1499 /* 1500 * Set the FIFO threshold based on the receive speed. 1501 * 1502 * * If it's a low speed, it's probably a mouse or some other 1503 * interactive device, so set the threshold low. 1504 * * If it's a high speed, trim the trigger level down to prevent 1505 * overflows. 1506 * * Otherwise set it a bit higher. 1507 */ 1508 if (sc->sc_type == COM_TYPE_HAYESP) 1509 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1510 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1511 sc->sc_fifo = FIFO_ENABLE | 1512 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8); 1513 else 1514 sc->sc_fifo = 0; 1515 1516 /* And copy to tty. */ 1517 tp->t_ispeed = t->c_ospeed; 1518 tp->t_ospeed = t->c_ospeed; 1519 tp->t_cflag = t->c_cflag; 1520 1521 if (!sc->sc_heldchange) { 1522 if (sc->sc_tx_busy) { 1523 sc->sc_heldtbc = sc->sc_tbc; 1524 sc->sc_tbc = 0; 1525 sc->sc_heldchange = 1; 1526 } else 1527 com_loadchannelregs(sc); 1528 } 1529 1530 if (!ISSET(t->c_cflag, CHWFLOW)) { 1531 /* Disable the high water mark. */ 1532 sc->sc_r_hiwat = 0; 1533 sc->sc_r_lowat = 0; 1534 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1535 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1536 com_schedrx(sc); 1537 } 1538 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1539 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1540 com_hwiflow(sc); 1541 } 1542 } else { 1543 sc->sc_r_hiwat = com_rbuf_hiwat; 1544 sc->sc_r_lowat = com_rbuf_lowat; 1545 } 1546 1547 COM_UNLOCK(sc); 1548 splx(s); 1549 1550 /* 1551 * Update the tty layer's idea of the carrier bit, in case we changed 1552 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1553 * explicit request. 1554 */ 1555 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1556 1557 #ifdef COM_DEBUG 1558 if (com_debug) 1559 comstatus(sc, "comparam "); 1560 #endif 1561 1562 if (!ISSET(t->c_cflag, CHWFLOW)) { 1563 if (sc->sc_tx_stopped) { 1564 sc->sc_tx_stopped = 0; 1565 comstart(tp); 1566 } 1567 } 1568 1569 return (0); 1570 } 1571 1572 void 1573 com_iflush(struct com_softc *sc) 1574 { 1575 bus_space_tag_t iot = sc->sc_iot; 1576 bus_space_handle_t ioh = sc->sc_ioh; 1577 #ifdef DIAGNOSTIC 1578 int reg; 1579 #endif 1580 int timo; 1581 1582 #ifdef DIAGNOSTIC 1583 reg = 0xffff; 1584 #endif 1585 timo = 50000; 1586 /* flush any pending I/O */ 1587 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1588 && --timo) 1589 #ifdef DIAGNOSTIC 1590 reg = 1591 #else 1592 (void) 1593 #endif 1594 bus_space_read_1(iot, ioh, com_data); 1595 #ifdef DIAGNOSTIC 1596 if (!timo) 1597 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1598 reg); 1599 #endif 1600 } 1601 1602 void 1603 com_loadchannelregs(struct com_softc *sc) 1604 { 1605 bus_space_tag_t iot = sc->sc_iot; 1606 bus_space_handle_t ioh = sc->sc_ioh; 1607 1608 /* XXXXX necessary? */ 1609 com_iflush(sc); 1610 1611 #ifdef COM_PXA2X0 1612 if (sc->sc_type == COM_TYPE_PXA2x0) 1613 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1614 else 1615 #endif 1616 bus_space_write_1(iot, ioh, com_ier, 0); 1617 1618 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1619 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1620 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1621 } 1622 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1623 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1624 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1625 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1626 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1627 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1628 #ifdef COM_HAYESP 1629 if (sc->sc_type == COM_TYPE_HAYESP) { 1630 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1631 HAYESP_SETPRESCALER); 1632 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1633 sc->sc_prescaler); 1634 } 1635 #endif 1636 1637 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1638 } 1639 1640 int 1641 comhwiflow(struct tty *tp, int block) 1642 { 1643 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1644 int s; 1645 1646 if (COM_ISALIVE(sc) == 0) 1647 return (0); 1648 1649 if (sc->sc_mcr_rts == 0) 1650 return (0); 1651 1652 s = splserial(); 1653 COM_LOCK(sc); 1654 1655 if (block) { 1656 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1657 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1658 com_hwiflow(sc); 1659 } 1660 } else { 1661 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1662 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1663 com_schedrx(sc); 1664 } 1665 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1666 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1667 com_hwiflow(sc); 1668 } 1669 } 1670 1671 COM_UNLOCK(sc); 1672 splx(s); 1673 return (1); 1674 } 1675 1676 /* 1677 * (un)block input via hw flowcontrol 1678 */ 1679 void 1680 com_hwiflow(struct com_softc *sc) 1681 { 1682 bus_space_tag_t iot = sc->sc_iot; 1683 bus_space_handle_t ioh = sc->sc_ioh; 1684 1685 if (sc->sc_mcr_rts == 0) 1686 return; 1687 1688 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1689 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1690 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1691 } else { 1692 SET(sc->sc_mcr, sc->sc_mcr_rts); 1693 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1694 } 1695 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1696 } 1697 1698 1699 void 1700 comstart(struct tty *tp) 1701 { 1702 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1703 bus_space_tag_t iot = sc->sc_iot; 1704 bus_space_handle_t ioh = sc->sc_ioh; 1705 int s; 1706 1707 if (COM_ISALIVE(sc) == 0) 1708 return; 1709 1710 s = spltty(); 1711 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1712 goto out; 1713 if (sc->sc_tx_stopped) 1714 goto out; 1715 1716 if (tp->t_outq.c_cc <= tp->t_lowat) { 1717 if (ISSET(tp->t_state, TS_ASLEEP)) { 1718 CLR(tp->t_state, TS_ASLEEP); 1719 wakeup(&tp->t_outq); 1720 } 1721 selwakeup(&tp->t_wsel); 1722 if (tp->t_outq.c_cc == 0) 1723 goto out; 1724 } 1725 1726 /* Grab the first contiguous region of buffer space. */ 1727 { 1728 u_char *tba; 1729 int tbc; 1730 1731 tba = tp->t_outq.c_cf; 1732 tbc = ndqb(&tp->t_outq, 0); 1733 1734 (void)splserial(); 1735 COM_LOCK(sc); 1736 1737 sc->sc_tba = tba; 1738 sc->sc_tbc = tbc; 1739 } 1740 1741 SET(tp->t_state, TS_BUSY); 1742 sc->sc_tx_busy = 1; 1743 1744 /* Enable transmit completion interrupts if necessary. */ 1745 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1746 SET(sc->sc_ier, IER_ETXRDY); 1747 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1748 } 1749 1750 /* Output the first chunk of the contiguous buffer. */ 1751 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1752 u_int n; 1753 1754 n = sc->sc_tbc; 1755 if (n > sc->sc_fifolen) 1756 n = sc->sc_fifolen; 1757 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1758 sc->sc_tbc -= n; 1759 sc->sc_tba += n; 1760 } 1761 1762 COM_UNLOCK(sc); 1763 out: 1764 splx(s); 1765 return; 1766 } 1767 1768 /* 1769 * Stop output on a line. 1770 */ 1771 void 1772 comstop(struct tty *tp, int flag) 1773 { 1774 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1775 int s; 1776 1777 s = splserial(); 1778 COM_LOCK(sc); 1779 if (ISSET(tp->t_state, TS_BUSY)) { 1780 /* Stop transmitting at the next chunk. */ 1781 sc->sc_tbc = 0; 1782 sc->sc_heldtbc = 0; 1783 if (!ISSET(tp->t_state, TS_TTSTOP)) 1784 SET(tp->t_state, TS_FLUSH); 1785 } 1786 COM_UNLOCK(sc); 1787 splx(s); 1788 } 1789 1790 void 1791 comdiag(void *arg) 1792 { 1793 struct com_softc *sc = arg; 1794 int overflows, floods; 1795 int s; 1796 1797 s = splserial(); 1798 COM_LOCK(sc); 1799 overflows = sc->sc_overflows; 1800 sc->sc_overflows = 0; 1801 floods = sc->sc_floods; 1802 sc->sc_floods = 0; 1803 sc->sc_errors = 0; 1804 COM_UNLOCK(sc); 1805 splx(s); 1806 1807 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1808 sc->sc_dev.dv_xname, 1809 overflows, overflows == 1 ? "" : "s", 1810 floods, floods == 1 ? "" : "s"); 1811 } 1812 1813 integrate void 1814 com_rxsoft(struct com_softc *sc, struct tty *tp) 1815 { 1816 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1817 u_char *get, *end; 1818 u_int cc, scc; 1819 u_char lsr; 1820 int code; 1821 int s; 1822 1823 end = sc->sc_ebuf; 1824 get = sc->sc_rbget; 1825 scc = cc = com_rbuf_size - sc->sc_rbavail; 1826 1827 if (cc == com_rbuf_size) { 1828 sc->sc_floods++; 1829 if (sc->sc_errors++ == 0) 1830 callout_reset(&sc->sc_diag_callout, 60 * hz, 1831 comdiag, sc); 1832 } 1833 1834 /* If not yet open, drop the entire buffer content here */ 1835 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1836 get += cc << 1; 1837 if (get >= end) 1838 get -= com_rbuf_size << 1; 1839 cc = 0; 1840 } 1841 while (cc) { 1842 code = get[0]; 1843 lsr = get[1]; 1844 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1845 if (ISSET(lsr, LSR_OE)) { 1846 sc->sc_overflows++; 1847 if (sc->sc_errors++ == 0) 1848 callout_reset(&sc->sc_diag_callout, 1849 60 * hz, comdiag, sc); 1850 } 1851 if (ISSET(lsr, LSR_BI | LSR_FE)) 1852 SET(code, TTY_FE); 1853 if (ISSET(lsr, LSR_PE)) 1854 SET(code, TTY_PE); 1855 } 1856 if ((*rint)(code, tp) == -1) { 1857 /* 1858 * The line discipline's buffer is out of space. 1859 */ 1860 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1861 /* 1862 * We're either not using flow control, or the 1863 * line discipline didn't tell us to block for 1864 * some reason. Either way, we have no way to 1865 * know when there's more space available, so 1866 * just drop the rest of the data. 1867 */ 1868 get += cc << 1; 1869 if (get >= end) 1870 get -= com_rbuf_size << 1; 1871 cc = 0; 1872 } else { 1873 /* 1874 * Don't schedule any more receive processing 1875 * until the line discipline tells us there's 1876 * space available (through comhwiflow()). 1877 * Leave the rest of the data in the input 1878 * buffer. 1879 */ 1880 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1881 } 1882 break; 1883 } 1884 get += 2; 1885 if (get >= end) 1886 get = sc->sc_rbuf; 1887 cc--; 1888 } 1889 1890 if (cc != scc) { 1891 sc->sc_rbget = get; 1892 s = splserial(); 1893 COM_LOCK(sc); 1894 1895 cc = sc->sc_rbavail += scc - cc; 1896 /* Buffers should be ok again, release possible block. */ 1897 if (cc >= sc->sc_r_lowat) { 1898 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1899 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1900 SET(sc->sc_ier, IER_ERXRDY); 1901 #ifdef COM_PXA2X0 1902 if (sc->sc_type == COM_TYPE_PXA2x0) 1903 SET(sc->sc_ier, IER_ERXTOUT); 1904 #endif 1905 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1906 com_ier, sc->sc_ier); 1907 } 1908 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1909 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1910 com_hwiflow(sc); 1911 } 1912 } 1913 COM_UNLOCK(sc); 1914 splx(s); 1915 } 1916 } 1917 1918 integrate void 1919 com_txsoft(struct com_softc *sc, struct tty *tp) 1920 { 1921 1922 CLR(tp->t_state, TS_BUSY); 1923 if (ISSET(tp->t_state, TS_FLUSH)) 1924 CLR(tp->t_state, TS_FLUSH); 1925 else 1926 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1927 (*tp->t_linesw->l_start)(tp); 1928 } 1929 1930 integrate void 1931 com_stsoft(struct com_softc *sc, struct tty *tp) 1932 { 1933 u_char msr, delta; 1934 int s; 1935 1936 s = splserial(); 1937 COM_LOCK(sc); 1938 msr = sc->sc_msr; 1939 delta = sc->sc_msr_delta; 1940 sc->sc_msr_delta = 0; 1941 COM_UNLOCK(sc); 1942 splx(s); 1943 1944 if (ISSET(delta, sc->sc_msr_dcd)) { 1945 /* 1946 * Inform the tty layer that carrier detect changed. 1947 */ 1948 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1949 } 1950 1951 if (ISSET(delta, sc->sc_msr_cts)) { 1952 /* Block or unblock output according to flow control. */ 1953 if (ISSET(msr, sc->sc_msr_cts)) { 1954 sc->sc_tx_stopped = 0; 1955 (*tp->t_linesw->l_start)(tp); 1956 } else { 1957 sc->sc_tx_stopped = 1; 1958 } 1959 } 1960 1961 #ifdef COM_DEBUG 1962 if (com_debug) 1963 comstatus(sc, "com_stsoft"); 1964 #endif 1965 } 1966 1967 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1968 void 1969 comsoft(void *arg) 1970 { 1971 struct com_softc *sc = arg; 1972 struct tty *tp; 1973 1974 if (COM_ISALIVE(sc) == 0) 1975 return; 1976 1977 { 1978 #else 1979 void 1980 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1981 comsoft(void) 1982 #else 1983 comsoft(void *arg) 1984 #endif 1985 { 1986 struct com_softc *sc; 1987 struct tty *tp; 1988 int unit; 1989 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1990 int s; 1991 1992 s = splsoftserial(); 1993 com_softintr_scheduled = 0; 1994 #endif 1995 1996 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1997 sc = device_lookup(&com_cd, unit); 1998 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1999 continue; 2000 2001 if (COM_ISALIVE(sc) == 0) 2002 continue; 2003 2004 tp = sc->sc_tty; 2005 if (tp == NULL) 2006 continue; 2007 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2008 continue; 2009 #endif 2010 tp = sc->sc_tty; 2011 2012 if (sc->sc_rx_ready) { 2013 sc->sc_rx_ready = 0; 2014 com_rxsoft(sc, tp); 2015 } 2016 2017 if (sc->sc_st_check) { 2018 sc->sc_st_check = 0; 2019 com_stsoft(sc, tp); 2020 } 2021 2022 if (sc->sc_tx_done) { 2023 sc->sc_tx_done = 0; 2024 com_txsoft(sc, tp); 2025 } 2026 } 2027 2028 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2029 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2030 splx(s); 2031 #endif 2032 #endif 2033 } 2034 2035 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2036 /* there has got to be a better way to do comsoft() */ 2037 }} 2038 #endif 2039 2040 int 2041 comintr(void *arg) 2042 { 2043 struct com_softc *sc = arg; 2044 bus_space_tag_t iot = sc->sc_iot; 2045 bus_space_handle_t ioh = sc->sc_ioh; 2046 u_char *put, *end; 2047 u_int cc; 2048 u_char lsr, iir; 2049 2050 if (COM_ISALIVE(sc) == 0) 2051 return (0); 2052 2053 COM_LOCK(sc); 2054 iir = bus_space_read_1(iot, ioh, com_iir); 2055 if (ISSET(iir, IIR_NOPEND)) { 2056 COM_UNLOCK(sc); 2057 return (0); 2058 } 2059 2060 end = sc->sc_ebuf; 2061 put = sc->sc_rbput; 2062 cc = sc->sc_rbavail; 2063 2064 again: do { 2065 u_char msr, delta; 2066 2067 lsr = bus_space_read_1(iot, ioh, com_lsr); 2068 if (ISSET(lsr, LSR_BI)) { 2069 int cn_trapped = 0; 2070 2071 cn_check_magic(sc->sc_tty->t_dev, 2072 CNC_BREAK, com_cnm_state); 2073 if (cn_trapped) 2074 continue; 2075 #if defined(KGDB) && !defined(DDB) 2076 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2077 kgdb_connect(1); 2078 continue; 2079 } 2080 #endif 2081 } 2082 2083 if (ISSET(lsr, LSR_RCV_MASK) && 2084 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2085 while (cc > 0) { 2086 int cn_trapped = 0; 2087 put[0] = bus_space_read_1(iot, ioh, com_data); 2088 put[1] = lsr; 2089 cn_check_magic(sc->sc_tty->t_dev, 2090 put[0], com_cnm_state); 2091 if (cn_trapped) 2092 goto next; 2093 put += 2; 2094 if (put >= end) 2095 put = sc->sc_rbuf; 2096 cc--; 2097 next: 2098 lsr = bus_space_read_1(iot, ioh, com_lsr); 2099 if (!ISSET(lsr, LSR_RCV_MASK)) 2100 break; 2101 } 2102 2103 /* 2104 * Current string of incoming characters ended because 2105 * no more data was available or we ran out of space. 2106 * Schedule a receive event if any data was received. 2107 * If we're out of space, turn off receive interrupts. 2108 */ 2109 sc->sc_rbput = put; 2110 sc->sc_rbavail = cc; 2111 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2112 sc->sc_rx_ready = 1; 2113 2114 /* 2115 * See if we are in danger of overflowing a buffer. If 2116 * so, use hardware flow control to ease the pressure. 2117 */ 2118 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2119 cc < sc->sc_r_hiwat) { 2120 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2121 com_hwiflow(sc); 2122 } 2123 2124 /* 2125 * If we're out of space, disable receive interrupts 2126 * until the queue has drained a bit. 2127 */ 2128 if (!cc) { 2129 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2130 #ifdef COM_PXA2X0 2131 if (sc->sc_type == COM_TYPE_PXA2x0) 2132 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 2133 else 2134 #endif 2135 CLR(sc->sc_ier, IER_ERXRDY); 2136 bus_space_write_1(iot, ioh, com_ier, 2137 sc->sc_ier); 2138 } 2139 } else { 2140 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 2141 (void) bus_space_read_1(iot, ioh, com_data); 2142 continue; 2143 } 2144 } 2145 2146 msr = bus_space_read_1(iot, ioh, com_msr); 2147 delta = msr ^ sc->sc_msr; 2148 sc->sc_msr = msr; 2149 /* 2150 * Pulse-per-second (PSS) signals on edge of DCD? 2151 * Process these even if line discipline is ignoring DCD. 2152 */ 2153 if (delta & sc->sc_ppsmask) { 2154 struct timeval tv; 2155 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2156 /* XXX nanotime() */ 2157 microtime(&tv); 2158 TIMEVAL_TO_TIMESPEC(&tv, 2159 &sc->ppsinfo.assert_timestamp); 2160 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2161 timespecadd(&sc->ppsinfo.assert_timestamp, 2162 &sc->ppsparam.assert_offset, 2163 &sc->ppsinfo.assert_timestamp); 2164 } 2165 2166 #ifdef PPS_SYNC 2167 if (pps_kc_hardpps_source == sc && 2168 pps_kc_hardpps_mode & PPS_CAPTUREASSERT) { 2169 hardpps(&tv, tv.tv_usec); 2170 } 2171 #endif 2172 sc->ppsinfo.assert_sequence++; 2173 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2174 2175 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2176 /* XXX nanotime() */ 2177 microtime(&tv); 2178 TIMEVAL_TO_TIMESPEC(&tv, 2179 &sc->ppsinfo.clear_timestamp); 2180 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2181 timespecadd(&sc->ppsinfo.clear_timestamp, 2182 &sc->ppsparam.clear_offset, 2183 &sc->ppsinfo.clear_timestamp); 2184 } 2185 2186 #ifdef PPS_SYNC 2187 if (pps_kc_hardpps_source == sc && 2188 pps_kc_hardpps_mode & PPS_CAPTURECLEAR) { 2189 hardpps(&tv, tv.tv_usec); 2190 } 2191 #endif 2192 sc->ppsinfo.clear_sequence++; 2193 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2194 } 2195 } 2196 2197 /* 2198 * Process normal status changes 2199 */ 2200 if (ISSET(delta, sc->sc_msr_mask)) { 2201 SET(sc->sc_msr_delta, delta); 2202 2203 /* 2204 * Stop output immediately if we lose the output 2205 * flow control signal or carrier detect. 2206 */ 2207 if (ISSET(~msr, sc->sc_msr_mask)) { 2208 sc->sc_tbc = 0; 2209 sc->sc_heldtbc = 0; 2210 #ifdef COM_DEBUG 2211 if (com_debug) 2212 comstatus(sc, "comintr "); 2213 #endif 2214 } 2215 2216 sc->sc_st_check = 1; 2217 } 2218 } while (!ISSET((iir = 2219 bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND) && 2220 /* 2221 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 2222 * by IIR read, so we can't do this way: `process all interrupts, 2223 * then do TX if possble'. 2224 */ 2225 (iir & IIR_IMASK) != IIR_TXRDY); 2226 2227 /* 2228 * Read LSR again, since there may be an interrupt between 2229 * the last LSR read and IIR read above. 2230 */ 2231 lsr = bus_space_read_1(iot, ioh, com_lsr); 2232 2233 /* 2234 * See if data can be transmitted as well. 2235 * Schedule tx done event if no data left 2236 * and tty was marked busy. 2237 */ 2238 if (ISSET(lsr, LSR_TXRDY)) { 2239 /* 2240 * If we've delayed a parameter change, do it now, and restart 2241 * output. 2242 */ 2243 if (sc->sc_heldchange) { 2244 com_loadchannelregs(sc); 2245 sc->sc_heldchange = 0; 2246 sc->sc_tbc = sc->sc_heldtbc; 2247 sc->sc_heldtbc = 0; 2248 } 2249 2250 /* Output the next chunk of the contiguous buffer, if any. */ 2251 if (sc->sc_tbc > 0) { 2252 u_int n; 2253 2254 n = sc->sc_tbc; 2255 if (n > sc->sc_fifolen) 2256 n = sc->sc_fifolen; 2257 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2258 sc->sc_tbc -= n; 2259 sc->sc_tba += n; 2260 } else { 2261 /* Disable transmit completion interrupts if necessary. */ 2262 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2263 CLR(sc->sc_ier, IER_ETXRDY); 2264 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2265 } 2266 if (sc->sc_tx_busy) { 2267 sc->sc_tx_busy = 0; 2268 sc->sc_tx_done = 1; 2269 } 2270 } 2271 } 2272 2273 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2274 goto again; 2275 2276 COM_UNLOCK(sc); 2277 2278 /* Wake up the poller. */ 2279 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2280 softintr_schedule(sc->sc_si); 2281 #else 2282 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2283 setsoftserial(); 2284 #else 2285 if (!com_softintr_scheduled) { 2286 com_softintr_scheduled = 1; 2287 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2288 } 2289 #endif 2290 #endif 2291 2292 #if NRND > 0 && defined(RND_COM) 2293 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2294 #endif 2295 2296 return (1); 2297 } 2298 2299 /* 2300 * The following functions are polled getc and putc routines, shared 2301 * by the console and kgdb glue. 2302 * 2303 * The read-ahead code is so that you can detect pending in-band 2304 * cn_magic in polled mode while doing output rather than having to 2305 * wait until the kernel decides it needs input. 2306 */ 2307 2308 #define MAX_READAHEAD 20 2309 static int com_readahead[MAX_READAHEAD]; 2310 static int com_readaheadcount = 0; 2311 2312 int 2313 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2314 { 2315 int s = splserial(); 2316 u_char stat, c; 2317 2318 /* got a character from reading things earlier */ 2319 if (com_readaheadcount > 0) { 2320 int i; 2321 2322 c = com_readahead[0]; 2323 for (i = 1; i < com_readaheadcount; i++) { 2324 com_readahead[i-1] = com_readahead[i]; 2325 } 2326 com_readaheadcount--; 2327 splx(s); 2328 return (c); 2329 } 2330 2331 /* block until a character becomes available */ 2332 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2333 ; 2334 2335 c = bus_space_read_1(iot, ioh, com_data); 2336 stat = bus_space_read_1(iot, ioh, com_iir); 2337 { 2338 int cn_trapped = 0; /* unused */ 2339 #ifdef DDB 2340 extern int db_active; 2341 if (!db_active) 2342 #endif 2343 cn_check_magic(dev, c, com_cnm_state); 2344 } 2345 splx(s); 2346 return (c); 2347 } 2348 2349 void 2350 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2351 { 2352 int s = splserial(); 2353 int cin, stat, timo; 2354 2355 if (com_readaheadcount < MAX_READAHEAD 2356 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2357 int cn_trapped = 0; 2358 cin = bus_space_read_1(iot, ioh, com_data); 2359 stat = bus_space_read_1(iot, ioh, com_iir); 2360 cn_check_magic(dev, cin, com_cnm_state); 2361 com_readahead[com_readaheadcount++] = cin; 2362 } 2363 2364 /* wait for any pending transmission to finish */ 2365 timo = 150000; 2366 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2367 continue; 2368 2369 bus_space_write_1(iot, ioh, com_data, c); 2370 COM_BARRIER(iot, ioh, BR | BW); 2371 2372 splx(s); 2373 } 2374 2375 /* 2376 * Initialize UART for use as console or KGDB line. 2377 */ 2378 int 2379 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2380 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2381 { 2382 bus_space_handle_t ioh; 2383 2384 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2385 return (ENOMEM); /* ??? */ 2386 2387 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2388 bus_space_write_1(iot, ioh, com_efr, 0); 2389 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2390 rate = comspeed(rate, frequency, type); 2391 bus_space_write_1(iot, ioh, com_dlbl, rate); 2392 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2393 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2394 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2395 bus_space_write_1(iot, ioh, com_fifo, 2396 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2397 #ifdef COM_PXA2X0 2398 if (type == COM_TYPE_PXA2x0) 2399 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 2400 else 2401 #endif 2402 bus_space_write_1(iot, ioh, com_ier, 0); 2403 2404 *iohp = ioh; 2405 return (0); 2406 } 2407 2408 /* 2409 * Following are all routines needed for COM to act as console 2410 */ 2411 struct consdev comcons = { 2412 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2413 NODEV, CN_NORMAL 2414 }; 2415 2416 2417 int 2418 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2419 int type, tcflag_t cflag) 2420 { 2421 int res; 2422 2423 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2424 if (res) 2425 return (res); 2426 2427 cn_tab = &comcons; 2428 cn_init_magic(&com_cnm_state); 2429 cn_set_magic("\047\001"); /* default magic is BREAK */ 2430 2431 comconstag = iot; 2432 comconsaddr = iobase; 2433 comconsrate = rate; 2434 comconscflag = cflag; 2435 2436 return (0); 2437 } 2438 2439 int 2440 comcngetc(dev_t dev) 2441 { 2442 2443 return (com_common_getc(dev, comconstag, comconsioh)); 2444 } 2445 2446 /* 2447 * Console kernel output character routine. 2448 */ 2449 void 2450 comcnputc(dev_t dev, int c) 2451 { 2452 2453 com_common_putc(dev, comconstag, comconsioh, c); 2454 } 2455 2456 void 2457 comcnpollc(dev_t dev, int on) 2458 { 2459 2460 } 2461 2462 #ifdef KGDB 2463 int 2464 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2465 int frequency, int type, tcflag_t cflag) 2466 { 2467 int res; 2468 2469 if (iot == comconstag && iobase == comconsaddr) { 2470 #if !defined(DDB) 2471 return (EBUSY); /* cannot share with console */ 2472 #else 2473 com_kgdb_ioh = comconsioh; 2474 #endif 2475 } else { 2476 res = cominit(iot, iobase, rate, frequency, type, cflag, 2477 &com_kgdb_ioh); 2478 if (res) 2479 return (res); 2480 2481 /* 2482 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2483 * expects this to be initialized 2484 */ 2485 cn_init_magic(&com_cnm_state); 2486 cn_set_magic("\047\001"); 2487 } 2488 2489 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2490 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2491 2492 com_kgdb_iot = iot; 2493 com_kgdb_addr = iobase; 2494 2495 return (0); 2496 } 2497 2498 /* ARGSUSED */ 2499 int 2500 com_kgdb_getc(void *arg) 2501 { 2502 2503 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2504 } 2505 2506 /* ARGSUSED */ 2507 void 2508 com_kgdb_putc(void *arg, int c) 2509 { 2510 2511 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2512 } 2513 #endif /* KGDB */ 2514 2515 /* helper function to identify the com ports used by 2516 console or KGDB (and not yet autoconf attached) */ 2517 int 2518 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2519 { 2520 bus_space_handle_t help; 2521 2522 if (!comconsattached && 2523 iot == comconstag && iobase == comconsaddr) 2524 help = comconsioh; 2525 #ifdef KGDB 2526 else if (!com_kgdb_attached && 2527 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2528 help = com_kgdb_ioh; 2529 #endif 2530 else 2531 return (0); 2532 2533 if (ioh) 2534 *ioh = help; 2535 return (1); 2536 } 2537
Indexes created Thu Oct 23 22:10:10 GMT 2025