com.c revision 1.242
1 /* $NetBSD: com.c,v 1.242 2006/03/28 17:38:30 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.242 2006/03/28 17:38:30 thorpej Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 125 #include <machine/intr.h> 126 #include <machine/bus.h> 127 128 #include <dev/ic/comreg.h> 129 #include <dev/ic/comvar.h> 130 #include <dev/ic/ns16550reg.h> 131 #include <dev/ic/st16650reg.h> 132 #ifdef COM_HAYESP 133 #include <dev/ic/hayespreg.h> 134 #endif 135 #define com_lcr com_cfcr 136 #include <dev/cons.h> 137 138 #ifdef COM_HAYESP 139 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 140 #endif 141 142 static void com_enable_debugport(struct com_softc *); 143 144 void com_config(struct com_softc *); 145 void com_shutdown(struct com_softc *); 146 int comspeed(long, long, int); 147 static u_char cflag2lcr(tcflag_t); 148 int comparam(struct tty *, struct termios *); 149 void comstart(struct tty *); 150 int comhwiflow(struct tty *, int); 151 152 void com_loadchannelregs(struct com_softc *); 153 void com_hwiflow(struct com_softc *); 154 void com_break(struct com_softc *, int); 155 void com_modem(struct com_softc *, int); 156 void tiocm_to_com(struct com_softc *, u_long, int); 157 int com_to_tiocm(struct com_softc *); 158 void com_iflush(struct com_softc *); 159 160 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 161 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 162 163 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 164 bus_space_handle_t *); 165 166 int comcngetc(dev_t); 167 void comcnputc(dev_t, int); 168 void comcnpollc(dev_t, int); 169 170 #define integrate static inline 171 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 172 void comsoft(void *); 173 #else 174 #ifndef __NO_SOFT_SERIAL_INTERRUPT 175 void comsoft(void); 176 #else 177 void comsoft(void *); 178 static struct callout comsoft_callout = CALLOUT_INITIALIZER; 179 #endif 180 #endif 181 integrate void com_rxsoft(struct com_softc *, struct tty *); 182 integrate void com_txsoft(struct com_softc *, struct tty *); 183 integrate void com_stsoft(struct com_softc *, struct tty *); 184 integrate void com_schedrx(struct com_softc *); 185 void comdiag(void *); 186 187 extern struct cfdriver com_cd; 188 189 dev_type_open(comopen); 190 dev_type_close(comclose); 191 dev_type_read(comread); 192 dev_type_write(comwrite); 193 dev_type_ioctl(comioctl); 194 dev_type_stop(comstop); 195 dev_type_tty(comtty); 196 dev_type_poll(compoll); 197 198 const struct cdevsw com_cdevsw = { 199 comopen, comclose, comread, comwrite, comioctl, 200 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 201 }; 202 203 /* 204 * Make this an option variable one can patch. 205 * But be warned: this must be a power of 2! 206 */ 207 u_int com_rbuf_size = COM_RING_SIZE; 208 209 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 210 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 211 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 212 213 static bus_addr_t comconsaddr; 214 static bus_space_tag_t comconstag; 215 static bus_space_handle_t comconsioh; 216 static int comconsattached; 217 static int comconsrate; 218 static tcflag_t comconscflag; 219 static struct cnm_state com_cnm_state; 220 221 static int ppscap = 222 PPS_TSFMT_TSPEC | 223 PPS_CAPTUREASSERT | 224 PPS_CAPTURECLEAR | 225 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 226 227 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 228 #ifdef __NO_SOFT_SERIAL_INTERRUPT 229 volatile int com_softintr_scheduled; 230 #endif 231 #endif 232 233 #ifdef KGDB 234 #include <sys/kgdb.h> 235 236 static bus_addr_t com_kgdb_addr; 237 static bus_space_tag_t com_kgdb_iot; 238 static bus_space_handle_t com_kgdb_ioh; 239 static int com_kgdb_attached; 240 241 int com_kgdb_getc(void *); 242 void com_kgdb_putc(void *, int); 243 #endif /* KGDB */ 244 245 #define COMUNIT_MASK 0x7ffff 246 #define COMDIALOUT_MASK 0x80000 247 248 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 249 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 250 251 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 252 device_is_active(&(sc)->sc_dev)) 253 254 #define BR BUS_SPACE_BARRIER_READ 255 #define BW BUS_SPACE_BARRIER_WRITE 256 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 257 258 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 259 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 260 261 /*ARGSUSED*/ 262 int 263 comspeed(long speed, long frequency, int type) 264 { 265 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 266 267 int x, err; 268 269 #if 0 270 if (speed == 0) 271 return (0); 272 #endif 273 if (speed <= 0) 274 return (-1); 275 x = divrnd(frequency / 16, speed); 276 if (x <= 0) 277 return (-1); 278 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 279 if (err < 0) 280 err = -err; 281 if (err > COM_TOLERANCE) 282 return (-1); 283 return (x); 284 285 #undef divrnd 286 } 287 288 #ifdef COM_DEBUG 289 int com_debug = 0; 290 291 void comstatus(struct com_softc *, const char *); 292 void 293 comstatus(struct com_softc *sc, const char *str) 294 { 295 struct tty *tp = sc->sc_tty; 296 297 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 298 sc->sc_dev.dv_xname, str, 299 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 300 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 301 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 302 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 303 sc->sc_tx_stopped ? '+' : '-'); 304 305 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 306 sc->sc_dev.dv_xname, str, 307 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 308 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 309 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 310 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 311 sc->sc_rx_flags); 312 } 313 #endif 314 315 int 316 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 317 { 318 319 /* force access to id reg */ 320 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 321 bus_space_write_1(iot, ioh, com_iir, 0); 322 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 323 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 324 return (0); 325 326 return (1); 327 } 328 329 #ifdef COM_HAYESP 330 int 331 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 332 { 333 char val, dips; 334 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 335 bus_space_tag_t iot = sc->sc_iot; 336 337 /* 338 * Hayes ESP cards have two iobases. One is for compatibility with 339 * 16550 serial chips, and at the same ISA PC base addresses. The 340 * other is for ESP-specific enhanced features, and lies at a 341 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 342 */ 343 344 /* Test for ESP signature */ 345 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 346 return (0); 347 348 /* 349 * ESP is present at ESP enhanced base address; unknown com port 350 */ 351 352 /* Get the dip-switch configurations */ 353 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 354 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 355 356 /* Determine which com port this ESP card services: bits 0,1 of */ 357 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 358 if (sc->sc_iobase != combaselist[dips & 0x03]) 359 return (0); 360 361 printf(": ESP"); 362 363 /* Check ESP Self Test bits. */ 364 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 365 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 366 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 367 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 368 if ((val & 0x70) < 0x20) { 369 printf("-old (%o)", val & 0x70); 370 /* we do not support the necessary features */ 371 return (0); 372 } 373 374 /* Check for ability to emulate 16550: bit 8 == 1 */ 375 if ((dips & 0x80) == 0) { 376 printf(" slave"); 377 /* XXX Does slave really mean no 16550 support?? */ 378 return (0); 379 } 380 381 /* 382 * If we made it this far, we are a full-featured ESP v2.0 (or 383 * better), at the correct com port address. 384 */ 385 386 sc->sc_type = COM_TYPE_HAYESP; 387 printf(", 1024 byte fifo\n"); 388 return (1); 389 } 390 #endif 391 392 static void 393 com_enable_debugport(struct com_softc *sc) 394 { 395 int s; 396 397 /* Turn on line break interrupt, set carrier. */ 398 s = splserial(); 399 COM_LOCK(sc); 400 sc->sc_ier = IER_ERXRDY; 401 #ifdef COM_PXA2X0 402 if (sc->sc_type == COM_TYPE_PXA2x0) 403 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 404 #endif 405 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 406 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 407 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 408 COM_UNLOCK(sc); 409 splx(s); 410 } 411 412 void 413 com_attach_subr(struct com_softc *sc) 414 { 415 bus_addr_t iobase = sc->sc_iobase; 416 bus_space_tag_t iot = sc->sc_iot; 417 bus_space_handle_t ioh = sc->sc_ioh; 418 struct tty *tp; 419 #ifdef COM_16650 420 u_int8_t lcr; 421 #endif 422 #ifdef COM_HAYESP 423 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 424 int *hayespp; 425 #endif 426 const char *fifo_msg = NULL; 427 428 callout_init(&sc->sc_diag_callout); 429 simple_lock_init(&sc->sc_lock); 430 431 /* Disable interrupts before configuring the device. */ 432 #ifdef COM_PXA2X0 433 if (sc->sc_type == COM_TYPE_PXA2x0) 434 sc->sc_ier = IER_EUART; 435 else 436 #endif 437 sc->sc_ier = 0; 438 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 439 440 if (iot == comconstag && iobase == comconsaddr) { 441 comconsattached = 1; 442 443 /* Make sure the console is always "hardwired". */ 444 delay(10000); /* wait for output to finish */ 445 SET(sc->sc_hwflags, COM_HW_CONSOLE); 446 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 447 } 448 449 #ifdef COM_HAYESP 450 sc->sc_prescaler = 0; /* set prescaler to x1. */ 451 452 /* Look for a Hayes ESP board. */ 453 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 454 bus_space_handle_t hayespioh; 455 456 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 457 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 458 continue; 459 if (comprobeHAYESP(hayespioh, sc)) { 460 sc->sc_hayespioh = hayespioh; 461 sc->sc_fifolen = 1024; 462 463 break; 464 } 465 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 466 } 467 /* No ESP; look for other things. */ 468 if (sc->sc_type != COM_TYPE_HAYESP) { 469 #endif 470 sc->sc_fifolen = 1; 471 /* look for a NS 16550AF UART with FIFOs */ 472 bus_space_write_1(iot, ioh, com_fifo, 473 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 474 delay(100); 475 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 476 == IIR_FIFO_MASK) 477 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 478 == FIFO_TRIGGER_14) { 479 SET(sc->sc_hwflags, COM_HW_FIFO); 480 481 #ifdef COM_16650 482 /* 483 * IIR changes into the EFR if LCR is set to LCR_EERS 484 * on 16650s. We also know IIR != 0 at this point. 485 * Write 0 into the EFR, and read it. If the result 486 * is 0, we have a 16650. 487 * 488 * Older 16650s were broken; the test to detect them 489 * is taken from the Linux driver. Apparently 490 * setting DLAB enable gives access to the EFR on 491 * these chips. 492 */ 493 lcr = bus_space_read_1(iot, ioh, com_lcr); 494 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 495 bus_space_write_1(iot, ioh, com_efr, 0); 496 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 497 bus_space_write_1(iot, ioh, com_lcr, 498 lcr | LCR_DLAB); 499 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 500 CLR(sc->sc_hwflags, COM_HW_FIFO); 501 sc->sc_fifolen = 0; 502 } else { 503 SET(sc->sc_hwflags, COM_HW_FLOW); 504 sc->sc_fifolen = 32; 505 } 506 } else 507 #endif 508 sc->sc_fifolen = 16; 509 510 #ifdef COM_16650 511 bus_space_write_1(iot, ioh, com_lcr, lcr); 512 if (sc->sc_fifolen == 0) 513 fifo_msg = "st16650, broken fifo"; 514 else if (sc->sc_fifolen == 32) 515 fifo_msg = "st16650a, working fifo"; 516 else 517 #endif 518 fifo_msg = "ns16550a, working fifo"; 519 } else 520 fifo_msg = "ns16550, broken fifo"; 521 else 522 fifo_msg = "ns8250 or ns16450, no fifo"; 523 bus_space_write_1(iot, ioh, com_fifo, 0); 524 /* 525 * Some chips will clear down both Tx and Rx FIFOs when zero is 526 * written to com_fifo. If this chip is the console, writing zero 527 * results in some of the chip/FIFO description being lost, so delay 528 * printing it until now. 529 */ 530 delay(10); 531 aprint_normal(": %s\n", fifo_msg); 532 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 533 sc->sc_fifolen = 1; 534 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 535 } 536 #ifdef COM_HAYESP 537 } 538 #endif 539 540 tp = ttymalloc(); 541 tp->t_oproc = comstart; 542 tp->t_param = comparam; 543 tp->t_hwiflow = comhwiflow; 544 545 sc->sc_tty = tp; 546 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 547 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 548 sc->sc_rbavail = com_rbuf_size; 549 if (sc->sc_rbuf == NULL) { 550 aprint_error("%s: unable to allocate ring buffer\n", 551 sc->sc_dev.dv_xname); 552 return; 553 } 554 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 555 556 tty_attach(tp); 557 558 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 559 SET(sc->sc_mcr, MCR_IENABLE); 560 561 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 562 int maj; 563 564 /* locate the major number */ 565 maj = cdevsw_lookup_major(&com_cdevsw); 566 567 tp->t_dev = cn_tab->cn_dev = makedev(maj, 568 device_unit(&sc->sc_dev)); 569 570 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 571 } 572 573 #ifdef KGDB 574 /* 575 * Allow kgdb to "take over" this port. If this is 576 * not the console and is the kgdb device, it has 577 * exclusive use. If it's the console _and_ the 578 * kgdb device, it doesn't. 579 */ 580 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 581 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 582 com_kgdb_attached = 1; 583 584 SET(sc->sc_hwflags, COM_HW_KGDB); 585 } 586 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 587 } 588 #endif 589 590 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 591 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 592 #endif 593 594 #if NRND > 0 && defined(RND_COM) 595 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 596 RND_TYPE_TTY, 0); 597 #endif 598 599 /* if there are no enable/disable functions, assume the device 600 is always enabled */ 601 if (!sc->enable) 602 sc->enabled = 1; 603 604 com_config(sc); 605 606 SET(sc->sc_hwflags, COM_HW_DEV_OK); 607 } 608 609 void 610 com_config(struct com_softc *sc) 611 { 612 bus_space_tag_t iot = sc->sc_iot; 613 bus_space_handle_t ioh = sc->sc_ioh; 614 615 /* Disable interrupts before configuring the device. */ 616 #ifdef COM_PXA2X0 617 if (sc->sc_type == COM_TYPE_PXA2x0) 618 sc->sc_ier = IER_EUART; 619 else 620 #endif 621 sc->sc_ier = 0; 622 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 623 (void) bus_space_read_1(iot, ioh, com_iir); 624 625 #ifdef COM_HAYESP 626 /* Look for a Hayes ESP board. */ 627 if (sc->sc_type == COM_TYPE_HAYESP) { 628 sc->sc_fifolen = 1024; 629 630 /* Set 16550 compatibility mode */ 631 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 632 HAYESP_SETMODE); 633 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 634 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 635 HAYESP_MODE_SCALE); 636 637 /* Set RTS/CTS flow control */ 638 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 639 HAYESP_SETFLOWTYPE); 640 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 641 HAYESP_FLOW_RTS); 642 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 643 HAYESP_FLOW_CTS); 644 645 /* Set flow control levels */ 646 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 647 HAYESP_SETRXFLOW); 648 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 649 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 650 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 651 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 652 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 653 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 654 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 655 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 656 } 657 #endif 658 659 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 660 com_enable_debugport(sc); 661 } 662 663 int 664 com_detach(struct device *self, int flags) 665 { 666 struct com_softc *sc = (struct com_softc *)self; 667 int maj, mn; 668 669 /* locate the major number */ 670 maj = cdevsw_lookup_major(&com_cdevsw); 671 672 /* Nuke the vnodes for any open instances. */ 673 mn = device_unit(self); 674 vdevgone(maj, mn, mn, VCHR); 675 676 mn |= COMDIALOUT_MASK; 677 vdevgone(maj, mn, mn, VCHR); 678 679 if (sc->sc_rbuf == NULL) { 680 /* 681 * Ring buffer allocation failed in the com_attach_subr, 682 * only the tty is allocated, and nothing else. 683 */ 684 ttyfree(sc->sc_tty); 685 return 0; 686 } 687 688 /* Free the receive buffer. */ 689 free(sc->sc_rbuf, M_DEVBUF); 690 691 /* Detach and free the tty. */ 692 tty_detach(sc->sc_tty); 693 ttyfree(sc->sc_tty); 694 695 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 696 /* Unhook the soft interrupt handler. */ 697 softintr_disestablish(sc->sc_si); 698 #endif 699 700 #if NRND > 0 && defined(RND_COM) 701 /* Unhook the entropy source. */ 702 rnd_detach_source(&sc->rnd_source); 703 #endif 704 705 return (0); 706 } 707 708 int 709 com_activate(struct device *self, enum devact act) 710 { 711 struct com_softc *sc = (struct com_softc *)self; 712 int s, rv = 0; 713 714 s = splserial(); 715 COM_LOCK(sc); 716 switch (act) { 717 case DVACT_ACTIVATE: 718 rv = EOPNOTSUPP; 719 break; 720 721 case DVACT_DEACTIVATE: 722 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 723 rv = EBUSY; 724 break; 725 } 726 727 if (sc->disable != NULL && sc->enabled != 0) { 728 (*sc->disable)(sc); 729 sc->enabled = 0; 730 } 731 break; 732 } 733 734 COM_UNLOCK(sc); 735 splx(s); 736 return (rv); 737 } 738 739 void 740 com_shutdown(struct com_softc *sc) 741 { 742 struct tty *tp = sc->sc_tty; 743 int s; 744 745 s = splserial(); 746 COM_LOCK(sc); 747 748 /* If we were asserting flow control, then deassert it. */ 749 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 750 com_hwiflow(sc); 751 752 /* Clear any break condition set with TIOCSBRK. */ 753 com_break(sc, 0); 754 755 /* Turn off PPS capture on last close. */ 756 sc->sc_ppsmask = 0; 757 sc->ppsparam.mode = 0; 758 759 /* 760 * Hang up if necessary. Wait a bit, so the other side has time to 761 * notice even if we immediately open the port again. 762 * Avoid tsleeping above splhigh(). 763 */ 764 if (ISSET(tp->t_cflag, HUPCL)) { 765 com_modem(sc, 0); 766 COM_UNLOCK(sc); 767 splx(s); 768 /* XXX tsleep will only timeout */ 769 (void) tsleep(sc, TTIPRI, ttclos, hz); 770 s = splserial(); 771 COM_LOCK(sc); 772 } 773 774 /* Turn off interrupts. */ 775 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 776 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 777 #ifdef COM_PXA2X0 778 if (sc->sc_type == COM_TYPE_PXA2x0) 779 sc->sc_ier |= IER_ERXTOUT; 780 #endif 781 } else 782 sc->sc_ier = 0; 783 784 #ifdef COM_PXA2X0 785 if (sc->sc_type == COM_TYPE_PXA2x0) 786 sc->sc_ier |= IER_EUART; 787 #endif 788 789 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 790 791 if (sc->disable) { 792 #ifdef DIAGNOSTIC 793 if (!sc->enabled) 794 panic("com_shutdown: not enabled?"); 795 #endif 796 (*sc->disable)(sc); 797 sc->enabled = 0; 798 } 799 COM_UNLOCK(sc); 800 splx(s); 801 } 802 803 int 804 comopen(dev_t dev, int flag, int mode, struct lwp *l) 805 { 806 struct com_softc *sc; 807 struct tty *tp; 808 int s, s2; 809 int error; 810 811 sc = device_lookup(&com_cd, COMUNIT(dev)); 812 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 813 sc->sc_rbuf == NULL) 814 return (ENXIO); 815 816 if (!device_is_active(&sc->sc_dev)) 817 return (ENXIO); 818 819 #ifdef KGDB 820 /* 821 * If this is the kgdb port, no other use is permitted. 822 */ 823 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 824 return (EBUSY); 825 #endif 826 827 tp = sc->sc_tty; 828 829 if (ISSET(tp->t_state, TS_ISOPEN) && 830 ISSET(tp->t_state, TS_XCLUDE) && 831 suser(l->l_proc->p_ucred, &l->l_proc->p_acflag) != 0) 832 return (EBUSY); 833 834 s = spltty(); 835 836 /* 837 * Do the following iff this is a first open. 838 */ 839 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 840 struct termios t; 841 842 tp->t_dev = dev; 843 844 s2 = splserial(); 845 COM_LOCK(sc); 846 847 if (sc->enable) { 848 if ((*sc->enable)(sc)) { 849 COM_UNLOCK(sc); 850 splx(s2); 851 splx(s); 852 printf("%s: device enable failed\n", 853 sc->sc_dev.dv_xname); 854 return (EIO); 855 } 856 sc->enabled = 1; 857 com_config(sc); 858 } 859 860 /* Turn on interrupts. */ 861 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 862 #ifdef COM_PXA2X0 863 if (sc->sc_type == COM_TYPE_PXA2x0) 864 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 865 #endif 866 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 867 868 /* Fetch the current modem control status, needed later. */ 869 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 870 871 /* Clear PPS capture state on first open. */ 872 sc->sc_ppsmask = 0; 873 sc->ppsparam.mode = 0; 874 875 COM_UNLOCK(sc); 876 splx(s2); 877 878 /* 879 * Initialize the termios status to the defaults. Add in the 880 * sticky bits from TIOCSFLAGS. 881 */ 882 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 883 t.c_ospeed = comconsrate; 884 t.c_cflag = comconscflag; 885 } else { 886 t.c_ospeed = TTYDEF_SPEED; 887 t.c_cflag = TTYDEF_CFLAG; 888 } 889 t.c_ispeed = t.c_ospeed; 890 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 891 SET(t.c_cflag, CLOCAL); 892 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 893 SET(t.c_cflag, CRTSCTS); 894 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 895 SET(t.c_cflag, MDMBUF); 896 /* Make sure comparam() will do something. */ 897 tp->t_ospeed = 0; 898 (void) comparam(tp, &t); 899 tp->t_iflag = TTYDEF_IFLAG; 900 tp->t_oflag = TTYDEF_OFLAG; 901 tp->t_lflag = TTYDEF_LFLAG; 902 ttychars(tp); 903 ttsetwater(tp); 904 905 s2 = splserial(); 906 COM_LOCK(sc); 907 908 /* 909 * Turn on DTR. We must always do this, even if carrier is not 910 * present, because otherwise we'd have to use TIOCSDTR 911 * immediately after setting CLOCAL, which applications do not 912 * expect. We always assert DTR while the device is open 913 * unless explicitly requested to deassert it. 914 */ 915 com_modem(sc, 1); 916 917 /* Clear the input ring, and unblock. */ 918 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 919 sc->sc_rbavail = com_rbuf_size; 920 com_iflush(sc); 921 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 922 com_hwiflow(sc); 923 924 #ifdef COM_DEBUG 925 if (com_debug) 926 comstatus(sc, "comopen "); 927 #endif 928 929 COM_UNLOCK(sc); 930 splx(s2); 931 } 932 933 splx(s); 934 935 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 936 if (error) 937 goto bad; 938 939 error = (*tp->t_linesw->l_open)(dev, tp); 940 if (error) 941 goto bad; 942 943 return (0); 944 945 bad: 946 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 947 /* 948 * We failed to open the device, and nobody else had it opened. 949 * Clean up the state as appropriate. 950 */ 951 com_shutdown(sc); 952 } 953 954 return (error); 955 } 956 957 int 958 comclose(dev_t dev, int flag, int mode, struct lwp *l) 959 { 960 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 961 struct tty *tp = sc->sc_tty; 962 963 /* XXX This is for cons.c. */ 964 if (!ISSET(tp->t_state, TS_ISOPEN)) 965 return (0); 966 967 (*tp->t_linesw->l_close)(tp, flag); 968 ttyclose(tp); 969 970 if (COM_ISALIVE(sc) == 0) 971 return (0); 972 973 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 974 /* 975 * Although we got a last close, the device may still be in 976 * use; e.g. if this was the dialout node, and there are still 977 * processes waiting for carrier on the non-dialout node. 978 */ 979 com_shutdown(sc); 980 } 981 982 return (0); 983 } 984 985 int 986 comread(dev_t dev, struct uio *uio, int flag) 987 { 988 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 989 struct tty *tp = sc->sc_tty; 990 991 if (COM_ISALIVE(sc) == 0) 992 return (EIO); 993 994 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 995 } 996 997 int 998 comwrite(dev_t dev, struct uio *uio, int flag) 999 { 1000 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1001 struct tty *tp = sc->sc_tty; 1002 1003 if (COM_ISALIVE(sc) == 0) 1004 return (EIO); 1005 1006 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1007 } 1008 1009 int 1010 compoll(dev_t dev, int events, struct lwp *l) 1011 { 1012 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1013 struct tty *tp = sc->sc_tty; 1014 1015 if (COM_ISALIVE(sc) == 0) 1016 return (POLLHUP); 1017 1018 return ((*tp->t_linesw->l_poll)(tp, events, l)); 1019 } 1020 1021 struct tty * 1022 comtty(dev_t dev) 1023 { 1024 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1025 struct tty *tp = sc->sc_tty; 1026 1027 return (tp); 1028 } 1029 1030 int 1031 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 1032 { 1033 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1034 struct tty *tp = sc->sc_tty; 1035 struct proc *p = l->l_proc; 1036 int error; 1037 int s; 1038 1039 if (COM_ISALIVE(sc) == 0) 1040 return (EIO); 1041 1042 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1043 if (error != EPASSTHROUGH) 1044 return (error); 1045 1046 error = ttioctl(tp, cmd, data, flag, l); 1047 if (error != EPASSTHROUGH) 1048 return (error); 1049 1050 error = 0; 1051 1052 s = splserial(); 1053 COM_LOCK(sc); 1054 1055 switch (cmd) { 1056 case TIOCSBRK: 1057 com_break(sc, 1); 1058 break; 1059 1060 case TIOCCBRK: 1061 com_break(sc, 0); 1062 break; 1063 1064 case TIOCSDTR: 1065 com_modem(sc, 1); 1066 break; 1067 1068 case TIOCCDTR: 1069 com_modem(sc, 0); 1070 break; 1071 1072 case TIOCGFLAGS: 1073 *(int *)data = sc->sc_swflags; 1074 break; 1075 1076 case TIOCSFLAGS: 1077 error = suser(p->p_ucred, &p->p_acflag); 1078 if (error) 1079 break; 1080 sc->sc_swflags = *(int *)data; 1081 break; 1082 1083 case TIOCMSET: 1084 case TIOCMBIS: 1085 case TIOCMBIC: 1086 tiocm_to_com(sc, cmd, *(int *)data); 1087 break; 1088 1089 case TIOCMGET: 1090 *(int *)data = com_to_tiocm(sc); 1091 break; 1092 1093 case PPS_IOC_CREATE: 1094 break; 1095 1096 case PPS_IOC_DESTROY: 1097 break; 1098 1099 case PPS_IOC_GETPARAMS: { 1100 pps_params_t *pp; 1101 pp = (pps_params_t *)data; 1102 *pp = sc->ppsparam; 1103 break; 1104 } 1105 1106 case PPS_IOC_SETPARAMS: { 1107 pps_params_t *pp; 1108 int mode; 1109 pp = (pps_params_t *)data; 1110 if (pp->mode & ~ppscap) { 1111 error = EINVAL; 1112 break; 1113 } 1114 sc->ppsparam = *pp; 1115 /* 1116 * Compute msr masks from user-specified timestamp state. 1117 */ 1118 mode = sc->ppsparam.mode; 1119 switch (mode & PPS_CAPTUREBOTH) { 1120 case 0: 1121 sc->sc_ppsmask = 0; 1122 break; 1123 1124 case PPS_CAPTUREASSERT: 1125 sc->sc_ppsmask = MSR_DCD; 1126 sc->sc_ppsassert = MSR_DCD; 1127 sc->sc_ppsclear = -1; 1128 break; 1129 1130 case PPS_CAPTURECLEAR: 1131 sc->sc_ppsmask = MSR_DCD; 1132 sc->sc_ppsassert = -1; 1133 sc->sc_ppsclear = 0; 1134 break; 1135 1136 case PPS_CAPTUREBOTH: 1137 sc->sc_ppsmask = MSR_DCD; 1138 sc->sc_ppsassert = MSR_DCD; 1139 sc->sc_ppsclear = 0; 1140 break; 1141 1142 default: 1143 error = EINVAL; 1144 break; 1145 } 1146 break; 1147 } 1148 1149 case PPS_IOC_GETCAP: 1150 *(int*)data = ppscap; 1151 break; 1152 1153 case PPS_IOC_FETCH: { 1154 pps_info_t *pi; 1155 pi = (pps_info_t *)data; 1156 *pi = sc->ppsinfo; 1157 break; 1158 } 1159 1160 #ifdef PPS_SYNC 1161 case PPS_IOC_KCBIND: { 1162 int edge = (*(int *)data) & PPS_CAPTUREBOTH; 1163 1164 if (edge == 0) { 1165 /* 1166 * remove binding for this source; ignore 1167 * the request if this is not the current 1168 * hardpps source 1169 */ 1170 if (pps_kc_hardpps_source == sc) { 1171 pps_kc_hardpps_source = NULL; 1172 pps_kc_hardpps_mode = 0; 1173 } 1174 } else { 1175 /* 1176 * bind hardpps to this source, replacing any 1177 * previously specified source or edges 1178 */ 1179 pps_kc_hardpps_source = sc; 1180 pps_kc_hardpps_mode = edge; 1181 } 1182 break; 1183 } 1184 #endif /* PPS_SYNC */ 1185 1186 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1187 /* 1188 * Some GPS clocks models use the falling rather than 1189 * rising edge as the on-the-second signal. 1190 * The old API has no way to specify PPS polarity. 1191 */ 1192 sc->sc_ppsmask = MSR_DCD; 1193 #ifndef PPS_TRAILING_EDGE 1194 sc->sc_ppsassert = MSR_DCD; 1195 sc->sc_ppsclear = -1; 1196 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1197 &sc->ppsinfo.assert_timestamp); 1198 #else 1199 sc->sc_ppsassert = -1; 1200 sc->sc_ppsclear = 0; 1201 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1202 &sc->ppsinfo.clear_timestamp); 1203 #endif 1204 break; 1205 1206 default: 1207 error = EPASSTHROUGH; 1208 break; 1209 } 1210 1211 COM_UNLOCK(sc); 1212 splx(s); 1213 1214 #ifdef COM_DEBUG 1215 if (com_debug) 1216 comstatus(sc, "comioctl "); 1217 #endif 1218 1219 return (error); 1220 } 1221 1222 integrate void 1223 com_schedrx(struct com_softc *sc) 1224 { 1225 1226 sc->sc_rx_ready = 1; 1227 1228 /* Wake up the poller. */ 1229 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1230 softintr_schedule(sc->sc_si); 1231 #else 1232 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1233 setsoftserial(); 1234 #else 1235 if (!com_softintr_scheduled) { 1236 com_softintr_scheduled = 1; 1237 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1238 } 1239 #endif 1240 #endif 1241 } 1242 1243 void 1244 com_break(struct com_softc *sc, int onoff) 1245 { 1246 1247 if (onoff) 1248 SET(sc->sc_lcr, LCR_SBREAK); 1249 else 1250 CLR(sc->sc_lcr, LCR_SBREAK); 1251 1252 if (!sc->sc_heldchange) { 1253 if (sc->sc_tx_busy) { 1254 sc->sc_heldtbc = sc->sc_tbc; 1255 sc->sc_tbc = 0; 1256 sc->sc_heldchange = 1; 1257 } else 1258 com_loadchannelregs(sc); 1259 } 1260 } 1261 1262 void 1263 com_modem(struct com_softc *sc, int onoff) 1264 { 1265 1266 if (sc->sc_mcr_dtr == 0) 1267 return; 1268 1269 if (onoff) 1270 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1271 else 1272 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1273 1274 if (!sc->sc_heldchange) { 1275 if (sc->sc_tx_busy) { 1276 sc->sc_heldtbc = sc->sc_tbc; 1277 sc->sc_tbc = 0; 1278 sc->sc_heldchange = 1; 1279 } else 1280 com_loadchannelregs(sc); 1281 } 1282 } 1283 1284 void 1285 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1286 { 1287 u_char combits; 1288 1289 combits = 0; 1290 if (ISSET(ttybits, TIOCM_DTR)) 1291 SET(combits, MCR_DTR); 1292 if (ISSET(ttybits, TIOCM_RTS)) 1293 SET(combits, MCR_RTS); 1294 1295 switch (how) { 1296 case TIOCMBIC: 1297 CLR(sc->sc_mcr, combits); 1298 break; 1299 1300 case TIOCMBIS: 1301 SET(sc->sc_mcr, combits); 1302 break; 1303 1304 case TIOCMSET: 1305 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1306 SET(sc->sc_mcr, combits); 1307 break; 1308 } 1309 1310 if (!sc->sc_heldchange) { 1311 if (sc->sc_tx_busy) { 1312 sc->sc_heldtbc = sc->sc_tbc; 1313 sc->sc_tbc = 0; 1314 sc->sc_heldchange = 1; 1315 } else 1316 com_loadchannelregs(sc); 1317 } 1318 } 1319 1320 int 1321 com_to_tiocm(struct com_softc *sc) 1322 { 1323 u_char combits; 1324 int ttybits = 0; 1325 1326 combits = sc->sc_mcr; 1327 if (ISSET(combits, MCR_DTR)) 1328 SET(ttybits, TIOCM_DTR); 1329 if (ISSET(combits, MCR_RTS)) 1330 SET(ttybits, TIOCM_RTS); 1331 1332 combits = sc->sc_msr; 1333 if (ISSET(combits, MSR_DCD)) 1334 SET(ttybits, TIOCM_CD); 1335 if (ISSET(combits, MSR_CTS)) 1336 SET(ttybits, TIOCM_CTS); 1337 if (ISSET(combits, MSR_DSR)) 1338 SET(ttybits, TIOCM_DSR); 1339 if (ISSET(combits, MSR_RI | MSR_TERI)) 1340 SET(ttybits, TIOCM_RI); 1341 1342 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1343 SET(ttybits, TIOCM_LE); 1344 1345 return (ttybits); 1346 } 1347 1348 static u_char 1349 cflag2lcr(tcflag_t cflag) 1350 { 1351 u_char lcr = 0; 1352 1353 switch (ISSET(cflag, CSIZE)) { 1354 case CS5: 1355 SET(lcr, LCR_5BITS); 1356 break; 1357 case CS6: 1358 SET(lcr, LCR_6BITS); 1359 break; 1360 case CS7: 1361 SET(lcr, LCR_7BITS); 1362 break; 1363 case CS8: 1364 SET(lcr, LCR_8BITS); 1365 break; 1366 } 1367 if (ISSET(cflag, PARENB)) { 1368 SET(lcr, LCR_PENAB); 1369 if (!ISSET(cflag, PARODD)) 1370 SET(lcr, LCR_PEVEN); 1371 } 1372 if (ISSET(cflag, CSTOPB)) 1373 SET(lcr, LCR_STOPB); 1374 1375 return (lcr); 1376 } 1377 1378 int 1379 comparam(struct tty *tp, struct termios *t) 1380 { 1381 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1382 int ospeed; 1383 u_char lcr; 1384 int s; 1385 1386 if (COM_ISALIVE(sc) == 0) 1387 return (EIO); 1388 1389 #ifdef COM_HAYESP 1390 if (sc->sc_type == COM_TYPE_HAYESP) { 1391 int prescaler, speed; 1392 1393 /* 1394 * Calculate UART clock prescaler. It should be in 1395 * range of 0 .. 3. 1396 */ 1397 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1398 prescaler++, speed /= 2) 1399 if ((ospeed = comspeed(speed, sc->sc_frequency, 1400 sc->sc_type)) > 0) 1401 break; 1402 1403 if (prescaler == 4) 1404 return (EINVAL); 1405 sc->sc_prescaler = prescaler; 1406 } else 1407 #endif 1408 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1409 1410 /* Check requested parameters. */ 1411 if (ospeed < 0) 1412 return (EINVAL); 1413 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1414 return (EINVAL); 1415 1416 /* 1417 * For the console, always force CLOCAL and !HUPCL, so that the port 1418 * is always active. 1419 */ 1420 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1421 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1422 SET(t->c_cflag, CLOCAL); 1423 CLR(t->c_cflag, HUPCL); 1424 } 1425 1426 /* 1427 * If there were no changes, don't do anything. This avoids dropping 1428 * input and improves performance when all we did was frob things like 1429 * VMIN and VTIME. 1430 */ 1431 if (tp->t_ospeed == t->c_ospeed && 1432 tp->t_cflag == t->c_cflag) 1433 return (0); 1434 1435 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1436 1437 s = splserial(); 1438 COM_LOCK(sc); 1439 1440 sc->sc_lcr = lcr; 1441 1442 /* 1443 * If we're not in a mode that assumes a connection is present, then 1444 * ignore carrier changes. 1445 */ 1446 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1447 sc->sc_msr_dcd = 0; 1448 else 1449 sc->sc_msr_dcd = MSR_DCD; 1450 /* 1451 * Set the flow control pins depending on the current flow control 1452 * mode. 1453 */ 1454 if (ISSET(t->c_cflag, CRTSCTS)) { 1455 sc->sc_mcr_dtr = MCR_DTR; 1456 sc->sc_mcr_rts = MCR_RTS; 1457 sc->sc_msr_cts = MSR_CTS; 1458 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1459 } else if (ISSET(t->c_cflag, MDMBUF)) { 1460 /* 1461 * For DTR/DCD flow control, make sure we don't toggle DTR for 1462 * carrier detection. 1463 */ 1464 sc->sc_mcr_dtr = 0; 1465 sc->sc_mcr_rts = MCR_DTR; 1466 sc->sc_msr_cts = MSR_DCD; 1467 sc->sc_efr = 0; 1468 } else { 1469 /* 1470 * If no flow control, then always set RTS. This will make 1471 * the other side happy if it mistakenly thinks we're doing 1472 * RTS/CTS flow control. 1473 */ 1474 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1475 sc->sc_mcr_rts = 0; 1476 sc->sc_msr_cts = 0; 1477 sc->sc_efr = 0; 1478 if (ISSET(sc->sc_mcr, MCR_DTR)) 1479 SET(sc->sc_mcr, MCR_RTS); 1480 else 1481 CLR(sc->sc_mcr, MCR_RTS); 1482 } 1483 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1484 1485 #if 0 1486 if (ospeed == 0) 1487 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1488 else 1489 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1490 #endif 1491 1492 sc->sc_dlbl = ospeed; 1493 sc->sc_dlbh = ospeed >> 8; 1494 1495 /* 1496 * Set the FIFO threshold based on the receive speed. 1497 * 1498 * * If it's a low speed, it's probably a mouse or some other 1499 * interactive device, so set the threshold low. 1500 * * If it's a high speed, trim the trigger level down to prevent 1501 * overflows. 1502 * * Otherwise set it a bit higher. 1503 */ 1504 if (sc->sc_type == COM_TYPE_HAYESP) 1505 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1506 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1507 sc->sc_fifo = FIFO_ENABLE | 1508 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8); 1509 else 1510 sc->sc_fifo = 0; 1511 1512 /* And copy to tty. */ 1513 tp->t_ispeed = t->c_ospeed; 1514 tp->t_ospeed = t->c_ospeed; 1515 tp->t_cflag = t->c_cflag; 1516 1517 if (!sc->sc_heldchange) { 1518 if (sc->sc_tx_busy) { 1519 sc->sc_heldtbc = sc->sc_tbc; 1520 sc->sc_tbc = 0; 1521 sc->sc_heldchange = 1; 1522 } else 1523 com_loadchannelregs(sc); 1524 } 1525 1526 if (!ISSET(t->c_cflag, CHWFLOW)) { 1527 /* Disable the high water mark. */ 1528 sc->sc_r_hiwat = 0; 1529 sc->sc_r_lowat = 0; 1530 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1531 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1532 com_schedrx(sc); 1533 } 1534 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1535 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1536 com_hwiflow(sc); 1537 } 1538 } else { 1539 sc->sc_r_hiwat = com_rbuf_hiwat; 1540 sc->sc_r_lowat = com_rbuf_lowat; 1541 } 1542 1543 COM_UNLOCK(sc); 1544 splx(s); 1545 1546 /* 1547 * Update the tty layer's idea of the carrier bit, in case we changed 1548 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1549 * explicit request. 1550 */ 1551 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1552 1553 #ifdef COM_DEBUG 1554 if (com_debug) 1555 comstatus(sc, "comparam "); 1556 #endif 1557 1558 if (!ISSET(t->c_cflag, CHWFLOW)) { 1559 if (sc->sc_tx_stopped) { 1560 sc->sc_tx_stopped = 0; 1561 comstart(tp); 1562 } 1563 } 1564 1565 return (0); 1566 } 1567 1568 void 1569 com_iflush(struct com_softc *sc) 1570 { 1571 bus_space_tag_t iot = sc->sc_iot; 1572 bus_space_handle_t ioh = sc->sc_ioh; 1573 #ifdef DIAGNOSTIC 1574 int reg; 1575 #endif 1576 int timo; 1577 1578 #ifdef DIAGNOSTIC 1579 reg = 0xffff; 1580 #endif 1581 timo = 50000; 1582 /* flush any pending I/O */ 1583 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1584 && --timo) 1585 #ifdef DIAGNOSTIC 1586 reg = 1587 #else 1588 (void) 1589 #endif 1590 bus_space_read_1(iot, ioh, com_data); 1591 #ifdef DIAGNOSTIC 1592 if (!timo) 1593 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1594 reg); 1595 #endif 1596 } 1597 1598 void 1599 com_loadchannelregs(struct com_softc *sc) 1600 { 1601 bus_space_tag_t iot = sc->sc_iot; 1602 bus_space_handle_t ioh = sc->sc_ioh; 1603 1604 /* XXXXX necessary? */ 1605 com_iflush(sc); 1606 1607 #ifdef COM_PXA2X0 1608 if (sc->sc_type == COM_TYPE_PXA2x0) 1609 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1610 else 1611 #endif 1612 bus_space_write_1(iot, ioh, com_ier, 0); 1613 1614 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1615 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1616 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1617 } 1618 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1619 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1620 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1621 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1622 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1623 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1624 #ifdef COM_HAYESP 1625 if (sc->sc_type == COM_TYPE_HAYESP) { 1626 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1627 HAYESP_SETPRESCALER); 1628 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1629 sc->sc_prescaler); 1630 } 1631 #endif 1632 1633 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1634 } 1635 1636 int 1637 comhwiflow(struct tty *tp, int block) 1638 { 1639 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1640 int s; 1641 1642 if (COM_ISALIVE(sc) == 0) 1643 return (0); 1644 1645 if (sc->sc_mcr_rts == 0) 1646 return (0); 1647 1648 s = splserial(); 1649 COM_LOCK(sc); 1650 1651 if (block) { 1652 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1653 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1654 com_hwiflow(sc); 1655 } 1656 } else { 1657 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1658 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1659 com_schedrx(sc); 1660 } 1661 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1662 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1663 com_hwiflow(sc); 1664 } 1665 } 1666 1667 COM_UNLOCK(sc); 1668 splx(s); 1669 return (1); 1670 } 1671 1672 /* 1673 * (un)block input via hw flowcontrol 1674 */ 1675 void 1676 com_hwiflow(struct com_softc *sc) 1677 { 1678 bus_space_tag_t iot = sc->sc_iot; 1679 bus_space_handle_t ioh = sc->sc_ioh; 1680 1681 if (sc->sc_mcr_rts == 0) 1682 return; 1683 1684 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1685 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1686 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1687 } else { 1688 SET(sc->sc_mcr, sc->sc_mcr_rts); 1689 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1690 } 1691 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1692 } 1693 1694 1695 void 1696 comstart(struct tty *tp) 1697 { 1698 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1699 bus_space_tag_t iot = sc->sc_iot; 1700 bus_space_handle_t ioh = sc->sc_ioh; 1701 int s; 1702 1703 if (COM_ISALIVE(sc) == 0) 1704 return; 1705 1706 s = spltty(); 1707 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1708 goto out; 1709 if (sc->sc_tx_stopped) 1710 goto out; 1711 1712 if (tp->t_outq.c_cc <= tp->t_lowat) { 1713 if (ISSET(tp->t_state, TS_ASLEEP)) { 1714 CLR(tp->t_state, TS_ASLEEP); 1715 wakeup(&tp->t_outq); 1716 } 1717 selwakeup(&tp->t_wsel); 1718 if (tp->t_outq.c_cc == 0) 1719 goto out; 1720 } 1721 1722 /* Grab the first contiguous region of buffer space. */ 1723 { 1724 u_char *tba; 1725 int tbc; 1726 1727 tba = tp->t_outq.c_cf; 1728 tbc = ndqb(&tp->t_outq, 0); 1729 1730 (void)splserial(); 1731 COM_LOCK(sc); 1732 1733 sc->sc_tba = tba; 1734 sc->sc_tbc = tbc; 1735 } 1736 1737 SET(tp->t_state, TS_BUSY); 1738 sc->sc_tx_busy = 1; 1739 1740 /* Enable transmit completion interrupts if necessary. */ 1741 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1742 SET(sc->sc_ier, IER_ETXRDY); 1743 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1744 } 1745 1746 /* Output the first chunk of the contiguous buffer. */ 1747 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1748 u_int n; 1749 1750 n = sc->sc_tbc; 1751 if (n > sc->sc_fifolen) 1752 n = sc->sc_fifolen; 1753 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1754 sc->sc_tbc -= n; 1755 sc->sc_tba += n; 1756 } 1757 1758 COM_UNLOCK(sc); 1759 out: 1760 splx(s); 1761 return; 1762 } 1763 1764 /* 1765 * Stop output on a line. 1766 */ 1767 void 1768 comstop(struct tty *tp, int flag) 1769 { 1770 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1771 int s; 1772 1773 s = splserial(); 1774 COM_LOCK(sc); 1775 if (ISSET(tp->t_state, TS_BUSY)) { 1776 /* Stop transmitting at the next chunk. */ 1777 sc->sc_tbc = 0; 1778 sc->sc_heldtbc = 0; 1779 if (!ISSET(tp->t_state, TS_TTSTOP)) 1780 SET(tp->t_state, TS_FLUSH); 1781 } 1782 COM_UNLOCK(sc); 1783 splx(s); 1784 } 1785 1786 void 1787 comdiag(void *arg) 1788 { 1789 struct com_softc *sc = arg; 1790 int overflows, floods; 1791 int s; 1792 1793 s = splserial(); 1794 COM_LOCK(sc); 1795 overflows = sc->sc_overflows; 1796 sc->sc_overflows = 0; 1797 floods = sc->sc_floods; 1798 sc->sc_floods = 0; 1799 sc->sc_errors = 0; 1800 COM_UNLOCK(sc); 1801 splx(s); 1802 1803 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1804 sc->sc_dev.dv_xname, 1805 overflows, overflows == 1 ? "" : "s", 1806 floods, floods == 1 ? "" : "s"); 1807 } 1808 1809 integrate void 1810 com_rxsoft(struct com_softc *sc, struct tty *tp) 1811 { 1812 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1813 u_char *get, *end; 1814 u_int cc, scc; 1815 u_char lsr; 1816 int code; 1817 int s; 1818 1819 end = sc->sc_ebuf; 1820 get = sc->sc_rbget; 1821 scc = cc = com_rbuf_size - sc->sc_rbavail; 1822 1823 if (cc == com_rbuf_size) { 1824 sc->sc_floods++; 1825 if (sc->sc_errors++ == 0) 1826 callout_reset(&sc->sc_diag_callout, 60 * hz, 1827 comdiag, sc); 1828 } 1829 1830 /* If not yet open, drop the entire buffer content here */ 1831 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1832 get += cc << 1; 1833 if (get >= end) 1834 get -= com_rbuf_size << 1; 1835 cc = 0; 1836 } 1837 while (cc) { 1838 code = get[0]; 1839 lsr = get[1]; 1840 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1841 if (ISSET(lsr, LSR_OE)) { 1842 sc->sc_overflows++; 1843 if (sc->sc_errors++ == 0) 1844 callout_reset(&sc->sc_diag_callout, 1845 60 * hz, comdiag, sc); 1846 } 1847 if (ISSET(lsr, LSR_BI | LSR_FE)) 1848 SET(code, TTY_FE); 1849 if (ISSET(lsr, LSR_PE)) 1850 SET(code, TTY_PE); 1851 } 1852 if ((*rint)(code, tp) == -1) { 1853 /* 1854 * The line discipline's buffer is out of space. 1855 */ 1856 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1857 /* 1858 * We're either not using flow control, or the 1859 * line discipline didn't tell us to block for 1860 * some reason. Either way, we have no way to 1861 * know when there's more space available, so 1862 * just drop the rest of the data. 1863 */ 1864 get += cc << 1; 1865 if (get >= end) 1866 get -= com_rbuf_size << 1; 1867 cc = 0; 1868 } else { 1869 /* 1870 * Don't schedule any more receive processing 1871 * until the line discipline tells us there's 1872 * space available (through comhwiflow()). 1873 * Leave the rest of the data in the input 1874 * buffer. 1875 */ 1876 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1877 } 1878 break; 1879 } 1880 get += 2; 1881 if (get >= end) 1882 get = sc->sc_rbuf; 1883 cc--; 1884 } 1885 1886 if (cc != scc) { 1887 sc->sc_rbget = get; 1888 s = splserial(); 1889 COM_LOCK(sc); 1890 1891 cc = sc->sc_rbavail += scc - cc; 1892 /* Buffers should be ok again, release possible block. */ 1893 if (cc >= sc->sc_r_lowat) { 1894 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1895 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1896 SET(sc->sc_ier, IER_ERXRDY); 1897 #ifdef COM_PXA2X0 1898 if (sc->sc_type == COM_TYPE_PXA2x0) 1899 SET(sc->sc_ier, IER_ERXTOUT); 1900 #endif 1901 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1902 com_ier, sc->sc_ier); 1903 } 1904 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1905 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1906 com_hwiflow(sc); 1907 } 1908 } 1909 COM_UNLOCK(sc); 1910 splx(s); 1911 } 1912 } 1913 1914 integrate void 1915 com_txsoft(struct com_softc *sc, struct tty *tp) 1916 { 1917 1918 CLR(tp->t_state, TS_BUSY); 1919 if (ISSET(tp->t_state, TS_FLUSH)) 1920 CLR(tp->t_state, TS_FLUSH); 1921 else 1922 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1923 (*tp->t_linesw->l_start)(tp); 1924 } 1925 1926 integrate void 1927 com_stsoft(struct com_softc *sc, struct tty *tp) 1928 { 1929 u_char msr, delta; 1930 int s; 1931 1932 s = splserial(); 1933 COM_LOCK(sc); 1934 msr = sc->sc_msr; 1935 delta = sc->sc_msr_delta; 1936 sc->sc_msr_delta = 0; 1937 COM_UNLOCK(sc); 1938 splx(s); 1939 1940 if (ISSET(delta, sc->sc_msr_dcd)) { 1941 /* 1942 * Inform the tty layer that carrier detect changed. 1943 */ 1944 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1945 } 1946 1947 if (ISSET(delta, sc->sc_msr_cts)) { 1948 /* Block or unblock output according to flow control. */ 1949 if (ISSET(msr, sc->sc_msr_cts)) { 1950 sc->sc_tx_stopped = 0; 1951 (*tp->t_linesw->l_start)(tp); 1952 } else { 1953 sc->sc_tx_stopped = 1; 1954 } 1955 } 1956 1957 #ifdef COM_DEBUG 1958 if (com_debug) 1959 comstatus(sc, "com_stsoft"); 1960 #endif 1961 } 1962 1963 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1964 void 1965 comsoft(void *arg) 1966 { 1967 struct com_softc *sc = arg; 1968 struct tty *tp; 1969 1970 if (COM_ISALIVE(sc) == 0) 1971 return; 1972 1973 { 1974 #else 1975 void 1976 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1977 comsoft(void) 1978 #else 1979 comsoft(void *arg) 1980 #endif 1981 { 1982 struct com_softc *sc; 1983 struct tty *tp; 1984 int unit; 1985 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1986 int s; 1987 1988 s = splsoftserial(); 1989 com_softintr_scheduled = 0; 1990 #endif 1991 1992 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1993 sc = device_lookup(&com_cd, unit); 1994 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1995 continue; 1996 1997 if (COM_ISALIVE(sc) == 0) 1998 continue; 1999 2000 tp = sc->sc_tty; 2001 if (tp == NULL) 2002 continue; 2003 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2004 continue; 2005 #endif 2006 tp = sc->sc_tty; 2007 2008 if (sc->sc_rx_ready) { 2009 sc->sc_rx_ready = 0; 2010 com_rxsoft(sc, tp); 2011 } 2012 2013 if (sc->sc_st_check) { 2014 sc->sc_st_check = 0; 2015 com_stsoft(sc, tp); 2016 } 2017 2018 if (sc->sc_tx_done) { 2019 sc->sc_tx_done = 0; 2020 com_txsoft(sc, tp); 2021 } 2022 } 2023 2024 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2025 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2026 splx(s); 2027 #endif 2028 #endif 2029 } 2030 2031 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2032 /* there has got to be a better way to do comsoft() */ 2033 }} 2034 #endif 2035 2036 int 2037 comintr(void *arg) 2038 { 2039 struct com_softc *sc = arg; 2040 bus_space_tag_t iot = sc->sc_iot; 2041 bus_space_handle_t ioh = sc->sc_ioh; 2042 u_char *put, *end; 2043 u_int cc; 2044 u_char lsr, iir; 2045 2046 if (COM_ISALIVE(sc) == 0) 2047 return (0); 2048 2049 COM_LOCK(sc); 2050 iir = bus_space_read_1(iot, ioh, com_iir); 2051 if (ISSET(iir, IIR_NOPEND)) { 2052 COM_UNLOCK(sc); 2053 return (0); 2054 } 2055 2056 end = sc->sc_ebuf; 2057 put = sc->sc_rbput; 2058 cc = sc->sc_rbavail; 2059 2060 again: do { 2061 u_char msr, delta; 2062 2063 lsr = bus_space_read_1(iot, ioh, com_lsr); 2064 if (ISSET(lsr, LSR_BI)) { 2065 int cn_trapped = 0; 2066 2067 cn_check_magic(sc->sc_tty->t_dev, 2068 CNC_BREAK, com_cnm_state); 2069 if (cn_trapped) 2070 continue; 2071 #if defined(KGDB) && !defined(DDB) 2072 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2073 kgdb_connect(1); 2074 continue; 2075 } 2076 #endif 2077 } 2078 2079 if (ISSET(lsr, LSR_RCV_MASK) && 2080 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2081 while (cc > 0) { 2082 int cn_trapped = 0; 2083 put[0] = bus_space_read_1(iot, ioh, com_data); 2084 put[1] = lsr; 2085 cn_check_magic(sc->sc_tty->t_dev, 2086 put[0], com_cnm_state); 2087 if (cn_trapped) 2088 goto next; 2089 put += 2; 2090 if (put >= end) 2091 put = sc->sc_rbuf; 2092 cc--; 2093 next: 2094 lsr = bus_space_read_1(iot, ioh, com_lsr); 2095 if (!ISSET(lsr, LSR_RCV_MASK)) 2096 break; 2097 } 2098 2099 /* 2100 * Current string of incoming characters ended because 2101 * no more data was available or we ran out of space. 2102 * Schedule a receive event if any data was received. 2103 * If we're out of space, turn off receive interrupts. 2104 */ 2105 sc->sc_rbput = put; 2106 sc->sc_rbavail = cc; 2107 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2108 sc->sc_rx_ready = 1; 2109 2110 /* 2111 * See if we are in danger of overflowing a buffer. If 2112 * so, use hardware flow control to ease the pressure. 2113 */ 2114 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2115 cc < sc->sc_r_hiwat) { 2116 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2117 com_hwiflow(sc); 2118 } 2119 2120 /* 2121 * If we're out of space, disable receive interrupts 2122 * until the queue has drained a bit. 2123 */ 2124 if (!cc) { 2125 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2126 #ifdef COM_PXA2X0 2127 if (sc->sc_type == COM_TYPE_PXA2x0) 2128 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 2129 else 2130 #endif 2131 CLR(sc->sc_ier, IER_ERXRDY); 2132 bus_space_write_1(iot, ioh, com_ier, 2133 sc->sc_ier); 2134 } 2135 } else { 2136 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 2137 (void) bus_space_read_1(iot, ioh, com_data); 2138 continue; 2139 } 2140 } 2141 2142 msr = bus_space_read_1(iot, ioh, com_msr); 2143 delta = msr ^ sc->sc_msr; 2144 sc->sc_msr = msr; 2145 /* 2146 * Pulse-per-second (PSS) signals on edge of DCD? 2147 * Process these even if line discipline is ignoring DCD. 2148 */ 2149 if (delta & sc->sc_ppsmask) { 2150 struct timeval tv; 2151 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2152 /* XXX nanotime() */ 2153 microtime(&tv); 2154 TIMEVAL_TO_TIMESPEC(&tv, 2155 &sc->ppsinfo.assert_timestamp); 2156 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2157 timespecadd(&sc->ppsinfo.assert_timestamp, 2158 &sc->ppsparam.assert_offset, 2159 &sc->ppsinfo.assert_timestamp); 2160 } 2161 2162 #ifdef PPS_SYNC 2163 if (pps_kc_hardpps_source == sc && 2164 pps_kc_hardpps_mode & PPS_CAPTUREASSERT) { 2165 hardpps(&tv, tv.tv_usec); 2166 } 2167 #endif 2168 sc->ppsinfo.assert_sequence++; 2169 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2170 2171 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2172 /* XXX nanotime() */ 2173 microtime(&tv); 2174 TIMEVAL_TO_TIMESPEC(&tv, 2175 &sc->ppsinfo.clear_timestamp); 2176 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2177 timespecadd(&sc->ppsinfo.clear_timestamp, 2178 &sc->ppsparam.clear_offset, 2179 &sc->ppsinfo.clear_timestamp); 2180 } 2181 2182 #ifdef PPS_SYNC 2183 if (pps_kc_hardpps_source == sc && 2184 pps_kc_hardpps_mode & PPS_CAPTURECLEAR) { 2185 hardpps(&tv, tv.tv_usec); 2186 } 2187 #endif 2188 sc->ppsinfo.clear_sequence++; 2189 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2190 } 2191 } 2192 2193 /* 2194 * Process normal status changes 2195 */ 2196 if (ISSET(delta, sc->sc_msr_mask)) { 2197 SET(sc->sc_msr_delta, delta); 2198 2199 /* 2200 * Stop output immediately if we lose the output 2201 * flow control signal or carrier detect. 2202 */ 2203 if (ISSET(~msr, sc->sc_msr_mask)) { 2204 sc->sc_tbc = 0; 2205 sc->sc_heldtbc = 0; 2206 #ifdef COM_DEBUG 2207 if (com_debug) 2208 comstatus(sc, "comintr "); 2209 #endif 2210 } 2211 2212 sc->sc_st_check = 1; 2213 } 2214 } while (!ISSET((iir = 2215 bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND) && 2216 /* 2217 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 2218 * by IIR read, so we can't do this way: `process all interrupts, 2219 * then do TX if possble'. 2220 */ 2221 (iir & IIR_IMASK) != IIR_TXRDY); 2222 2223 /* 2224 * Read LSR again, since there may be an interrupt between 2225 * the last LSR read and IIR read above. 2226 */ 2227 lsr = bus_space_read_1(iot, ioh, com_lsr); 2228 2229 /* 2230 * See if data can be transmitted as well. 2231 * Schedule tx done event if no data left 2232 * and tty was marked busy. 2233 */ 2234 if (ISSET(lsr, LSR_TXRDY)) { 2235 /* 2236 * If we've delayed a parameter change, do it now, and restart 2237 * output. 2238 */ 2239 if (sc->sc_heldchange) { 2240 com_loadchannelregs(sc); 2241 sc->sc_heldchange = 0; 2242 sc->sc_tbc = sc->sc_heldtbc; 2243 sc->sc_heldtbc = 0; 2244 } 2245 2246 /* Output the next chunk of the contiguous buffer, if any. */ 2247 if (sc->sc_tbc > 0) { 2248 u_int n; 2249 2250 n = sc->sc_tbc; 2251 if (n > sc->sc_fifolen) 2252 n = sc->sc_fifolen; 2253 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2254 sc->sc_tbc -= n; 2255 sc->sc_tba += n; 2256 } else { 2257 /* Disable transmit completion interrupts if necessary. */ 2258 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2259 CLR(sc->sc_ier, IER_ETXRDY); 2260 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2261 } 2262 if (sc->sc_tx_busy) { 2263 sc->sc_tx_busy = 0; 2264 sc->sc_tx_done = 1; 2265 } 2266 } 2267 } 2268 2269 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2270 goto again; 2271 2272 COM_UNLOCK(sc); 2273 2274 /* Wake up the poller. */ 2275 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2276 softintr_schedule(sc->sc_si); 2277 #else 2278 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2279 setsoftserial(); 2280 #else 2281 if (!com_softintr_scheduled) { 2282 com_softintr_scheduled = 1; 2283 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2284 } 2285 #endif 2286 #endif 2287 2288 #if NRND > 0 && defined(RND_COM) 2289 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2290 #endif 2291 2292 return (1); 2293 } 2294 2295 /* 2296 * The following functions are polled getc and putc routines, shared 2297 * by the console and kgdb glue. 2298 * 2299 * The read-ahead code is so that you can detect pending in-band 2300 * cn_magic in polled mode while doing output rather than having to 2301 * wait until the kernel decides it needs input. 2302 */ 2303 2304 #define MAX_READAHEAD 20 2305 static int com_readahead[MAX_READAHEAD]; 2306 static int com_readaheadcount = 0; 2307 2308 int 2309 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2310 { 2311 int s = splserial(); 2312 u_char stat, c; 2313 2314 /* got a character from reading things earlier */ 2315 if (com_readaheadcount > 0) { 2316 int i; 2317 2318 c = com_readahead[0]; 2319 for (i = 1; i < com_readaheadcount; i++) { 2320 com_readahead[i-1] = com_readahead[i]; 2321 } 2322 com_readaheadcount--; 2323 splx(s); 2324 return (c); 2325 } 2326 2327 /* block until a character becomes available */ 2328 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2329 ; 2330 2331 c = bus_space_read_1(iot, ioh, com_data); 2332 stat = bus_space_read_1(iot, ioh, com_iir); 2333 { 2334 int cn_trapped = 0; /* unused */ 2335 #ifdef DDB 2336 extern int db_active; 2337 if (!db_active) 2338 #endif 2339 cn_check_magic(dev, c, com_cnm_state); 2340 } 2341 splx(s); 2342 return (c); 2343 } 2344 2345 void 2346 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2347 { 2348 int s = splserial(); 2349 int cin, stat, timo; 2350 2351 if (com_readaheadcount < MAX_READAHEAD 2352 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2353 int cn_trapped = 0; 2354 cin = bus_space_read_1(iot, ioh, com_data); 2355 stat = bus_space_read_1(iot, ioh, com_iir); 2356 cn_check_magic(dev, cin, com_cnm_state); 2357 com_readahead[com_readaheadcount++] = cin; 2358 } 2359 2360 /* wait for any pending transmission to finish */ 2361 timo = 150000; 2362 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2363 continue; 2364 2365 bus_space_write_1(iot, ioh, com_data, c); 2366 COM_BARRIER(iot, ioh, BR | BW); 2367 2368 splx(s); 2369 } 2370 2371 /* 2372 * Initialize UART for use as console or KGDB line. 2373 */ 2374 int 2375 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2376 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2377 { 2378 bus_space_handle_t ioh; 2379 2380 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2381 return (ENOMEM); /* ??? */ 2382 2383 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2384 bus_space_write_1(iot, ioh, com_efr, 0); 2385 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2386 rate = comspeed(rate, frequency, type); 2387 bus_space_write_1(iot, ioh, com_dlbl, rate); 2388 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2389 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2390 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2391 bus_space_write_1(iot, ioh, com_fifo, 2392 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2393 #ifdef COM_PXA2X0 2394 if (type == COM_TYPE_PXA2x0) 2395 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 2396 else 2397 #endif 2398 bus_space_write_1(iot, ioh, com_ier, 0); 2399 2400 *iohp = ioh; 2401 return (0); 2402 } 2403 2404 /* 2405 * Following are all routines needed for COM to act as console 2406 */ 2407 struct consdev comcons = { 2408 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2409 NODEV, CN_NORMAL 2410 }; 2411 2412 2413 int 2414 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2415 int type, tcflag_t cflag) 2416 { 2417 int res; 2418 2419 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2420 if (res) 2421 return (res); 2422 2423 cn_tab = &comcons; 2424 cn_init_magic(&com_cnm_state); 2425 cn_set_magic("\047\001"); /* default magic is BREAK */ 2426 2427 comconstag = iot; 2428 comconsaddr = iobase; 2429 comconsrate = rate; 2430 comconscflag = cflag; 2431 2432 return (0); 2433 } 2434 2435 int 2436 comcngetc(dev_t dev) 2437 { 2438 2439 return (com_common_getc(dev, comconstag, comconsioh)); 2440 } 2441 2442 /* 2443 * Console kernel output character routine. 2444 */ 2445 void 2446 comcnputc(dev_t dev, int c) 2447 { 2448 2449 com_common_putc(dev, comconstag, comconsioh, c); 2450 } 2451 2452 void 2453 comcnpollc(dev_t dev, int on) 2454 { 2455 2456 } 2457 2458 #ifdef KGDB 2459 int 2460 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2461 int frequency, int type, tcflag_t cflag) 2462 { 2463 int res; 2464 2465 if (iot == comconstag && iobase == comconsaddr) { 2466 #if !defined(DDB) 2467 return (EBUSY); /* cannot share with console */ 2468 #else 2469 com_kgdb_ioh = comconsioh; 2470 #endif 2471 } else { 2472 res = cominit(iot, iobase, rate, frequency, type, cflag, 2473 &com_kgdb_ioh); 2474 if (res) 2475 return (res); 2476 2477 /* 2478 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2479 * expects this to be initialized 2480 */ 2481 cn_init_magic(&com_cnm_state); 2482 cn_set_magic("\047\001"); 2483 } 2484 2485 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2486 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2487 2488 com_kgdb_iot = iot; 2489 com_kgdb_addr = iobase; 2490 2491 return (0); 2492 } 2493 2494 /* ARGSUSED */ 2495 int 2496 com_kgdb_getc(void *arg) 2497 { 2498 2499 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2500 } 2501 2502 /* ARGSUSED */ 2503 void 2504 com_kgdb_putc(void *arg, int c) 2505 { 2506 2507 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2508 } 2509 #endif /* KGDB */ 2510 2511 /* helper function to identify the com ports used by 2512 console or KGDB (and not yet autoconf attached) */ 2513 int 2514 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2515 { 2516 bus_space_handle_t help; 2517 2518 if (!comconsattached && 2519 iot == comconstag && iobase == comconsaddr) 2520 help = comconsioh; 2521 #ifdef KGDB 2522 else if (!com_kgdb_attached && 2523 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2524 help = com_kgdb_ioh; 2525 #endif 2526 else 2527 return (0); 2528 2529 if (ioh) 2530 *ioh = help; 2531 return (1); 2532 } 2533
Indexes created Tue Sep 30 07:10:03 GMT 2025