com.c revision 1.243
1 /* $NetBSD: com.c,v 1.243 2006/05/14 21:42:27 elad Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.243 2006/05/14 21:42:27 elad Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 #include <sys/kauth.h> 125 126 #include <machine/intr.h> 127 #include <machine/bus.h> 128 129 #include <dev/ic/comreg.h> 130 #include <dev/ic/comvar.h> 131 #include <dev/ic/ns16550reg.h> 132 #include <dev/ic/st16650reg.h> 133 #ifdef COM_HAYESP 134 #include <dev/ic/hayespreg.h> 135 #endif 136 #define com_lcr com_cfcr 137 #include <dev/cons.h> 138 139 #ifdef COM_HAYESP 140 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 141 #endif 142 143 static void com_enable_debugport(struct com_softc *); 144 145 void com_config(struct com_softc *); 146 void com_shutdown(struct com_softc *); 147 int comspeed(long, long, int); 148 static u_char cflag2lcr(tcflag_t); 149 int comparam(struct tty *, struct termios *); 150 void comstart(struct tty *); 151 int comhwiflow(struct tty *, int); 152 153 void com_loadchannelregs(struct com_softc *); 154 void com_hwiflow(struct com_softc *); 155 void com_break(struct com_softc *, int); 156 void com_modem(struct com_softc *, int); 157 void tiocm_to_com(struct com_softc *, u_long, int); 158 int com_to_tiocm(struct com_softc *); 159 void com_iflush(struct com_softc *); 160 161 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 162 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 163 164 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 165 bus_space_handle_t *); 166 167 int comcngetc(dev_t); 168 void comcnputc(dev_t, int); 169 void comcnpollc(dev_t, int); 170 171 #define integrate static inline 172 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 173 void comsoft(void *); 174 #else 175 #ifndef __NO_SOFT_SERIAL_INTERRUPT 176 void comsoft(void); 177 #else 178 void comsoft(void *); 179 static struct callout comsoft_callout = CALLOUT_INITIALIZER; 180 #endif 181 #endif 182 integrate void com_rxsoft(struct com_softc *, struct tty *); 183 integrate void com_txsoft(struct com_softc *, struct tty *); 184 integrate void com_stsoft(struct com_softc *, struct tty *); 185 integrate void com_schedrx(struct com_softc *); 186 void comdiag(void *); 187 188 extern struct cfdriver com_cd; 189 190 dev_type_open(comopen); 191 dev_type_close(comclose); 192 dev_type_read(comread); 193 dev_type_write(comwrite); 194 dev_type_ioctl(comioctl); 195 dev_type_stop(comstop); 196 dev_type_tty(comtty); 197 dev_type_poll(compoll); 198 199 const struct cdevsw com_cdevsw = { 200 comopen, comclose, comread, comwrite, comioctl, 201 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 202 }; 203 204 /* 205 * Make this an option variable one can patch. 206 * But be warned: this must be a power of 2! 207 */ 208 u_int com_rbuf_size = COM_RING_SIZE; 209 210 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 211 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 212 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 213 214 static bus_addr_t comconsaddr; 215 static bus_space_tag_t comconstag; 216 static bus_space_handle_t comconsioh; 217 static int comconsattached; 218 static int comconsrate; 219 static tcflag_t comconscflag; 220 static struct cnm_state com_cnm_state; 221 222 static int ppscap = 223 PPS_TSFMT_TSPEC | 224 PPS_CAPTUREASSERT | 225 PPS_CAPTURECLEAR | 226 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 227 228 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 229 #ifdef __NO_SOFT_SERIAL_INTERRUPT 230 volatile int com_softintr_scheduled; 231 #endif 232 #endif 233 234 #ifdef KGDB 235 #include <sys/kgdb.h> 236 237 static bus_addr_t com_kgdb_addr; 238 static bus_space_tag_t com_kgdb_iot; 239 static bus_space_handle_t com_kgdb_ioh; 240 static int com_kgdb_attached; 241 242 int com_kgdb_getc(void *); 243 void com_kgdb_putc(void *, int); 244 #endif /* KGDB */ 245 246 #define COMUNIT_MASK 0x7ffff 247 #define COMDIALOUT_MASK 0x80000 248 249 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 250 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 251 252 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 253 device_is_active(&(sc)->sc_dev)) 254 255 #define BR BUS_SPACE_BARRIER_READ 256 #define BW BUS_SPACE_BARRIER_WRITE 257 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 258 259 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 260 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 261 262 /*ARGSUSED*/ 263 int 264 comspeed(long speed, long frequency, int type) 265 { 266 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 267 268 int x, err; 269 270 #if 0 271 if (speed == 0) 272 return (0); 273 #endif 274 if (speed <= 0) 275 return (-1); 276 x = divrnd(frequency / 16, speed); 277 if (x <= 0) 278 return (-1); 279 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 280 if (err < 0) 281 err = -err; 282 if (err > COM_TOLERANCE) 283 return (-1); 284 return (x); 285 286 #undef divrnd 287 } 288 289 #ifdef COM_DEBUG 290 int com_debug = 0; 291 292 void comstatus(struct com_softc *, const char *); 293 void 294 comstatus(struct com_softc *sc, const char *str) 295 { 296 struct tty *tp = sc->sc_tty; 297 298 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 299 sc->sc_dev.dv_xname, str, 300 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 301 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 302 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 303 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 304 sc->sc_tx_stopped ? '+' : '-'); 305 306 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 307 sc->sc_dev.dv_xname, str, 308 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 309 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 310 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 311 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 312 sc->sc_rx_flags); 313 } 314 #endif 315 316 int 317 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 318 { 319 320 /* force access to id reg */ 321 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 322 bus_space_write_1(iot, ioh, com_iir, 0); 323 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 324 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 325 return (0); 326 327 return (1); 328 } 329 330 #ifdef COM_HAYESP 331 int 332 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 333 { 334 char val, dips; 335 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 336 bus_space_tag_t iot = sc->sc_iot; 337 338 /* 339 * Hayes ESP cards have two iobases. One is for compatibility with 340 * 16550 serial chips, and at the same ISA PC base addresses. The 341 * other is for ESP-specific enhanced features, and lies at a 342 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 343 */ 344 345 /* Test for ESP signature */ 346 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 347 return (0); 348 349 /* 350 * ESP is present at ESP enhanced base address; unknown com port 351 */ 352 353 /* Get the dip-switch configurations */ 354 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 355 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 356 357 /* Determine which com port this ESP card services: bits 0,1 of */ 358 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 359 if (sc->sc_iobase != combaselist[dips & 0x03]) 360 return (0); 361 362 printf(": ESP"); 363 364 /* Check ESP Self Test bits. */ 365 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 366 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 367 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 368 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 369 if ((val & 0x70) < 0x20) { 370 printf("-old (%o)", val & 0x70); 371 /* we do not support the necessary features */ 372 return (0); 373 } 374 375 /* Check for ability to emulate 16550: bit 8 == 1 */ 376 if ((dips & 0x80) == 0) { 377 printf(" slave"); 378 /* XXX Does slave really mean no 16550 support?? */ 379 return (0); 380 } 381 382 /* 383 * If we made it this far, we are a full-featured ESP v2.0 (or 384 * better), at the correct com port address. 385 */ 386 387 sc->sc_type = COM_TYPE_HAYESP; 388 printf(", 1024 byte fifo\n"); 389 return (1); 390 } 391 #endif 392 393 static void 394 com_enable_debugport(struct com_softc *sc) 395 { 396 int s; 397 398 /* Turn on line break interrupt, set carrier. */ 399 s = splserial(); 400 COM_LOCK(sc); 401 sc->sc_ier = IER_ERXRDY; 402 #ifdef COM_PXA2X0 403 if (sc->sc_type == COM_TYPE_PXA2x0) 404 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 405 #endif 406 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 407 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 408 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 409 COM_UNLOCK(sc); 410 splx(s); 411 } 412 413 void 414 com_attach_subr(struct com_softc *sc) 415 { 416 bus_addr_t iobase = sc->sc_iobase; 417 bus_space_tag_t iot = sc->sc_iot; 418 bus_space_handle_t ioh = sc->sc_ioh; 419 struct tty *tp; 420 #ifdef COM_16650 421 u_int8_t lcr; 422 #endif 423 #ifdef COM_HAYESP 424 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 425 int *hayespp; 426 #endif 427 const char *fifo_msg = NULL; 428 429 callout_init(&sc->sc_diag_callout); 430 simple_lock_init(&sc->sc_lock); 431 432 /* Disable interrupts before configuring the device. */ 433 #ifdef COM_PXA2X0 434 if (sc->sc_type == COM_TYPE_PXA2x0) 435 sc->sc_ier = IER_EUART; 436 else 437 #endif 438 sc->sc_ier = 0; 439 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 440 441 if (iot == comconstag && iobase == comconsaddr) { 442 comconsattached = 1; 443 444 /* Make sure the console is always "hardwired". */ 445 delay(10000); /* wait for output to finish */ 446 SET(sc->sc_hwflags, COM_HW_CONSOLE); 447 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 448 } 449 450 #ifdef COM_HAYESP 451 sc->sc_prescaler = 0; /* set prescaler to x1. */ 452 453 /* Look for a Hayes ESP board. */ 454 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 455 bus_space_handle_t hayespioh; 456 457 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 458 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 459 continue; 460 if (comprobeHAYESP(hayespioh, sc)) { 461 sc->sc_hayespioh = hayespioh; 462 sc->sc_fifolen = 1024; 463 464 break; 465 } 466 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 467 } 468 /* No ESP; look for other things. */ 469 if (sc->sc_type != COM_TYPE_HAYESP) { 470 #endif 471 sc->sc_fifolen = 1; 472 /* look for a NS 16550AF UART with FIFOs */ 473 bus_space_write_1(iot, ioh, com_fifo, 474 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 475 delay(100); 476 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 477 == IIR_FIFO_MASK) 478 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 479 == FIFO_TRIGGER_14) { 480 SET(sc->sc_hwflags, COM_HW_FIFO); 481 482 #ifdef COM_16650 483 /* 484 * IIR changes into the EFR if LCR is set to LCR_EERS 485 * on 16650s. We also know IIR != 0 at this point. 486 * Write 0 into the EFR, and read it. If the result 487 * is 0, we have a 16650. 488 * 489 * Older 16650s were broken; the test to detect them 490 * is taken from the Linux driver. Apparently 491 * setting DLAB enable gives access to the EFR on 492 * these chips. 493 */ 494 lcr = bus_space_read_1(iot, ioh, com_lcr); 495 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 496 bus_space_write_1(iot, ioh, com_efr, 0); 497 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 498 bus_space_write_1(iot, ioh, com_lcr, 499 lcr | LCR_DLAB); 500 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 501 CLR(sc->sc_hwflags, COM_HW_FIFO); 502 sc->sc_fifolen = 0; 503 } else { 504 SET(sc->sc_hwflags, COM_HW_FLOW); 505 sc->sc_fifolen = 32; 506 } 507 } else 508 #endif 509 sc->sc_fifolen = 16; 510 511 #ifdef COM_16650 512 bus_space_write_1(iot, ioh, com_lcr, lcr); 513 if (sc->sc_fifolen == 0) 514 fifo_msg = "st16650, broken fifo"; 515 else if (sc->sc_fifolen == 32) 516 fifo_msg = "st16650a, working fifo"; 517 else 518 #endif 519 fifo_msg = "ns16550a, working fifo"; 520 } else 521 fifo_msg = "ns16550, broken fifo"; 522 else 523 fifo_msg = "ns8250 or ns16450, no fifo"; 524 bus_space_write_1(iot, ioh, com_fifo, 0); 525 /* 526 * Some chips will clear down both Tx and Rx FIFOs when zero is 527 * written to com_fifo. If this chip is the console, writing zero 528 * results in some of the chip/FIFO description being lost, so delay 529 * printing it until now. 530 */ 531 delay(10); 532 aprint_normal(": %s\n", fifo_msg); 533 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 534 sc->sc_fifolen = 1; 535 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 536 } 537 #ifdef COM_HAYESP 538 } 539 #endif 540 541 tp = ttymalloc(); 542 tp->t_oproc = comstart; 543 tp->t_param = comparam; 544 tp->t_hwiflow = comhwiflow; 545 546 sc->sc_tty = tp; 547 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 548 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 549 sc->sc_rbavail = com_rbuf_size; 550 if (sc->sc_rbuf == NULL) { 551 aprint_error("%s: unable to allocate ring buffer\n", 552 sc->sc_dev.dv_xname); 553 return; 554 } 555 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 556 557 tty_attach(tp); 558 559 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 560 SET(sc->sc_mcr, MCR_IENABLE); 561 562 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 563 int maj; 564 565 /* locate the major number */ 566 maj = cdevsw_lookup_major(&com_cdevsw); 567 568 tp->t_dev = cn_tab->cn_dev = makedev(maj, 569 device_unit(&sc->sc_dev)); 570 571 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 572 } 573 574 #ifdef KGDB 575 /* 576 * Allow kgdb to "take over" this port. If this is 577 * not the console and is the kgdb device, it has 578 * exclusive use. If it's the console _and_ the 579 * kgdb device, it doesn't. 580 */ 581 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 582 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 583 com_kgdb_attached = 1; 584 585 SET(sc->sc_hwflags, COM_HW_KGDB); 586 } 587 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 588 } 589 #endif 590 591 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 592 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 593 #endif 594 595 #if NRND > 0 && defined(RND_COM) 596 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 597 RND_TYPE_TTY, 0); 598 #endif 599 600 /* if there are no enable/disable functions, assume the device 601 is always enabled */ 602 if (!sc->enable) 603 sc->enabled = 1; 604 605 com_config(sc); 606 607 SET(sc->sc_hwflags, COM_HW_DEV_OK); 608 } 609 610 void 611 com_config(struct com_softc *sc) 612 { 613 bus_space_tag_t iot = sc->sc_iot; 614 bus_space_handle_t ioh = sc->sc_ioh; 615 616 /* Disable interrupts before configuring the device. */ 617 #ifdef COM_PXA2X0 618 if (sc->sc_type == COM_TYPE_PXA2x0) 619 sc->sc_ier = IER_EUART; 620 else 621 #endif 622 sc->sc_ier = 0; 623 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 624 (void) bus_space_read_1(iot, ioh, com_iir); 625 626 #ifdef COM_HAYESP 627 /* Look for a Hayes ESP board. */ 628 if (sc->sc_type == COM_TYPE_HAYESP) { 629 sc->sc_fifolen = 1024; 630 631 /* Set 16550 compatibility mode */ 632 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 633 HAYESP_SETMODE); 634 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 635 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 636 HAYESP_MODE_SCALE); 637 638 /* Set RTS/CTS flow control */ 639 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 640 HAYESP_SETFLOWTYPE); 641 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 642 HAYESP_FLOW_RTS); 643 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 644 HAYESP_FLOW_CTS); 645 646 /* Set flow control levels */ 647 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 648 HAYESP_SETRXFLOW); 649 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 650 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 651 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 652 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 653 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 654 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 655 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 656 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 657 } 658 #endif 659 660 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 661 com_enable_debugport(sc); 662 } 663 664 int 665 com_detach(struct device *self, int flags) 666 { 667 struct com_softc *sc = (struct com_softc *)self; 668 int maj, mn; 669 670 /* locate the major number */ 671 maj = cdevsw_lookup_major(&com_cdevsw); 672 673 /* Nuke the vnodes for any open instances. */ 674 mn = device_unit(self); 675 vdevgone(maj, mn, mn, VCHR); 676 677 mn |= COMDIALOUT_MASK; 678 vdevgone(maj, mn, mn, VCHR); 679 680 if (sc->sc_rbuf == NULL) { 681 /* 682 * Ring buffer allocation failed in the com_attach_subr, 683 * only the tty is allocated, and nothing else. 684 */ 685 ttyfree(sc->sc_tty); 686 return 0; 687 } 688 689 /* Free the receive buffer. */ 690 free(sc->sc_rbuf, M_DEVBUF); 691 692 /* Detach and free the tty. */ 693 tty_detach(sc->sc_tty); 694 ttyfree(sc->sc_tty); 695 696 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 697 /* Unhook the soft interrupt handler. */ 698 softintr_disestablish(sc->sc_si); 699 #endif 700 701 #if NRND > 0 && defined(RND_COM) 702 /* Unhook the entropy source. */ 703 rnd_detach_source(&sc->rnd_source); 704 #endif 705 706 return (0); 707 } 708 709 int 710 com_activate(struct device *self, enum devact act) 711 { 712 struct com_softc *sc = (struct com_softc *)self; 713 int s, rv = 0; 714 715 s = splserial(); 716 COM_LOCK(sc); 717 switch (act) { 718 case DVACT_ACTIVATE: 719 rv = EOPNOTSUPP; 720 break; 721 722 case DVACT_DEACTIVATE: 723 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 724 rv = EBUSY; 725 break; 726 } 727 728 if (sc->disable != NULL && sc->enabled != 0) { 729 (*sc->disable)(sc); 730 sc->enabled = 0; 731 } 732 break; 733 } 734 735 COM_UNLOCK(sc); 736 splx(s); 737 return (rv); 738 } 739 740 void 741 com_shutdown(struct com_softc *sc) 742 { 743 struct tty *tp = sc->sc_tty; 744 int s; 745 746 s = splserial(); 747 COM_LOCK(sc); 748 749 /* If we were asserting flow control, then deassert it. */ 750 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 751 com_hwiflow(sc); 752 753 /* Clear any break condition set with TIOCSBRK. */ 754 com_break(sc, 0); 755 756 /* Turn off PPS capture on last close. */ 757 sc->sc_ppsmask = 0; 758 sc->ppsparam.mode = 0; 759 760 /* 761 * Hang up if necessary. Wait a bit, so the other side has time to 762 * notice even if we immediately open the port again. 763 * Avoid tsleeping above splhigh(). 764 */ 765 if (ISSET(tp->t_cflag, HUPCL)) { 766 com_modem(sc, 0); 767 COM_UNLOCK(sc); 768 splx(s); 769 /* XXX tsleep will only timeout */ 770 (void) tsleep(sc, TTIPRI, ttclos, hz); 771 s = splserial(); 772 COM_LOCK(sc); 773 } 774 775 /* Turn off interrupts. */ 776 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 777 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 778 #ifdef COM_PXA2X0 779 if (sc->sc_type == COM_TYPE_PXA2x0) 780 sc->sc_ier |= IER_ERXTOUT; 781 #endif 782 } else 783 sc->sc_ier = 0; 784 785 #ifdef COM_PXA2X0 786 if (sc->sc_type == COM_TYPE_PXA2x0) 787 sc->sc_ier |= IER_EUART; 788 #endif 789 790 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 791 792 if (sc->disable) { 793 #ifdef DIAGNOSTIC 794 if (!sc->enabled) 795 panic("com_shutdown: not enabled?"); 796 #endif 797 (*sc->disable)(sc); 798 sc->enabled = 0; 799 } 800 COM_UNLOCK(sc); 801 splx(s); 802 } 803 804 int 805 comopen(dev_t dev, int flag, int mode, struct lwp *l) 806 { 807 struct com_softc *sc; 808 struct tty *tp; 809 int s, s2; 810 int error; 811 812 sc = device_lookup(&com_cd, COMUNIT(dev)); 813 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 814 sc->sc_rbuf == NULL) 815 return (ENXIO); 816 817 if (!device_is_active(&sc->sc_dev)) 818 return (ENXIO); 819 820 #ifdef KGDB 821 /* 822 * If this is the kgdb port, no other use is permitted. 823 */ 824 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 825 return (EBUSY); 826 #endif 827 828 tp = sc->sc_tty; 829 830 if (ISSET(tp->t_state, TS_ISOPEN) && 831 ISSET(tp->t_state, TS_XCLUDE) && 832 kauth_authorize_generic(l->l_proc->p_cred, 833 KAUTH_GENERIC_ISSUSER, 834 &l->l_proc->p_acflag) != 0) 835 return (EBUSY); 836 837 s = spltty(); 838 839 /* 840 * Do the following iff this is a first open. 841 */ 842 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 843 struct termios t; 844 845 tp->t_dev = dev; 846 847 s2 = splserial(); 848 COM_LOCK(sc); 849 850 if (sc->enable) { 851 if ((*sc->enable)(sc)) { 852 COM_UNLOCK(sc); 853 splx(s2); 854 splx(s); 855 printf("%s: device enable failed\n", 856 sc->sc_dev.dv_xname); 857 return (EIO); 858 } 859 sc->enabled = 1; 860 com_config(sc); 861 } 862 863 /* Turn on interrupts. */ 864 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 865 #ifdef COM_PXA2X0 866 if (sc->sc_type == COM_TYPE_PXA2x0) 867 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 868 #endif 869 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 870 871 /* Fetch the current modem control status, needed later. */ 872 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 873 874 /* Clear PPS capture state on first open. */ 875 sc->sc_ppsmask = 0; 876 sc->ppsparam.mode = 0; 877 878 COM_UNLOCK(sc); 879 splx(s2); 880 881 /* 882 * Initialize the termios status to the defaults. Add in the 883 * sticky bits from TIOCSFLAGS. 884 */ 885 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 886 t.c_ospeed = comconsrate; 887 t.c_cflag = comconscflag; 888 } else { 889 t.c_ospeed = TTYDEF_SPEED; 890 t.c_cflag = TTYDEF_CFLAG; 891 } 892 t.c_ispeed = t.c_ospeed; 893 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 894 SET(t.c_cflag, CLOCAL); 895 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 896 SET(t.c_cflag, CRTSCTS); 897 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 898 SET(t.c_cflag, MDMBUF); 899 /* Make sure comparam() will do something. */ 900 tp->t_ospeed = 0; 901 (void) comparam(tp, &t); 902 tp->t_iflag = TTYDEF_IFLAG; 903 tp->t_oflag = TTYDEF_OFLAG; 904 tp->t_lflag = TTYDEF_LFLAG; 905 ttychars(tp); 906 ttsetwater(tp); 907 908 s2 = splserial(); 909 COM_LOCK(sc); 910 911 /* 912 * Turn on DTR. We must always do this, even if carrier is not 913 * present, because otherwise we'd have to use TIOCSDTR 914 * immediately after setting CLOCAL, which applications do not 915 * expect. We always assert DTR while the device is open 916 * unless explicitly requested to deassert it. 917 */ 918 com_modem(sc, 1); 919 920 /* Clear the input ring, and unblock. */ 921 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 922 sc->sc_rbavail = com_rbuf_size; 923 com_iflush(sc); 924 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 925 com_hwiflow(sc); 926 927 #ifdef COM_DEBUG 928 if (com_debug) 929 comstatus(sc, "comopen "); 930 #endif 931 932 COM_UNLOCK(sc); 933 splx(s2); 934 } 935 936 splx(s); 937 938 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 939 if (error) 940 goto bad; 941 942 error = (*tp->t_linesw->l_open)(dev, tp); 943 if (error) 944 goto bad; 945 946 return (0); 947 948 bad: 949 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 950 /* 951 * We failed to open the device, and nobody else had it opened. 952 * Clean up the state as appropriate. 953 */ 954 com_shutdown(sc); 955 } 956 957 return (error); 958 } 959 960 int 961 comclose(dev_t dev, int flag, int mode, struct lwp *l) 962 { 963 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 964 struct tty *tp = sc->sc_tty; 965 966 /* XXX This is for cons.c. */ 967 if (!ISSET(tp->t_state, TS_ISOPEN)) 968 return (0); 969 970 (*tp->t_linesw->l_close)(tp, flag); 971 ttyclose(tp); 972 973 if (COM_ISALIVE(sc) == 0) 974 return (0); 975 976 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 977 /* 978 * Although we got a last close, the device may still be in 979 * use; e.g. if this was the dialout node, and there are still 980 * processes waiting for carrier on the non-dialout node. 981 */ 982 com_shutdown(sc); 983 } 984 985 return (0); 986 } 987 988 int 989 comread(dev_t dev, struct uio *uio, int flag) 990 { 991 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 992 struct tty *tp = sc->sc_tty; 993 994 if (COM_ISALIVE(sc) == 0) 995 return (EIO); 996 997 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 998 } 999 1000 int 1001 comwrite(dev_t dev, struct uio *uio, int flag) 1002 { 1003 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1004 struct tty *tp = sc->sc_tty; 1005 1006 if (COM_ISALIVE(sc) == 0) 1007 return (EIO); 1008 1009 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1010 } 1011 1012 int 1013 compoll(dev_t dev, int events, struct lwp *l) 1014 { 1015 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1016 struct tty *tp = sc->sc_tty; 1017 1018 if (COM_ISALIVE(sc) == 0) 1019 return (POLLHUP); 1020 1021 return ((*tp->t_linesw->l_poll)(tp, events, l)); 1022 } 1023 1024 struct tty * 1025 comtty(dev_t dev) 1026 { 1027 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1028 struct tty *tp = sc->sc_tty; 1029 1030 return (tp); 1031 } 1032 1033 int 1034 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 1035 { 1036 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1037 struct tty *tp = sc->sc_tty; 1038 struct proc *p = l->l_proc; 1039 int error; 1040 int s; 1041 1042 if (COM_ISALIVE(sc) == 0) 1043 return (EIO); 1044 1045 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1046 if (error != EPASSTHROUGH) 1047 return (error); 1048 1049 error = ttioctl(tp, cmd, data, flag, l); 1050 if (error != EPASSTHROUGH) 1051 return (error); 1052 1053 error = 0; 1054 1055 s = splserial(); 1056 COM_LOCK(sc); 1057 1058 switch (cmd) { 1059 case TIOCSBRK: 1060 com_break(sc, 1); 1061 break; 1062 1063 case TIOCCBRK: 1064 com_break(sc, 0); 1065 break; 1066 1067 case TIOCSDTR: 1068 com_modem(sc, 1); 1069 break; 1070 1071 case TIOCCDTR: 1072 com_modem(sc, 0); 1073 break; 1074 1075 case TIOCGFLAGS: 1076 *(int *)data = sc->sc_swflags; 1077 break; 1078 1079 case TIOCSFLAGS: 1080 error = kauth_authorize_generic(p->p_cred, 1081 KAUTH_GENERIC_ISSUSER, 1082 &p->p_acflag); 1083 if (error) 1084 break; 1085 sc->sc_swflags = *(int *)data; 1086 break; 1087 1088 case TIOCMSET: 1089 case TIOCMBIS: 1090 case TIOCMBIC: 1091 tiocm_to_com(sc, cmd, *(int *)data); 1092 break; 1093 1094 case TIOCMGET: 1095 *(int *)data = com_to_tiocm(sc); 1096 break; 1097 1098 case PPS_IOC_CREATE: 1099 break; 1100 1101 case PPS_IOC_DESTROY: 1102 break; 1103 1104 case PPS_IOC_GETPARAMS: { 1105 pps_params_t *pp; 1106 pp = (pps_params_t *)data; 1107 *pp = sc->ppsparam; 1108 break; 1109 } 1110 1111 case PPS_IOC_SETPARAMS: { 1112 pps_params_t *pp; 1113 int mode; 1114 pp = (pps_params_t *)data; 1115 if (pp->mode & ~ppscap) { 1116 error = EINVAL; 1117 break; 1118 } 1119 sc->ppsparam = *pp; 1120 /* 1121 * Compute msr masks from user-specified timestamp state. 1122 */ 1123 mode = sc->ppsparam.mode; 1124 switch (mode & PPS_CAPTUREBOTH) { 1125 case 0: 1126 sc->sc_ppsmask = 0; 1127 break; 1128 1129 case PPS_CAPTUREASSERT: 1130 sc->sc_ppsmask = MSR_DCD; 1131 sc->sc_ppsassert = MSR_DCD; 1132 sc->sc_ppsclear = -1; 1133 break; 1134 1135 case PPS_CAPTURECLEAR: 1136 sc->sc_ppsmask = MSR_DCD; 1137 sc->sc_ppsassert = -1; 1138 sc->sc_ppsclear = 0; 1139 break; 1140 1141 case PPS_CAPTUREBOTH: 1142 sc->sc_ppsmask = MSR_DCD; 1143 sc->sc_ppsassert = MSR_DCD; 1144 sc->sc_ppsclear = 0; 1145 break; 1146 1147 default: 1148 error = EINVAL; 1149 break; 1150 } 1151 break; 1152 } 1153 1154 case PPS_IOC_GETCAP: 1155 *(int*)data = ppscap; 1156 break; 1157 1158 case PPS_IOC_FETCH: { 1159 pps_info_t *pi; 1160 pi = (pps_info_t *)data; 1161 *pi = sc->ppsinfo; 1162 break; 1163 } 1164 1165 #ifdef PPS_SYNC 1166 case PPS_IOC_KCBIND: { 1167 int edge = (*(int *)data) & PPS_CAPTUREBOTH; 1168 1169 if (edge == 0) { 1170 /* 1171 * remove binding for this source; ignore 1172 * the request if this is not the current 1173 * hardpps source 1174 */ 1175 if (pps_kc_hardpps_source == sc) { 1176 pps_kc_hardpps_source = NULL; 1177 pps_kc_hardpps_mode = 0; 1178 } 1179 } else { 1180 /* 1181 * bind hardpps to this source, replacing any 1182 * previously specified source or edges 1183 */ 1184 pps_kc_hardpps_source = sc; 1185 pps_kc_hardpps_mode = edge; 1186 } 1187 break; 1188 } 1189 #endif /* PPS_SYNC */ 1190 1191 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1192 /* 1193 * Some GPS clocks models use the falling rather than 1194 * rising edge as the on-the-second signal. 1195 * The old API has no way to specify PPS polarity. 1196 */ 1197 sc->sc_ppsmask = MSR_DCD; 1198 #ifndef PPS_TRAILING_EDGE 1199 sc->sc_ppsassert = MSR_DCD; 1200 sc->sc_ppsclear = -1; 1201 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1202 &sc->ppsinfo.assert_timestamp); 1203 #else 1204 sc->sc_ppsassert = -1; 1205 sc->sc_ppsclear = 0; 1206 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1207 &sc->ppsinfo.clear_timestamp); 1208 #endif 1209 break; 1210 1211 default: 1212 error = EPASSTHROUGH; 1213 break; 1214 } 1215 1216 COM_UNLOCK(sc); 1217 splx(s); 1218 1219 #ifdef COM_DEBUG 1220 if (com_debug) 1221 comstatus(sc, "comioctl "); 1222 #endif 1223 1224 return (error); 1225 } 1226 1227 integrate void 1228 com_schedrx(struct com_softc *sc) 1229 { 1230 1231 sc->sc_rx_ready = 1; 1232 1233 /* Wake up the poller. */ 1234 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1235 softintr_schedule(sc->sc_si); 1236 #else 1237 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1238 setsoftserial(); 1239 #else 1240 if (!com_softintr_scheduled) { 1241 com_softintr_scheduled = 1; 1242 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1243 } 1244 #endif 1245 #endif 1246 } 1247 1248 void 1249 com_break(struct com_softc *sc, int onoff) 1250 { 1251 1252 if (onoff) 1253 SET(sc->sc_lcr, LCR_SBREAK); 1254 else 1255 CLR(sc->sc_lcr, LCR_SBREAK); 1256 1257 if (!sc->sc_heldchange) { 1258 if (sc->sc_tx_busy) { 1259 sc->sc_heldtbc = sc->sc_tbc; 1260 sc->sc_tbc = 0; 1261 sc->sc_heldchange = 1; 1262 } else 1263 com_loadchannelregs(sc); 1264 } 1265 } 1266 1267 void 1268 com_modem(struct com_softc *sc, int onoff) 1269 { 1270 1271 if (sc->sc_mcr_dtr == 0) 1272 return; 1273 1274 if (onoff) 1275 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1276 else 1277 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1278 1279 if (!sc->sc_heldchange) { 1280 if (sc->sc_tx_busy) { 1281 sc->sc_heldtbc = sc->sc_tbc; 1282 sc->sc_tbc = 0; 1283 sc->sc_heldchange = 1; 1284 } else 1285 com_loadchannelregs(sc); 1286 } 1287 } 1288 1289 void 1290 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1291 { 1292 u_char combits; 1293 1294 combits = 0; 1295 if (ISSET(ttybits, TIOCM_DTR)) 1296 SET(combits, MCR_DTR); 1297 if (ISSET(ttybits, TIOCM_RTS)) 1298 SET(combits, MCR_RTS); 1299 1300 switch (how) { 1301 case TIOCMBIC: 1302 CLR(sc->sc_mcr, combits); 1303 break; 1304 1305 case TIOCMBIS: 1306 SET(sc->sc_mcr, combits); 1307 break; 1308 1309 case TIOCMSET: 1310 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1311 SET(sc->sc_mcr, combits); 1312 break; 1313 } 1314 1315 if (!sc->sc_heldchange) { 1316 if (sc->sc_tx_busy) { 1317 sc->sc_heldtbc = sc->sc_tbc; 1318 sc->sc_tbc = 0; 1319 sc->sc_heldchange = 1; 1320 } else 1321 com_loadchannelregs(sc); 1322 } 1323 } 1324 1325 int 1326 com_to_tiocm(struct com_softc *sc) 1327 { 1328 u_char combits; 1329 int ttybits = 0; 1330 1331 combits = sc->sc_mcr; 1332 if (ISSET(combits, MCR_DTR)) 1333 SET(ttybits, TIOCM_DTR); 1334 if (ISSET(combits, MCR_RTS)) 1335 SET(ttybits, TIOCM_RTS); 1336 1337 combits = sc->sc_msr; 1338 if (ISSET(combits, MSR_DCD)) 1339 SET(ttybits, TIOCM_CD); 1340 if (ISSET(combits, MSR_CTS)) 1341 SET(ttybits, TIOCM_CTS); 1342 if (ISSET(combits, MSR_DSR)) 1343 SET(ttybits, TIOCM_DSR); 1344 if (ISSET(combits, MSR_RI | MSR_TERI)) 1345 SET(ttybits, TIOCM_RI); 1346 1347 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1348 SET(ttybits, TIOCM_LE); 1349 1350 return (ttybits); 1351 } 1352 1353 static u_char 1354 cflag2lcr(tcflag_t cflag) 1355 { 1356 u_char lcr = 0; 1357 1358 switch (ISSET(cflag, CSIZE)) { 1359 case CS5: 1360 SET(lcr, LCR_5BITS); 1361 break; 1362 case CS6: 1363 SET(lcr, LCR_6BITS); 1364 break; 1365 case CS7: 1366 SET(lcr, LCR_7BITS); 1367 break; 1368 case CS8: 1369 SET(lcr, LCR_8BITS); 1370 break; 1371 } 1372 if (ISSET(cflag, PARENB)) { 1373 SET(lcr, LCR_PENAB); 1374 if (!ISSET(cflag, PARODD)) 1375 SET(lcr, LCR_PEVEN); 1376 } 1377 if (ISSET(cflag, CSTOPB)) 1378 SET(lcr, LCR_STOPB); 1379 1380 return (lcr); 1381 } 1382 1383 int 1384 comparam(struct tty *tp, struct termios *t) 1385 { 1386 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1387 int ospeed; 1388 u_char lcr; 1389 int s; 1390 1391 if (COM_ISALIVE(sc) == 0) 1392 return (EIO); 1393 1394 #ifdef COM_HAYESP 1395 if (sc->sc_type == COM_TYPE_HAYESP) { 1396 int prescaler, speed; 1397 1398 /* 1399 * Calculate UART clock prescaler. It should be in 1400 * range of 0 .. 3. 1401 */ 1402 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1403 prescaler++, speed /= 2) 1404 if ((ospeed = comspeed(speed, sc->sc_frequency, 1405 sc->sc_type)) > 0) 1406 break; 1407 1408 if (prescaler == 4) 1409 return (EINVAL); 1410 sc->sc_prescaler = prescaler; 1411 } else 1412 #endif 1413 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1414 1415 /* Check requested parameters. */ 1416 if (ospeed < 0) 1417 return (EINVAL); 1418 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1419 return (EINVAL); 1420 1421 /* 1422 * For the console, always force CLOCAL and !HUPCL, so that the port 1423 * is always active. 1424 */ 1425 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1426 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1427 SET(t->c_cflag, CLOCAL); 1428 CLR(t->c_cflag, HUPCL); 1429 } 1430 1431 /* 1432 * If there were no changes, don't do anything. This avoids dropping 1433 * input and improves performance when all we did was frob things like 1434 * VMIN and VTIME. 1435 */ 1436 if (tp->t_ospeed == t->c_ospeed && 1437 tp->t_cflag == t->c_cflag) 1438 return (0); 1439 1440 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1441 1442 s = splserial(); 1443 COM_LOCK(sc); 1444 1445 sc->sc_lcr = lcr; 1446 1447 /* 1448 * If we're not in a mode that assumes a connection is present, then 1449 * ignore carrier changes. 1450 */ 1451 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1452 sc->sc_msr_dcd = 0; 1453 else 1454 sc->sc_msr_dcd = MSR_DCD; 1455 /* 1456 * Set the flow control pins depending on the current flow control 1457 * mode. 1458 */ 1459 if (ISSET(t->c_cflag, CRTSCTS)) { 1460 sc->sc_mcr_dtr = MCR_DTR; 1461 sc->sc_mcr_rts = MCR_RTS; 1462 sc->sc_msr_cts = MSR_CTS; 1463 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1464 } else if (ISSET(t->c_cflag, MDMBUF)) { 1465 /* 1466 * For DTR/DCD flow control, make sure we don't toggle DTR for 1467 * carrier detection. 1468 */ 1469 sc->sc_mcr_dtr = 0; 1470 sc->sc_mcr_rts = MCR_DTR; 1471 sc->sc_msr_cts = MSR_DCD; 1472 sc->sc_efr = 0; 1473 } else { 1474 /* 1475 * If no flow control, then always set RTS. This will make 1476 * the other side happy if it mistakenly thinks we're doing 1477 * RTS/CTS flow control. 1478 */ 1479 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1480 sc->sc_mcr_rts = 0; 1481 sc->sc_msr_cts = 0; 1482 sc->sc_efr = 0; 1483 if (ISSET(sc->sc_mcr, MCR_DTR)) 1484 SET(sc->sc_mcr, MCR_RTS); 1485 else 1486 CLR(sc->sc_mcr, MCR_RTS); 1487 } 1488 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1489 1490 #if 0 1491 if (ospeed == 0) 1492 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1493 else 1494 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1495 #endif 1496 1497 sc->sc_dlbl = ospeed; 1498 sc->sc_dlbh = ospeed >> 8; 1499 1500 /* 1501 * Set the FIFO threshold based on the receive speed. 1502 * 1503 * * If it's a low speed, it's probably a mouse or some other 1504 * interactive device, so set the threshold low. 1505 * * If it's a high speed, trim the trigger level down to prevent 1506 * overflows. 1507 * * Otherwise set it a bit higher. 1508 */ 1509 if (sc->sc_type == COM_TYPE_HAYESP) 1510 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1511 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1512 sc->sc_fifo = FIFO_ENABLE | 1513 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8); 1514 else 1515 sc->sc_fifo = 0; 1516 1517 /* And copy to tty. */ 1518 tp->t_ispeed = t->c_ospeed; 1519 tp->t_ospeed = t->c_ospeed; 1520 tp->t_cflag = t->c_cflag; 1521 1522 if (!sc->sc_heldchange) { 1523 if (sc->sc_tx_busy) { 1524 sc->sc_heldtbc = sc->sc_tbc; 1525 sc->sc_tbc = 0; 1526 sc->sc_heldchange = 1; 1527 } else 1528 com_loadchannelregs(sc); 1529 } 1530 1531 if (!ISSET(t->c_cflag, CHWFLOW)) { 1532 /* Disable the high water mark. */ 1533 sc->sc_r_hiwat = 0; 1534 sc->sc_r_lowat = 0; 1535 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1536 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1537 com_schedrx(sc); 1538 } 1539 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1540 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1541 com_hwiflow(sc); 1542 } 1543 } else { 1544 sc->sc_r_hiwat = com_rbuf_hiwat; 1545 sc->sc_r_lowat = com_rbuf_lowat; 1546 } 1547 1548 COM_UNLOCK(sc); 1549 splx(s); 1550 1551 /* 1552 * Update the tty layer's idea of the carrier bit, in case we changed 1553 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1554 * explicit request. 1555 */ 1556 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1557 1558 #ifdef COM_DEBUG 1559 if (com_debug) 1560 comstatus(sc, "comparam "); 1561 #endif 1562 1563 if (!ISSET(t->c_cflag, CHWFLOW)) { 1564 if (sc->sc_tx_stopped) { 1565 sc->sc_tx_stopped = 0; 1566 comstart(tp); 1567 } 1568 } 1569 1570 return (0); 1571 } 1572 1573 void 1574 com_iflush(struct com_softc *sc) 1575 { 1576 bus_space_tag_t iot = sc->sc_iot; 1577 bus_space_handle_t ioh = sc->sc_ioh; 1578 #ifdef DIAGNOSTIC 1579 int reg; 1580 #endif 1581 int timo; 1582 1583 #ifdef DIAGNOSTIC 1584 reg = 0xffff; 1585 #endif 1586 timo = 50000; 1587 /* flush any pending I/O */ 1588 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1589 && --timo) 1590 #ifdef DIAGNOSTIC 1591 reg = 1592 #else 1593 (void) 1594 #endif 1595 bus_space_read_1(iot, ioh, com_data); 1596 #ifdef DIAGNOSTIC 1597 if (!timo) 1598 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1599 reg); 1600 #endif 1601 } 1602 1603 void 1604 com_loadchannelregs(struct com_softc *sc) 1605 { 1606 bus_space_tag_t iot = sc->sc_iot; 1607 bus_space_handle_t ioh = sc->sc_ioh; 1608 1609 /* XXXXX necessary? */ 1610 com_iflush(sc); 1611 1612 #ifdef COM_PXA2X0 1613 if (sc->sc_type == COM_TYPE_PXA2x0) 1614 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1615 else 1616 #endif 1617 bus_space_write_1(iot, ioh, com_ier, 0); 1618 1619 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1620 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1621 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1622 } 1623 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1624 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1625 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1626 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1627 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1628 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1629 #ifdef COM_HAYESP 1630 if (sc->sc_type == COM_TYPE_HAYESP) { 1631 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1632 HAYESP_SETPRESCALER); 1633 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1634 sc->sc_prescaler); 1635 } 1636 #endif 1637 1638 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1639 } 1640 1641 int 1642 comhwiflow(struct tty *tp, int block) 1643 { 1644 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1645 int s; 1646 1647 if (COM_ISALIVE(sc) == 0) 1648 return (0); 1649 1650 if (sc->sc_mcr_rts == 0) 1651 return (0); 1652 1653 s = splserial(); 1654 COM_LOCK(sc); 1655 1656 if (block) { 1657 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1658 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1659 com_hwiflow(sc); 1660 } 1661 } else { 1662 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1663 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1664 com_schedrx(sc); 1665 } 1666 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1667 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1668 com_hwiflow(sc); 1669 } 1670 } 1671 1672 COM_UNLOCK(sc); 1673 splx(s); 1674 return (1); 1675 } 1676 1677 /* 1678 * (un)block input via hw flowcontrol 1679 */ 1680 void 1681 com_hwiflow(struct com_softc *sc) 1682 { 1683 bus_space_tag_t iot = sc->sc_iot; 1684 bus_space_handle_t ioh = sc->sc_ioh; 1685 1686 if (sc->sc_mcr_rts == 0) 1687 return; 1688 1689 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1690 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1691 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1692 } else { 1693 SET(sc->sc_mcr, sc->sc_mcr_rts); 1694 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1695 } 1696 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1697 } 1698 1699 1700 void 1701 comstart(struct tty *tp) 1702 { 1703 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1704 bus_space_tag_t iot = sc->sc_iot; 1705 bus_space_handle_t ioh = sc->sc_ioh; 1706 int s; 1707 1708 if (COM_ISALIVE(sc) == 0) 1709 return; 1710 1711 s = spltty(); 1712 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1713 goto out; 1714 if (sc->sc_tx_stopped) 1715 goto out; 1716 1717 if (tp->t_outq.c_cc <= tp->t_lowat) { 1718 if (ISSET(tp->t_state, TS_ASLEEP)) { 1719 CLR(tp->t_state, TS_ASLEEP); 1720 wakeup(&tp->t_outq); 1721 } 1722 selwakeup(&tp->t_wsel); 1723 if (tp->t_outq.c_cc == 0) 1724 goto out; 1725 } 1726 1727 /* Grab the first contiguous region of buffer space. */ 1728 { 1729 u_char *tba; 1730 int tbc; 1731 1732 tba = tp->t_outq.c_cf; 1733 tbc = ndqb(&tp->t_outq, 0); 1734 1735 (void)splserial(); 1736 COM_LOCK(sc); 1737 1738 sc->sc_tba = tba; 1739 sc->sc_tbc = tbc; 1740 } 1741 1742 SET(tp->t_state, TS_BUSY); 1743 sc->sc_tx_busy = 1; 1744 1745 /* Enable transmit completion interrupts if necessary. */ 1746 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1747 SET(sc->sc_ier, IER_ETXRDY); 1748 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1749 } 1750 1751 /* Output the first chunk of the contiguous buffer. */ 1752 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1753 u_int n; 1754 1755 n = sc->sc_tbc; 1756 if (n > sc->sc_fifolen) 1757 n = sc->sc_fifolen; 1758 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1759 sc->sc_tbc -= n; 1760 sc->sc_tba += n; 1761 } 1762 1763 COM_UNLOCK(sc); 1764 out: 1765 splx(s); 1766 return; 1767 } 1768 1769 /* 1770 * Stop output on a line. 1771 */ 1772 void 1773 comstop(struct tty *tp, int flag) 1774 { 1775 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1776 int s; 1777 1778 s = splserial(); 1779 COM_LOCK(sc); 1780 if (ISSET(tp->t_state, TS_BUSY)) { 1781 /* Stop transmitting at the next chunk. */ 1782 sc->sc_tbc = 0; 1783 sc->sc_heldtbc = 0; 1784 if (!ISSET(tp->t_state, TS_TTSTOP)) 1785 SET(tp->t_state, TS_FLUSH); 1786 } 1787 COM_UNLOCK(sc); 1788 splx(s); 1789 } 1790 1791 void 1792 comdiag(void *arg) 1793 { 1794 struct com_softc *sc = arg; 1795 int overflows, floods; 1796 int s; 1797 1798 s = splserial(); 1799 COM_LOCK(sc); 1800 overflows = sc->sc_overflows; 1801 sc->sc_overflows = 0; 1802 floods = sc->sc_floods; 1803 sc->sc_floods = 0; 1804 sc->sc_errors = 0; 1805 COM_UNLOCK(sc); 1806 splx(s); 1807 1808 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1809 sc->sc_dev.dv_xname, 1810 overflows, overflows == 1 ? "" : "s", 1811 floods, floods == 1 ? "" : "s"); 1812 } 1813 1814 integrate void 1815 com_rxsoft(struct com_softc *sc, struct tty *tp) 1816 { 1817 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1818 u_char *get, *end; 1819 u_int cc, scc; 1820 u_char lsr; 1821 int code; 1822 int s; 1823 1824 end = sc->sc_ebuf; 1825 get = sc->sc_rbget; 1826 scc = cc = com_rbuf_size - sc->sc_rbavail; 1827 1828 if (cc == com_rbuf_size) { 1829 sc->sc_floods++; 1830 if (sc->sc_errors++ == 0) 1831 callout_reset(&sc->sc_diag_callout, 60 * hz, 1832 comdiag, sc); 1833 } 1834 1835 /* If not yet open, drop the entire buffer content here */ 1836 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1837 get += cc << 1; 1838 if (get >= end) 1839 get -= com_rbuf_size << 1; 1840 cc = 0; 1841 } 1842 while (cc) { 1843 code = get[0]; 1844 lsr = get[1]; 1845 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1846 if (ISSET(lsr, LSR_OE)) { 1847 sc->sc_overflows++; 1848 if (sc->sc_errors++ == 0) 1849 callout_reset(&sc->sc_diag_callout, 1850 60 * hz, comdiag, sc); 1851 } 1852 if (ISSET(lsr, LSR_BI | LSR_FE)) 1853 SET(code, TTY_FE); 1854 if (ISSET(lsr, LSR_PE)) 1855 SET(code, TTY_PE); 1856 } 1857 if ((*rint)(code, tp) == -1) { 1858 /* 1859 * The line discipline's buffer is out of space. 1860 */ 1861 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1862 /* 1863 * We're either not using flow control, or the 1864 * line discipline didn't tell us to block for 1865 * some reason. Either way, we have no way to 1866 * know when there's more space available, so 1867 * just drop the rest of the data. 1868 */ 1869 get += cc << 1; 1870 if (get >= end) 1871 get -= com_rbuf_size << 1; 1872 cc = 0; 1873 } else { 1874 /* 1875 * Don't schedule any more receive processing 1876 * until the line discipline tells us there's 1877 * space available (through comhwiflow()). 1878 * Leave the rest of the data in the input 1879 * buffer. 1880 */ 1881 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1882 } 1883 break; 1884 } 1885 get += 2; 1886 if (get >= end) 1887 get = sc->sc_rbuf; 1888 cc--; 1889 } 1890 1891 if (cc != scc) { 1892 sc->sc_rbget = get; 1893 s = splserial(); 1894 COM_LOCK(sc); 1895 1896 cc = sc->sc_rbavail += scc - cc; 1897 /* Buffers should be ok again, release possible block. */ 1898 if (cc >= sc->sc_r_lowat) { 1899 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1900 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1901 SET(sc->sc_ier, IER_ERXRDY); 1902 #ifdef COM_PXA2X0 1903 if (sc->sc_type == COM_TYPE_PXA2x0) 1904 SET(sc->sc_ier, IER_ERXTOUT); 1905 #endif 1906 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1907 com_ier, sc->sc_ier); 1908 } 1909 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1910 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1911 com_hwiflow(sc); 1912 } 1913 } 1914 COM_UNLOCK(sc); 1915 splx(s); 1916 } 1917 } 1918 1919 integrate void 1920 com_txsoft(struct com_softc *sc, struct tty *tp) 1921 { 1922 1923 CLR(tp->t_state, TS_BUSY); 1924 if (ISSET(tp->t_state, TS_FLUSH)) 1925 CLR(tp->t_state, TS_FLUSH); 1926 else 1927 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1928 (*tp->t_linesw->l_start)(tp); 1929 } 1930 1931 integrate void 1932 com_stsoft(struct com_softc *sc, struct tty *tp) 1933 { 1934 u_char msr, delta; 1935 int s; 1936 1937 s = splserial(); 1938 COM_LOCK(sc); 1939 msr = sc->sc_msr; 1940 delta = sc->sc_msr_delta; 1941 sc->sc_msr_delta = 0; 1942 COM_UNLOCK(sc); 1943 splx(s); 1944 1945 if (ISSET(delta, sc->sc_msr_dcd)) { 1946 /* 1947 * Inform the tty layer that carrier detect changed. 1948 */ 1949 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1950 } 1951 1952 if (ISSET(delta, sc->sc_msr_cts)) { 1953 /* Block or unblock output according to flow control. */ 1954 if (ISSET(msr, sc->sc_msr_cts)) { 1955 sc->sc_tx_stopped = 0; 1956 (*tp->t_linesw->l_start)(tp); 1957 } else { 1958 sc->sc_tx_stopped = 1; 1959 } 1960 } 1961 1962 #ifdef COM_DEBUG 1963 if (com_debug) 1964 comstatus(sc, "com_stsoft"); 1965 #endif 1966 } 1967 1968 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1969 void 1970 comsoft(void *arg) 1971 { 1972 struct com_softc *sc = arg; 1973 struct tty *tp; 1974 1975 if (COM_ISALIVE(sc) == 0) 1976 return; 1977 1978 { 1979 #else 1980 void 1981 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1982 comsoft(void) 1983 #else 1984 comsoft(void *arg) 1985 #endif 1986 { 1987 struct com_softc *sc; 1988 struct tty *tp; 1989 int unit; 1990 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1991 int s; 1992 1993 s = splsoftserial(); 1994 com_softintr_scheduled = 0; 1995 #endif 1996 1997 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1998 sc = device_lookup(&com_cd, unit); 1999 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 2000 continue; 2001 2002 if (COM_ISALIVE(sc) == 0) 2003 continue; 2004 2005 tp = sc->sc_tty; 2006 if (tp == NULL) 2007 continue; 2008 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2009 continue; 2010 #endif 2011 tp = sc->sc_tty; 2012 2013 if (sc->sc_rx_ready) { 2014 sc->sc_rx_ready = 0; 2015 com_rxsoft(sc, tp); 2016 } 2017 2018 if (sc->sc_st_check) { 2019 sc->sc_st_check = 0; 2020 com_stsoft(sc, tp); 2021 } 2022 2023 if (sc->sc_tx_done) { 2024 sc->sc_tx_done = 0; 2025 com_txsoft(sc, tp); 2026 } 2027 } 2028 2029 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2030 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2031 splx(s); 2032 #endif 2033 #endif 2034 } 2035 2036 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2037 /* there has got to be a better way to do comsoft() */ 2038 }} 2039 #endif 2040 2041 int 2042 comintr(void *arg) 2043 { 2044 struct com_softc *sc = arg; 2045 bus_space_tag_t iot = sc->sc_iot; 2046 bus_space_handle_t ioh = sc->sc_ioh; 2047 u_char *put, *end; 2048 u_int cc; 2049 u_char lsr, iir; 2050 2051 if (COM_ISALIVE(sc) == 0) 2052 return (0); 2053 2054 COM_LOCK(sc); 2055 iir = bus_space_read_1(iot, ioh, com_iir); 2056 if (ISSET(iir, IIR_NOPEND)) { 2057 COM_UNLOCK(sc); 2058 return (0); 2059 } 2060 2061 end = sc->sc_ebuf; 2062 put = sc->sc_rbput; 2063 cc = sc->sc_rbavail; 2064 2065 again: do { 2066 u_char msr, delta; 2067 2068 lsr = bus_space_read_1(iot, ioh, com_lsr); 2069 if (ISSET(lsr, LSR_BI)) { 2070 int cn_trapped = 0; 2071 2072 cn_check_magic(sc->sc_tty->t_dev, 2073 CNC_BREAK, com_cnm_state); 2074 if (cn_trapped) 2075 continue; 2076 #if defined(KGDB) && !defined(DDB) 2077 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2078 kgdb_connect(1); 2079 continue; 2080 } 2081 #endif 2082 } 2083 2084 if (ISSET(lsr, LSR_RCV_MASK) && 2085 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2086 while (cc > 0) { 2087 int cn_trapped = 0; 2088 put[0] = bus_space_read_1(iot, ioh, com_data); 2089 put[1] = lsr; 2090 cn_check_magic(sc->sc_tty->t_dev, 2091 put[0], com_cnm_state); 2092 if (cn_trapped) 2093 goto next; 2094 put += 2; 2095 if (put >= end) 2096 put = sc->sc_rbuf; 2097 cc--; 2098 next: 2099 lsr = bus_space_read_1(iot, ioh, com_lsr); 2100 if (!ISSET(lsr, LSR_RCV_MASK)) 2101 break; 2102 } 2103 2104 /* 2105 * Current string of incoming characters ended because 2106 * no more data was available or we ran out of space. 2107 * Schedule a receive event if any data was received. 2108 * If we're out of space, turn off receive interrupts. 2109 */ 2110 sc->sc_rbput = put; 2111 sc->sc_rbavail = cc; 2112 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2113 sc->sc_rx_ready = 1; 2114 2115 /* 2116 * See if we are in danger of overflowing a buffer. If 2117 * so, use hardware flow control to ease the pressure. 2118 */ 2119 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2120 cc < sc->sc_r_hiwat) { 2121 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2122 com_hwiflow(sc); 2123 } 2124 2125 /* 2126 * If we're out of space, disable receive interrupts 2127 * until the queue has drained a bit. 2128 */ 2129 if (!cc) { 2130 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2131 #ifdef COM_PXA2X0 2132 if (sc->sc_type == COM_TYPE_PXA2x0) 2133 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 2134 else 2135 #endif 2136 CLR(sc->sc_ier, IER_ERXRDY); 2137 bus_space_write_1(iot, ioh, com_ier, 2138 sc->sc_ier); 2139 } 2140 } else { 2141 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 2142 (void) bus_space_read_1(iot, ioh, com_data); 2143 continue; 2144 } 2145 } 2146 2147 msr = bus_space_read_1(iot, ioh, com_msr); 2148 delta = msr ^ sc->sc_msr; 2149 sc->sc_msr = msr; 2150 /* 2151 * Pulse-per-second (PSS) signals on edge of DCD? 2152 * Process these even if line discipline is ignoring DCD. 2153 */ 2154 if (delta & sc->sc_ppsmask) { 2155 struct timeval tv; 2156 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2157 /* XXX nanotime() */ 2158 microtime(&tv); 2159 TIMEVAL_TO_TIMESPEC(&tv, 2160 &sc->ppsinfo.assert_timestamp); 2161 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2162 timespecadd(&sc->ppsinfo.assert_timestamp, 2163 &sc->ppsparam.assert_offset, 2164 &sc->ppsinfo.assert_timestamp); 2165 } 2166 2167 #ifdef PPS_SYNC 2168 if (pps_kc_hardpps_source == sc && 2169 pps_kc_hardpps_mode & PPS_CAPTUREASSERT) { 2170 hardpps(&tv, tv.tv_usec); 2171 } 2172 #endif 2173 sc->ppsinfo.assert_sequence++; 2174 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2175 2176 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2177 /* XXX nanotime() */ 2178 microtime(&tv); 2179 TIMEVAL_TO_TIMESPEC(&tv, 2180 &sc->ppsinfo.clear_timestamp); 2181 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2182 timespecadd(&sc->ppsinfo.clear_timestamp, 2183 &sc->ppsparam.clear_offset, 2184 &sc->ppsinfo.clear_timestamp); 2185 } 2186 2187 #ifdef PPS_SYNC 2188 if (pps_kc_hardpps_source == sc && 2189 pps_kc_hardpps_mode & PPS_CAPTURECLEAR) { 2190 hardpps(&tv, tv.tv_usec); 2191 } 2192 #endif 2193 sc->ppsinfo.clear_sequence++; 2194 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2195 } 2196 } 2197 2198 /* 2199 * Process normal status changes 2200 */ 2201 if (ISSET(delta, sc->sc_msr_mask)) { 2202 SET(sc->sc_msr_delta, delta); 2203 2204 /* 2205 * Stop output immediately if we lose the output 2206 * flow control signal or carrier detect. 2207 */ 2208 if (ISSET(~msr, sc->sc_msr_mask)) { 2209 sc->sc_tbc = 0; 2210 sc->sc_heldtbc = 0; 2211 #ifdef COM_DEBUG 2212 if (com_debug) 2213 comstatus(sc, "comintr "); 2214 #endif 2215 } 2216 2217 sc->sc_st_check = 1; 2218 } 2219 } while (!ISSET((iir = 2220 bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND) && 2221 /* 2222 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 2223 * by IIR read, so we can't do this way: `process all interrupts, 2224 * then do TX if possble'. 2225 */ 2226 (iir & IIR_IMASK) != IIR_TXRDY); 2227 2228 /* 2229 * Read LSR again, since there may be an interrupt between 2230 * the last LSR read and IIR read above. 2231 */ 2232 lsr = bus_space_read_1(iot, ioh, com_lsr); 2233 2234 /* 2235 * See if data can be transmitted as well. 2236 * Schedule tx done event if no data left 2237 * and tty was marked busy. 2238 */ 2239 if (ISSET(lsr, LSR_TXRDY)) { 2240 /* 2241 * If we've delayed a parameter change, do it now, and restart 2242 * output. 2243 */ 2244 if (sc->sc_heldchange) { 2245 com_loadchannelregs(sc); 2246 sc->sc_heldchange = 0; 2247 sc->sc_tbc = sc->sc_heldtbc; 2248 sc->sc_heldtbc = 0; 2249 } 2250 2251 /* Output the next chunk of the contiguous buffer, if any. */ 2252 if (sc->sc_tbc > 0) { 2253 u_int n; 2254 2255 n = sc->sc_tbc; 2256 if (n > sc->sc_fifolen) 2257 n = sc->sc_fifolen; 2258 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2259 sc->sc_tbc -= n; 2260 sc->sc_tba += n; 2261 } else { 2262 /* Disable transmit completion interrupts if necessary. */ 2263 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2264 CLR(sc->sc_ier, IER_ETXRDY); 2265 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2266 } 2267 if (sc->sc_tx_busy) { 2268 sc->sc_tx_busy = 0; 2269 sc->sc_tx_done = 1; 2270 } 2271 } 2272 } 2273 2274 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2275 goto again; 2276 2277 COM_UNLOCK(sc); 2278 2279 /* Wake up the poller. */ 2280 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2281 softintr_schedule(sc->sc_si); 2282 #else 2283 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2284 setsoftserial(); 2285 #else 2286 if (!com_softintr_scheduled) { 2287 com_softintr_scheduled = 1; 2288 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2289 } 2290 #endif 2291 #endif 2292 2293 #if NRND > 0 && defined(RND_COM) 2294 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2295 #endif 2296 2297 return (1); 2298 } 2299 2300 /* 2301 * The following functions are polled getc and putc routines, shared 2302 * by the console and kgdb glue. 2303 * 2304 * The read-ahead code is so that you can detect pending in-band 2305 * cn_magic in polled mode while doing output rather than having to 2306 * wait until the kernel decides it needs input. 2307 */ 2308 2309 #define MAX_READAHEAD 20 2310 static int com_readahead[MAX_READAHEAD]; 2311 static int com_readaheadcount = 0; 2312 2313 int 2314 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2315 { 2316 int s = splserial(); 2317 u_char stat, c; 2318 2319 /* got a character from reading things earlier */ 2320 if (com_readaheadcount > 0) { 2321 int i; 2322 2323 c = com_readahead[0]; 2324 for (i = 1; i < com_readaheadcount; i++) { 2325 com_readahead[i-1] = com_readahead[i]; 2326 } 2327 com_readaheadcount--; 2328 splx(s); 2329 return (c); 2330 } 2331 2332 /* block until a character becomes available */ 2333 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2334 ; 2335 2336 c = bus_space_read_1(iot, ioh, com_data); 2337 stat = bus_space_read_1(iot, ioh, com_iir); 2338 { 2339 int cn_trapped = 0; /* unused */ 2340 #ifdef DDB 2341 extern int db_active; 2342 if (!db_active) 2343 #endif 2344 cn_check_magic(dev, c, com_cnm_state); 2345 } 2346 splx(s); 2347 return (c); 2348 } 2349 2350 void 2351 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2352 { 2353 int s = splserial(); 2354 int cin, stat, timo; 2355 2356 if (com_readaheadcount < MAX_READAHEAD 2357 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2358 int cn_trapped = 0; 2359 cin = bus_space_read_1(iot, ioh, com_data); 2360 stat = bus_space_read_1(iot, ioh, com_iir); 2361 cn_check_magic(dev, cin, com_cnm_state); 2362 com_readahead[com_readaheadcount++] = cin; 2363 } 2364 2365 /* wait for any pending transmission to finish */ 2366 timo = 150000; 2367 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2368 continue; 2369 2370 bus_space_write_1(iot, ioh, com_data, c); 2371 COM_BARRIER(iot, ioh, BR | BW); 2372 2373 splx(s); 2374 } 2375 2376 /* 2377 * Initialize UART for use as console or KGDB line. 2378 */ 2379 int 2380 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2381 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2382 { 2383 bus_space_handle_t ioh; 2384 2385 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2386 return (ENOMEM); /* ??? */ 2387 2388 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2389 bus_space_write_1(iot, ioh, com_efr, 0); 2390 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2391 rate = comspeed(rate, frequency, type); 2392 bus_space_write_1(iot, ioh, com_dlbl, rate); 2393 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2394 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2395 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2396 bus_space_write_1(iot, ioh, com_fifo, 2397 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2398 #ifdef COM_PXA2X0 2399 if (type == COM_TYPE_PXA2x0) 2400 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 2401 else 2402 #endif 2403 bus_space_write_1(iot, ioh, com_ier, 0); 2404 2405 *iohp = ioh; 2406 return (0); 2407 } 2408 2409 /* 2410 * Following are all routines needed for COM to act as console 2411 */ 2412 struct consdev comcons = { 2413 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2414 NODEV, CN_NORMAL 2415 }; 2416 2417 2418 int 2419 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2420 int type, tcflag_t cflag) 2421 { 2422 int res; 2423 2424 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2425 if (res) 2426 return (res); 2427 2428 cn_tab = &comcons; 2429 cn_init_magic(&com_cnm_state); 2430 cn_set_magic("\047\001"); /* default magic is BREAK */ 2431 2432 comconstag = iot; 2433 comconsaddr = iobase; 2434 comconsrate = rate; 2435 comconscflag = cflag; 2436 2437 return (0); 2438 } 2439 2440 int 2441 comcngetc(dev_t dev) 2442 { 2443 2444 return (com_common_getc(dev, comconstag, comconsioh)); 2445 } 2446 2447 /* 2448 * Console kernel output character routine. 2449 */ 2450 void 2451 comcnputc(dev_t dev, int c) 2452 { 2453 2454 com_common_putc(dev, comconstag, comconsioh, c); 2455 } 2456 2457 void 2458 comcnpollc(dev_t dev, int on) 2459 { 2460 2461 } 2462 2463 #ifdef KGDB 2464 int 2465 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2466 int frequency, int type, tcflag_t cflag) 2467 { 2468 int res; 2469 2470 if (iot == comconstag && iobase == comconsaddr) { 2471 #if !defined(DDB) 2472 return (EBUSY); /* cannot share with console */ 2473 #else 2474 com_kgdb_ioh = comconsioh; 2475 #endif 2476 } else { 2477 res = cominit(iot, iobase, rate, frequency, type, cflag, 2478 &com_kgdb_ioh); 2479 if (res) 2480 return (res); 2481 2482 /* 2483 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2484 * expects this to be initialized 2485 */ 2486 cn_init_magic(&com_cnm_state); 2487 cn_set_magic("\047\001"); 2488 } 2489 2490 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2491 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2492 2493 com_kgdb_iot = iot; 2494 com_kgdb_addr = iobase; 2495 2496 return (0); 2497 } 2498 2499 /* ARGSUSED */ 2500 int 2501 com_kgdb_getc(void *arg) 2502 { 2503 2504 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2505 } 2506 2507 /* ARGSUSED */ 2508 void 2509 com_kgdb_putc(void *arg, int c) 2510 { 2511 2512 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2513 } 2514 #endif /* KGDB */ 2515 2516 /* helper function to identify the com ports used by 2517 console or KGDB (and not yet autoconf attached) */ 2518 int 2519 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2520 { 2521 bus_space_handle_t help; 2522 2523 if (!comconsattached && 2524 iot == comconstag && iobase == comconsaddr) 2525 help = comconsioh; 2526 #ifdef KGDB 2527 else if (!com_kgdb_attached && 2528 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2529 help = com_kgdb_ioh; 2530 #endif 2531 else 2532 return (0); 2533 2534 if (ioh) 2535 *ioh = help; 2536 return (1); 2537 } 2538
Indexes created Fri Sep 26 08:10:20 GMT 2025