com.c revision 1.246
1 /* $NetBSD: com.c,v 1.246 2006/06/25 14:49:49 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.246 2006/06/25 14:49:49 jmcneill Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 #include <sys/kauth.h> 125 126 #include <machine/intr.h> 127 #include <machine/bus.h> 128 129 #include <dev/ic/comreg.h> 130 #include <dev/ic/comvar.h> 131 #include <dev/ic/ns16550reg.h> 132 #include <dev/ic/st16650reg.h> 133 #ifdef COM_HAYESP 134 #include <dev/ic/hayespreg.h> 135 #endif 136 #define com_lcr com_cfcr 137 #include <dev/cons.h> 138 139 #ifdef COM_HAYESP 140 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 141 #endif 142 143 static void com_enable_debugport(struct com_softc *); 144 145 void com_config(struct com_softc *); 146 void com_shutdown(struct com_softc *); 147 int comspeed(long, long, int); 148 static u_char cflag2lcr(tcflag_t); 149 int comparam(struct tty *, struct termios *); 150 void comstart(struct tty *); 151 int comhwiflow(struct tty *, int); 152 153 void com_loadchannelregs(struct com_softc *); 154 void com_hwiflow(struct com_softc *); 155 void com_break(struct com_softc *, int); 156 void com_modem(struct com_softc *, int); 157 void tiocm_to_com(struct com_softc *, u_long, int); 158 int com_to_tiocm(struct com_softc *); 159 void com_iflush(struct com_softc *); 160 void com_power(int, void *); 161 162 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 163 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 164 165 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 166 bus_space_handle_t *); 167 168 int comcngetc(dev_t); 169 void comcnputc(dev_t, int); 170 void comcnpollc(dev_t, int); 171 172 #define integrate static inline 173 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 174 void comsoft(void *); 175 #else 176 #ifndef __NO_SOFT_SERIAL_INTERRUPT 177 void comsoft(void); 178 #else 179 void comsoft(void *); 180 static struct callout comsoft_callout = CALLOUT_INITIALIZER; 181 #endif 182 #endif 183 integrate void com_rxsoft(struct com_softc *, struct tty *); 184 integrate void com_txsoft(struct com_softc *, struct tty *); 185 integrate void com_stsoft(struct com_softc *, struct tty *); 186 integrate void com_schedrx(struct com_softc *); 187 void comdiag(void *); 188 189 extern struct cfdriver com_cd; 190 191 dev_type_open(comopen); 192 dev_type_close(comclose); 193 dev_type_read(comread); 194 dev_type_write(comwrite); 195 dev_type_ioctl(comioctl); 196 dev_type_stop(comstop); 197 dev_type_tty(comtty); 198 dev_type_poll(compoll); 199 200 const struct cdevsw com_cdevsw = { 201 comopen, comclose, comread, comwrite, comioctl, 202 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 203 }; 204 205 /* 206 * Make this an option variable one can patch. 207 * But be warned: this must be a power of 2! 208 */ 209 u_int com_rbuf_size = COM_RING_SIZE; 210 211 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 212 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 213 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 214 215 static bus_addr_t comconsaddr; 216 static bus_space_tag_t comconstag; 217 static bus_space_handle_t comconsioh; 218 static int comconsattached; 219 static int comconsrate; 220 static tcflag_t comconscflag; 221 static struct cnm_state com_cnm_state; 222 223 #ifndef __HAVE_TIMECOUNTER 224 static int ppscap = 225 PPS_TSFMT_TSPEC | 226 PPS_CAPTUREASSERT | 227 PPS_CAPTURECLEAR | 228 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 229 #endif /* !__HAVE_TIMECOUNTER */ 230 231 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 232 #ifdef __NO_SOFT_SERIAL_INTERRUPT 233 volatile int com_softintr_scheduled; 234 #endif 235 #endif 236 237 #ifdef KGDB 238 #include <sys/kgdb.h> 239 240 static bus_addr_t com_kgdb_addr; 241 static bus_space_tag_t com_kgdb_iot; 242 static bus_space_handle_t com_kgdb_ioh; 243 static int com_kgdb_attached; 244 245 int com_kgdb_getc(void *); 246 void com_kgdb_putc(void *, int); 247 #endif /* KGDB */ 248 249 #define COMUNIT_MASK 0x7ffff 250 #define COMDIALOUT_MASK 0x80000 251 252 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 253 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 254 255 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 256 device_is_active(&(sc)->sc_dev)) 257 258 #define BR BUS_SPACE_BARRIER_READ 259 #define BW BUS_SPACE_BARRIER_WRITE 260 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 261 262 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 263 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 264 265 /*ARGSUSED*/ 266 int 267 comspeed(long speed, long frequency, int type) 268 { 269 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 270 271 int x, err; 272 273 #if 0 274 if (speed == 0) 275 return (0); 276 #endif 277 if (speed <= 0) 278 return (-1); 279 x = divrnd(frequency / 16, speed); 280 if (x <= 0) 281 return (-1); 282 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 283 if (err < 0) 284 err = -err; 285 if (err > COM_TOLERANCE) 286 return (-1); 287 return (x); 288 289 #undef divrnd 290 } 291 292 #ifdef COM_DEBUG 293 int com_debug = 0; 294 295 void comstatus(struct com_softc *, const char *); 296 void 297 comstatus(struct com_softc *sc, const char *str) 298 { 299 struct tty *tp = sc->sc_tty; 300 301 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 302 sc->sc_dev.dv_xname, str, 303 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 304 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 305 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 306 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 307 sc->sc_tx_stopped ? '+' : '-'); 308 309 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 310 sc->sc_dev.dv_xname, str, 311 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 312 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 313 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 314 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 315 sc->sc_rx_flags); 316 } 317 #endif 318 319 int 320 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 321 { 322 323 /* force access to id reg */ 324 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 325 bus_space_write_1(iot, ioh, com_iir, 0); 326 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 327 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 328 return (0); 329 330 return (1); 331 } 332 333 #ifdef COM_HAYESP 334 int 335 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 336 { 337 char val, dips; 338 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 339 bus_space_tag_t iot = sc->sc_iot; 340 341 /* 342 * Hayes ESP cards have two iobases. One is for compatibility with 343 * 16550 serial chips, and at the same ISA PC base addresses. The 344 * other is for ESP-specific enhanced features, and lies at a 345 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 346 */ 347 348 /* Test for ESP signature */ 349 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 350 return (0); 351 352 /* 353 * ESP is present at ESP enhanced base address; unknown com port 354 */ 355 356 /* Get the dip-switch configurations */ 357 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 358 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 359 360 /* Determine which com port this ESP card services: bits 0,1 of */ 361 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 362 if (sc->sc_iobase != combaselist[dips & 0x03]) 363 return (0); 364 365 printf(": ESP"); 366 367 /* Check ESP Self Test bits. */ 368 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 369 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 370 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 371 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 372 if ((val & 0x70) < 0x20) { 373 printf("-old (%o)", val & 0x70); 374 /* we do not support the necessary features */ 375 return (0); 376 } 377 378 /* Check for ability to emulate 16550: bit 8 == 1 */ 379 if ((dips & 0x80) == 0) { 380 printf(" slave"); 381 /* XXX Does slave really mean no 16550 support?? */ 382 return (0); 383 } 384 385 /* 386 * If we made it this far, we are a full-featured ESP v2.0 (or 387 * better), at the correct com port address. 388 */ 389 390 sc->sc_type = COM_TYPE_HAYESP; 391 printf(", 1024 byte fifo\n"); 392 return (1); 393 } 394 #endif 395 396 static void 397 com_enable_debugport(struct com_softc *sc) 398 { 399 int s; 400 401 /* Turn on line break interrupt, set carrier. */ 402 s = splserial(); 403 COM_LOCK(sc); 404 sc->sc_ier = IER_ERXRDY; 405 #ifdef COM_PXA2X0 406 if (sc->sc_type == COM_TYPE_PXA2x0) 407 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 408 #endif 409 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 410 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 411 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 412 COM_UNLOCK(sc); 413 splx(s); 414 } 415 416 void 417 com_attach_subr(struct com_softc *sc) 418 { 419 bus_addr_t iobase = sc->sc_iobase; 420 bus_space_tag_t iot = sc->sc_iot; 421 bus_space_handle_t ioh = sc->sc_ioh; 422 struct tty *tp; 423 #ifdef COM_16650 424 u_int8_t lcr; 425 #endif 426 #ifdef COM_HAYESP 427 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 428 int *hayespp; 429 #endif 430 const char *fifo_msg = NULL; 431 432 callout_init(&sc->sc_diag_callout); 433 simple_lock_init(&sc->sc_lock); 434 435 /* Disable interrupts before configuring the device. */ 436 #ifdef COM_PXA2X0 437 if (sc->sc_type == COM_TYPE_PXA2x0) 438 sc->sc_ier = IER_EUART; 439 else 440 #endif 441 sc->sc_ier = 0; 442 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 443 444 if (iot == comconstag && iobase == comconsaddr) { 445 comconsattached = 1; 446 447 /* Make sure the console is always "hardwired". */ 448 delay(10000); /* wait for output to finish */ 449 SET(sc->sc_hwflags, COM_HW_CONSOLE); 450 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 451 } 452 453 #ifdef COM_HAYESP 454 sc->sc_prescaler = 0; /* set prescaler to x1. */ 455 456 /* Look for a Hayes ESP board. */ 457 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 458 bus_space_handle_t hayespioh; 459 460 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 461 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 462 continue; 463 if (comprobeHAYESP(hayespioh, sc)) { 464 sc->sc_hayespioh = hayespioh; 465 sc->sc_fifolen = 1024; 466 467 break; 468 } 469 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 470 } 471 /* No ESP; look for other things. */ 472 if (sc->sc_type != COM_TYPE_HAYESP) { 473 #endif 474 sc->sc_fifolen = 1; 475 /* look for a NS 16550AF UART with FIFOs */ 476 bus_space_write_1(iot, ioh, com_fifo, 477 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 478 delay(100); 479 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 480 == IIR_FIFO_MASK) 481 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 482 == FIFO_TRIGGER_14) { 483 SET(sc->sc_hwflags, COM_HW_FIFO); 484 485 #ifdef COM_16650 486 /* 487 * IIR changes into the EFR if LCR is set to LCR_EERS 488 * on 16650s. We also know IIR != 0 at this point. 489 * Write 0 into the EFR, and read it. If the result 490 * is 0, we have a 16650. 491 * 492 * Older 16650s were broken; the test to detect them 493 * is taken from the Linux driver. Apparently 494 * setting DLAB enable gives access to the EFR on 495 * these chips. 496 */ 497 lcr = bus_space_read_1(iot, ioh, com_lcr); 498 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 499 bus_space_write_1(iot, ioh, com_efr, 0); 500 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 501 bus_space_write_1(iot, ioh, com_lcr, 502 lcr | LCR_DLAB); 503 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 504 CLR(sc->sc_hwflags, COM_HW_FIFO); 505 sc->sc_fifolen = 0; 506 } else { 507 SET(sc->sc_hwflags, COM_HW_FLOW); 508 sc->sc_fifolen = 32; 509 } 510 } else 511 #endif 512 sc->sc_fifolen = 16; 513 514 #ifdef COM_16650 515 bus_space_write_1(iot, ioh, com_lcr, lcr); 516 if (sc->sc_fifolen == 0) 517 fifo_msg = "st16650, broken fifo"; 518 else if (sc->sc_fifolen == 32) 519 fifo_msg = "st16650a, working fifo"; 520 else 521 #endif 522 fifo_msg = "ns16550a, working fifo"; 523 } else 524 fifo_msg = "ns16550, broken fifo"; 525 else 526 fifo_msg = "ns8250 or ns16450, no fifo"; 527 bus_space_write_1(iot, ioh, com_fifo, 0); 528 /* 529 * Some chips will clear down both Tx and Rx FIFOs when zero is 530 * written to com_fifo. If this chip is the console, writing zero 531 * results in some of the chip/FIFO description being lost, so delay 532 * printing it until now. 533 */ 534 delay(10); 535 aprint_normal(": %s\n", fifo_msg); 536 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 537 sc->sc_fifolen = 1; 538 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 539 } 540 #ifdef COM_HAYESP 541 } 542 #endif 543 544 tp = ttymalloc(); 545 tp->t_oproc = comstart; 546 tp->t_param = comparam; 547 tp->t_hwiflow = comhwiflow; 548 549 sc->sc_tty = tp; 550 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 551 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 552 sc->sc_rbavail = com_rbuf_size; 553 if (sc->sc_rbuf == NULL) { 554 aprint_error("%s: unable to allocate ring buffer\n", 555 sc->sc_dev.dv_xname); 556 return; 557 } 558 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 559 560 tty_attach(tp); 561 562 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 563 SET(sc->sc_mcr, MCR_IENABLE); 564 565 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 566 int maj; 567 568 /* locate the major number */ 569 maj = cdevsw_lookup_major(&com_cdevsw); 570 571 tp->t_dev = cn_tab->cn_dev = makedev(maj, 572 device_unit(&sc->sc_dev)); 573 574 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 575 } 576 577 #ifdef KGDB 578 /* 579 * Allow kgdb to "take over" this port. If this is 580 * not the console and is the kgdb device, it has 581 * exclusive use. If it's the console _and_ the 582 * kgdb device, it doesn't. 583 */ 584 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 585 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 586 com_kgdb_attached = 1; 587 588 SET(sc->sc_hwflags, COM_HW_KGDB); 589 } 590 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 591 } 592 #endif 593 594 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 595 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 596 #endif 597 598 #if NRND > 0 && defined(RND_COM) 599 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 600 RND_TYPE_TTY, 0); 601 #endif 602 603 /* if there are no enable/disable functions, assume the device 604 is always enabled */ 605 if (!sc->enable) 606 sc->enabled = 1; 607 608 com_config(sc); 609 610 sc->sc_powerhook = powerhook_establish(com_power, sc); 611 if (sc->sc_powerhook == NULL) 612 printf("%s: WARNING: unable to establish power hook\n", 613 sc->sc_dev.dv_xname); 614 615 SET(sc->sc_hwflags, COM_HW_DEV_OK); 616 } 617 618 void 619 com_config(struct com_softc *sc) 620 { 621 bus_space_tag_t iot = sc->sc_iot; 622 bus_space_handle_t ioh = sc->sc_ioh; 623 624 /* Disable interrupts before configuring the device. */ 625 #ifdef COM_PXA2X0 626 if (sc->sc_type == COM_TYPE_PXA2x0) 627 sc->sc_ier = IER_EUART; 628 else 629 #endif 630 sc->sc_ier = 0; 631 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 632 (void) bus_space_read_1(iot, ioh, com_iir); 633 634 #ifdef COM_HAYESP 635 /* Look for a Hayes ESP board. */ 636 if (sc->sc_type == COM_TYPE_HAYESP) { 637 sc->sc_fifolen = 1024; 638 639 /* Set 16550 compatibility mode */ 640 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 641 HAYESP_SETMODE); 642 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 643 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 644 HAYESP_MODE_SCALE); 645 646 /* Set RTS/CTS flow control */ 647 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 648 HAYESP_SETFLOWTYPE); 649 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 650 HAYESP_FLOW_RTS); 651 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 652 HAYESP_FLOW_CTS); 653 654 /* Set flow control levels */ 655 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 656 HAYESP_SETRXFLOW); 657 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 658 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 659 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 660 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 661 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 662 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 663 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 664 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 665 } 666 #endif 667 668 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 669 com_enable_debugport(sc); 670 } 671 672 int 673 com_detach(struct device *self, int flags) 674 { 675 struct com_softc *sc = (struct com_softc *)self; 676 int maj, mn; 677 678 /* kill the power hook */ 679 if (sc->sc_powerhook != NULL) 680 powerhook_disestablish(sc->sc_powerhook); 681 682 /* locate the major number */ 683 maj = cdevsw_lookup_major(&com_cdevsw); 684 685 /* Nuke the vnodes for any open instances. */ 686 mn = device_unit(self); 687 vdevgone(maj, mn, mn, VCHR); 688 689 mn |= COMDIALOUT_MASK; 690 vdevgone(maj, mn, mn, VCHR); 691 692 if (sc->sc_rbuf == NULL) { 693 /* 694 * Ring buffer allocation failed in the com_attach_subr, 695 * only the tty is allocated, and nothing else. 696 */ 697 ttyfree(sc->sc_tty); 698 return 0; 699 } 700 701 /* Free the receive buffer. */ 702 free(sc->sc_rbuf, M_DEVBUF); 703 704 /* Detach and free the tty. */ 705 tty_detach(sc->sc_tty); 706 ttyfree(sc->sc_tty); 707 708 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 709 /* Unhook the soft interrupt handler. */ 710 softintr_disestablish(sc->sc_si); 711 #endif 712 713 #if NRND > 0 && defined(RND_COM) 714 /* Unhook the entropy source. */ 715 rnd_detach_source(&sc->rnd_source); 716 #endif 717 718 return (0); 719 } 720 721 int 722 com_activate(struct device *self, enum devact act) 723 { 724 struct com_softc *sc = (struct com_softc *)self; 725 int s, rv = 0; 726 727 s = splserial(); 728 COM_LOCK(sc); 729 switch (act) { 730 case DVACT_ACTIVATE: 731 rv = EOPNOTSUPP; 732 break; 733 734 case DVACT_DEACTIVATE: 735 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 736 rv = EBUSY; 737 break; 738 } 739 740 if (sc->disable != NULL && sc->enabled != 0) { 741 (*sc->disable)(sc); 742 sc->enabled = 0; 743 } 744 break; 745 } 746 747 COM_UNLOCK(sc); 748 splx(s); 749 return (rv); 750 } 751 752 void 753 com_shutdown(struct com_softc *sc) 754 { 755 struct tty *tp = sc->sc_tty; 756 int s; 757 758 s = splserial(); 759 COM_LOCK(sc); 760 761 /* If we were asserting flow control, then deassert it. */ 762 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 763 com_hwiflow(sc); 764 765 /* Clear any break condition set with TIOCSBRK. */ 766 com_break(sc, 0); 767 768 #ifndef __HAVE_TIMECOUNTER 769 /* Turn off PPS capture on last close. */ 770 sc->sc_ppsmask = 0; 771 sc->ppsparam.mode = 0; 772 #endif /* !__HAVE_TIMECOUNTER */ 773 774 /* 775 * Hang up if necessary. Wait a bit, so the other side has time to 776 * notice even if we immediately open the port again. 777 * Avoid tsleeping above splhigh(). 778 */ 779 if (ISSET(tp->t_cflag, HUPCL)) { 780 com_modem(sc, 0); 781 COM_UNLOCK(sc); 782 splx(s); 783 /* XXX tsleep will only timeout */ 784 (void) tsleep(sc, TTIPRI, ttclos, hz); 785 s = splserial(); 786 COM_LOCK(sc); 787 } 788 789 /* Turn off interrupts. */ 790 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 791 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 792 #ifdef COM_PXA2X0 793 if (sc->sc_type == COM_TYPE_PXA2x0) 794 sc->sc_ier |= IER_ERXTOUT; 795 #endif 796 } else 797 sc->sc_ier = 0; 798 799 #ifdef COM_PXA2X0 800 if (sc->sc_type == COM_TYPE_PXA2x0) 801 sc->sc_ier |= IER_EUART; 802 #endif 803 804 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 805 806 if (sc->disable) { 807 #ifdef DIAGNOSTIC 808 if (!sc->enabled) 809 panic("com_shutdown: not enabled?"); 810 #endif 811 (*sc->disable)(sc); 812 sc->enabled = 0; 813 } 814 COM_UNLOCK(sc); 815 splx(s); 816 } 817 818 int 819 comopen(dev_t dev, int flag, int mode, struct lwp *l) 820 { 821 struct com_softc *sc; 822 struct tty *tp; 823 int s, s2; 824 int error; 825 826 sc = device_lookup(&com_cd, COMUNIT(dev)); 827 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 828 sc->sc_rbuf == NULL) 829 return (ENXIO); 830 831 if (!device_is_active(&sc->sc_dev)) 832 return (ENXIO); 833 834 #ifdef KGDB 835 /* 836 * If this is the kgdb port, no other use is permitted. 837 */ 838 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 839 return (EBUSY); 840 #endif 841 842 tp = sc->sc_tty; 843 844 if (ISSET(tp->t_state, TS_ISOPEN) && 845 ISSET(tp->t_state, TS_XCLUDE) && 846 kauth_authorize_generic(l->l_proc->p_cred, 847 KAUTH_GENERIC_ISSUSER, 848 &l->l_proc->p_acflag) != 0) 849 return (EBUSY); 850 851 s = spltty(); 852 853 /* 854 * Do the following iff this is a first open. 855 */ 856 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 857 struct termios t; 858 859 tp->t_dev = dev; 860 861 s2 = splserial(); 862 COM_LOCK(sc); 863 864 if (sc->enable) { 865 if ((*sc->enable)(sc)) { 866 COM_UNLOCK(sc); 867 splx(s2); 868 splx(s); 869 printf("%s: device enable failed\n", 870 sc->sc_dev.dv_xname); 871 return (EIO); 872 } 873 sc->enabled = 1; 874 com_config(sc); 875 } 876 877 /* Turn on interrupts. */ 878 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 879 #ifdef COM_PXA2X0 880 if (sc->sc_type == COM_TYPE_PXA2x0) 881 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 882 #endif 883 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 884 885 /* Fetch the current modem control status, needed later. */ 886 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 887 888 /* Clear PPS capture state on first open. */ 889 #ifdef __HAVE_TIMECOUNTER 890 memset(&sc->sc_pps_state, 0, sizeof(sc->sc_pps_state)); 891 sc->sc_pps_state.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 892 pps_init(&sc->sc_pps_state); 893 #else /* !__HAVE_TIMECOUNTER */ 894 sc->sc_ppsmask = 0; 895 sc->ppsparam.mode = 0; 896 #endif /* !__HAVE_TIMECOUNTER */ 897 898 COM_UNLOCK(sc); 899 splx(s2); 900 901 /* 902 * Initialize the termios status to the defaults. Add in the 903 * sticky bits from TIOCSFLAGS. 904 */ 905 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 906 t.c_ospeed = comconsrate; 907 t.c_cflag = comconscflag; 908 } else { 909 t.c_ospeed = TTYDEF_SPEED; 910 t.c_cflag = TTYDEF_CFLAG; 911 } 912 t.c_ispeed = t.c_ospeed; 913 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 914 SET(t.c_cflag, CLOCAL); 915 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 916 SET(t.c_cflag, CRTSCTS); 917 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 918 SET(t.c_cflag, MDMBUF); 919 /* Make sure comparam() will do something. */ 920 tp->t_ospeed = 0; 921 (void) comparam(tp, &t); 922 tp->t_iflag = TTYDEF_IFLAG; 923 tp->t_oflag = TTYDEF_OFLAG; 924 tp->t_lflag = TTYDEF_LFLAG; 925 ttychars(tp); 926 ttsetwater(tp); 927 928 s2 = splserial(); 929 COM_LOCK(sc); 930 931 /* 932 * Turn on DTR. We must always do this, even if carrier is not 933 * present, because otherwise we'd have to use TIOCSDTR 934 * immediately after setting CLOCAL, which applications do not 935 * expect. We always assert DTR while the device is open 936 * unless explicitly requested to deassert it. 937 */ 938 com_modem(sc, 1); 939 940 /* Clear the input ring, and unblock. */ 941 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 942 sc->sc_rbavail = com_rbuf_size; 943 com_iflush(sc); 944 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 945 com_hwiflow(sc); 946 947 #ifdef COM_DEBUG 948 if (com_debug) 949 comstatus(sc, "comopen "); 950 #endif 951 952 COM_UNLOCK(sc); 953 splx(s2); 954 } 955 956 splx(s); 957 958 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 959 if (error) 960 goto bad; 961 962 error = (*tp->t_linesw->l_open)(dev, tp); 963 if (error) 964 goto bad; 965 966 return (0); 967 968 bad: 969 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 970 /* 971 * We failed to open the device, and nobody else had it opened. 972 * Clean up the state as appropriate. 973 */ 974 com_shutdown(sc); 975 } 976 977 return (error); 978 } 979 980 int 981 comclose(dev_t dev, int flag, int mode, struct lwp *l) 982 { 983 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 984 struct tty *tp = sc->sc_tty; 985 986 /* XXX This is for cons.c. */ 987 if (!ISSET(tp->t_state, TS_ISOPEN)) 988 return (0); 989 990 (*tp->t_linesw->l_close)(tp, flag); 991 ttyclose(tp); 992 993 if (COM_ISALIVE(sc) == 0) 994 return (0); 995 996 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 997 /* 998 * Although we got a last close, the device may still be in 999 * use; e.g. if this was the dialout node, and there are still 1000 * processes waiting for carrier on the non-dialout node. 1001 */ 1002 com_shutdown(sc); 1003 } 1004 1005 return (0); 1006 } 1007 1008 int 1009 comread(dev_t dev, struct uio *uio, int flag) 1010 { 1011 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1012 struct tty *tp = sc->sc_tty; 1013 1014 if (COM_ISALIVE(sc) == 0) 1015 return (EIO); 1016 1017 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 1018 } 1019 1020 int 1021 comwrite(dev_t dev, struct uio *uio, int flag) 1022 { 1023 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1024 struct tty *tp = sc->sc_tty; 1025 1026 if (COM_ISALIVE(sc) == 0) 1027 return (EIO); 1028 1029 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1030 } 1031 1032 int 1033 compoll(dev_t dev, int events, struct lwp *l) 1034 { 1035 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1036 struct tty *tp = sc->sc_tty; 1037 1038 if (COM_ISALIVE(sc) == 0) 1039 return (POLLHUP); 1040 1041 return ((*tp->t_linesw->l_poll)(tp, events, l)); 1042 } 1043 1044 struct tty * 1045 comtty(dev_t dev) 1046 { 1047 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1048 struct tty *tp = sc->sc_tty; 1049 1050 return (tp); 1051 } 1052 1053 int 1054 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 1055 { 1056 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1057 struct tty *tp = sc->sc_tty; 1058 struct proc *p = l->l_proc; 1059 int error; 1060 int s; 1061 1062 if (COM_ISALIVE(sc) == 0) 1063 return (EIO); 1064 1065 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1066 if (error != EPASSTHROUGH) 1067 return (error); 1068 1069 error = ttioctl(tp, cmd, data, flag, l); 1070 if (error != EPASSTHROUGH) 1071 return (error); 1072 1073 error = 0; 1074 1075 s = splserial(); 1076 COM_LOCK(sc); 1077 1078 switch (cmd) { 1079 case TIOCSBRK: 1080 com_break(sc, 1); 1081 break; 1082 1083 case TIOCCBRK: 1084 com_break(sc, 0); 1085 break; 1086 1087 case TIOCSDTR: 1088 com_modem(sc, 1); 1089 break; 1090 1091 case TIOCCDTR: 1092 com_modem(sc, 0); 1093 break; 1094 1095 case TIOCGFLAGS: 1096 *(int *)data = sc->sc_swflags; 1097 break; 1098 1099 case TIOCSFLAGS: 1100 error = kauth_authorize_generic(p->p_cred, 1101 KAUTH_GENERIC_ISSUSER, 1102 &p->p_acflag); 1103 if (error) 1104 break; 1105 sc->sc_swflags = *(int *)data; 1106 break; 1107 1108 case TIOCMSET: 1109 case TIOCMBIS: 1110 case TIOCMBIC: 1111 tiocm_to_com(sc, cmd, *(int *)data); 1112 break; 1113 1114 case TIOCMGET: 1115 *(int *)data = com_to_tiocm(sc); 1116 break; 1117 1118 #ifdef __HAVE_TIMECOUNTER 1119 case PPS_IOC_CREATE: 1120 case PPS_IOC_DESTROY: 1121 case PPS_IOC_GETPARAMS: 1122 case PPS_IOC_SETPARAMS: 1123 case PPS_IOC_GETCAP: 1124 case PPS_IOC_FETCH: 1125 #ifdef PPS_SYNC 1126 case PPS_IOC_KCBIND: 1127 #endif 1128 error = pps_ioctl(cmd, data, &sc->sc_pps_state); 1129 break; 1130 #else /* !__HAVE_TIMECOUNTER */ 1131 case PPS_IOC_CREATE: 1132 break; 1133 1134 case PPS_IOC_DESTROY: 1135 break; 1136 1137 case PPS_IOC_GETPARAMS: { 1138 pps_params_t *pp; 1139 pp = (pps_params_t *)data; 1140 *pp = sc->ppsparam; 1141 break; 1142 } 1143 1144 case PPS_IOC_SETPARAMS: { 1145 pps_params_t *pp; 1146 int mode; 1147 pp = (pps_params_t *)data; 1148 if (pp->mode & ~ppscap) { 1149 error = EINVAL; 1150 break; 1151 } 1152 sc->ppsparam = *pp; 1153 /* 1154 * Compute msr masks from user-specified timestamp state. 1155 */ 1156 mode = sc->ppsparam.mode; 1157 switch (mode & PPS_CAPTUREBOTH) { 1158 case 0: 1159 sc->sc_ppsmask = 0; 1160 break; 1161 1162 case PPS_CAPTUREASSERT: 1163 sc->sc_ppsmask = MSR_DCD; 1164 sc->sc_ppsassert = MSR_DCD; 1165 sc->sc_ppsclear = -1; 1166 break; 1167 1168 case PPS_CAPTURECLEAR: 1169 sc->sc_ppsmask = MSR_DCD; 1170 sc->sc_ppsassert = -1; 1171 sc->sc_ppsclear = 0; 1172 break; 1173 1174 case PPS_CAPTUREBOTH: 1175 sc->sc_ppsmask = MSR_DCD; 1176 sc->sc_ppsassert = MSR_DCD; 1177 sc->sc_ppsclear = 0; 1178 break; 1179 1180 default: 1181 error = EINVAL; 1182 break; 1183 } 1184 break; 1185 } 1186 1187 case PPS_IOC_GETCAP: 1188 *(int*)data = ppscap; 1189 break; 1190 1191 case PPS_IOC_FETCH: { 1192 pps_info_t *pi; 1193 pi = (pps_info_t *)data; 1194 *pi = sc->ppsinfo; 1195 break; 1196 } 1197 1198 #ifdef PPS_SYNC 1199 case PPS_IOC_KCBIND: { 1200 int edge = (*(int *)data) & PPS_CAPTUREBOTH; 1201 1202 if (edge == 0) { 1203 /* 1204 * remove binding for this source; ignore 1205 * the request if this is not the current 1206 * hardpps source 1207 */ 1208 if (pps_kc_hardpps_source == sc) { 1209 pps_kc_hardpps_source = NULL; 1210 pps_kc_hardpps_mode = 0; 1211 } 1212 } else { 1213 /* 1214 * bind hardpps to this source, replacing any 1215 * previously specified source or edges 1216 */ 1217 pps_kc_hardpps_source = sc; 1218 pps_kc_hardpps_mode = edge; 1219 } 1220 break; 1221 } 1222 #endif /* PPS_SYNC */ 1223 #endif /* !__HAVE_TIMECOUNTER */ 1224 1225 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1226 #ifdef __HAVE_TIMECOUNTER 1227 #ifndef PPS_TRAILING_EDGE 1228 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1229 &sc->sc_pps_state.ppsinfo.assert_timestamp); 1230 #else 1231 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1232 &sc->sc_pps_state.ppsinfo.clear_timestamp); 1233 #endif 1234 #else /* !__HAVE_TIMECOUNTER */ 1235 /* 1236 * Some GPS clocks models use the falling rather than 1237 * rising edge as the on-the-second signal. 1238 * The old API has no way to specify PPS polarity. 1239 */ 1240 sc->sc_ppsmask = MSR_DCD; 1241 #ifndef PPS_TRAILING_EDGE 1242 sc->sc_ppsassert = MSR_DCD; 1243 sc->sc_ppsclear = -1; 1244 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1245 &sc->ppsinfo.assert_timestamp); 1246 #else 1247 sc->sc_ppsassert = -1; 1248 sc->sc_ppsclear = 0; 1249 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1250 &sc->ppsinfo.clear_timestamp); 1251 #endif 1252 #endif /* !__HAVE_TIMECOUNTER */ 1253 break; 1254 1255 default: 1256 error = EPASSTHROUGH; 1257 break; 1258 } 1259 1260 COM_UNLOCK(sc); 1261 splx(s); 1262 1263 #ifdef COM_DEBUG 1264 if (com_debug) 1265 comstatus(sc, "comioctl "); 1266 #endif 1267 1268 return (error); 1269 } 1270 1271 integrate void 1272 com_schedrx(struct com_softc *sc) 1273 { 1274 1275 sc->sc_rx_ready = 1; 1276 1277 /* Wake up the poller. */ 1278 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1279 softintr_schedule(sc->sc_si); 1280 #else 1281 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1282 setsoftserial(); 1283 #else 1284 if (!com_softintr_scheduled) { 1285 com_softintr_scheduled = 1; 1286 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1287 } 1288 #endif 1289 #endif 1290 } 1291 1292 void 1293 com_break(struct com_softc *sc, int onoff) 1294 { 1295 1296 if (onoff) 1297 SET(sc->sc_lcr, LCR_SBREAK); 1298 else 1299 CLR(sc->sc_lcr, LCR_SBREAK); 1300 1301 if (!sc->sc_heldchange) { 1302 if (sc->sc_tx_busy) { 1303 sc->sc_heldtbc = sc->sc_tbc; 1304 sc->sc_tbc = 0; 1305 sc->sc_heldchange = 1; 1306 } else 1307 com_loadchannelregs(sc); 1308 } 1309 } 1310 1311 void 1312 com_modem(struct com_softc *sc, int onoff) 1313 { 1314 1315 if (sc->sc_mcr_dtr == 0) 1316 return; 1317 1318 if (onoff) 1319 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1320 else 1321 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1322 1323 if (!sc->sc_heldchange) { 1324 if (sc->sc_tx_busy) { 1325 sc->sc_heldtbc = sc->sc_tbc; 1326 sc->sc_tbc = 0; 1327 sc->sc_heldchange = 1; 1328 } else 1329 com_loadchannelregs(sc); 1330 } 1331 } 1332 1333 void 1334 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1335 { 1336 u_char combits; 1337 1338 combits = 0; 1339 if (ISSET(ttybits, TIOCM_DTR)) 1340 SET(combits, MCR_DTR); 1341 if (ISSET(ttybits, TIOCM_RTS)) 1342 SET(combits, MCR_RTS); 1343 1344 switch (how) { 1345 case TIOCMBIC: 1346 CLR(sc->sc_mcr, combits); 1347 break; 1348 1349 case TIOCMBIS: 1350 SET(sc->sc_mcr, combits); 1351 break; 1352 1353 case TIOCMSET: 1354 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1355 SET(sc->sc_mcr, combits); 1356 break; 1357 } 1358 1359 if (!sc->sc_heldchange) { 1360 if (sc->sc_tx_busy) { 1361 sc->sc_heldtbc = sc->sc_tbc; 1362 sc->sc_tbc = 0; 1363 sc->sc_heldchange = 1; 1364 } else 1365 com_loadchannelregs(sc); 1366 } 1367 } 1368 1369 int 1370 com_to_tiocm(struct com_softc *sc) 1371 { 1372 u_char combits; 1373 int ttybits = 0; 1374 1375 combits = sc->sc_mcr; 1376 if (ISSET(combits, MCR_DTR)) 1377 SET(ttybits, TIOCM_DTR); 1378 if (ISSET(combits, MCR_RTS)) 1379 SET(ttybits, TIOCM_RTS); 1380 1381 combits = sc->sc_msr; 1382 if (ISSET(combits, MSR_DCD)) 1383 SET(ttybits, TIOCM_CD); 1384 if (ISSET(combits, MSR_CTS)) 1385 SET(ttybits, TIOCM_CTS); 1386 if (ISSET(combits, MSR_DSR)) 1387 SET(ttybits, TIOCM_DSR); 1388 if (ISSET(combits, MSR_RI | MSR_TERI)) 1389 SET(ttybits, TIOCM_RI); 1390 1391 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1392 SET(ttybits, TIOCM_LE); 1393 1394 return (ttybits); 1395 } 1396 1397 static u_char 1398 cflag2lcr(tcflag_t cflag) 1399 { 1400 u_char lcr = 0; 1401 1402 switch (ISSET(cflag, CSIZE)) { 1403 case CS5: 1404 SET(lcr, LCR_5BITS); 1405 break; 1406 case CS6: 1407 SET(lcr, LCR_6BITS); 1408 break; 1409 case CS7: 1410 SET(lcr, LCR_7BITS); 1411 break; 1412 case CS8: 1413 SET(lcr, LCR_8BITS); 1414 break; 1415 } 1416 if (ISSET(cflag, PARENB)) { 1417 SET(lcr, LCR_PENAB); 1418 if (!ISSET(cflag, PARODD)) 1419 SET(lcr, LCR_PEVEN); 1420 } 1421 if (ISSET(cflag, CSTOPB)) 1422 SET(lcr, LCR_STOPB); 1423 1424 return (lcr); 1425 } 1426 1427 int 1428 comparam(struct tty *tp, struct termios *t) 1429 { 1430 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1431 int ospeed; 1432 u_char lcr; 1433 int s; 1434 1435 if (COM_ISALIVE(sc) == 0) 1436 return (EIO); 1437 1438 #ifdef COM_HAYESP 1439 if (sc->sc_type == COM_TYPE_HAYESP) { 1440 int prescaler, speed; 1441 1442 /* 1443 * Calculate UART clock prescaler. It should be in 1444 * range of 0 .. 3. 1445 */ 1446 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1447 prescaler++, speed /= 2) 1448 if ((ospeed = comspeed(speed, sc->sc_frequency, 1449 sc->sc_type)) > 0) 1450 break; 1451 1452 if (prescaler == 4) 1453 return (EINVAL); 1454 sc->sc_prescaler = prescaler; 1455 } else 1456 #endif 1457 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1458 1459 /* Check requested parameters. */ 1460 if (ospeed < 0) 1461 return (EINVAL); 1462 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1463 return (EINVAL); 1464 1465 /* 1466 * For the console, always force CLOCAL and !HUPCL, so that the port 1467 * is always active. 1468 */ 1469 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1470 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1471 SET(t->c_cflag, CLOCAL); 1472 CLR(t->c_cflag, HUPCL); 1473 } 1474 1475 /* 1476 * If there were no changes, don't do anything. This avoids dropping 1477 * input and improves performance when all we did was frob things like 1478 * VMIN and VTIME. 1479 */ 1480 if (tp->t_ospeed == t->c_ospeed && 1481 tp->t_cflag == t->c_cflag) 1482 return (0); 1483 1484 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1485 1486 s = splserial(); 1487 COM_LOCK(sc); 1488 1489 sc->sc_lcr = lcr; 1490 1491 /* 1492 * If we're not in a mode that assumes a connection is present, then 1493 * ignore carrier changes. 1494 */ 1495 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1496 sc->sc_msr_dcd = 0; 1497 else 1498 sc->sc_msr_dcd = MSR_DCD; 1499 /* 1500 * Set the flow control pins depending on the current flow control 1501 * mode. 1502 */ 1503 if (ISSET(t->c_cflag, CRTSCTS)) { 1504 sc->sc_mcr_dtr = MCR_DTR; 1505 sc->sc_mcr_rts = MCR_RTS; 1506 sc->sc_msr_cts = MSR_CTS; 1507 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1508 } else if (ISSET(t->c_cflag, MDMBUF)) { 1509 /* 1510 * For DTR/DCD flow control, make sure we don't toggle DTR for 1511 * carrier detection. 1512 */ 1513 sc->sc_mcr_dtr = 0; 1514 sc->sc_mcr_rts = MCR_DTR; 1515 sc->sc_msr_cts = MSR_DCD; 1516 sc->sc_efr = 0; 1517 } else { 1518 /* 1519 * If no flow control, then always set RTS. This will make 1520 * the other side happy if it mistakenly thinks we're doing 1521 * RTS/CTS flow control. 1522 */ 1523 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1524 sc->sc_mcr_rts = 0; 1525 sc->sc_msr_cts = 0; 1526 sc->sc_efr = 0; 1527 if (ISSET(sc->sc_mcr, MCR_DTR)) 1528 SET(sc->sc_mcr, MCR_RTS); 1529 else 1530 CLR(sc->sc_mcr, MCR_RTS); 1531 } 1532 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1533 1534 #if 0 1535 if (ospeed == 0) 1536 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1537 else 1538 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1539 #endif 1540 1541 sc->sc_dlbl = ospeed; 1542 sc->sc_dlbh = ospeed >> 8; 1543 1544 /* 1545 * Set the FIFO threshold based on the receive speed. 1546 * 1547 * * If it's a low speed, it's probably a mouse or some other 1548 * interactive device, so set the threshold low. 1549 * * If it's a high speed, trim the trigger level down to prevent 1550 * overflows. 1551 * * Otherwise set it a bit higher. 1552 */ 1553 if (sc->sc_type == COM_TYPE_HAYESP) 1554 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1555 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1556 sc->sc_fifo = FIFO_ENABLE | 1557 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8); 1558 else 1559 sc->sc_fifo = 0; 1560 1561 /* And copy to tty. */ 1562 tp->t_ispeed = t->c_ospeed; 1563 tp->t_ospeed = t->c_ospeed; 1564 tp->t_cflag = t->c_cflag; 1565 1566 if (!sc->sc_heldchange) { 1567 if (sc->sc_tx_busy) { 1568 sc->sc_heldtbc = sc->sc_tbc; 1569 sc->sc_tbc = 0; 1570 sc->sc_heldchange = 1; 1571 } else 1572 com_loadchannelregs(sc); 1573 } 1574 1575 if (!ISSET(t->c_cflag, CHWFLOW)) { 1576 /* Disable the high water mark. */ 1577 sc->sc_r_hiwat = 0; 1578 sc->sc_r_lowat = 0; 1579 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1580 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1581 com_schedrx(sc); 1582 } 1583 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1584 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1585 com_hwiflow(sc); 1586 } 1587 } else { 1588 sc->sc_r_hiwat = com_rbuf_hiwat; 1589 sc->sc_r_lowat = com_rbuf_lowat; 1590 } 1591 1592 COM_UNLOCK(sc); 1593 splx(s); 1594 1595 /* 1596 * Update the tty layer's idea of the carrier bit, in case we changed 1597 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1598 * explicit request. 1599 */ 1600 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1601 1602 #ifdef COM_DEBUG 1603 if (com_debug) 1604 comstatus(sc, "comparam "); 1605 #endif 1606 1607 if (!ISSET(t->c_cflag, CHWFLOW)) { 1608 if (sc->sc_tx_stopped) { 1609 sc->sc_tx_stopped = 0; 1610 comstart(tp); 1611 } 1612 } 1613 1614 return (0); 1615 } 1616 1617 void 1618 com_iflush(struct com_softc *sc) 1619 { 1620 bus_space_tag_t iot = sc->sc_iot; 1621 bus_space_handle_t ioh = sc->sc_ioh; 1622 #ifdef DIAGNOSTIC 1623 int reg; 1624 #endif 1625 int timo; 1626 1627 #ifdef DIAGNOSTIC 1628 reg = 0xffff; 1629 #endif 1630 timo = 50000; 1631 /* flush any pending I/O */ 1632 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1633 && --timo) 1634 #ifdef DIAGNOSTIC 1635 reg = 1636 #else 1637 (void) 1638 #endif 1639 bus_space_read_1(iot, ioh, com_data); 1640 #ifdef DIAGNOSTIC 1641 if (!timo) 1642 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1643 reg); 1644 #endif 1645 } 1646 1647 void 1648 com_loadchannelregs(struct com_softc *sc) 1649 { 1650 bus_space_tag_t iot = sc->sc_iot; 1651 bus_space_handle_t ioh = sc->sc_ioh; 1652 1653 /* XXXXX necessary? */ 1654 com_iflush(sc); 1655 1656 #ifdef COM_PXA2X0 1657 if (sc->sc_type == COM_TYPE_PXA2x0) 1658 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1659 else 1660 #endif 1661 bus_space_write_1(iot, ioh, com_ier, 0); 1662 1663 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1664 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1665 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1666 } 1667 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1668 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1669 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1670 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1671 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1672 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1673 #ifdef COM_HAYESP 1674 if (sc->sc_type == COM_TYPE_HAYESP) { 1675 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1676 HAYESP_SETPRESCALER); 1677 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1678 sc->sc_prescaler); 1679 } 1680 #endif 1681 1682 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1683 } 1684 1685 int 1686 comhwiflow(struct tty *tp, int block) 1687 { 1688 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1689 int s; 1690 1691 if (COM_ISALIVE(sc) == 0) 1692 return (0); 1693 1694 if (sc->sc_mcr_rts == 0) 1695 return (0); 1696 1697 s = splserial(); 1698 COM_LOCK(sc); 1699 1700 if (block) { 1701 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1702 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1703 com_hwiflow(sc); 1704 } 1705 } else { 1706 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1707 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1708 com_schedrx(sc); 1709 } 1710 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1711 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1712 com_hwiflow(sc); 1713 } 1714 } 1715 1716 COM_UNLOCK(sc); 1717 splx(s); 1718 return (1); 1719 } 1720 1721 /* 1722 * (un)block input via hw flowcontrol 1723 */ 1724 void 1725 com_hwiflow(struct com_softc *sc) 1726 { 1727 bus_space_tag_t iot = sc->sc_iot; 1728 bus_space_handle_t ioh = sc->sc_ioh; 1729 1730 if (sc->sc_mcr_rts == 0) 1731 return; 1732 1733 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1734 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1735 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1736 } else { 1737 SET(sc->sc_mcr, sc->sc_mcr_rts); 1738 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1739 } 1740 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1741 } 1742 1743 1744 void 1745 comstart(struct tty *tp) 1746 { 1747 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1748 bus_space_tag_t iot = sc->sc_iot; 1749 bus_space_handle_t ioh = sc->sc_ioh; 1750 int s; 1751 1752 if (COM_ISALIVE(sc) == 0) 1753 return; 1754 1755 s = spltty(); 1756 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1757 goto out; 1758 if (sc->sc_tx_stopped) 1759 goto out; 1760 1761 if (tp->t_outq.c_cc <= tp->t_lowat) { 1762 if (ISSET(tp->t_state, TS_ASLEEP)) { 1763 CLR(tp->t_state, TS_ASLEEP); 1764 wakeup(&tp->t_outq); 1765 } 1766 selwakeup(&tp->t_wsel); 1767 if (tp->t_outq.c_cc == 0) 1768 goto out; 1769 } 1770 1771 /* Grab the first contiguous region of buffer space. */ 1772 { 1773 u_char *tba; 1774 int tbc; 1775 1776 tba = tp->t_outq.c_cf; 1777 tbc = ndqb(&tp->t_outq, 0); 1778 1779 (void)splserial(); 1780 COM_LOCK(sc); 1781 1782 sc->sc_tba = tba; 1783 sc->sc_tbc = tbc; 1784 } 1785 1786 SET(tp->t_state, TS_BUSY); 1787 sc->sc_tx_busy = 1; 1788 1789 /* Enable transmit completion interrupts if necessary. */ 1790 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1791 SET(sc->sc_ier, IER_ETXRDY); 1792 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1793 } 1794 1795 /* Output the first chunk of the contiguous buffer. */ 1796 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1797 u_int n; 1798 1799 n = sc->sc_tbc; 1800 if (n > sc->sc_fifolen) 1801 n = sc->sc_fifolen; 1802 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1803 sc->sc_tbc -= n; 1804 sc->sc_tba += n; 1805 } 1806 1807 COM_UNLOCK(sc); 1808 out: 1809 splx(s); 1810 return; 1811 } 1812 1813 /* 1814 * Stop output on a line. 1815 */ 1816 void 1817 comstop(struct tty *tp, int flag) 1818 { 1819 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1820 int s; 1821 1822 s = splserial(); 1823 COM_LOCK(sc); 1824 if (ISSET(tp->t_state, TS_BUSY)) { 1825 /* Stop transmitting at the next chunk. */ 1826 sc->sc_tbc = 0; 1827 sc->sc_heldtbc = 0; 1828 if (!ISSET(tp->t_state, TS_TTSTOP)) 1829 SET(tp->t_state, TS_FLUSH); 1830 } 1831 COM_UNLOCK(sc); 1832 splx(s); 1833 } 1834 1835 void 1836 comdiag(void *arg) 1837 { 1838 struct com_softc *sc = arg; 1839 int overflows, floods; 1840 int s; 1841 1842 s = splserial(); 1843 COM_LOCK(sc); 1844 overflows = sc->sc_overflows; 1845 sc->sc_overflows = 0; 1846 floods = sc->sc_floods; 1847 sc->sc_floods = 0; 1848 sc->sc_errors = 0; 1849 COM_UNLOCK(sc); 1850 splx(s); 1851 1852 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1853 sc->sc_dev.dv_xname, 1854 overflows, overflows == 1 ? "" : "s", 1855 floods, floods == 1 ? "" : "s"); 1856 } 1857 1858 integrate void 1859 com_rxsoft(struct com_softc *sc, struct tty *tp) 1860 { 1861 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1862 u_char *get, *end; 1863 u_int cc, scc; 1864 u_char lsr; 1865 int code; 1866 int s; 1867 1868 end = sc->sc_ebuf; 1869 get = sc->sc_rbget; 1870 scc = cc = com_rbuf_size - sc->sc_rbavail; 1871 1872 if (cc == com_rbuf_size) { 1873 sc->sc_floods++; 1874 if (sc->sc_errors++ == 0) 1875 callout_reset(&sc->sc_diag_callout, 60 * hz, 1876 comdiag, sc); 1877 } 1878 1879 /* If not yet open, drop the entire buffer content here */ 1880 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1881 get += cc << 1; 1882 if (get >= end) 1883 get -= com_rbuf_size << 1; 1884 cc = 0; 1885 } 1886 while (cc) { 1887 code = get[0]; 1888 lsr = get[1]; 1889 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1890 if (ISSET(lsr, LSR_OE)) { 1891 sc->sc_overflows++; 1892 if (sc->sc_errors++ == 0) 1893 callout_reset(&sc->sc_diag_callout, 1894 60 * hz, comdiag, sc); 1895 } 1896 if (ISSET(lsr, LSR_BI | LSR_FE)) 1897 SET(code, TTY_FE); 1898 if (ISSET(lsr, LSR_PE)) 1899 SET(code, TTY_PE); 1900 } 1901 if ((*rint)(code, tp) == -1) { 1902 /* 1903 * The line discipline's buffer is out of space. 1904 */ 1905 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1906 /* 1907 * We're either not using flow control, or the 1908 * line discipline didn't tell us to block for 1909 * some reason. Either way, we have no way to 1910 * know when there's more space available, so 1911 * just drop the rest of the data. 1912 */ 1913 get += cc << 1; 1914 if (get >= end) 1915 get -= com_rbuf_size << 1; 1916 cc = 0; 1917 } else { 1918 /* 1919 * Don't schedule any more receive processing 1920 * until the line discipline tells us there's 1921 * space available (through comhwiflow()). 1922 * Leave the rest of the data in the input 1923 * buffer. 1924 */ 1925 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1926 } 1927 break; 1928 } 1929 get += 2; 1930 if (get >= end) 1931 get = sc->sc_rbuf; 1932 cc--; 1933 } 1934 1935 if (cc != scc) { 1936 sc->sc_rbget = get; 1937 s = splserial(); 1938 COM_LOCK(sc); 1939 1940 cc = sc->sc_rbavail += scc - cc; 1941 /* Buffers should be ok again, release possible block. */ 1942 if (cc >= sc->sc_r_lowat) { 1943 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1944 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1945 SET(sc->sc_ier, IER_ERXRDY); 1946 #ifdef COM_PXA2X0 1947 if (sc->sc_type == COM_TYPE_PXA2x0) 1948 SET(sc->sc_ier, IER_ERXTOUT); 1949 #endif 1950 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1951 com_ier, sc->sc_ier); 1952 } 1953 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1954 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1955 com_hwiflow(sc); 1956 } 1957 } 1958 COM_UNLOCK(sc); 1959 splx(s); 1960 } 1961 } 1962 1963 integrate void 1964 com_txsoft(struct com_softc *sc, struct tty *tp) 1965 { 1966 1967 CLR(tp->t_state, TS_BUSY); 1968 if (ISSET(tp->t_state, TS_FLUSH)) 1969 CLR(tp->t_state, TS_FLUSH); 1970 else 1971 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1972 (*tp->t_linesw->l_start)(tp); 1973 } 1974 1975 integrate void 1976 com_stsoft(struct com_softc *sc, struct tty *tp) 1977 { 1978 u_char msr, delta; 1979 int s; 1980 1981 s = splserial(); 1982 COM_LOCK(sc); 1983 msr = sc->sc_msr; 1984 delta = sc->sc_msr_delta; 1985 sc->sc_msr_delta = 0; 1986 COM_UNLOCK(sc); 1987 splx(s); 1988 1989 if (ISSET(delta, sc->sc_msr_dcd)) { 1990 /* 1991 * Inform the tty layer that carrier detect changed. 1992 */ 1993 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1994 } 1995 1996 if (ISSET(delta, sc->sc_msr_cts)) { 1997 /* Block or unblock output according to flow control. */ 1998 if (ISSET(msr, sc->sc_msr_cts)) { 1999 sc->sc_tx_stopped = 0; 2000 (*tp->t_linesw->l_start)(tp); 2001 } else { 2002 sc->sc_tx_stopped = 1; 2003 } 2004 } 2005 2006 #ifdef COM_DEBUG 2007 if (com_debug) 2008 comstatus(sc, "com_stsoft"); 2009 #endif 2010 } 2011 2012 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2013 void 2014 comsoft(void *arg) 2015 { 2016 struct com_softc *sc = arg; 2017 struct tty *tp; 2018 2019 if (COM_ISALIVE(sc) == 0) 2020 return; 2021 2022 { 2023 #else 2024 void 2025 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2026 comsoft(void) 2027 #else 2028 comsoft(void *arg) 2029 #endif 2030 { 2031 struct com_softc *sc; 2032 struct tty *tp; 2033 int unit; 2034 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2035 int s; 2036 2037 s = splsoftserial(); 2038 com_softintr_scheduled = 0; 2039 #endif 2040 2041 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 2042 sc = device_lookup(&com_cd, unit); 2043 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 2044 continue; 2045 2046 if (COM_ISALIVE(sc) == 0) 2047 continue; 2048 2049 tp = sc->sc_tty; 2050 if (tp == NULL) 2051 continue; 2052 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2053 continue; 2054 #endif 2055 tp = sc->sc_tty; 2056 2057 if (sc->sc_rx_ready) { 2058 sc->sc_rx_ready = 0; 2059 com_rxsoft(sc, tp); 2060 } 2061 2062 if (sc->sc_st_check) { 2063 sc->sc_st_check = 0; 2064 com_stsoft(sc, tp); 2065 } 2066 2067 if (sc->sc_tx_done) { 2068 sc->sc_tx_done = 0; 2069 com_txsoft(sc, tp); 2070 } 2071 } 2072 2073 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2074 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2075 splx(s); 2076 #endif 2077 #endif 2078 } 2079 2080 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2081 /* there has got to be a better way to do comsoft() */ 2082 }} 2083 #endif 2084 2085 int 2086 comintr(void *arg) 2087 { 2088 struct com_softc *sc = arg; 2089 bus_space_tag_t iot = sc->sc_iot; 2090 bus_space_handle_t ioh = sc->sc_ioh; 2091 u_char *put, *end; 2092 u_int cc; 2093 u_char lsr, iir; 2094 2095 if (COM_ISALIVE(sc) == 0) 2096 return (0); 2097 2098 COM_LOCK(sc); 2099 iir = bus_space_read_1(iot, ioh, com_iir); 2100 if (ISSET(iir, IIR_NOPEND)) { 2101 COM_UNLOCK(sc); 2102 return (0); 2103 } 2104 2105 end = sc->sc_ebuf; 2106 put = sc->sc_rbput; 2107 cc = sc->sc_rbavail; 2108 2109 again: do { 2110 u_char msr, delta; 2111 2112 lsr = bus_space_read_1(iot, ioh, com_lsr); 2113 if (ISSET(lsr, LSR_BI)) { 2114 int cn_trapped = 0; 2115 2116 cn_check_magic(sc->sc_tty->t_dev, 2117 CNC_BREAK, com_cnm_state); 2118 if (cn_trapped) 2119 continue; 2120 #if defined(KGDB) && !defined(DDB) 2121 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2122 kgdb_connect(1); 2123 continue; 2124 } 2125 #endif 2126 } 2127 2128 if (ISSET(lsr, LSR_RCV_MASK) && 2129 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2130 while (cc > 0) { 2131 int cn_trapped = 0; 2132 put[0] = bus_space_read_1(iot, ioh, com_data); 2133 put[1] = lsr; 2134 cn_check_magic(sc->sc_tty->t_dev, 2135 put[0], com_cnm_state); 2136 if (cn_trapped) 2137 goto next; 2138 put += 2; 2139 if (put >= end) 2140 put = sc->sc_rbuf; 2141 cc--; 2142 next: 2143 lsr = bus_space_read_1(iot, ioh, com_lsr); 2144 if (!ISSET(lsr, LSR_RCV_MASK)) 2145 break; 2146 } 2147 2148 /* 2149 * Current string of incoming characters ended because 2150 * no more data was available or we ran out of space. 2151 * Schedule a receive event if any data was received. 2152 * If we're out of space, turn off receive interrupts. 2153 */ 2154 sc->sc_rbput = put; 2155 sc->sc_rbavail = cc; 2156 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2157 sc->sc_rx_ready = 1; 2158 2159 /* 2160 * See if we are in danger of overflowing a buffer. If 2161 * so, use hardware flow control to ease the pressure. 2162 */ 2163 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2164 cc < sc->sc_r_hiwat) { 2165 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2166 com_hwiflow(sc); 2167 } 2168 2169 /* 2170 * If we're out of space, disable receive interrupts 2171 * until the queue has drained a bit. 2172 */ 2173 if (!cc) { 2174 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2175 #ifdef COM_PXA2X0 2176 if (sc->sc_type == COM_TYPE_PXA2x0) 2177 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 2178 else 2179 #endif 2180 CLR(sc->sc_ier, IER_ERXRDY); 2181 bus_space_write_1(iot, ioh, com_ier, 2182 sc->sc_ier); 2183 } 2184 } else { 2185 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 2186 (void) bus_space_read_1(iot, ioh, com_data); 2187 continue; 2188 } 2189 } 2190 2191 msr = bus_space_read_1(iot, ioh, com_msr); 2192 delta = msr ^ sc->sc_msr; 2193 sc->sc_msr = msr; 2194 #ifdef __HAVE_TIMECOUNTER 2195 if ((sc->sc_pps_state.ppsparam.mode & PPS_CAPTUREBOTH) && 2196 (delta & MSR_DCD)) { 2197 pps_capture(&sc->sc_pps_state); 2198 pps_event(&sc->sc_pps_state, 2199 (msr & MSR_DCD) ? 2200 PPS_CAPTUREASSERT : 2201 PPS_CAPTURECLEAR); 2202 } 2203 #else /* !__HAVE_TIMECOUNTER */ 2204 /* 2205 * Pulse-per-second (PSS) signals on edge of DCD? 2206 * Process these even if line discipline is ignoring DCD. 2207 */ 2208 if (delta & sc->sc_ppsmask) { 2209 struct timeval tv; 2210 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2211 /* XXX nanotime() */ 2212 microtime(&tv); 2213 TIMEVAL_TO_TIMESPEC(&tv, 2214 &sc->ppsinfo.assert_timestamp); 2215 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2216 timespecadd(&sc->ppsinfo.assert_timestamp, 2217 &sc->ppsparam.assert_offset, 2218 &sc->ppsinfo.assert_timestamp); 2219 } 2220 2221 #ifdef PPS_SYNC 2222 if (pps_kc_hardpps_source == sc && 2223 pps_kc_hardpps_mode & PPS_CAPTUREASSERT) { 2224 hardpps(&tv, tv.tv_usec); 2225 } 2226 #endif 2227 sc->ppsinfo.assert_sequence++; 2228 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2229 2230 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2231 /* XXX nanotime() */ 2232 microtime(&tv); 2233 TIMEVAL_TO_TIMESPEC(&tv, 2234 &sc->ppsinfo.clear_timestamp); 2235 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2236 timespecadd(&sc->ppsinfo.clear_timestamp, 2237 &sc->ppsparam.clear_offset, 2238 &sc->ppsinfo.clear_timestamp); 2239 } 2240 2241 #ifdef PPS_SYNC 2242 if (pps_kc_hardpps_source == sc && 2243 pps_kc_hardpps_mode & PPS_CAPTURECLEAR) { 2244 hardpps(&tv, tv.tv_usec); 2245 } 2246 #endif 2247 sc->ppsinfo.clear_sequence++; 2248 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2249 } 2250 } 2251 #endif /* !__HAVE_TIMECOUNTER */ 2252 2253 /* 2254 * Process normal status changes 2255 */ 2256 if (ISSET(delta, sc->sc_msr_mask)) { 2257 SET(sc->sc_msr_delta, delta); 2258 2259 /* 2260 * Stop output immediately if we lose the output 2261 * flow control signal or carrier detect. 2262 */ 2263 if (ISSET(~msr, sc->sc_msr_mask)) { 2264 sc->sc_tbc = 0; 2265 sc->sc_heldtbc = 0; 2266 #ifdef COM_DEBUG 2267 if (com_debug) 2268 comstatus(sc, "comintr "); 2269 #endif 2270 } 2271 2272 sc->sc_st_check = 1; 2273 } 2274 } while (!ISSET((iir = 2275 bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND) && 2276 /* 2277 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 2278 * by IIR read, so we can't do this way: `process all interrupts, 2279 * then do TX if possble'. 2280 */ 2281 (iir & IIR_IMASK) != IIR_TXRDY); 2282 2283 /* 2284 * Read LSR again, since there may be an interrupt between 2285 * the last LSR read and IIR read above. 2286 */ 2287 lsr = bus_space_read_1(iot, ioh, com_lsr); 2288 2289 /* 2290 * See if data can be transmitted as well. 2291 * Schedule tx done event if no data left 2292 * and tty was marked busy. 2293 */ 2294 if (ISSET(lsr, LSR_TXRDY)) { 2295 /* 2296 * If we've delayed a parameter change, do it now, and restart 2297 * output. 2298 */ 2299 if (sc->sc_heldchange) { 2300 com_loadchannelregs(sc); 2301 sc->sc_heldchange = 0; 2302 sc->sc_tbc = sc->sc_heldtbc; 2303 sc->sc_heldtbc = 0; 2304 } 2305 2306 /* Output the next chunk of the contiguous buffer, if any. */ 2307 if (sc->sc_tbc > 0) { 2308 u_int n; 2309 2310 n = sc->sc_tbc; 2311 if (n > sc->sc_fifolen) 2312 n = sc->sc_fifolen; 2313 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2314 sc->sc_tbc -= n; 2315 sc->sc_tba += n; 2316 } else { 2317 /* Disable transmit completion interrupts if necessary. */ 2318 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2319 CLR(sc->sc_ier, IER_ETXRDY); 2320 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2321 } 2322 if (sc->sc_tx_busy) { 2323 sc->sc_tx_busy = 0; 2324 sc->sc_tx_done = 1; 2325 } 2326 } 2327 } 2328 2329 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2330 goto again; 2331 2332 COM_UNLOCK(sc); 2333 2334 /* Wake up the poller. */ 2335 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2336 softintr_schedule(sc->sc_si); 2337 #else 2338 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2339 setsoftserial(); 2340 #else 2341 if (!com_softintr_scheduled) { 2342 com_softintr_scheduled = 1; 2343 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2344 } 2345 #endif 2346 #endif 2347 2348 #if NRND > 0 && defined(RND_COM) 2349 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2350 #endif 2351 2352 return (1); 2353 } 2354 2355 /* 2356 * The following functions are polled getc and putc routines, shared 2357 * by the console and kgdb glue. 2358 * 2359 * The read-ahead code is so that you can detect pending in-band 2360 * cn_magic in polled mode while doing output rather than having to 2361 * wait until the kernel decides it needs input. 2362 */ 2363 2364 #define MAX_READAHEAD 20 2365 static int com_readahead[MAX_READAHEAD]; 2366 static int com_readaheadcount = 0; 2367 2368 int 2369 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2370 { 2371 int s = splserial(); 2372 u_char stat, c; 2373 2374 /* got a character from reading things earlier */ 2375 if (com_readaheadcount > 0) { 2376 int i; 2377 2378 c = com_readahead[0]; 2379 for (i = 1; i < com_readaheadcount; i++) { 2380 com_readahead[i-1] = com_readahead[i]; 2381 } 2382 com_readaheadcount--; 2383 splx(s); 2384 return (c); 2385 } 2386 2387 /* block until a character becomes available */ 2388 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2389 ; 2390 2391 c = bus_space_read_1(iot, ioh, com_data); 2392 stat = bus_space_read_1(iot, ioh, com_iir); 2393 { 2394 int cn_trapped = 0; /* unused */ 2395 #ifdef DDB 2396 extern int db_active; 2397 if (!db_active) 2398 #endif 2399 cn_check_magic(dev, c, com_cnm_state); 2400 } 2401 splx(s); 2402 return (c); 2403 } 2404 2405 void 2406 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2407 { 2408 int s = splserial(); 2409 int cin, stat, timo; 2410 2411 if (com_readaheadcount < MAX_READAHEAD 2412 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2413 int cn_trapped = 0; 2414 cin = bus_space_read_1(iot, ioh, com_data); 2415 stat = bus_space_read_1(iot, ioh, com_iir); 2416 cn_check_magic(dev, cin, com_cnm_state); 2417 com_readahead[com_readaheadcount++] = cin; 2418 } 2419 2420 /* wait for any pending transmission to finish */ 2421 timo = 150000; 2422 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2423 continue; 2424 2425 bus_space_write_1(iot, ioh, com_data, c); 2426 COM_BARRIER(iot, ioh, BR | BW); 2427 2428 splx(s); 2429 } 2430 2431 /* 2432 * Initialize UART for use as console or KGDB line. 2433 */ 2434 int 2435 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2436 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2437 { 2438 bus_space_handle_t ioh; 2439 2440 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2441 return (ENOMEM); /* ??? */ 2442 2443 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2444 bus_space_write_1(iot, ioh, com_efr, 0); 2445 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2446 rate = comspeed(rate, frequency, type); 2447 bus_space_write_1(iot, ioh, com_dlbl, rate); 2448 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2449 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2450 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2451 bus_space_write_1(iot, ioh, com_fifo, 2452 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2453 #ifdef COM_PXA2X0 2454 if (type == COM_TYPE_PXA2x0) 2455 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 2456 else 2457 #endif 2458 bus_space_write_1(iot, ioh, com_ier, 0); 2459 2460 *iohp = ioh; 2461 return (0); 2462 } 2463 2464 /* 2465 * Following are all routines needed for COM to act as console 2466 */ 2467 struct consdev comcons = { 2468 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2469 NODEV, CN_NORMAL 2470 }; 2471 2472 2473 int 2474 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2475 int type, tcflag_t cflag) 2476 { 2477 int res; 2478 2479 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2480 if (res) 2481 return (res); 2482 2483 cn_tab = &comcons; 2484 cn_init_magic(&com_cnm_state); 2485 cn_set_magic("\047\001"); /* default magic is BREAK */ 2486 2487 comconstag = iot; 2488 comconsaddr = iobase; 2489 comconsrate = rate; 2490 comconscflag = cflag; 2491 2492 return (0); 2493 } 2494 2495 int 2496 comcngetc(dev_t dev) 2497 { 2498 2499 return (com_common_getc(dev, comconstag, comconsioh)); 2500 } 2501 2502 /* 2503 * Console kernel output character routine. 2504 */ 2505 void 2506 comcnputc(dev_t dev, int c) 2507 { 2508 2509 com_common_putc(dev, comconstag, comconsioh, c); 2510 } 2511 2512 void 2513 comcnpollc(dev_t dev, int on) 2514 { 2515 2516 } 2517 2518 #ifdef KGDB 2519 int 2520 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2521 int frequency, int type, tcflag_t cflag) 2522 { 2523 int res; 2524 2525 if (iot == comconstag && iobase == comconsaddr) { 2526 #if !defined(DDB) 2527 return (EBUSY); /* cannot share with console */ 2528 #else 2529 com_kgdb_ioh = comconsioh; 2530 #endif 2531 } else { 2532 res = cominit(iot, iobase, rate, frequency, type, cflag, 2533 &com_kgdb_ioh); 2534 if (res) 2535 return (res); 2536 2537 /* 2538 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2539 * expects this to be initialized 2540 */ 2541 cn_init_magic(&com_cnm_state); 2542 cn_set_magic("\047\001"); 2543 } 2544 2545 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2546 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2547 2548 com_kgdb_iot = iot; 2549 com_kgdb_addr = iobase; 2550 2551 return (0); 2552 } 2553 2554 /* ARGSUSED */ 2555 int 2556 com_kgdb_getc(void *arg) 2557 { 2558 2559 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2560 } 2561 2562 /* ARGSUSED */ 2563 void 2564 com_kgdb_putc(void *arg, int c) 2565 { 2566 2567 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2568 } 2569 #endif /* KGDB */ 2570 2571 /* helper function to identify the com ports used by 2572 console or KGDB (and not yet autoconf attached) */ 2573 int 2574 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2575 { 2576 bus_space_handle_t help; 2577 2578 if (!comconsattached && 2579 iot == comconstag && iobase == comconsaddr) 2580 help = comconsioh; 2581 #ifdef KGDB 2582 else if (!com_kgdb_attached && 2583 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2584 help = com_kgdb_ioh; 2585 #endif 2586 else 2587 return (0); 2588 2589 if (ioh) 2590 *ioh = help; 2591 return (1); 2592 } 2593 2594 void 2595 com_power(int why, void *arg) 2596 { 2597 struct com_softc *sc = arg; 2598 int s; 2599 2600 s = splserial(); 2601 switch (why) { 2602 case PWR_SUSPEND: 2603 case PWR_STANDBY: 2604 /* XXX should we do something to stop the device? */ 2605 break; 2606 case PWR_RESUME: 2607 com_loadchannelregs(sc); 2608 break; 2609 case PWR_SOFTSUSPEND: 2610 case PWR_SOFTSTANDBY: 2611 case PWR_SOFTRESUME: 2612 break; 2613 } 2614 splx(s); 2615 } 2616
Indexes created Fri Sep 26 08:10:20 GMT 2025