com.c revision 1.271
1 /* $NetBSD: com.c,v 1.271 2008/01/24 18:50:15 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.271 2008/01/24 18:50:15 ad Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 #include <sys/kauth.h> 125 #include <sys/intr.h> 126 127 #include <sys/bus.h> 128 129 #include <dev/ic/comreg.h> 130 #include <dev/ic/comvar.h> 131 #include <dev/ic/ns16550reg.h> 132 #include <dev/ic/st16650reg.h> 133 #ifdef COM_HAYESP 134 #include <dev/ic/hayespreg.h> 135 #endif 136 #define com_lcr com_cfcr 137 #include <dev/cons.h> 138 139 #ifdef COM_REGMAP 140 #define CSR_WRITE_1(r, o, v) \ 141 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 142 #define CSR_READ_1(r, o) \ 143 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 144 #define CSR_WRITE_2(r, o, v) \ 145 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 146 #define CSR_READ_2(r, o) \ 147 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 148 #define CSR_WRITE_MULTI(r, o, p, n) \ 149 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], p, n) 150 #else 151 #define CSR_WRITE_1(r, o, v) \ 152 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, o, v) 153 #define CSR_READ_1(r, o) \ 154 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, o) 155 #define CSR_WRITE_2(r, o, v) \ 156 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, o, v) 157 #define CSR_READ_2(r, o) \ 158 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, o) 159 #define CSR_WRITE_MULTI(r, o, p, n) \ 160 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, o, p, n) 161 #endif 162 163 164 static void com_enable_debugport(struct com_softc *); 165 166 void com_config(struct com_softc *); 167 void com_shutdown(struct com_softc *); 168 int comspeed(long, long, int); 169 static u_char cflag2lcr(tcflag_t); 170 int comparam(struct tty *, struct termios *); 171 void comstart(struct tty *); 172 int comhwiflow(struct tty *, int); 173 174 void com_loadchannelregs(struct com_softc *); 175 void com_hwiflow(struct com_softc *); 176 void com_break(struct com_softc *, int); 177 void com_modem(struct com_softc *, int); 178 void tiocm_to_com(struct com_softc *, u_long, int); 179 int com_to_tiocm(struct com_softc *); 180 void com_iflush(struct com_softc *); 181 182 int com_common_getc(dev_t, struct com_regs *); 183 void com_common_putc(dev_t, struct com_regs *, int); 184 185 int cominit(struct com_regs *, int, int, int, tcflag_t); 186 187 int comcngetc(dev_t); 188 void comcnputc(dev_t, int); 189 void comcnpollc(dev_t, int); 190 191 #define integrate static inline 192 void comsoft(void *); 193 integrate void com_rxsoft(struct com_softc *, struct tty *); 194 integrate void com_txsoft(struct com_softc *, struct tty *); 195 integrate void com_stsoft(struct com_softc *, struct tty *); 196 integrate void com_schedrx(struct com_softc *); 197 void comdiag(void *); 198 199 extern struct cfdriver com_cd; 200 201 dev_type_open(comopen); 202 dev_type_close(comclose); 203 dev_type_read(comread); 204 dev_type_write(comwrite); 205 dev_type_ioctl(comioctl); 206 dev_type_stop(comstop); 207 dev_type_tty(comtty); 208 dev_type_poll(compoll); 209 210 const struct cdevsw com_cdevsw = { 211 comopen, comclose, comread, comwrite, comioctl, 212 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 213 }; 214 215 /* 216 * Make this an option variable one can patch. 217 * But be warned: this must be a power of 2! 218 */ 219 u_int com_rbuf_size = COM_RING_SIZE; 220 221 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 222 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 223 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 224 225 static struct com_regs comconsregs; 226 static int comconsattached; 227 static int comconsrate; 228 static tcflag_t comconscflag; 229 static struct cnm_state com_cnm_state; 230 231 #ifdef KGDB 232 #include <sys/kgdb.h> 233 234 static struct com_regs comkgdbregs; 235 static int com_kgdb_attached; 236 237 int com_kgdb_getc(void *); 238 void com_kgdb_putc(void *, int); 239 #endif /* KGDB */ 240 241 #ifdef COM_REGMAP 242 /* initializer for typical 16550-ish hardware */ 243 #define COM_REG_16550 { \ 244 com_data, com_data, com_dlbl, com_dlbh, com_ier, com_iir, com_fifo, \ 245 com_efr, com_lcr, com_mcr, com_lsr, com_msr } 246 247 const bus_size_t com_std_map[16] = COM_REG_16550; 248 #endif /* COM_REGMAP */ 249 250 #define COMUNIT_MASK 0x7ffff 251 #define COMDIALOUT_MASK 0x80000 252 253 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 254 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 255 256 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 257 device_is_active(&(sc)->sc_dev)) 258 259 #define BR BUS_SPACE_BARRIER_READ 260 #define BW BUS_SPACE_BARRIER_WRITE 261 #define COM_BARRIER(r, f) \ 262 bus_space_barrier((r)->cr_iot, (r)->cr_ioh, 0, (r)->cr_nports, (f)) 263 264 /*ARGSUSED*/ 265 int 266 comspeed(long speed, long frequency, int type) 267 { 268 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 269 270 int x, err; 271 272 #if 0 273 if (speed == 0) 274 return (0); 275 #endif 276 if (speed <= 0) 277 return (-1); 278 x = divrnd(frequency / 16, speed); 279 if (x <= 0) 280 return (-1); 281 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 282 if (err < 0) 283 err = -err; 284 if (err > COM_TOLERANCE) 285 return (-1); 286 return (x); 287 288 #undef divrnd 289 } 290 291 #ifdef COM_DEBUG 292 int com_debug = 0; 293 294 void comstatus(struct com_softc *, const char *); 295 void 296 comstatus(struct com_softc *sc, const char *str) 297 { 298 struct tty *tp = sc->sc_tty; 299 300 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 301 sc->sc_dev.dv_xname, str, 302 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 303 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 304 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 305 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 306 sc->sc_tx_stopped ? '+' : '-'); 307 308 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 309 sc->sc_dev.dv_xname, str, 310 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 311 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 312 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 313 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 314 sc->sc_rx_flags); 315 } 316 #endif 317 318 int 319 com_probe_subr(struct com_regs *regs) 320 { 321 322 /* force access to id reg */ 323 CSR_WRITE_1(regs, COM_REG_LCR, LCR_8BITS); 324 CSR_WRITE_1(regs, COM_REG_IIR, 0); 325 if ((CSR_READ_1(regs, COM_REG_LCR) != LCR_8BITS) || 326 (CSR_READ_1(regs, COM_REG_IIR) & 0x38)) 327 return (0); 328 329 return (1); 330 } 331 332 int 333 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 334 { 335 struct com_regs regs; 336 337 regs.cr_iot = iot; 338 regs.cr_ioh = ioh; 339 #ifdef COM_REGMAP 340 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map));; 341 #endif 342 343 return com_probe_subr(®s); 344 } 345 346 /* 347 * No locking in this routine; it is only called during attach, 348 * or with the port already locked. 349 */ 350 static void 351 com_enable_debugport(struct com_softc *sc) 352 { 353 354 /* Turn on line break interrupt, set carrier. */ 355 sc->sc_ier = IER_ERXRDY; 356 if (sc->sc_type == COM_TYPE_PXA2x0) 357 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 358 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 359 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 360 CSR_WRITE_1(&sc->sc_regs, COM_REG_MCR, sc->sc_mcr); 361 } 362 363 void 364 com_attach_subr(struct com_softc *sc) 365 { 366 struct com_regs *regsp = &sc->sc_regs; 367 struct tty *tp; 368 #ifdef COM_16650 369 u_int8_t lcr; 370 #endif 371 const char *fifo_msg = NULL; 372 373 aprint_naive("\n"); 374 375 callout_init(&sc->sc_diag_callout, 0); 376 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 377 378 /* Disable interrupts before configuring the device. */ 379 if (sc->sc_type == COM_TYPE_PXA2x0) 380 sc->sc_ier = IER_EUART; 381 else 382 sc->sc_ier = 0; 383 384 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 385 386 if (regsp->cr_iot == comconsregs.cr_iot && 387 regsp->cr_iobase == comconsregs.cr_iobase) { 388 comconsattached = 1; 389 390 /* Make sure the console is always "hardwired". */ 391 delay(10000); /* wait for output to finish */ 392 SET(sc->sc_hwflags, COM_HW_CONSOLE); 393 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 394 } 395 396 /* Probe for FIFO */ 397 switch (sc->sc_type) { 398 case COM_TYPE_HAYESP: 399 goto fifodone; 400 401 case COM_TYPE_AU1x00: 402 sc->sc_fifolen = 16; 403 fifo_msg = "Au1X00 UART, working fifo"; 404 SET(sc->sc_hwflags, COM_HW_FIFO); 405 goto fifodelay; 406 } 407 408 sc->sc_fifolen = 1; 409 /* look for a NS 16550AF UART with FIFOs */ 410 CSR_WRITE_1(regsp, COM_REG_FIFO, 411 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 412 delay(100); 413 if (ISSET(CSR_READ_1(regsp, COM_REG_IIR), IIR_FIFO_MASK) 414 == IIR_FIFO_MASK) 415 if (ISSET(CSR_READ_1(regsp, COM_REG_FIFO), FIFO_TRIGGER_14) 416 == FIFO_TRIGGER_14) { 417 SET(sc->sc_hwflags, COM_HW_FIFO); 418 419 #ifdef COM_16650 420 /* 421 * IIR changes into the EFR if LCR is set to LCR_EERS 422 * on 16650s. We also know IIR != 0 at this point. 423 * Write 0 into the EFR, and read it. If the result 424 * is 0, we have a 16650. 425 * 426 * Older 16650s were broken; the test to detect them 427 * is taken from the Linux driver. Apparently 428 * setting DLAB enable gives access to the EFR on 429 * these chips. 430 */ 431 lcr = CSR_READ_1(regsp, COM_REG_LCR); 432 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 433 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 434 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 435 CSR_WRITE_1(regsp, COM_REG_LCR, 436 lcr | LCR_DLAB); 437 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 438 CLR(sc->sc_hwflags, COM_HW_FIFO); 439 sc->sc_fifolen = 0; 440 } else { 441 SET(sc->sc_hwflags, COM_HW_FLOW); 442 sc->sc_fifolen = 32; 443 } 444 } else 445 #endif 446 sc->sc_fifolen = 16; 447 448 #ifdef COM_16650 449 CSR_WRITE_1(regsp, COM_REG_LCR, lcr); 450 if (sc->sc_fifolen == 0) 451 fifo_msg = "st16650, broken fifo"; 452 else if (sc->sc_fifolen == 32) 453 fifo_msg = "st16650a, working fifo"; 454 else 455 #endif 456 fifo_msg = "ns16550a, working fifo"; 457 } else 458 fifo_msg = "ns16550, broken fifo"; 459 else 460 fifo_msg = "ns8250 or ns16450, no fifo"; 461 CSR_WRITE_1(regsp, COM_REG_FIFO, 0); 462 fifodelay: 463 /* 464 * Some chips will clear down both Tx and Rx FIFOs when zero is 465 * written to com_fifo. If this chip is the console, writing zero 466 * results in some of the chip/FIFO description being lost, so delay 467 * printing it until now. 468 */ 469 delay(10); 470 aprint_normal(": %s\n", fifo_msg); 471 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 472 sc->sc_fifolen = 1; 473 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 474 } 475 476 fifodone: 477 478 tp = ttymalloc(); 479 tp->t_oproc = comstart; 480 tp->t_param = comparam; 481 tp->t_hwiflow = comhwiflow; 482 483 sc->sc_tty = tp; 484 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 485 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 486 sc->sc_rbavail = com_rbuf_size; 487 if (sc->sc_rbuf == NULL) { 488 aprint_error("%s: unable to allocate ring buffer\n", 489 sc->sc_dev.dv_xname); 490 return; 491 } 492 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 493 494 tty_attach(tp); 495 496 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 497 SET(sc->sc_mcr, MCR_IENABLE); 498 499 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 500 int maj; 501 502 /* locate the major number */ 503 maj = cdevsw_lookup_major(&com_cdevsw); 504 505 tp->t_dev = cn_tab->cn_dev = makedev(maj, 506 device_unit(&sc->sc_dev)); 507 508 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 509 } 510 511 #ifdef KGDB 512 /* 513 * Allow kgdb to "take over" this port. If this is 514 * not the console and is the kgdb device, it has 515 * exclusive use. If it's the console _and_ the 516 * kgdb device, it doesn't. 517 */ 518 if (regsp->cr_iot == comkgdbregs.cr_iot && 519 regsp->cr_iobase == comkgdbregs.cr_iobase) { 520 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 521 com_kgdb_attached = 1; 522 523 SET(sc->sc_hwflags, COM_HW_KGDB); 524 } 525 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 526 } 527 #endif 528 529 sc->sc_si = softint_establish(SOFTINT_SERIAL, comsoft, sc); 530 531 #if NRND > 0 && defined(RND_COM) 532 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 533 RND_TYPE_TTY, 0); 534 #endif 535 536 /* if there are no enable/disable functions, assume the device 537 is always enabled */ 538 if (!sc->enable) 539 sc->enabled = 1; 540 541 com_config(sc); 542 543 SET(sc->sc_hwflags, COM_HW_DEV_OK); 544 } 545 546 void 547 com_config(struct com_softc *sc) 548 { 549 struct com_regs *regsp = &sc->sc_regs; 550 551 /* Disable interrupts before configuring the device. */ 552 if (sc->sc_type == COM_TYPE_PXA2x0) 553 sc->sc_ier = IER_EUART; 554 else 555 sc->sc_ier = 0; 556 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 557 (void) CSR_READ_1(regsp, COM_REG_IIR); 558 559 #ifdef COM_HAYESP 560 /* Look for a Hayes ESP board. */ 561 if (sc->sc_type == COM_TYPE_HAYESP) { 562 563 /* Set 16550 compatibility mode */ 564 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 565 HAYESP_SETMODE); 566 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 567 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 568 HAYESP_MODE_SCALE); 569 570 /* Set RTS/CTS flow control */ 571 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 572 HAYESP_SETFLOWTYPE); 573 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 574 HAYESP_FLOW_RTS); 575 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 576 HAYESP_FLOW_CTS); 577 578 /* Set flow control levels */ 579 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 580 HAYESP_SETRXFLOW); 581 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 582 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 583 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 584 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 585 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 586 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 587 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 588 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 589 } 590 #endif 591 592 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 593 com_enable_debugport(sc); 594 } 595 596 int 597 com_detach(struct device *self, int flags) 598 { 599 struct com_softc *sc = (struct com_softc *)self; 600 int maj, mn; 601 602 /* locate the major number */ 603 maj = cdevsw_lookup_major(&com_cdevsw); 604 605 /* Nuke the vnodes for any open instances. */ 606 mn = device_unit(self); 607 vdevgone(maj, mn, mn, VCHR); 608 609 mn |= COMDIALOUT_MASK; 610 vdevgone(maj, mn, mn, VCHR); 611 612 if (sc->sc_rbuf == NULL) { 613 /* 614 * Ring buffer allocation failed in the com_attach_subr, 615 * only the tty is allocated, and nothing else. 616 */ 617 ttyfree(sc->sc_tty); 618 return 0; 619 } 620 621 /* Free the receive buffer. */ 622 free(sc->sc_rbuf, M_DEVBUF); 623 624 /* Detach and free the tty. */ 625 tty_detach(sc->sc_tty); 626 ttyfree(sc->sc_tty); 627 628 /* Unhook the soft interrupt handler. */ 629 softint_disestablish(sc->sc_si); 630 631 #if NRND > 0 && defined(RND_COM) 632 /* Unhook the entropy source. */ 633 rnd_detach_source(&sc->rnd_source); 634 #endif 635 636 /* Destroy the lock. */ 637 mutex_destroy(&sc->sc_lock); 638 639 return (0); 640 } 641 642 int 643 com_activate(struct device *self, enum devact act) 644 { 645 struct com_softc *sc = (struct com_softc *)self; 646 int rv = 0; 647 648 switch (act) { 649 case DVACT_ACTIVATE: 650 rv = EOPNOTSUPP; 651 break; 652 653 case DVACT_DEACTIVATE: 654 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 655 rv = EBUSY; 656 break; 657 } 658 659 if (sc->disable != NULL && sc->enabled != 0) { 660 (*sc->disable)(sc); 661 sc->enabled = 0; 662 } 663 break; 664 } 665 666 return (rv); 667 } 668 669 void 670 com_shutdown(struct com_softc *sc) 671 { 672 struct tty *tp = sc->sc_tty; 673 674 mutex_spin_enter(&sc->sc_lock); 675 676 /* If we were asserting flow control, then deassert it. */ 677 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 678 com_hwiflow(sc); 679 680 /* Clear any break condition set with TIOCSBRK. */ 681 com_break(sc, 0); 682 683 /* 684 * Hang up if necessary. Wait a bit, so the other side has time to 685 * notice even if we immediately open the port again. 686 * Avoid tsleeping above splhigh(). 687 */ 688 if (ISSET(tp->t_cflag, HUPCL)) { 689 com_modem(sc, 0); 690 mutex_spin_exit(&sc->sc_lock); 691 /* XXX will only timeout */ 692 (void) kpause(ttclos, false, hz, NULL); 693 mutex_spin_enter(&sc->sc_lock); 694 } 695 696 /* Turn off interrupts. */ 697 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 698 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 699 if (sc->sc_type == COM_TYPE_PXA2x0) 700 sc->sc_ier |= IER_ERXTOUT; 701 } else 702 sc->sc_ier = 0; 703 704 if (sc->sc_type == COM_TYPE_PXA2x0) 705 sc->sc_ier |= IER_EUART; 706 707 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 708 709 mutex_spin_exit(&sc->sc_lock); 710 711 if (sc->disable) { 712 #ifdef DIAGNOSTIC 713 if (!sc->enabled) 714 panic("com_shutdown: not enabled?"); 715 #endif 716 (*sc->disable)(sc); 717 sc->enabled = 0; 718 } 719 } 720 721 int 722 comopen(dev_t dev, int flag, int mode, struct lwp *l) 723 { 724 struct com_softc *sc; 725 struct tty *tp; 726 int s; 727 int error; 728 729 sc = device_lookup(&com_cd, COMUNIT(dev)); 730 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 731 sc->sc_rbuf == NULL) 732 return (ENXIO); 733 734 if (!device_is_active(&sc->sc_dev)) 735 return (ENXIO); 736 737 #ifdef KGDB 738 /* 739 * If this is the kgdb port, no other use is permitted. 740 */ 741 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 742 return (EBUSY); 743 #endif 744 745 tp = sc->sc_tty; 746 747 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 748 return (EBUSY); 749 750 s = spltty(); 751 752 /* 753 * Do the following iff this is a first open. 754 */ 755 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 756 struct termios t; 757 758 tp->t_dev = dev; 759 760 761 if (sc->enable) { 762 if ((*sc->enable)(sc)) { 763 splx(s); 764 printf("%s: device enable failed\n", 765 sc->sc_dev.dv_xname); 766 return (EIO); 767 } 768 mutex_spin_enter(&sc->sc_lock); 769 sc->enabled = 1; 770 com_config(sc); 771 } else { 772 mutex_spin_enter(&sc->sc_lock); 773 } 774 775 /* Turn on interrupts. */ 776 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 777 if (sc->sc_type == COM_TYPE_PXA2x0) 778 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 779 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 780 781 /* Fetch the current modem control status, needed later. */ 782 sc->sc_msr = CSR_READ_1(&sc->sc_regs, COM_REG_MSR); 783 784 /* Clear PPS capture state on first open. */ 785 memset(&sc->sc_pps_state, 0, sizeof(sc->sc_pps_state)); 786 sc->sc_pps_state.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 787 pps_init(&sc->sc_pps_state); 788 789 mutex_spin_exit(&sc->sc_lock); 790 791 /* 792 * Initialize the termios status to the defaults. Add in the 793 * sticky bits from TIOCSFLAGS. 794 */ 795 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 796 t.c_ospeed = comconsrate; 797 t.c_cflag = comconscflag; 798 } else { 799 t.c_ospeed = TTYDEF_SPEED; 800 t.c_cflag = TTYDEF_CFLAG; 801 } 802 t.c_ispeed = t.c_ospeed; 803 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 804 SET(t.c_cflag, CLOCAL); 805 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 806 SET(t.c_cflag, CRTSCTS); 807 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 808 SET(t.c_cflag, MDMBUF); 809 /* Make sure comparam() will do something. */ 810 tp->t_ospeed = 0; 811 (void) comparam(tp, &t); 812 tp->t_iflag = TTYDEF_IFLAG; 813 tp->t_oflag = TTYDEF_OFLAG; 814 tp->t_lflag = TTYDEF_LFLAG; 815 ttychars(tp); 816 ttsetwater(tp); 817 818 mutex_spin_enter(&sc->sc_lock); 819 820 /* 821 * Turn on DTR. We must always do this, even if carrier is not 822 * present, because otherwise we'd have to use TIOCSDTR 823 * immediately after setting CLOCAL, which applications do not 824 * expect. We always assert DTR while the device is open 825 * unless explicitly requested to deassert it. 826 */ 827 com_modem(sc, 1); 828 829 /* Clear the input ring, and unblock. */ 830 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 831 sc->sc_rbavail = com_rbuf_size; 832 com_iflush(sc); 833 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 834 com_hwiflow(sc); 835 836 #ifdef COM_DEBUG 837 if (com_debug) 838 comstatus(sc, "comopen "); 839 #endif 840 841 mutex_spin_exit(&sc->sc_lock); 842 } 843 844 splx(s); 845 846 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 847 if (error) 848 goto bad; 849 850 error = (*tp->t_linesw->l_open)(dev, tp); 851 if (error) 852 goto bad; 853 854 return (0); 855 856 bad: 857 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 858 /* 859 * We failed to open the device, and nobody else had it opened. 860 * Clean up the state as appropriate. 861 */ 862 com_shutdown(sc); 863 } 864 865 return (error); 866 } 867 868 int 869 comclose(dev_t dev, int flag, int mode, struct lwp *l) 870 { 871 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 872 struct tty *tp = sc->sc_tty; 873 874 /* XXX This is for cons.c. */ 875 if (!ISSET(tp->t_state, TS_ISOPEN)) 876 return (0); 877 878 (*tp->t_linesw->l_close)(tp, flag); 879 ttyclose(tp); 880 881 if (COM_ISALIVE(sc) == 0) 882 return (0); 883 884 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 885 /* 886 * Although we got a last close, the device may still be in 887 * use; e.g. if this was the dialout node, and there are still 888 * processes waiting for carrier on the non-dialout node. 889 */ 890 com_shutdown(sc); 891 } 892 893 return (0); 894 } 895 896 int 897 comread(dev_t dev, struct uio *uio, int flag) 898 { 899 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 900 struct tty *tp = sc->sc_tty; 901 902 if (COM_ISALIVE(sc) == 0) 903 return (EIO); 904 905 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 906 } 907 908 int 909 comwrite(dev_t dev, struct uio *uio, int flag) 910 { 911 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 912 struct tty *tp = sc->sc_tty; 913 914 if (COM_ISALIVE(sc) == 0) 915 return (EIO); 916 917 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 918 } 919 920 int 921 compoll(dev_t dev, int events, struct lwp *l) 922 { 923 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 924 struct tty *tp = sc->sc_tty; 925 926 if (COM_ISALIVE(sc) == 0) 927 return (POLLHUP); 928 929 return ((*tp->t_linesw->l_poll)(tp, events, l)); 930 } 931 932 struct tty * 933 comtty(dev_t dev) 934 { 935 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 936 struct tty *tp = sc->sc_tty; 937 938 return (tp); 939 } 940 941 int 942 comioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 943 { 944 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 945 struct tty *tp = sc->sc_tty; 946 int error; 947 948 if (COM_ISALIVE(sc) == 0) 949 return (EIO); 950 951 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 952 if (error != EPASSTHROUGH) 953 return (error); 954 955 error = ttioctl(tp, cmd, data, flag, l); 956 if (error != EPASSTHROUGH) 957 return (error); 958 959 error = 0; 960 switch (cmd) { 961 case TIOCSFLAGS: 962 error = kauth_authorize_device_tty(l->l_cred, 963 KAUTH_DEVICE_TTY_PRIVSET, tp); 964 break; 965 default: 966 /* nothing */ 967 break; 968 } 969 if (error) { 970 return error; 971 } 972 973 mutex_spin_enter(&sc->sc_lock); 974 975 switch (cmd) { 976 case TIOCSBRK: 977 com_break(sc, 1); 978 break; 979 980 case TIOCCBRK: 981 com_break(sc, 0); 982 break; 983 984 case TIOCSDTR: 985 com_modem(sc, 1); 986 break; 987 988 case TIOCCDTR: 989 com_modem(sc, 0); 990 break; 991 992 case TIOCGFLAGS: 993 *(int *)data = sc->sc_swflags; 994 break; 995 996 case TIOCSFLAGS: 997 sc->sc_swflags = *(int *)data; 998 break; 999 1000 case TIOCMSET: 1001 case TIOCMBIS: 1002 case TIOCMBIC: 1003 tiocm_to_com(sc, cmd, *(int *)data); 1004 break; 1005 1006 case TIOCMGET: 1007 *(int *)data = com_to_tiocm(sc); 1008 break; 1009 1010 case PPS_IOC_CREATE: 1011 case PPS_IOC_DESTROY: 1012 case PPS_IOC_GETPARAMS: 1013 case PPS_IOC_SETPARAMS: 1014 case PPS_IOC_GETCAP: 1015 case PPS_IOC_FETCH: 1016 #ifdef PPS_SYNC 1017 case PPS_IOC_KCBIND: 1018 #endif 1019 error = pps_ioctl(cmd, data, &sc->sc_pps_state); 1020 break; 1021 1022 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1023 #ifndef PPS_TRAILING_EDGE 1024 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1025 &sc->sc_pps_state.ppsinfo.assert_timestamp); 1026 #else 1027 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1028 &sc->sc_pps_state.ppsinfo.clear_timestamp); 1029 #endif 1030 break; 1031 1032 default: 1033 error = EPASSTHROUGH; 1034 break; 1035 } 1036 1037 mutex_spin_exit(&sc->sc_lock); 1038 1039 #ifdef COM_DEBUG 1040 if (com_debug) 1041 comstatus(sc, "comioctl "); 1042 #endif 1043 1044 return (error); 1045 } 1046 1047 integrate void 1048 com_schedrx(struct com_softc *sc) 1049 { 1050 1051 sc->sc_rx_ready = 1; 1052 1053 /* Wake up the poller. */ 1054 softint_schedule(sc->sc_si); 1055 } 1056 1057 void 1058 com_break(struct com_softc *sc, int onoff) 1059 { 1060 1061 if (onoff) 1062 SET(sc->sc_lcr, LCR_SBREAK); 1063 else 1064 CLR(sc->sc_lcr, LCR_SBREAK); 1065 1066 if (!sc->sc_heldchange) { 1067 if (sc->sc_tx_busy) { 1068 sc->sc_heldtbc = sc->sc_tbc; 1069 sc->sc_tbc = 0; 1070 sc->sc_heldchange = 1; 1071 } else 1072 com_loadchannelregs(sc); 1073 } 1074 } 1075 1076 void 1077 com_modem(struct com_softc *sc, int onoff) 1078 { 1079 1080 if (sc->sc_mcr_dtr == 0) 1081 return; 1082 1083 if (onoff) 1084 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1085 else 1086 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1087 1088 if (!sc->sc_heldchange) { 1089 if (sc->sc_tx_busy) { 1090 sc->sc_heldtbc = sc->sc_tbc; 1091 sc->sc_tbc = 0; 1092 sc->sc_heldchange = 1; 1093 } else 1094 com_loadchannelregs(sc); 1095 } 1096 } 1097 1098 void 1099 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1100 { 1101 u_char combits; 1102 1103 combits = 0; 1104 if (ISSET(ttybits, TIOCM_DTR)) 1105 SET(combits, MCR_DTR); 1106 if (ISSET(ttybits, TIOCM_RTS)) 1107 SET(combits, MCR_RTS); 1108 1109 switch (how) { 1110 case TIOCMBIC: 1111 CLR(sc->sc_mcr, combits); 1112 break; 1113 1114 case TIOCMBIS: 1115 SET(sc->sc_mcr, combits); 1116 break; 1117 1118 case TIOCMSET: 1119 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1120 SET(sc->sc_mcr, combits); 1121 break; 1122 } 1123 1124 if (!sc->sc_heldchange) { 1125 if (sc->sc_tx_busy) { 1126 sc->sc_heldtbc = sc->sc_tbc; 1127 sc->sc_tbc = 0; 1128 sc->sc_heldchange = 1; 1129 } else 1130 com_loadchannelregs(sc); 1131 } 1132 } 1133 1134 int 1135 com_to_tiocm(struct com_softc *sc) 1136 { 1137 u_char combits; 1138 int ttybits = 0; 1139 1140 combits = sc->sc_mcr; 1141 if (ISSET(combits, MCR_DTR)) 1142 SET(ttybits, TIOCM_DTR); 1143 if (ISSET(combits, MCR_RTS)) 1144 SET(ttybits, TIOCM_RTS); 1145 1146 combits = sc->sc_msr; 1147 if (ISSET(combits, MSR_DCD)) 1148 SET(ttybits, TIOCM_CD); 1149 if (ISSET(combits, MSR_CTS)) 1150 SET(ttybits, TIOCM_CTS); 1151 if (ISSET(combits, MSR_DSR)) 1152 SET(ttybits, TIOCM_DSR); 1153 if (ISSET(combits, MSR_RI | MSR_TERI)) 1154 SET(ttybits, TIOCM_RI); 1155 1156 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1157 SET(ttybits, TIOCM_LE); 1158 1159 return (ttybits); 1160 } 1161 1162 static u_char 1163 cflag2lcr(tcflag_t cflag) 1164 { 1165 u_char lcr = 0; 1166 1167 switch (ISSET(cflag, CSIZE)) { 1168 case CS5: 1169 SET(lcr, LCR_5BITS); 1170 break; 1171 case CS6: 1172 SET(lcr, LCR_6BITS); 1173 break; 1174 case CS7: 1175 SET(lcr, LCR_7BITS); 1176 break; 1177 case CS8: 1178 SET(lcr, LCR_8BITS); 1179 break; 1180 } 1181 if (ISSET(cflag, PARENB)) { 1182 SET(lcr, LCR_PENAB); 1183 if (!ISSET(cflag, PARODD)) 1184 SET(lcr, LCR_PEVEN); 1185 } 1186 if (ISSET(cflag, CSTOPB)) 1187 SET(lcr, LCR_STOPB); 1188 1189 return (lcr); 1190 } 1191 1192 int 1193 comparam(struct tty *tp, struct termios *t) 1194 { 1195 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1196 int ospeed; 1197 u_char lcr; 1198 1199 if (COM_ISALIVE(sc) == 0) 1200 return (EIO); 1201 1202 #ifdef COM_HAYESP 1203 if (sc->sc_type == COM_TYPE_HAYESP) { 1204 int prescaler, speed; 1205 1206 /* 1207 * Calculate UART clock prescaler. It should be in 1208 * range of 0 .. 3. 1209 */ 1210 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1211 prescaler++, speed /= 2) 1212 if ((ospeed = comspeed(speed, sc->sc_frequency, 1213 sc->sc_type)) > 0) 1214 break; 1215 1216 if (prescaler == 4) 1217 return (EINVAL); 1218 sc->sc_prescaler = prescaler; 1219 } else 1220 #endif 1221 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1222 1223 /* Check requested parameters. */ 1224 if (ospeed < 0) 1225 return (EINVAL); 1226 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1227 return (EINVAL); 1228 1229 /* 1230 * For the console, always force CLOCAL and !HUPCL, so that the port 1231 * is always active. 1232 */ 1233 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1234 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1235 SET(t->c_cflag, CLOCAL); 1236 CLR(t->c_cflag, HUPCL); 1237 } 1238 1239 /* 1240 * If there were no changes, don't do anything. This avoids dropping 1241 * input and improves performance when all we did was frob things like 1242 * VMIN and VTIME. 1243 */ 1244 if (tp->t_ospeed == t->c_ospeed && 1245 tp->t_cflag == t->c_cflag) 1246 return (0); 1247 1248 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1249 1250 mutex_spin_enter(&sc->sc_lock); 1251 1252 sc->sc_lcr = lcr; 1253 1254 /* 1255 * If we're not in a mode that assumes a connection is present, then 1256 * ignore carrier changes. 1257 */ 1258 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1259 sc->sc_msr_dcd = 0; 1260 else 1261 sc->sc_msr_dcd = MSR_DCD; 1262 /* 1263 * Set the flow control pins depending on the current flow control 1264 * mode. 1265 */ 1266 if (ISSET(t->c_cflag, CRTSCTS)) { 1267 sc->sc_mcr_dtr = MCR_DTR; 1268 sc->sc_mcr_rts = MCR_RTS; 1269 sc->sc_msr_cts = MSR_CTS; 1270 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1271 } else if (ISSET(t->c_cflag, MDMBUF)) { 1272 /* 1273 * For DTR/DCD flow control, make sure we don't toggle DTR for 1274 * carrier detection. 1275 */ 1276 sc->sc_mcr_dtr = 0; 1277 sc->sc_mcr_rts = MCR_DTR; 1278 sc->sc_msr_cts = MSR_DCD; 1279 sc->sc_efr = 0; 1280 } else { 1281 /* 1282 * If no flow control, then always set RTS. This will make 1283 * the other side happy if it mistakenly thinks we're doing 1284 * RTS/CTS flow control. 1285 */ 1286 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1287 sc->sc_mcr_rts = 0; 1288 sc->sc_msr_cts = 0; 1289 sc->sc_efr = 0; 1290 if (ISSET(sc->sc_mcr, MCR_DTR)) 1291 SET(sc->sc_mcr, MCR_RTS); 1292 else 1293 CLR(sc->sc_mcr, MCR_RTS); 1294 } 1295 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1296 1297 #if 0 1298 if (ospeed == 0) 1299 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1300 else 1301 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1302 #endif 1303 1304 sc->sc_dlbl = ospeed; 1305 sc->sc_dlbh = ospeed >> 8; 1306 1307 /* 1308 * Set the FIFO threshold based on the receive speed. 1309 * 1310 * * If it's a low speed, it's probably a mouse or some other 1311 * interactive device, so set the threshold low. 1312 * * If it's a high speed, trim the trigger level down to prevent 1313 * overflows. 1314 * * Otherwise set it a bit higher. 1315 */ 1316 if (sc->sc_type == COM_TYPE_HAYESP) 1317 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1318 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1319 sc->sc_fifo = FIFO_ENABLE | 1320 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8); 1321 else 1322 sc->sc_fifo = 0; 1323 1324 /* And copy to tty. */ 1325 tp->t_ispeed = t->c_ospeed; 1326 tp->t_ospeed = t->c_ospeed; 1327 tp->t_cflag = t->c_cflag; 1328 1329 if (!sc->sc_heldchange) { 1330 if (sc->sc_tx_busy) { 1331 sc->sc_heldtbc = sc->sc_tbc; 1332 sc->sc_tbc = 0; 1333 sc->sc_heldchange = 1; 1334 } else 1335 com_loadchannelregs(sc); 1336 } 1337 1338 if (!ISSET(t->c_cflag, CHWFLOW)) { 1339 /* Disable the high water mark. */ 1340 sc->sc_r_hiwat = 0; 1341 sc->sc_r_lowat = 0; 1342 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1343 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1344 com_schedrx(sc); 1345 } 1346 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1347 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1348 com_hwiflow(sc); 1349 } 1350 } else { 1351 sc->sc_r_hiwat = com_rbuf_hiwat; 1352 sc->sc_r_lowat = com_rbuf_lowat; 1353 } 1354 1355 mutex_spin_exit(&sc->sc_lock); 1356 1357 /* 1358 * Update the tty layer's idea of the carrier bit, in case we changed 1359 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1360 * explicit request. 1361 */ 1362 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1363 1364 #ifdef COM_DEBUG 1365 if (com_debug) 1366 comstatus(sc, "comparam "); 1367 #endif 1368 1369 if (!ISSET(t->c_cflag, CHWFLOW)) { 1370 if (sc->sc_tx_stopped) { 1371 sc->sc_tx_stopped = 0; 1372 comstart(tp); 1373 } 1374 } 1375 1376 return (0); 1377 } 1378 1379 void 1380 com_iflush(struct com_softc *sc) 1381 { 1382 struct com_regs *regsp = &sc->sc_regs; 1383 #ifdef DIAGNOSTIC 1384 int reg; 1385 #endif 1386 int timo; 1387 1388 #ifdef DIAGNOSTIC 1389 reg = 0xffff; 1390 #endif 1391 timo = 50000; 1392 /* flush any pending I/O */ 1393 while (ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY) 1394 && --timo) 1395 #ifdef DIAGNOSTIC 1396 reg = 1397 #else 1398 (void) 1399 #endif 1400 CSR_READ_1(regsp, COM_REG_RXDATA); 1401 #ifdef DIAGNOSTIC 1402 if (!timo) 1403 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1404 reg); 1405 #endif 1406 } 1407 1408 void 1409 com_loadchannelregs(struct com_softc *sc) 1410 { 1411 struct com_regs *regsp = &sc->sc_regs; 1412 1413 /* XXXXX necessary? */ 1414 com_iflush(sc); 1415 1416 if (sc->sc_type == COM_TYPE_PXA2x0) 1417 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 1418 else 1419 CSR_WRITE_1(regsp, COM_REG_IER, 0); 1420 1421 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1422 if (sc->sc_type != COM_TYPE_AU1x00) { /* no EFR on alchemy */ 1423 CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr); 1424 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 1425 } 1426 } 1427 if (sc->sc_type == COM_TYPE_AU1x00) { 1428 /* alchemy has single separate 16-bit clock divisor register */ 1429 CSR_WRITE_2(regsp, COM_REG_DLBL, sc->sc_dlbl + 1430 (sc->sc_dlbh << 8)); 1431 } else { 1432 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB); 1433 CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl); 1434 CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh); 1435 } 1436 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr); 1437 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active = sc->sc_mcr); 1438 CSR_WRITE_1(regsp, COM_REG_FIFO, sc->sc_fifo); 1439 #ifdef COM_HAYESP 1440 if (sc->sc_type == COM_TYPE_HAYESP) { 1441 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 1442 HAYESP_SETPRESCALER); 1443 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 1444 sc->sc_prescaler); 1445 } 1446 #endif 1447 1448 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1449 } 1450 1451 int 1452 comhwiflow(struct tty *tp, int block) 1453 { 1454 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1455 1456 if (COM_ISALIVE(sc) == 0) 1457 return (0); 1458 1459 if (sc->sc_mcr_rts == 0) 1460 return (0); 1461 1462 mutex_spin_enter(&sc->sc_lock); 1463 1464 if (block) { 1465 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1466 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1467 com_hwiflow(sc); 1468 } 1469 } else { 1470 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1471 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1472 com_schedrx(sc); 1473 } 1474 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1475 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1476 com_hwiflow(sc); 1477 } 1478 } 1479 1480 mutex_spin_exit(&sc->sc_lock); 1481 return (1); 1482 } 1483 1484 /* 1485 * (un)block input via hw flowcontrol 1486 */ 1487 void 1488 com_hwiflow(struct com_softc *sc) 1489 { 1490 struct com_regs *regsp= &sc->sc_regs; 1491 1492 if (sc->sc_mcr_rts == 0) 1493 return; 1494 1495 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1496 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1497 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1498 } else { 1499 SET(sc->sc_mcr, sc->sc_mcr_rts); 1500 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1501 } 1502 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active); 1503 } 1504 1505 1506 void 1507 comstart(struct tty *tp) 1508 { 1509 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1510 struct com_regs *regsp = &sc->sc_regs; 1511 int s; 1512 1513 if (COM_ISALIVE(sc) == 0) 1514 return; 1515 1516 s = spltty(); 1517 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1518 goto out; 1519 if (sc->sc_tx_stopped) 1520 goto out; 1521 if (!ttypull(tp)) 1522 goto out; 1523 1524 /* Grab the first contiguous region of buffer space. */ 1525 { 1526 u_char *tba; 1527 int tbc; 1528 1529 tba = tp->t_outq.c_cf; 1530 tbc = ndqb(&tp->t_outq, 0); 1531 1532 mutex_spin_enter(&sc->sc_lock); 1533 1534 sc->sc_tba = tba; 1535 sc->sc_tbc = tbc; 1536 } 1537 1538 SET(tp->t_state, TS_BUSY); 1539 sc->sc_tx_busy = 1; 1540 1541 /* Enable transmit completion interrupts if necessary. */ 1542 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1543 SET(sc->sc_ier, IER_ETXRDY); 1544 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1545 } 1546 1547 /* Output the first chunk of the contiguous buffer. */ 1548 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1549 u_int n; 1550 1551 n = sc->sc_tbc; 1552 if (n > sc->sc_fifolen) 1553 n = sc->sc_fifolen; 1554 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1555 sc->sc_tbc -= n; 1556 sc->sc_tba += n; 1557 } 1558 1559 mutex_spin_exit(&sc->sc_lock); 1560 out: 1561 splx(s); 1562 return; 1563 } 1564 1565 /* 1566 * Stop output on a line. 1567 */ 1568 void 1569 comstop(struct tty *tp, int flag) 1570 { 1571 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1572 1573 mutex_spin_enter(&sc->sc_lock); 1574 if (ISSET(tp->t_state, TS_BUSY)) { 1575 /* Stop transmitting at the next chunk. */ 1576 sc->sc_tbc = 0; 1577 sc->sc_heldtbc = 0; 1578 if (!ISSET(tp->t_state, TS_TTSTOP)) 1579 SET(tp->t_state, TS_FLUSH); 1580 } 1581 mutex_spin_exit(&sc->sc_lock); 1582 } 1583 1584 void 1585 comdiag(void *arg) 1586 { 1587 struct com_softc *sc = arg; 1588 int overflows, floods; 1589 1590 mutex_spin_enter(&sc->sc_lock); 1591 overflows = sc->sc_overflows; 1592 sc->sc_overflows = 0; 1593 floods = sc->sc_floods; 1594 sc->sc_floods = 0; 1595 sc->sc_errors = 0; 1596 mutex_spin_exit(&sc->sc_lock); 1597 1598 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1599 sc->sc_dev.dv_xname, 1600 overflows, overflows == 1 ? "" : "s", 1601 floods, floods == 1 ? "" : "s"); 1602 } 1603 1604 integrate void 1605 com_rxsoft(struct com_softc *sc, struct tty *tp) 1606 { 1607 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1608 u_char *get, *end; 1609 u_int cc, scc; 1610 u_char lsr; 1611 int code; 1612 1613 end = sc->sc_ebuf; 1614 get = sc->sc_rbget; 1615 scc = cc = com_rbuf_size - sc->sc_rbavail; 1616 1617 if (cc == com_rbuf_size) { 1618 sc->sc_floods++; 1619 if (sc->sc_errors++ == 0) 1620 callout_reset(&sc->sc_diag_callout, 60 * hz, 1621 comdiag, sc); 1622 } 1623 1624 /* If not yet open, drop the entire buffer content here */ 1625 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1626 get += cc << 1; 1627 if (get >= end) 1628 get -= com_rbuf_size << 1; 1629 cc = 0; 1630 } 1631 while (cc) { 1632 code = get[0]; 1633 lsr = get[1]; 1634 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1635 if (ISSET(lsr, LSR_OE)) { 1636 sc->sc_overflows++; 1637 if (sc->sc_errors++ == 0) 1638 callout_reset(&sc->sc_diag_callout, 1639 60 * hz, comdiag, sc); 1640 } 1641 if (ISSET(lsr, LSR_BI | LSR_FE)) 1642 SET(code, TTY_FE); 1643 if (ISSET(lsr, LSR_PE)) 1644 SET(code, TTY_PE); 1645 } 1646 if ((*rint)(code, tp) == -1) { 1647 /* 1648 * The line discipline's buffer is out of space. 1649 */ 1650 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1651 /* 1652 * We're either not using flow control, or the 1653 * line discipline didn't tell us to block for 1654 * some reason. Either way, we have no way to 1655 * know when there's more space available, so 1656 * just drop the rest of the data. 1657 */ 1658 get += cc << 1; 1659 if (get >= end) 1660 get -= com_rbuf_size << 1; 1661 cc = 0; 1662 } else { 1663 /* 1664 * Don't schedule any more receive processing 1665 * until the line discipline tells us there's 1666 * space available (through comhwiflow()). 1667 * Leave the rest of the data in the input 1668 * buffer. 1669 */ 1670 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1671 } 1672 break; 1673 } 1674 get += 2; 1675 if (get >= end) 1676 get = sc->sc_rbuf; 1677 cc--; 1678 } 1679 1680 if (cc != scc) { 1681 sc->sc_rbget = get; 1682 mutex_spin_enter(&sc->sc_lock); 1683 1684 cc = sc->sc_rbavail += scc - cc; 1685 /* Buffers should be ok again, release possible block. */ 1686 if (cc >= sc->sc_r_lowat) { 1687 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1688 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1689 SET(sc->sc_ier, IER_ERXRDY); 1690 #ifdef COM_PXA2X0 1691 if (sc->sc_type == COM_TYPE_PXA2x0) 1692 SET(sc->sc_ier, IER_ERXTOUT); 1693 #endif 1694 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 1695 } 1696 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1697 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1698 com_hwiflow(sc); 1699 } 1700 } 1701 mutex_spin_exit(&sc->sc_lock); 1702 } 1703 } 1704 1705 integrate void 1706 com_txsoft(struct com_softc *sc, struct tty *tp) 1707 { 1708 1709 CLR(tp->t_state, TS_BUSY); 1710 if (ISSET(tp->t_state, TS_FLUSH)) 1711 CLR(tp->t_state, TS_FLUSH); 1712 else 1713 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1714 (*tp->t_linesw->l_start)(tp); 1715 } 1716 1717 integrate void 1718 com_stsoft(struct com_softc *sc, struct tty *tp) 1719 { 1720 u_char msr, delta; 1721 1722 mutex_spin_enter(&sc->sc_lock); 1723 msr = sc->sc_msr; 1724 delta = sc->sc_msr_delta; 1725 sc->sc_msr_delta = 0; 1726 mutex_spin_exit(&sc->sc_lock); 1727 1728 if (ISSET(delta, sc->sc_msr_dcd)) { 1729 /* 1730 * Inform the tty layer that carrier detect changed. 1731 */ 1732 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1733 } 1734 1735 if (ISSET(delta, sc->sc_msr_cts)) { 1736 /* Block or unblock output according to flow control. */ 1737 if (ISSET(msr, sc->sc_msr_cts)) { 1738 sc->sc_tx_stopped = 0; 1739 (*tp->t_linesw->l_start)(tp); 1740 } else { 1741 sc->sc_tx_stopped = 1; 1742 } 1743 } 1744 1745 #ifdef COM_DEBUG 1746 if (com_debug) 1747 comstatus(sc, "com_stsoft"); 1748 #endif 1749 } 1750 1751 void 1752 comsoft(void *arg) 1753 { 1754 struct com_softc *sc = arg; 1755 struct tty *tp; 1756 1757 if (COM_ISALIVE(sc) == 0) 1758 return; 1759 1760 tp = sc->sc_tty; 1761 1762 if (sc->sc_rx_ready) { 1763 sc->sc_rx_ready = 0; 1764 com_rxsoft(sc, tp); 1765 } 1766 1767 if (sc->sc_st_check) { 1768 sc->sc_st_check = 0; 1769 com_stsoft(sc, tp); 1770 } 1771 1772 if (sc->sc_tx_done) { 1773 sc->sc_tx_done = 0; 1774 com_txsoft(sc, tp); 1775 } 1776 } 1777 1778 int 1779 comintr(void *arg) 1780 { 1781 struct com_softc *sc = arg; 1782 struct com_regs *regsp = &sc->sc_regs; 1783 1784 u_char *put, *end; 1785 u_int cc; 1786 u_char lsr, iir; 1787 1788 if (COM_ISALIVE(sc) == 0) 1789 return (0); 1790 1791 mutex_spin_enter(&sc->sc_lock); 1792 iir = CSR_READ_1(regsp, COM_REG_IIR); 1793 if (ISSET(iir, IIR_NOPEND)) { 1794 mutex_spin_exit(&sc->sc_lock); 1795 return (0); 1796 } 1797 1798 end = sc->sc_ebuf; 1799 put = sc->sc_rbput; 1800 cc = sc->sc_rbavail; 1801 1802 again: do { 1803 u_char msr, delta; 1804 1805 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1806 if (ISSET(lsr, LSR_BI)) { 1807 int cn_trapped = 0; 1808 1809 cn_check_magic(sc->sc_tty->t_dev, 1810 CNC_BREAK, com_cnm_state); 1811 if (cn_trapped) 1812 continue; 1813 #if defined(KGDB) && !defined(DDB) 1814 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1815 kgdb_connect(1); 1816 continue; 1817 } 1818 #endif 1819 } 1820 1821 if (ISSET(lsr, LSR_RCV_MASK) && 1822 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1823 while (cc > 0) { 1824 int cn_trapped = 0; 1825 put[0] = CSR_READ_1(regsp, COM_REG_RXDATA); 1826 put[1] = lsr; 1827 cn_check_magic(sc->sc_tty->t_dev, 1828 put[0], com_cnm_state); 1829 if (cn_trapped) 1830 goto next; 1831 put += 2; 1832 if (put >= end) 1833 put = sc->sc_rbuf; 1834 cc--; 1835 next: 1836 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1837 if (!ISSET(lsr, LSR_RCV_MASK)) 1838 break; 1839 } 1840 1841 /* 1842 * Current string of incoming characters ended because 1843 * no more data was available or we ran out of space. 1844 * Schedule a receive event if any data was received. 1845 * If we're out of space, turn off receive interrupts. 1846 */ 1847 sc->sc_rbput = put; 1848 sc->sc_rbavail = cc; 1849 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1850 sc->sc_rx_ready = 1; 1851 1852 /* 1853 * See if we are in danger of overflowing a buffer. If 1854 * so, use hardware flow control to ease the pressure. 1855 */ 1856 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1857 cc < sc->sc_r_hiwat) { 1858 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1859 com_hwiflow(sc); 1860 } 1861 1862 /* 1863 * If we're out of space, disable receive interrupts 1864 * until the queue has drained a bit. 1865 */ 1866 if (!cc) { 1867 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1868 #ifdef COM_PXA2X0 1869 if (sc->sc_type == COM_TYPE_PXA2x0) 1870 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 1871 else 1872 #endif 1873 CLR(sc->sc_ier, IER_ERXRDY); 1874 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1875 } 1876 } else { 1877 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 1878 (void) CSR_READ_1(regsp, COM_REG_RXDATA); 1879 continue; 1880 } 1881 } 1882 1883 msr = CSR_READ_1(regsp, COM_REG_MSR); 1884 delta = msr ^ sc->sc_msr; 1885 sc->sc_msr = msr; 1886 if ((sc->sc_pps_state.ppsparam.mode & PPS_CAPTUREBOTH) && 1887 (delta & MSR_DCD)) { 1888 pps_capture(&sc->sc_pps_state); 1889 pps_event(&sc->sc_pps_state, 1890 (msr & MSR_DCD) ? 1891 PPS_CAPTUREASSERT : 1892 PPS_CAPTURECLEAR); 1893 } 1894 1895 /* 1896 * Process normal status changes 1897 */ 1898 if (ISSET(delta, sc->sc_msr_mask)) { 1899 SET(sc->sc_msr_delta, delta); 1900 1901 /* 1902 * Stop output immediately if we lose the output 1903 * flow control signal or carrier detect. 1904 */ 1905 if (ISSET(~msr, sc->sc_msr_mask)) { 1906 sc->sc_tbc = 0; 1907 sc->sc_heldtbc = 0; 1908 #ifdef COM_DEBUG 1909 if (com_debug) 1910 comstatus(sc, "comintr "); 1911 #endif 1912 } 1913 1914 sc->sc_st_check = 1; 1915 } 1916 } while (!ISSET((iir = 1917 CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND) && 1918 /* 1919 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 1920 * by IIR read, so we can't do this way: `process all interrupts, 1921 * then do TX if possble'. 1922 */ 1923 (iir & IIR_IMASK) != IIR_TXRDY); 1924 1925 /* 1926 * Read LSR again, since there may be an interrupt between 1927 * the last LSR read and IIR read above. 1928 */ 1929 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1930 1931 /* 1932 * See if data can be transmitted as well. 1933 * Schedule tx done event if no data left 1934 * and tty was marked busy. 1935 */ 1936 if (ISSET(lsr, LSR_TXRDY)) { 1937 /* 1938 * If we've delayed a parameter change, do it now, and restart 1939 * output. 1940 */ 1941 if (sc->sc_heldchange) { 1942 com_loadchannelregs(sc); 1943 sc->sc_heldchange = 0; 1944 sc->sc_tbc = sc->sc_heldtbc; 1945 sc->sc_heldtbc = 0; 1946 } 1947 1948 /* Output the next chunk of the contiguous buffer, if any. */ 1949 if (sc->sc_tbc > 0) { 1950 u_int n; 1951 1952 n = sc->sc_tbc; 1953 if (n > sc->sc_fifolen) 1954 n = sc->sc_fifolen; 1955 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1956 sc->sc_tbc -= n; 1957 sc->sc_tba += n; 1958 } else { 1959 /* Disable transmit completion interrupts if necessary. */ 1960 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1961 CLR(sc->sc_ier, IER_ETXRDY); 1962 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1963 } 1964 if (sc->sc_tx_busy) { 1965 sc->sc_tx_busy = 0; 1966 sc->sc_tx_done = 1; 1967 } 1968 } 1969 } 1970 1971 if (!ISSET((iir = CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND)) 1972 goto again; 1973 1974 mutex_spin_exit(&sc->sc_lock); 1975 1976 /* Wake up the poller. */ 1977 softint_schedule(sc->sc_si); 1978 1979 #if NRND > 0 && defined(RND_COM) 1980 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1981 #endif 1982 1983 return (1); 1984 } 1985 1986 /* 1987 * The following functions are polled getc and putc routines, shared 1988 * by the console and kgdb glue. 1989 * 1990 * The read-ahead code is so that you can detect pending in-band 1991 * cn_magic in polled mode while doing output rather than having to 1992 * wait until the kernel decides it needs input. 1993 */ 1994 1995 #define MAX_READAHEAD 20 1996 static int com_readahead[MAX_READAHEAD]; 1997 static int com_readaheadcount = 0; 1998 1999 int 2000 com_common_getc(dev_t dev, struct com_regs *regsp) 2001 { 2002 int s = splserial(); 2003 u_char stat, c; 2004 2005 /* got a character from reading things earlier */ 2006 if (com_readaheadcount > 0) { 2007 int i; 2008 2009 c = com_readahead[0]; 2010 for (i = 1; i < com_readaheadcount; i++) { 2011 com_readahead[i-1] = com_readahead[i]; 2012 } 2013 com_readaheadcount--; 2014 splx(s); 2015 return (c); 2016 } 2017 2018 /* block until a character becomes available */ 2019 while (!ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) 2020 ; 2021 2022 c = CSR_READ_1(regsp, COM_REG_RXDATA); 2023 stat = CSR_READ_1(regsp, COM_REG_IIR); 2024 { 2025 int cn_trapped = 0; /* unused */ 2026 #ifdef DDB 2027 extern int db_active; 2028 if (!db_active) 2029 #endif 2030 cn_check_magic(dev, c, com_cnm_state); 2031 } 2032 splx(s); 2033 return (c); 2034 } 2035 2036 void 2037 com_common_putc(dev_t dev, struct com_regs *regsp, int c) 2038 { 2039 int s = splserial(); 2040 int cin, stat, timo; 2041 2042 if (com_readaheadcount < MAX_READAHEAD 2043 && ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) { 2044 int cn_trapped = 0; 2045 cin = CSR_READ_1(regsp, COM_REG_RXDATA); 2046 stat = CSR_READ_1(regsp, COM_REG_IIR); 2047 cn_check_magic(dev, cin, com_cnm_state); 2048 com_readahead[com_readaheadcount++] = cin; 2049 } 2050 2051 /* wait for any pending transmission to finish */ 2052 timo = 150000; 2053 while (!ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_TXRDY) && --timo) 2054 continue; 2055 2056 CSR_WRITE_1(regsp, COM_REG_TXDATA, c); 2057 COM_BARRIER(regsp, BR | BW); 2058 2059 splx(s); 2060 } 2061 2062 /* 2063 * Initialize UART for use as console or KGDB line. 2064 */ 2065 int 2066 cominit(struct com_regs *regsp, int rate, int frequency, int type, 2067 tcflag_t cflag) 2068 { 2069 2070 if (bus_space_map(regsp->cr_iot, regsp->cr_iobase, regsp->cr_nports, 0, 2071 ®sp->cr_ioh)) 2072 return (ENOMEM); /* ??? */ 2073 2074 rate = comspeed(rate, frequency, type); 2075 if (type != COM_TYPE_AU1x00) { 2076 /* no EFR on alchemy */ 2077 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 2078 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 2079 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_DLAB); 2080 CSR_WRITE_1(regsp, COM_REG_DLBL, rate & 0xff); 2081 CSR_WRITE_1(regsp, COM_REG_DLBH, rate >> 8); 2082 } else { 2083 CSR_WRITE_1(regsp, COM_REG_DLBL, rate); 2084 } 2085 CSR_WRITE_1(regsp, COM_REG_LCR, cflag2lcr(cflag)); 2086 CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS); 2087 CSR_WRITE_1(regsp, COM_REG_FIFO, 2088 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2089 #ifdef COM_PXA2X0 2090 if (type == COM_TYPE_PXA2x0) 2091 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 2092 else 2093 #endif 2094 CSR_WRITE_1(regsp, COM_REG_IER, 0); 2095 2096 return (0); 2097 } 2098 2099 /* 2100 * Following are all routines needed for COM to act as console 2101 */ 2102 struct consdev comcons = { 2103 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2104 NODEV, CN_NORMAL 2105 }; 2106 2107 2108 int 2109 comcnattach1(struct com_regs *regsp, int rate, int frequency, int type, 2110 tcflag_t cflag) 2111 { 2112 int res; 2113 2114 comconsregs = *regsp; 2115 2116 res = cominit(&comconsregs, rate, frequency, type, cflag); 2117 if (res) 2118 return (res); 2119 2120 cn_tab = &comcons; 2121 cn_init_magic(&com_cnm_state); 2122 cn_set_magic("\047\001"); /* default magic is BREAK */ 2123 2124 comconsrate = rate; 2125 comconscflag = cflag; 2126 2127 return (0); 2128 } 2129 2130 int 2131 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2132 int type, tcflag_t cflag) 2133 { 2134 struct com_regs regs; 2135 2136 memset(®s, 0, sizeof regs); 2137 regs.cr_iot = iot; 2138 regs.cr_iobase = iobase; 2139 regs.cr_nports = COM_NPORTS; 2140 #ifdef COM_REGMAP 2141 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2142 #endif 2143 2144 return comcnattach1(®s, rate, frequency, type, cflag); 2145 } 2146 2147 int 2148 comcngetc(dev_t dev) 2149 { 2150 2151 return (com_common_getc(dev, &comconsregs)); 2152 } 2153 2154 /* 2155 * Console kernel output character routine. 2156 */ 2157 void 2158 comcnputc(dev_t dev, int c) 2159 { 2160 2161 com_common_putc(dev, &comconsregs, c); 2162 } 2163 2164 void 2165 comcnpollc(dev_t dev, int on) 2166 { 2167 2168 } 2169 2170 #ifdef KGDB 2171 int 2172 com_kgdb_attach1(struct com_regs *regsp, int rate, int frequency, int type, 2173 tcflag_t cflag) 2174 { 2175 int res; 2176 2177 if (regsp->cr_iot == comconsregs.cr_iot && 2178 regsp->cr_iobase == comconsregs.cr_iobase) { 2179 #if !defined(DDB) 2180 return (EBUSY); /* cannot share with console */ 2181 #else 2182 comkgdbregs = *regsp; 2183 comkgdbregs.cr_ioh = comconsregs.cr_ioh; 2184 #endif 2185 } else { 2186 comkgdbregs = *regsp; 2187 res = cominit(&comkgdbregs, rate, frequency, type, cflag); 2188 if (res) 2189 return (res); 2190 2191 /* 2192 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2193 * expects this to be initialized 2194 */ 2195 cn_init_magic(&com_cnm_state); 2196 cn_set_magic("\047\001"); 2197 } 2198 2199 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2200 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2201 2202 return (0); 2203 } 2204 2205 int 2206 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2207 int frequency, int type, tcflag_t cflag) 2208 { 2209 struct com_regs regs; 2210 2211 regs.cr_iot = iot; 2212 regs.cr_nports = COM_NPORTS; 2213 regs.cr_iobase = iobase; 2214 #ifdef COM_REGMAP 2215 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2216 #endif 2217 2218 return com_kgdb_attach1(®s, rate, frequency, type, cflag); 2219 } 2220 2221 /* ARGSUSED */ 2222 int 2223 com_kgdb_getc(void *arg) 2224 { 2225 2226 return (com_common_getc(NODEV, &comkgdbregs)); 2227 } 2228 2229 /* ARGSUSED */ 2230 void 2231 com_kgdb_putc(void *arg, int c) 2232 { 2233 2234 com_common_putc(NODEV, &comkgdbregs, c); 2235 } 2236 #endif /* KGDB */ 2237 2238 /* helper function to identify the com ports used by 2239 console or KGDB (and not yet autoconf attached) */ 2240 int 2241 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2242 { 2243 bus_space_handle_t help; 2244 2245 if (!comconsattached && 2246 iot == comconsregs.cr_iot && iobase == comconsregs.cr_iobase) 2247 help = comconsregs.cr_ioh; 2248 #ifdef KGDB 2249 else if (!com_kgdb_attached && 2250 iot == comkgdbregs.cr_iot && iobase == comkgdbregs.cr_iobase) 2251 help = comkgdbregs.cr_ioh; 2252 #endif 2253 else 2254 return (0); 2255 2256 if (ioh) 2257 *ioh = help; 2258 return (1); 2259 } 2260 2261 /* 2262 * this routine exists to serve as a shutdown hook for systems that 2263 * have firmware which doesn't interact properly with a com device in 2264 * FIFO mode. 2265 */ 2266 void 2267 com_cleanup(void *arg) 2268 { 2269 struct com_softc *sc = arg; 2270 2271 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 2272 CSR_WRITE_1(&sc->sc_regs, COM_REG_FIFO, 0); 2273 } 2274 2275 bool 2276 com_resume(device_t dev) 2277 { 2278 struct com_softc *sc = device_private(dev); 2279 2280 mutex_spin_enter(&sc->sc_lock); 2281 com_loadchannelregs(sc); 2282 mutex_spin_exit(&sc->sc_lock); 2283 2284 return true; 2285 } 2286
Indexes created Thu Sep 25 14:09:45 GMT 2025