com.c revision 1.273
1 /* $NetBSD: com.c,v 1.273 2008/02/29 07:02:05 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.273 2008/02/29 07:02:05 dyoung Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 #include <sys/kauth.h> 125 #include <sys/intr.h> 126 127 #include <sys/bus.h> 128 129 #include <dev/ic/comreg.h> 130 #include <dev/ic/comvar.h> 131 #include <dev/ic/ns16550reg.h> 132 #include <dev/ic/st16650reg.h> 133 #ifdef COM_HAYESP 134 #include <dev/ic/hayespreg.h> 135 #endif 136 #define com_lcr com_cfcr 137 #include <dev/cons.h> 138 139 #ifdef COM_REGMAP 140 #define CSR_WRITE_1(r, o, v) \ 141 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 142 #define CSR_READ_1(r, o) \ 143 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 144 #define CSR_WRITE_2(r, o, v) \ 145 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 146 #define CSR_READ_2(r, o) \ 147 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 148 #define CSR_WRITE_MULTI(r, o, p, n) \ 149 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], p, n) 150 #else 151 #define CSR_WRITE_1(r, o, v) \ 152 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, o, v) 153 #define CSR_READ_1(r, o) \ 154 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, o) 155 #define CSR_WRITE_2(r, o, v) \ 156 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, o, v) 157 #define CSR_READ_2(r, o) \ 158 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, o) 159 #define CSR_WRITE_MULTI(r, o, p, n) \ 160 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, o, p, n) 161 #endif 162 163 164 static void com_enable_debugport(struct com_softc *); 165 166 void com_config(struct com_softc *); 167 void com_shutdown(struct com_softc *); 168 int comspeed(long, long, int); 169 static u_char cflag2lcr(tcflag_t); 170 int comparam(struct tty *, struct termios *); 171 void comstart(struct tty *); 172 int comhwiflow(struct tty *, int); 173 174 void com_loadchannelregs(struct com_softc *); 175 void com_hwiflow(struct com_softc *); 176 void com_break(struct com_softc *, int); 177 void com_modem(struct com_softc *, int); 178 void tiocm_to_com(struct com_softc *, u_long, int); 179 int com_to_tiocm(struct com_softc *); 180 void com_iflush(struct com_softc *); 181 182 int com_common_getc(dev_t, struct com_regs *); 183 void com_common_putc(dev_t, struct com_regs *, int); 184 185 int cominit(struct com_regs *, int, int, int, tcflag_t); 186 187 int comcngetc(dev_t); 188 void comcnputc(dev_t, int); 189 void comcnpollc(dev_t, int); 190 191 #define integrate static inline 192 void comsoft(void *); 193 integrate void com_rxsoft(struct com_softc *, struct tty *); 194 integrate void com_txsoft(struct com_softc *, struct tty *); 195 integrate void com_stsoft(struct com_softc *, struct tty *); 196 integrate void com_schedrx(struct com_softc *); 197 void comdiag(void *); 198 199 extern struct cfdriver com_cd; 200 201 dev_type_open(comopen); 202 dev_type_close(comclose); 203 dev_type_read(comread); 204 dev_type_write(comwrite); 205 dev_type_ioctl(comioctl); 206 dev_type_stop(comstop); 207 dev_type_tty(comtty); 208 dev_type_poll(compoll); 209 210 const struct cdevsw com_cdevsw = { 211 comopen, comclose, comread, comwrite, comioctl, 212 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 213 }; 214 215 /* 216 * Make this an option variable one can patch. 217 * But be warned: this must be a power of 2! 218 */ 219 u_int com_rbuf_size = COM_RING_SIZE; 220 221 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 222 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 223 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 224 225 static struct com_regs comconsregs; 226 static int comconsattached; 227 static int comconsrate; 228 static tcflag_t comconscflag; 229 static struct cnm_state com_cnm_state; 230 231 #ifdef KGDB 232 #include <sys/kgdb.h> 233 234 static struct com_regs comkgdbregs; 235 static int com_kgdb_attached; 236 237 int com_kgdb_getc(void *); 238 void com_kgdb_putc(void *, int); 239 #endif /* KGDB */ 240 241 #ifdef COM_REGMAP 242 /* initializer for typical 16550-ish hardware */ 243 #define COM_REG_16550 { \ 244 com_data, com_data, com_dlbl, com_dlbh, com_ier, com_iir, com_fifo, \ 245 com_efr, com_lcr, com_mcr, com_lsr, com_msr } 246 247 const bus_size_t com_std_map[16] = COM_REG_16550; 248 #endif /* COM_REGMAP */ 249 250 #define COMUNIT_MASK 0x7ffff 251 #define COMDIALOUT_MASK 0x80000 252 253 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 254 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 255 256 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 257 device_is_active(&(sc)->sc_dev)) 258 259 #define BR BUS_SPACE_BARRIER_READ 260 #define BW BUS_SPACE_BARRIER_WRITE 261 #define COM_BARRIER(r, f) \ 262 bus_space_barrier((r)->cr_iot, (r)->cr_ioh, 0, (r)->cr_nports, (f)) 263 264 /*ARGSUSED*/ 265 int 266 comspeed(long speed, long frequency, int type) 267 { 268 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 269 270 int x, err; 271 272 #if 0 273 if (speed == 0) 274 return (0); 275 #endif 276 if (speed <= 0) 277 return (-1); 278 x = divrnd(frequency / 16, speed); 279 if (x <= 0) 280 return (-1); 281 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 282 if (err < 0) 283 err = -err; 284 if (err > COM_TOLERANCE) 285 return (-1); 286 return (x); 287 288 #undef divrnd 289 } 290 291 #ifdef COM_DEBUG 292 int com_debug = 0; 293 294 void comstatus(struct com_softc *, const char *); 295 void 296 comstatus(struct com_softc *sc, const char *str) 297 { 298 struct tty *tp = sc->sc_tty; 299 300 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 301 sc->sc_dev.dv_xname, str, 302 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 303 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 304 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 305 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 306 sc->sc_tx_stopped ? '+' : '-'); 307 308 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 309 sc->sc_dev.dv_xname, str, 310 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 311 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 312 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 313 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 314 sc->sc_rx_flags); 315 } 316 #endif 317 318 int 319 com_probe_subr(struct com_regs *regs) 320 { 321 322 /* force access to id reg */ 323 CSR_WRITE_1(regs, COM_REG_LCR, LCR_8BITS); 324 CSR_WRITE_1(regs, COM_REG_IIR, 0); 325 if ((CSR_READ_1(regs, COM_REG_LCR) != LCR_8BITS) || 326 (CSR_READ_1(regs, COM_REG_IIR) & 0x38)) 327 return (0); 328 329 return (1); 330 } 331 332 int 333 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 334 { 335 struct com_regs regs; 336 337 regs.cr_iot = iot; 338 regs.cr_ioh = ioh; 339 #ifdef COM_REGMAP 340 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map));; 341 #endif 342 343 return com_probe_subr(®s); 344 } 345 346 /* 347 * No locking in this routine; it is only called during attach, 348 * or with the port already locked. 349 */ 350 static void 351 com_enable_debugport(struct com_softc *sc) 352 { 353 354 /* Turn on line break interrupt, set carrier. */ 355 sc->sc_ier = IER_ERXRDY; 356 if (sc->sc_type == COM_TYPE_PXA2x0) 357 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 358 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 359 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 360 CSR_WRITE_1(&sc->sc_regs, COM_REG_MCR, sc->sc_mcr); 361 } 362 363 void 364 com_attach_subr(struct com_softc *sc) 365 { 366 struct com_regs *regsp = &sc->sc_regs; 367 struct tty *tp; 368 #ifdef COM_16650 369 u_int8_t lcr; 370 #endif 371 const char *fifo_msg = NULL; 372 373 aprint_naive("\n"); 374 375 callout_init(&sc->sc_diag_callout, 0); 376 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 377 378 /* Disable interrupts before configuring the device. */ 379 if (sc->sc_type == COM_TYPE_PXA2x0) 380 sc->sc_ier = IER_EUART; 381 else 382 sc->sc_ier = 0; 383 384 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 385 386 if (regsp->cr_iot == comconsregs.cr_iot && 387 regsp->cr_iobase == comconsregs.cr_iobase) { 388 comconsattached = 1; 389 390 /* Make sure the console is always "hardwired". */ 391 delay(10000); /* wait for output to finish */ 392 SET(sc->sc_hwflags, COM_HW_CONSOLE); 393 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 394 } 395 396 /* Probe for FIFO */ 397 switch (sc->sc_type) { 398 case COM_TYPE_HAYESP: 399 goto fifodone; 400 401 case COM_TYPE_AU1x00: 402 sc->sc_fifolen = 16; 403 fifo_msg = "Au1X00 UART, working fifo"; 404 SET(sc->sc_hwflags, COM_HW_FIFO); 405 goto fifodelay; 406 } 407 408 sc->sc_fifolen = 1; 409 /* look for a NS 16550AF UART with FIFOs */ 410 CSR_WRITE_1(regsp, COM_REG_FIFO, 411 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 412 delay(100); 413 if (ISSET(CSR_READ_1(regsp, COM_REG_IIR), IIR_FIFO_MASK) 414 == IIR_FIFO_MASK) 415 if (ISSET(CSR_READ_1(regsp, COM_REG_FIFO), FIFO_TRIGGER_14) 416 == FIFO_TRIGGER_14) { 417 SET(sc->sc_hwflags, COM_HW_FIFO); 418 419 #ifdef COM_16650 420 /* 421 * IIR changes into the EFR if LCR is set to LCR_EERS 422 * on 16650s. We also know IIR != 0 at this point. 423 * Write 0 into the EFR, and read it. If the result 424 * is 0, we have a 16650. 425 * 426 * Older 16650s were broken; the test to detect them 427 * is taken from the Linux driver. Apparently 428 * setting DLAB enable gives access to the EFR on 429 * these chips. 430 */ 431 lcr = CSR_READ_1(regsp, COM_REG_LCR); 432 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 433 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 434 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 435 CSR_WRITE_1(regsp, COM_REG_LCR, 436 lcr | LCR_DLAB); 437 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 438 CLR(sc->sc_hwflags, COM_HW_FIFO); 439 sc->sc_fifolen = 0; 440 } else { 441 SET(sc->sc_hwflags, COM_HW_FLOW); 442 sc->sc_fifolen = 32; 443 } 444 } else 445 #endif 446 sc->sc_fifolen = 16; 447 448 #ifdef COM_16650 449 CSR_WRITE_1(regsp, COM_REG_LCR, lcr); 450 if (sc->sc_fifolen == 0) 451 fifo_msg = "st16650, broken fifo"; 452 else if (sc->sc_fifolen == 32) 453 fifo_msg = "st16650a, working fifo"; 454 else 455 #endif 456 fifo_msg = "ns16550a, working fifo"; 457 } else 458 fifo_msg = "ns16550, broken fifo"; 459 else 460 fifo_msg = "ns8250 or ns16450, no fifo"; 461 CSR_WRITE_1(regsp, COM_REG_FIFO, 0); 462 fifodelay: 463 /* 464 * Some chips will clear down both Tx and Rx FIFOs when zero is 465 * written to com_fifo. If this chip is the console, writing zero 466 * results in some of the chip/FIFO description being lost, so delay 467 * printing it until now. 468 */ 469 delay(10); 470 aprint_normal(": %s\n", fifo_msg); 471 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 472 sc->sc_fifolen = 1; 473 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 474 } 475 476 fifodone: 477 478 tp = ttymalloc(); 479 tp->t_oproc = comstart; 480 tp->t_param = comparam; 481 tp->t_hwiflow = comhwiflow; 482 483 sc->sc_tty = tp; 484 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 485 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 486 sc->sc_rbavail = com_rbuf_size; 487 if (sc->sc_rbuf == NULL) { 488 aprint_error("%s: unable to allocate ring buffer\n", 489 sc->sc_dev.dv_xname); 490 return; 491 } 492 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 493 494 tty_attach(tp); 495 496 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 497 SET(sc->sc_mcr, MCR_IENABLE); 498 499 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 500 int maj; 501 502 /* locate the major number */ 503 maj = cdevsw_lookup_major(&com_cdevsw); 504 505 tp->t_dev = cn_tab->cn_dev = makedev(maj, 506 device_unit(&sc->sc_dev)); 507 508 aprint_normal_dev(&sc->sc_dev, "console\n"); 509 } 510 511 #ifdef KGDB 512 /* 513 * Allow kgdb to "take over" this port. If this is 514 * not the console and is the kgdb device, it has 515 * exclusive use. If it's the console _and_ the 516 * kgdb device, it doesn't. 517 */ 518 if (regsp->cr_iot == comkgdbregs.cr_iot && 519 regsp->cr_iobase == comkgdbregs.cr_iobase) { 520 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 521 com_kgdb_attached = 1; 522 523 SET(sc->sc_hwflags, COM_HW_KGDB); 524 } 525 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 526 } 527 #endif 528 529 sc->sc_si = softint_establish(SOFTINT_SERIAL, comsoft, sc); 530 531 #if NRND > 0 && defined(RND_COM) 532 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 533 RND_TYPE_TTY, 0); 534 #endif 535 536 /* if there are no enable/disable functions, assume the device 537 is always enabled */ 538 if (!sc->enable) 539 sc->enabled = 1; 540 541 com_config(sc); 542 543 SET(sc->sc_hwflags, COM_HW_DEV_OK); 544 } 545 546 void 547 com_config(struct com_softc *sc) 548 { 549 struct com_regs *regsp = &sc->sc_regs; 550 551 /* Disable interrupts before configuring the device. */ 552 if (sc->sc_type == COM_TYPE_PXA2x0) 553 sc->sc_ier = IER_EUART; 554 else 555 sc->sc_ier = 0; 556 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 557 (void) CSR_READ_1(regsp, COM_REG_IIR); 558 559 #ifdef COM_HAYESP 560 /* Look for a Hayes ESP board. */ 561 if (sc->sc_type == COM_TYPE_HAYESP) { 562 563 /* Set 16550 compatibility mode */ 564 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 565 HAYESP_SETMODE); 566 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 567 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 568 HAYESP_MODE_SCALE); 569 570 /* Set RTS/CTS flow control */ 571 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 572 HAYESP_SETFLOWTYPE); 573 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 574 HAYESP_FLOW_RTS); 575 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 576 HAYESP_FLOW_CTS); 577 578 /* Set flow control levels */ 579 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 580 HAYESP_SETRXFLOW); 581 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 582 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 583 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 584 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 585 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 586 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 587 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 588 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 589 } 590 #endif 591 592 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 593 com_enable_debugport(sc); 594 } 595 596 int 597 com_detach(struct device *self, int flags) 598 { 599 struct com_softc *sc = (struct com_softc *)self; 600 int maj, mn; 601 602 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 603 return EBUSY; 604 605 /* locate the major number */ 606 maj = cdevsw_lookup_major(&com_cdevsw); 607 608 /* Nuke the vnodes for any open instances. */ 609 mn = device_unit(self); 610 vdevgone(maj, mn, mn, VCHR); 611 612 mn |= COMDIALOUT_MASK; 613 vdevgone(maj, mn, mn, VCHR); 614 615 if (sc->sc_rbuf == NULL) { 616 /* 617 * Ring buffer allocation failed in the com_attach_subr, 618 * only the tty is allocated, and nothing else. 619 */ 620 ttyfree(sc->sc_tty); 621 return 0; 622 } 623 624 /* Free the receive buffer. */ 625 free(sc->sc_rbuf, M_DEVBUF); 626 627 /* Detach and free the tty. */ 628 tty_detach(sc->sc_tty); 629 ttyfree(sc->sc_tty); 630 631 /* Unhook the soft interrupt handler. */ 632 softint_disestablish(sc->sc_si); 633 634 #if NRND > 0 && defined(RND_COM) 635 /* Unhook the entropy source. */ 636 rnd_detach_source(&sc->rnd_source); 637 #endif 638 mutex_destroy(&sc->sc_lock); 639 callout_destroy(&sc->sc_diag_callout); 640 641 /* Destroy the lock. */ 642 mutex_destroy(&sc->sc_lock); 643 644 return (0); 645 } 646 647 int 648 com_activate(struct device *self, enum devact act) 649 { 650 struct com_softc *sc = (struct com_softc *)self; 651 int rv = 0; 652 653 switch (act) { 654 case DVACT_ACTIVATE: 655 rv = EOPNOTSUPP; 656 break; 657 658 case DVACT_DEACTIVATE: 659 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 660 rv = EBUSY; 661 break; 662 } 663 664 if (sc->disable != NULL && sc->enabled != 0) { 665 (*sc->disable)(sc); 666 sc->enabled = 0; 667 } 668 break; 669 } 670 671 return (rv); 672 } 673 674 void 675 com_shutdown(struct com_softc *sc) 676 { 677 struct tty *tp = sc->sc_tty; 678 679 mutex_spin_enter(&sc->sc_lock); 680 681 /* If we were asserting flow control, then deassert it. */ 682 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 683 com_hwiflow(sc); 684 685 /* Clear any break condition set with TIOCSBRK. */ 686 com_break(sc, 0); 687 688 /* 689 * Hang up if necessary. Wait a bit, so the other side has time to 690 * notice even if we immediately open the port again. 691 * Avoid tsleeping above splhigh(). 692 */ 693 if (ISSET(tp->t_cflag, HUPCL)) { 694 com_modem(sc, 0); 695 mutex_spin_exit(&sc->sc_lock); 696 /* XXX will only timeout */ 697 (void) kpause(ttclos, false, hz, NULL); 698 mutex_spin_enter(&sc->sc_lock); 699 } 700 701 /* Turn off interrupts. */ 702 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 703 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 704 if (sc->sc_type == COM_TYPE_PXA2x0) 705 sc->sc_ier |= IER_ERXTOUT; 706 } else 707 sc->sc_ier = 0; 708 709 if (sc->sc_type == COM_TYPE_PXA2x0) 710 sc->sc_ier |= IER_EUART; 711 712 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 713 714 mutex_spin_exit(&sc->sc_lock); 715 716 if (sc->disable) { 717 #ifdef DIAGNOSTIC 718 if (!sc->enabled) 719 panic("com_shutdown: not enabled?"); 720 #endif 721 (*sc->disable)(sc); 722 sc->enabled = 0; 723 } 724 } 725 726 int 727 comopen(dev_t dev, int flag, int mode, struct lwp *l) 728 { 729 struct com_softc *sc; 730 struct tty *tp; 731 int s; 732 int error; 733 734 sc = device_lookup(&com_cd, COMUNIT(dev)); 735 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 736 sc->sc_rbuf == NULL) 737 return (ENXIO); 738 739 if (!device_is_active(&sc->sc_dev)) 740 return (ENXIO); 741 742 #ifdef KGDB 743 /* 744 * If this is the kgdb port, no other use is permitted. 745 */ 746 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 747 return (EBUSY); 748 #endif 749 750 tp = sc->sc_tty; 751 752 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 753 return (EBUSY); 754 755 s = spltty(); 756 757 /* 758 * Do the following iff this is a first open. 759 */ 760 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 761 struct termios t; 762 763 tp->t_dev = dev; 764 765 766 if (sc->enable) { 767 if ((*sc->enable)(sc)) { 768 splx(s); 769 printf("%s: device enable failed\n", 770 sc->sc_dev.dv_xname); 771 return (EIO); 772 } 773 mutex_spin_enter(&sc->sc_lock); 774 sc->enabled = 1; 775 com_config(sc); 776 } else { 777 mutex_spin_enter(&sc->sc_lock); 778 } 779 780 /* Turn on interrupts. */ 781 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 782 if (sc->sc_type == COM_TYPE_PXA2x0) 783 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 784 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 785 786 /* Fetch the current modem control status, needed later. */ 787 sc->sc_msr = CSR_READ_1(&sc->sc_regs, COM_REG_MSR); 788 789 /* Clear PPS capture state on first open. */ 790 memset(&sc->sc_pps_state, 0, sizeof(sc->sc_pps_state)); 791 sc->sc_pps_state.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 792 pps_init(&sc->sc_pps_state); 793 794 mutex_spin_exit(&sc->sc_lock); 795 796 /* 797 * Initialize the termios status to the defaults. Add in the 798 * sticky bits from TIOCSFLAGS. 799 */ 800 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 801 t.c_ospeed = comconsrate; 802 t.c_cflag = comconscflag; 803 } else { 804 t.c_ospeed = TTYDEF_SPEED; 805 t.c_cflag = TTYDEF_CFLAG; 806 } 807 t.c_ispeed = t.c_ospeed; 808 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 809 SET(t.c_cflag, CLOCAL); 810 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 811 SET(t.c_cflag, CRTSCTS); 812 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 813 SET(t.c_cflag, MDMBUF); 814 /* Make sure comparam() will do something. */ 815 tp->t_ospeed = 0; 816 (void) comparam(tp, &t); 817 tp->t_iflag = TTYDEF_IFLAG; 818 tp->t_oflag = TTYDEF_OFLAG; 819 tp->t_lflag = TTYDEF_LFLAG; 820 ttychars(tp); 821 ttsetwater(tp); 822 823 mutex_spin_enter(&sc->sc_lock); 824 825 /* 826 * Turn on DTR. We must always do this, even if carrier is not 827 * present, because otherwise we'd have to use TIOCSDTR 828 * immediately after setting CLOCAL, which applications do not 829 * expect. We always assert DTR while the device is open 830 * unless explicitly requested to deassert it. 831 */ 832 com_modem(sc, 1); 833 834 /* Clear the input ring, and unblock. */ 835 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 836 sc->sc_rbavail = com_rbuf_size; 837 com_iflush(sc); 838 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 839 com_hwiflow(sc); 840 841 #ifdef COM_DEBUG 842 if (com_debug) 843 comstatus(sc, "comopen "); 844 #endif 845 846 mutex_spin_exit(&sc->sc_lock); 847 } 848 849 splx(s); 850 851 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 852 if (error) 853 goto bad; 854 855 error = (*tp->t_linesw->l_open)(dev, tp); 856 if (error) 857 goto bad; 858 859 return (0); 860 861 bad: 862 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 863 /* 864 * We failed to open the device, and nobody else had it opened. 865 * Clean up the state as appropriate. 866 */ 867 com_shutdown(sc); 868 } 869 870 return (error); 871 } 872 873 int 874 comclose(dev_t dev, int flag, int mode, struct lwp *l) 875 { 876 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 877 struct tty *tp = sc->sc_tty; 878 879 /* XXX This is for cons.c. */ 880 if (!ISSET(tp->t_state, TS_ISOPEN)) 881 return (0); 882 883 (*tp->t_linesw->l_close)(tp, flag); 884 ttyclose(tp); 885 886 if (COM_ISALIVE(sc) == 0) 887 return (0); 888 889 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 890 /* 891 * Although we got a last close, the device may still be in 892 * use; e.g. if this was the dialout node, and there are still 893 * processes waiting for carrier on the non-dialout node. 894 */ 895 com_shutdown(sc); 896 } 897 898 return (0); 899 } 900 901 int 902 comread(dev_t dev, struct uio *uio, int flag) 903 { 904 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 905 struct tty *tp = sc->sc_tty; 906 907 if (COM_ISALIVE(sc) == 0) 908 return (EIO); 909 910 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 911 } 912 913 int 914 comwrite(dev_t dev, struct uio *uio, int flag) 915 { 916 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 917 struct tty *tp = sc->sc_tty; 918 919 if (COM_ISALIVE(sc) == 0) 920 return (EIO); 921 922 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 923 } 924 925 int 926 compoll(dev_t dev, int events, struct lwp *l) 927 { 928 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 929 struct tty *tp = sc->sc_tty; 930 931 if (COM_ISALIVE(sc) == 0) 932 return (POLLHUP); 933 934 return ((*tp->t_linesw->l_poll)(tp, events, l)); 935 } 936 937 struct tty * 938 comtty(dev_t dev) 939 { 940 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 941 struct tty *tp = sc->sc_tty; 942 943 return (tp); 944 } 945 946 int 947 comioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 948 { 949 struct com_softc *sc; 950 struct tty *tp; 951 int error; 952 953 sc = device_lookup(&com_cd, COMUNIT(dev)); 954 if (sc == NULL) 955 return ENXIO; 956 if (COM_ISALIVE(sc) == 0) 957 return (EIO); 958 959 tp = sc->sc_tty; 960 961 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 962 if (error != EPASSTHROUGH) 963 return (error); 964 965 error = ttioctl(tp, cmd, data, flag, l); 966 if (error != EPASSTHROUGH) 967 return (error); 968 969 error = 0; 970 switch (cmd) { 971 case TIOCSFLAGS: 972 error = kauth_authorize_device_tty(l->l_cred, 973 KAUTH_DEVICE_TTY_PRIVSET, tp); 974 break; 975 default: 976 /* nothing */ 977 break; 978 } 979 if (error) { 980 return error; 981 } 982 983 mutex_spin_enter(&sc->sc_lock); 984 985 switch (cmd) { 986 case TIOCSBRK: 987 com_break(sc, 1); 988 break; 989 990 case TIOCCBRK: 991 com_break(sc, 0); 992 break; 993 994 case TIOCSDTR: 995 com_modem(sc, 1); 996 break; 997 998 case TIOCCDTR: 999 com_modem(sc, 0); 1000 break; 1001 1002 case TIOCGFLAGS: 1003 *(int *)data = sc->sc_swflags; 1004 break; 1005 1006 case TIOCSFLAGS: 1007 sc->sc_swflags = *(int *)data; 1008 break; 1009 1010 case TIOCMSET: 1011 case TIOCMBIS: 1012 case TIOCMBIC: 1013 tiocm_to_com(sc, cmd, *(int *)data); 1014 break; 1015 1016 case TIOCMGET: 1017 *(int *)data = com_to_tiocm(sc); 1018 break; 1019 1020 case PPS_IOC_CREATE: 1021 case PPS_IOC_DESTROY: 1022 case PPS_IOC_GETPARAMS: 1023 case PPS_IOC_SETPARAMS: 1024 case PPS_IOC_GETCAP: 1025 case PPS_IOC_FETCH: 1026 #ifdef PPS_SYNC 1027 case PPS_IOC_KCBIND: 1028 #endif 1029 error = pps_ioctl(cmd, data, &sc->sc_pps_state); 1030 break; 1031 1032 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1033 #ifndef PPS_TRAILING_EDGE 1034 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1035 &sc->sc_pps_state.ppsinfo.assert_timestamp); 1036 #else 1037 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1038 &sc->sc_pps_state.ppsinfo.clear_timestamp); 1039 #endif 1040 break; 1041 1042 default: 1043 error = EPASSTHROUGH; 1044 break; 1045 } 1046 1047 mutex_spin_exit(&sc->sc_lock); 1048 1049 #ifdef COM_DEBUG 1050 if (com_debug) 1051 comstatus(sc, "comioctl "); 1052 #endif 1053 1054 return (error); 1055 } 1056 1057 integrate void 1058 com_schedrx(struct com_softc *sc) 1059 { 1060 1061 sc->sc_rx_ready = 1; 1062 1063 /* Wake up the poller. */ 1064 softint_schedule(sc->sc_si); 1065 } 1066 1067 void 1068 com_break(struct com_softc *sc, int onoff) 1069 { 1070 1071 if (onoff) 1072 SET(sc->sc_lcr, LCR_SBREAK); 1073 else 1074 CLR(sc->sc_lcr, LCR_SBREAK); 1075 1076 if (!sc->sc_heldchange) { 1077 if (sc->sc_tx_busy) { 1078 sc->sc_heldtbc = sc->sc_tbc; 1079 sc->sc_tbc = 0; 1080 sc->sc_heldchange = 1; 1081 } else 1082 com_loadchannelregs(sc); 1083 } 1084 } 1085 1086 void 1087 com_modem(struct com_softc *sc, int onoff) 1088 { 1089 1090 if (sc->sc_mcr_dtr == 0) 1091 return; 1092 1093 if (onoff) 1094 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1095 else 1096 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1097 1098 if (!sc->sc_heldchange) { 1099 if (sc->sc_tx_busy) { 1100 sc->sc_heldtbc = sc->sc_tbc; 1101 sc->sc_tbc = 0; 1102 sc->sc_heldchange = 1; 1103 } else 1104 com_loadchannelregs(sc); 1105 } 1106 } 1107 1108 void 1109 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1110 { 1111 u_char combits; 1112 1113 combits = 0; 1114 if (ISSET(ttybits, TIOCM_DTR)) 1115 SET(combits, MCR_DTR); 1116 if (ISSET(ttybits, TIOCM_RTS)) 1117 SET(combits, MCR_RTS); 1118 1119 switch (how) { 1120 case TIOCMBIC: 1121 CLR(sc->sc_mcr, combits); 1122 break; 1123 1124 case TIOCMBIS: 1125 SET(sc->sc_mcr, combits); 1126 break; 1127 1128 case TIOCMSET: 1129 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1130 SET(sc->sc_mcr, combits); 1131 break; 1132 } 1133 1134 if (!sc->sc_heldchange) { 1135 if (sc->sc_tx_busy) { 1136 sc->sc_heldtbc = sc->sc_tbc; 1137 sc->sc_tbc = 0; 1138 sc->sc_heldchange = 1; 1139 } else 1140 com_loadchannelregs(sc); 1141 } 1142 } 1143 1144 int 1145 com_to_tiocm(struct com_softc *sc) 1146 { 1147 u_char combits; 1148 int ttybits = 0; 1149 1150 combits = sc->sc_mcr; 1151 if (ISSET(combits, MCR_DTR)) 1152 SET(ttybits, TIOCM_DTR); 1153 if (ISSET(combits, MCR_RTS)) 1154 SET(ttybits, TIOCM_RTS); 1155 1156 combits = sc->sc_msr; 1157 if (ISSET(combits, MSR_DCD)) 1158 SET(ttybits, TIOCM_CD); 1159 if (ISSET(combits, MSR_CTS)) 1160 SET(ttybits, TIOCM_CTS); 1161 if (ISSET(combits, MSR_DSR)) 1162 SET(ttybits, TIOCM_DSR); 1163 if (ISSET(combits, MSR_RI | MSR_TERI)) 1164 SET(ttybits, TIOCM_RI); 1165 1166 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1167 SET(ttybits, TIOCM_LE); 1168 1169 return (ttybits); 1170 } 1171 1172 static u_char 1173 cflag2lcr(tcflag_t cflag) 1174 { 1175 u_char lcr = 0; 1176 1177 switch (ISSET(cflag, CSIZE)) { 1178 case CS5: 1179 SET(lcr, LCR_5BITS); 1180 break; 1181 case CS6: 1182 SET(lcr, LCR_6BITS); 1183 break; 1184 case CS7: 1185 SET(lcr, LCR_7BITS); 1186 break; 1187 case CS8: 1188 SET(lcr, LCR_8BITS); 1189 break; 1190 } 1191 if (ISSET(cflag, PARENB)) { 1192 SET(lcr, LCR_PENAB); 1193 if (!ISSET(cflag, PARODD)) 1194 SET(lcr, LCR_PEVEN); 1195 } 1196 if (ISSET(cflag, CSTOPB)) 1197 SET(lcr, LCR_STOPB); 1198 1199 return (lcr); 1200 } 1201 1202 int 1203 comparam(struct tty *tp, struct termios *t) 1204 { 1205 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1206 int ospeed; 1207 u_char lcr; 1208 1209 if (COM_ISALIVE(sc) == 0) 1210 return (EIO); 1211 1212 #ifdef COM_HAYESP 1213 if (sc->sc_type == COM_TYPE_HAYESP) { 1214 int prescaler, speed; 1215 1216 /* 1217 * Calculate UART clock prescaler. It should be in 1218 * range of 0 .. 3. 1219 */ 1220 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1221 prescaler++, speed /= 2) 1222 if ((ospeed = comspeed(speed, sc->sc_frequency, 1223 sc->sc_type)) > 0) 1224 break; 1225 1226 if (prescaler == 4) 1227 return (EINVAL); 1228 sc->sc_prescaler = prescaler; 1229 } else 1230 #endif 1231 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1232 1233 /* Check requested parameters. */ 1234 if (ospeed < 0) 1235 return (EINVAL); 1236 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1237 return (EINVAL); 1238 1239 /* 1240 * For the console, always force CLOCAL and !HUPCL, so that the port 1241 * is always active. 1242 */ 1243 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1244 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1245 SET(t->c_cflag, CLOCAL); 1246 CLR(t->c_cflag, HUPCL); 1247 } 1248 1249 /* 1250 * If there were no changes, don't do anything. This avoids dropping 1251 * input and improves performance when all we did was frob things like 1252 * VMIN and VTIME. 1253 */ 1254 if (tp->t_ospeed == t->c_ospeed && 1255 tp->t_cflag == t->c_cflag) 1256 return (0); 1257 1258 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1259 1260 mutex_spin_enter(&sc->sc_lock); 1261 1262 sc->sc_lcr = lcr; 1263 1264 /* 1265 * If we're not in a mode that assumes a connection is present, then 1266 * ignore carrier changes. 1267 */ 1268 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1269 sc->sc_msr_dcd = 0; 1270 else 1271 sc->sc_msr_dcd = MSR_DCD; 1272 /* 1273 * Set the flow control pins depending on the current flow control 1274 * mode. 1275 */ 1276 if (ISSET(t->c_cflag, CRTSCTS)) { 1277 sc->sc_mcr_dtr = MCR_DTR; 1278 sc->sc_mcr_rts = MCR_RTS; 1279 sc->sc_msr_cts = MSR_CTS; 1280 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1281 } else if (ISSET(t->c_cflag, MDMBUF)) { 1282 /* 1283 * For DTR/DCD flow control, make sure we don't toggle DTR for 1284 * carrier detection. 1285 */ 1286 sc->sc_mcr_dtr = 0; 1287 sc->sc_mcr_rts = MCR_DTR; 1288 sc->sc_msr_cts = MSR_DCD; 1289 sc->sc_efr = 0; 1290 } else { 1291 /* 1292 * If no flow control, then always set RTS. This will make 1293 * the other side happy if it mistakenly thinks we're doing 1294 * RTS/CTS flow control. 1295 */ 1296 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1297 sc->sc_mcr_rts = 0; 1298 sc->sc_msr_cts = 0; 1299 sc->sc_efr = 0; 1300 if (ISSET(sc->sc_mcr, MCR_DTR)) 1301 SET(sc->sc_mcr, MCR_RTS); 1302 else 1303 CLR(sc->sc_mcr, MCR_RTS); 1304 } 1305 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1306 1307 #if 0 1308 if (ospeed == 0) 1309 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1310 else 1311 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1312 #endif 1313 1314 sc->sc_dlbl = ospeed; 1315 sc->sc_dlbh = ospeed >> 8; 1316 1317 /* 1318 * Set the FIFO threshold based on the receive speed. 1319 * 1320 * * If it's a low speed, it's probably a mouse or some other 1321 * interactive device, so set the threshold low. 1322 * * If it's a high speed, trim the trigger level down to prevent 1323 * overflows. 1324 * * Otherwise set it a bit higher. 1325 */ 1326 if (sc->sc_type == COM_TYPE_HAYESP) 1327 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1328 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1329 sc->sc_fifo = FIFO_ENABLE | 1330 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8); 1331 else 1332 sc->sc_fifo = 0; 1333 1334 /* And copy to tty. */ 1335 tp->t_ispeed = t->c_ospeed; 1336 tp->t_ospeed = t->c_ospeed; 1337 tp->t_cflag = t->c_cflag; 1338 1339 if (!sc->sc_heldchange) { 1340 if (sc->sc_tx_busy) { 1341 sc->sc_heldtbc = sc->sc_tbc; 1342 sc->sc_tbc = 0; 1343 sc->sc_heldchange = 1; 1344 } else 1345 com_loadchannelregs(sc); 1346 } 1347 1348 if (!ISSET(t->c_cflag, CHWFLOW)) { 1349 /* Disable the high water mark. */ 1350 sc->sc_r_hiwat = 0; 1351 sc->sc_r_lowat = 0; 1352 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1353 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1354 com_schedrx(sc); 1355 } 1356 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1357 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1358 com_hwiflow(sc); 1359 } 1360 } else { 1361 sc->sc_r_hiwat = com_rbuf_hiwat; 1362 sc->sc_r_lowat = com_rbuf_lowat; 1363 } 1364 1365 mutex_spin_exit(&sc->sc_lock); 1366 1367 /* 1368 * Update the tty layer's idea of the carrier bit, in case we changed 1369 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1370 * explicit request. 1371 */ 1372 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1373 1374 #ifdef COM_DEBUG 1375 if (com_debug) 1376 comstatus(sc, "comparam "); 1377 #endif 1378 1379 if (!ISSET(t->c_cflag, CHWFLOW)) { 1380 if (sc->sc_tx_stopped) { 1381 sc->sc_tx_stopped = 0; 1382 comstart(tp); 1383 } 1384 } 1385 1386 return (0); 1387 } 1388 1389 void 1390 com_iflush(struct com_softc *sc) 1391 { 1392 struct com_regs *regsp = &sc->sc_regs; 1393 #ifdef DIAGNOSTIC 1394 int reg; 1395 #endif 1396 int timo; 1397 1398 #ifdef DIAGNOSTIC 1399 reg = 0xffff; 1400 #endif 1401 timo = 50000; 1402 /* flush any pending I/O */ 1403 while (ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY) 1404 && --timo) 1405 #ifdef DIAGNOSTIC 1406 reg = 1407 #else 1408 (void) 1409 #endif 1410 CSR_READ_1(regsp, COM_REG_RXDATA); 1411 #ifdef DIAGNOSTIC 1412 if (!timo) 1413 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1414 reg); 1415 #endif 1416 } 1417 1418 void 1419 com_loadchannelregs(struct com_softc *sc) 1420 { 1421 struct com_regs *regsp = &sc->sc_regs; 1422 1423 /* XXXXX necessary? */ 1424 com_iflush(sc); 1425 1426 if (sc->sc_type == COM_TYPE_PXA2x0) 1427 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 1428 else 1429 CSR_WRITE_1(regsp, COM_REG_IER, 0); 1430 1431 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1432 if (sc->sc_type != COM_TYPE_AU1x00) { /* no EFR on alchemy */ 1433 CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr); 1434 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 1435 } 1436 } 1437 if (sc->sc_type == COM_TYPE_AU1x00) { 1438 /* alchemy has single separate 16-bit clock divisor register */ 1439 CSR_WRITE_2(regsp, COM_REG_DLBL, sc->sc_dlbl + 1440 (sc->sc_dlbh << 8)); 1441 } else { 1442 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB); 1443 CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl); 1444 CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh); 1445 } 1446 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr); 1447 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active = sc->sc_mcr); 1448 CSR_WRITE_1(regsp, COM_REG_FIFO, sc->sc_fifo); 1449 #ifdef COM_HAYESP 1450 if (sc->sc_type == COM_TYPE_HAYESP) { 1451 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 1452 HAYESP_SETPRESCALER); 1453 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 1454 sc->sc_prescaler); 1455 } 1456 #endif 1457 1458 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1459 } 1460 1461 int 1462 comhwiflow(struct tty *tp, int block) 1463 { 1464 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1465 1466 if (COM_ISALIVE(sc) == 0) 1467 return (0); 1468 1469 if (sc->sc_mcr_rts == 0) 1470 return (0); 1471 1472 mutex_spin_enter(&sc->sc_lock); 1473 1474 if (block) { 1475 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1476 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1477 com_hwiflow(sc); 1478 } 1479 } else { 1480 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1481 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1482 com_schedrx(sc); 1483 } 1484 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1485 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1486 com_hwiflow(sc); 1487 } 1488 } 1489 1490 mutex_spin_exit(&sc->sc_lock); 1491 return (1); 1492 } 1493 1494 /* 1495 * (un)block input via hw flowcontrol 1496 */ 1497 void 1498 com_hwiflow(struct com_softc *sc) 1499 { 1500 struct com_regs *regsp= &sc->sc_regs; 1501 1502 if (sc->sc_mcr_rts == 0) 1503 return; 1504 1505 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1506 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1507 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1508 } else { 1509 SET(sc->sc_mcr, sc->sc_mcr_rts); 1510 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1511 } 1512 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active); 1513 } 1514 1515 1516 void 1517 comstart(struct tty *tp) 1518 { 1519 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1520 struct com_regs *regsp = &sc->sc_regs; 1521 int s; 1522 1523 if (COM_ISALIVE(sc) == 0) 1524 return; 1525 1526 s = spltty(); 1527 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1528 goto out; 1529 if (sc->sc_tx_stopped) 1530 goto out; 1531 if (!ttypull(tp)) 1532 goto out; 1533 1534 /* Grab the first contiguous region of buffer space. */ 1535 { 1536 u_char *tba; 1537 int tbc; 1538 1539 tba = tp->t_outq.c_cf; 1540 tbc = ndqb(&tp->t_outq, 0); 1541 1542 mutex_spin_enter(&sc->sc_lock); 1543 1544 sc->sc_tba = tba; 1545 sc->sc_tbc = tbc; 1546 } 1547 1548 SET(tp->t_state, TS_BUSY); 1549 sc->sc_tx_busy = 1; 1550 1551 /* Enable transmit completion interrupts if necessary. */ 1552 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1553 SET(sc->sc_ier, IER_ETXRDY); 1554 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1555 } 1556 1557 /* Output the first chunk of the contiguous buffer. */ 1558 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1559 u_int n; 1560 1561 n = sc->sc_tbc; 1562 if (n > sc->sc_fifolen) 1563 n = sc->sc_fifolen; 1564 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1565 sc->sc_tbc -= n; 1566 sc->sc_tba += n; 1567 } 1568 1569 mutex_spin_exit(&sc->sc_lock); 1570 out: 1571 splx(s); 1572 return; 1573 } 1574 1575 /* 1576 * Stop output on a line. 1577 */ 1578 void 1579 comstop(struct tty *tp, int flag) 1580 { 1581 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1582 1583 mutex_spin_enter(&sc->sc_lock); 1584 if (ISSET(tp->t_state, TS_BUSY)) { 1585 /* Stop transmitting at the next chunk. */ 1586 sc->sc_tbc = 0; 1587 sc->sc_heldtbc = 0; 1588 if (!ISSET(tp->t_state, TS_TTSTOP)) 1589 SET(tp->t_state, TS_FLUSH); 1590 } 1591 mutex_spin_exit(&sc->sc_lock); 1592 } 1593 1594 void 1595 comdiag(void *arg) 1596 { 1597 struct com_softc *sc = arg; 1598 int overflows, floods; 1599 1600 mutex_spin_enter(&sc->sc_lock); 1601 overflows = sc->sc_overflows; 1602 sc->sc_overflows = 0; 1603 floods = sc->sc_floods; 1604 sc->sc_floods = 0; 1605 sc->sc_errors = 0; 1606 mutex_spin_exit(&sc->sc_lock); 1607 1608 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1609 sc->sc_dev.dv_xname, 1610 overflows, overflows == 1 ? "" : "s", 1611 floods, floods == 1 ? "" : "s"); 1612 } 1613 1614 integrate void 1615 com_rxsoft(struct com_softc *sc, struct tty *tp) 1616 { 1617 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1618 u_char *get, *end; 1619 u_int cc, scc; 1620 u_char lsr; 1621 int code; 1622 1623 end = sc->sc_ebuf; 1624 get = sc->sc_rbget; 1625 scc = cc = com_rbuf_size - sc->sc_rbavail; 1626 1627 if (cc == com_rbuf_size) { 1628 sc->sc_floods++; 1629 if (sc->sc_errors++ == 0) 1630 callout_reset(&sc->sc_diag_callout, 60 * hz, 1631 comdiag, sc); 1632 } 1633 1634 /* If not yet open, drop the entire buffer content here */ 1635 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1636 get += cc << 1; 1637 if (get >= end) 1638 get -= com_rbuf_size << 1; 1639 cc = 0; 1640 } 1641 while (cc) { 1642 code = get[0]; 1643 lsr = get[1]; 1644 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1645 if (ISSET(lsr, LSR_OE)) { 1646 sc->sc_overflows++; 1647 if (sc->sc_errors++ == 0) 1648 callout_reset(&sc->sc_diag_callout, 1649 60 * hz, comdiag, sc); 1650 } 1651 if (ISSET(lsr, LSR_BI | LSR_FE)) 1652 SET(code, TTY_FE); 1653 if (ISSET(lsr, LSR_PE)) 1654 SET(code, TTY_PE); 1655 } 1656 if ((*rint)(code, tp) == -1) { 1657 /* 1658 * The line discipline's buffer is out of space. 1659 */ 1660 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1661 /* 1662 * We're either not using flow control, or the 1663 * line discipline didn't tell us to block for 1664 * some reason. Either way, we have no way to 1665 * know when there's more space available, so 1666 * just drop the rest of the data. 1667 */ 1668 get += cc << 1; 1669 if (get >= end) 1670 get -= com_rbuf_size << 1; 1671 cc = 0; 1672 } else { 1673 /* 1674 * Don't schedule any more receive processing 1675 * until the line discipline tells us there's 1676 * space available (through comhwiflow()). 1677 * Leave the rest of the data in the input 1678 * buffer. 1679 */ 1680 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1681 } 1682 break; 1683 } 1684 get += 2; 1685 if (get >= end) 1686 get = sc->sc_rbuf; 1687 cc--; 1688 } 1689 1690 if (cc != scc) { 1691 sc->sc_rbget = get; 1692 mutex_spin_enter(&sc->sc_lock); 1693 1694 cc = sc->sc_rbavail += scc - cc; 1695 /* Buffers should be ok again, release possible block. */ 1696 if (cc >= sc->sc_r_lowat) { 1697 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1698 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1699 SET(sc->sc_ier, IER_ERXRDY); 1700 #ifdef COM_PXA2X0 1701 if (sc->sc_type == COM_TYPE_PXA2x0) 1702 SET(sc->sc_ier, IER_ERXTOUT); 1703 #endif 1704 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 1705 } 1706 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1707 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1708 com_hwiflow(sc); 1709 } 1710 } 1711 mutex_spin_exit(&sc->sc_lock); 1712 } 1713 } 1714 1715 integrate void 1716 com_txsoft(struct com_softc *sc, struct tty *tp) 1717 { 1718 1719 CLR(tp->t_state, TS_BUSY); 1720 if (ISSET(tp->t_state, TS_FLUSH)) 1721 CLR(tp->t_state, TS_FLUSH); 1722 else 1723 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1724 (*tp->t_linesw->l_start)(tp); 1725 } 1726 1727 integrate void 1728 com_stsoft(struct com_softc *sc, struct tty *tp) 1729 { 1730 u_char msr, delta; 1731 1732 mutex_spin_enter(&sc->sc_lock); 1733 msr = sc->sc_msr; 1734 delta = sc->sc_msr_delta; 1735 sc->sc_msr_delta = 0; 1736 mutex_spin_exit(&sc->sc_lock); 1737 1738 if (ISSET(delta, sc->sc_msr_dcd)) { 1739 /* 1740 * Inform the tty layer that carrier detect changed. 1741 */ 1742 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1743 } 1744 1745 if (ISSET(delta, sc->sc_msr_cts)) { 1746 /* Block or unblock output according to flow control. */ 1747 if (ISSET(msr, sc->sc_msr_cts)) { 1748 sc->sc_tx_stopped = 0; 1749 (*tp->t_linesw->l_start)(tp); 1750 } else { 1751 sc->sc_tx_stopped = 1; 1752 } 1753 } 1754 1755 #ifdef COM_DEBUG 1756 if (com_debug) 1757 comstatus(sc, "com_stsoft"); 1758 #endif 1759 } 1760 1761 void 1762 comsoft(void *arg) 1763 { 1764 struct com_softc *sc = arg; 1765 struct tty *tp; 1766 1767 if (COM_ISALIVE(sc) == 0) 1768 return; 1769 1770 tp = sc->sc_tty; 1771 1772 if (sc->sc_rx_ready) { 1773 sc->sc_rx_ready = 0; 1774 com_rxsoft(sc, tp); 1775 } 1776 1777 if (sc->sc_st_check) { 1778 sc->sc_st_check = 0; 1779 com_stsoft(sc, tp); 1780 } 1781 1782 if (sc->sc_tx_done) { 1783 sc->sc_tx_done = 0; 1784 com_txsoft(sc, tp); 1785 } 1786 } 1787 1788 int 1789 comintr(void *arg) 1790 { 1791 struct com_softc *sc = arg; 1792 struct com_regs *regsp = &sc->sc_regs; 1793 1794 u_char *put, *end; 1795 u_int cc; 1796 u_char lsr, iir; 1797 1798 if (COM_ISALIVE(sc) == 0) 1799 return (0); 1800 1801 mutex_spin_enter(&sc->sc_lock); 1802 iir = CSR_READ_1(regsp, COM_REG_IIR); 1803 if (ISSET(iir, IIR_NOPEND)) { 1804 mutex_spin_exit(&sc->sc_lock); 1805 return (0); 1806 } 1807 1808 end = sc->sc_ebuf; 1809 put = sc->sc_rbput; 1810 cc = sc->sc_rbavail; 1811 1812 again: do { 1813 u_char msr, delta; 1814 1815 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1816 if (ISSET(lsr, LSR_BI)) { 1817 int cn_trapped = 0; 1818 1819 cn_check_magic(sc->sc_tty->t_dev, 1820 CNC_BREAK, com_cnm_state); 1821 if (cn_trapped) 1822 continue; 1823 #if defined(KGDB) && !defined(DDB) 1824 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1825 kgdb_connect(1); 1826 continue; 1827 } 1828 #endif 1829 } 1830 1831 if (ISSET(lsr, LSR_RCV_MASK) && 1832 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1833 while (cc > 0) { 1834 int cn_trapped = 0; 1835 put[0] = CSR_READ_1(regsp, COM_REG_RXDATA); 1836 put[1] = lsr; 1837 cn_check_magic(sc->sc_tty->t_dev, 1838 put[0], com_cnm_state); 1839 if (cn_trapped) 1840 goto next; 1841 put += 2; 1842 if (put >= end) 1843 put = sc->sc_rbuf; 1844 cc--; 1845 next: 1846 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1847 if (!ISSET(lsr, LSR_RCV_MASK)) 1848 break; 1849 } 1850 1851 /* 1852 * Current string of incoming characters ended because 1853 * no more data was available or we ran out of space. 1854 * Schedule a receive event if any data was received. 1855 * If we're out of space, turn off receive interrupts. 1856 */ 1857 sc->sc_rbput = put; 1858 sc->sc_rbavail = cc; 1859 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1860 sc->sc_rx_ready = 1; 1861 1862 /* 1863 * See if we are in danger of overflowing a buffer. If 1864 * so, use hardware flow control to ease the pressure. 1865 */ 1866 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1867 cc < sc->sc_r_hiwat) { 1868 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1869 com_hwiflow(sc); 1870 } 1871 1872 /* 1873 * If we're out of space, disable receive interrupts 1874 * until the queue has drained a bit. 1875 */ 1876 if (!cc) { 1877 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1878 #ifdef COM_PXA2X0 1879 if (sc->sc_type == COM_TYPE_PXA2x0) 1880 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 1881 else 1882 #endif 1883 CLR(sc->sc_ier, IER_ERXRDY); 1884 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1885 } 1886 } else { 1887 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 1888 (void) CSR_READ_1(regsp, COM_REG_RXDATA); 1889 continue; 1890 } 1891 } 1892 1893 msr = CSR_READ_1(regsp, COM_REG_MSR); 1894 delta = msr ^ sc->sc_msr; 1895 sc->sc_msr = msr; 1896 if ((sc->sc_pps_state.ppsparam.mode & PPS_CAPTUREBOTH) && 1897 (delta & MSR_DCD)) { 1898 pps_capture(&sc->sc_pps_state); 1899 pps_event(&sc->sc_pps_state, 1900 (msr & MSR_DCD) ? 1901 PPS_CAPTUREASSERT : 1902 PPS_CAPTURECLEAR); 1903 } 1904 1905 /* 1906 * Process normal status changes 1907 */ 1908 if (ISSET(delta, sc->sc_msr_mask)) { 1909 SET(sc->sc_msr_delta, delta); 1910 1911 /* 1912 * Stop output immediately if we lose the output 1913 * flow control signal or carrier detect. 1914 */ 1915 if (ISSET(~msr, sc->sc_msr_mask)) { 1916 sc->sc_tbc = 0; 1917 sc->sc_heldtbc = 0; 1918 #ifdef COM_DEBUG 1919 if (com_debug) 1920 comstatus(sc, "comintr "); 1921 #endif 1922 } 1923 1924 sc->sc_st_check = 1; 1925 } 1926 } while (!ISSET((iir = 1927 CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND) && 1928 /* 1929 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 1930 * by IIR read, so we can't do this way: `process all interrupts, 1931 * then do TX if possble'. 1932 */ 1933 (iir & IIR_IMASK) != IIR_TXRDY); 1934 1935 /* 1936 * Read LSR again, since there may be an interrupt between 1937 * the last LSR read and IIR read above. 1938 */ 1939 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1940 1941 /* 1942 * See if data can be transmitted as well. 1943 * Schedule tx done event if no data left 1944 * and tty was marked busy. 1945 */ 1946 if (ISSET(lsr, LSR_TXRDY)) { 1947 /* 1948 * If we've delayed a parameter change, do it now, and restart 1949 * output. 1950 */ 1951 if (sc->sc_heldchange) { 1952 com_loadchannelregs(sc); 1953 sc->sc_heldchange = 0; 1954 sc->sc_tbc = sc->sc_heldtbc; 1955 sc->sc_heldtbc = 0; 1956 } 1957 1958 /* Output the next chunk of the contiguous buffer, if any. */ 1959 if (sc->sc_tbc > 0) { 1960 u_int n; 1961 1962 n = sc->sc_tbc; 1963 if (n > sc->sc_fifolen) 1964 n = sc->sc_fifolen; 1965 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1966 sc->sc_tbc -= n; 1967 sc->sc_tba += n; 1968 } else { 1969 /* Disable transmit completion interrupts if necessary. */ 1970 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1971 CLR(sc->sc_ier, IER_ETXRDY); 1972 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1973 } 1974 if (sc->sc_tx_busy) { 1975 sc->sc_tx_busy = 0; 1976 sc->sc_tx_done = 1; 1977 } 1978 } 1979 } 1980 1981 if (!ISSET((iir = CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND)) 1982 goto again; 1983 1984 mutex_spin_exit(&sc->sc_lock); 1985 1986 /* Wake up the poller. */ 1987 softint_schedule(sc->sc_si); 1988 1989 #if NRND > 0 && defined(RND_COM) 1990 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1991 #endif 1992 1993 return (1); 1994 } 1995 1996 /* 1997 * The following functions are polled getc and putc routines, shared 1998 * by the console and kgdb glue. 1999 * 2000 * The read-ahead code is so that you can detect pending in-band 2001 * cn_magic in polled mode while doing output rather than having to 2002 * wait until the kernel decides it needs input. 2003 */ 2004 2005 #define MAX_READAHEAD 20 2006 static int com_readahead[MAX_READAHEAD]; 2007 static int com_readaheadcount = 0; 2008 2009 int 2010 com_common_getc(dev_t dev, struct com_regs *regsp) 2011 { 2012 int s = splserial(); 2013 u_char stat, c; 2014 2015 /* got a character from reading things earlier */ 2016 if (com_readaheadcount > 0) { 2017 int i; 2018 2019 c = com_readahead[0]; 2020 for (i = 1; i < com_readaheadcount; i++) { 2021 com_readahead[i-1] = com_readahead[i]; 2022 } 2023 com_readaheadcount--; 2024 splx(s); 2025 return (c); 2026 } 2027 2028 /* block until a character becomes available */ 2029 while (!ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) 2030 ; 2031 2032 c = CSR_READ_1(regsp, COM_REG_RXDATA); 2033 stat = CSR_READ_1(regsp, COM_REG_IIR); 2034 { 2035 int cn_trapped = 0; /* unused */ 2036 #ifdef DDB 2037 extern int db_active; 2038 if (!db_active) 2039 #endif 2040 cn_check_magic(dev, c, com_cnm_state); 2041 } 2042 splx(s); 2043 return (c); 2044 } 2045 2046 void 2047 com_common_putc(dev_t dev, struct com_regs *regsp, int c) 2048 { 2049 int s = splserial(); 2050 int cin, stat, timo; 2051 2052 if (com_readaheadcount < MAX_READAHEAD 2053 && ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) { 2054 int cn_trapped = 0; 2055 cin = CSR_READ_1(regsp, COM_REG_RXDATA); 2056 stat = CSR_READ_1(regsp, COM_REG_IIR); 2057 cn_check_magic(dev, cin, com_cnm_state); 2058 com_readahead[com_readaheadcount++] = cin; 2059 } 2060 2061 /* wait for any pending transmission to finish */ 2062 timo = 150000; 2063 while (!ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_TXRDY) && --timo) 2064 continue; 2065 2066 CSR_WRITE_1(regsp, COM_REG_TXDATA, c); 2067 COM_BARRIER(regsp, BR | BW); 2068 2069 splx(s); 2070 } 2071 2072 /* 2073 * Initialize UART for use as console or KGDB line. 2074 */ 2075 int 2076 cominit(struct com_regs *regsp, int rate, int frequency, int type, 2077 tcflag_t cflag) 2078 { 2079 2080 if (bus_space_map(regsp->cr_iot, regsp->cr_iobase, regsp->cr_nports, 0, 2081 ®sp->cr_ioh)) 2082 return (ENOMEM); /* ??? */ 2083 2084 rate = comspeed(rate, frequency, type); 2085 if (type != COM_TYPE_AU1x00) { 2086 /* no EFR on alchemy */ 2087 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 2088 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 2089 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_DLAB); 2090 CSR_WRITE_1(regsp, COM_REG_DLBL, rate & 0xff); 2091 CSR_WRITE_1(regsp, COM_REG_DLBH, rate >> 8); 2092 } else { 2093 CSR_WRITE_1(regsp, COM_REG_DLBL, rate); 2094 } 2095 CSR_WRITE_1(regsp, COM_REG_LCR, cflag2lcr(cflag)); 2096 CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS); 2097 CSR_WRITE_1(regsp, COM_REG_FIFO, 2098 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2099 #ifdef COM_PXA2X0 2100 if (type == COM_TYPE_PXA2x0) 2101 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 2102 else 2103 #endif 2104 CSR_WRITE_1(regsp, COM_REG_IER, 0); 2105 2106 return (0); 2107 } 2108 2109 /* 2110 * Following are all routines needed for COM to act as console 2111 */ 2112 struct consdev comcons = { 2113 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2114 NODEV, CN_NORMAL 2115 }; 2116 2117 2118 int 2119 comcnattach1(struct com_regs *regsp, int rate, int frequency, int type, 2120 tcflag_t cflag) 2121 { 2122 int res; 2123 2124 comconsregs = *regsp; 2125 2126 res = cominit(&comconsregs, rate, frequency, type, cflag); 2127 if (res) 2128 return (res); 2129 2130 cn_tab = &comcons; 2131 cn_init_magic(&com_cnm_state); 2132 cn_set_magic("\047\001"); /* default magic is BREAK */ 2133 2134 comconsrate = rate; 2135 comconscflag = cflag; 2136 2137 return (0); 2138 } 2139 2140 int 2141 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2142 int type, tcflag_t cflag) 2143 { 2144 struct com_regs regs; 2145 2146 memset(®s, 0, sizeof regs); 2147 regs.cr_iot = iot; 2148 regs.cr_iobase = iobase; 2149 regs.cr_nports = COM_NPORTS; 2150 #ifdef COM_REGMAP 2151 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2152 #endif 2153 2154 return comcnattach1(®s, rate, frequency, type, cflag); 2155 } 2156 2157 int 2158 comcngetc(dev_t dev) 2159 { 2160 2161 return (com_common_getc(dev, &comconsregs)); 2162 } 2163 2164 /* 2165 * Console kernel output character routine. 2166 */ 2167 void 2168 comcnputc(dev_t dev, int c) 2169 { 2170 2171 com_common_putc(dev, &comconsregs, c); 2172 } 2173 2174 void 2175 comcnpollc(dev_t dev, int on) 2176 { 2177 2178 } 2179 2180 #ifdef KGDB 2181 int 2182 com_kgdb_attach1(struct com_regs *regsp, int rate, int frequency, int type, 2183 tcflag_t cflag) 2184 { 2185 int res; 2186 2187 if (regsp->cr_iot == comconsregs.cr_iot && 2188 regsp->cr_iobase == comconsregs.cr_iobase) { 2189 #if !defined(DDB) 2190 return (EBUSY); /* cannot share with console */ 2191 #else 2192 comkgdbregs = *regsp; 2193 comkgdbregs.cr_ioh = comconsregs.cr_ioh; 2194 #endif 2195 } else { 2196 comkgdbregs = *regsp; 2197 res = cominit(&comkgdbregs, rate, frequency, type, cflag); 2198 if (res) 2199 return (res); 2200 2201 /* 2202 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2203 * expects this to be initialized 2204 */ 2205 cn_init_magic(&com_cnm_state); 2206 cn_set_magic("\047\001"); 2207 } 2208 2209 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2210 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2211 2212 return (0); 2213 } 2214 2215 int 2216 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2217 int frequency, int type, tcflag_t cflag) 2218 { 2219 struct com_regs regs; 2220 2221 regs.cr_iot = iot; 2222 regs.cr_nports = COM_NPORTS; 2223 regs.cr_iobase = iobase; 2224 #ifdef COM_REGMAP 2225 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2226 #endif 2227 2228 return com_kgdb_attach1(®s, rate, frequency, type, cflag); 2229 } 2230 2231 /* ARGSUSED */ 2232 int 2233 com_kgdb_getc(void *arg) 2234 { 2235 2236 return (com_common_getc(NODEV, &comkgdbregs)); 2237 } 2238 2239 /* ARGSUSED */ 2240 void 2241 com_kgdb_putc(void *arg, int c) 2242 { 2243 2244 com_common_putc(NODEV, &comkgdbregs, c); 2245 } 2246 #endif /* KGDB */ 2247 2248 /* helper function to identify the com ports used by 2249 console or KGDB (and not yet autoconf attached) */ 2250 int 2251 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2252 { 2253 bus_space_handle_t help; 2254 2255 if (!comconsattached && 2256 iot == comconsregs.cr_iot && iobase == comconsregs.cr_iobase) 2257 help = comconsregs.cr_ioh; 2258 #ifdef KGDB 2259 else if (!com_kgdb_attached && 2260 iot == comkgdbregs.cr_iot && iobase == comkgdbregs.cr_iobase) 2261 help = comkgdbregs.cr_ioh; 2262 #endif 2263 else 2264 return (0); 2265 2266 if (ioh) 2267 *ioh = help; 2268 return (1); 2269 } 2270 2271 /* 2272 * this routine exists to serve as a shutdown hook for systems that 2273 * have firmware which doesn't interact properly with a com device in 2274 * FIFO mode. 2275 */ 2276 bool 2277 com_cleanup(device_t self, int how) 2278 { 2279 struct com_softc *sc = device_private(self); 2280 2281 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 2282 CSR_WRITE_1(&sc->sc_regs, COM_REG_FIFO, 0); 2283 2284 return true; 2285 } 2286 2287 bool 2288 com_suspend(device_t self PMF_FN_ARGS) 2289 { 2290 struct com_softc *sc = device_private(self); 2291 2292 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, 0); 2293 (void)CSR_READ_1(&sc->sc_regs, COM_REG_IIR); 2294 2295 return true; 2296 } 2297 2298 bool 2299 com_resume(device_t self PMF_FN_ARGS) 2300 { 2301 struct com_softc *sc = device_private(self); 2302 2303 mutex_spin_enter(&sc->sc_lock); 2304 com_loadchannelregs(sc); 2305 mutex_spin_exit(&sc->sc_lock); 2306 2307 return true; 2308 } 2309
Indexes created Mon Sep 22 13:09:51 GMT 2025