com.c revision 1.276
1 /* $NetBSD: com.c,v 1.276 2008/03/14 15:09:11 cube Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.276 2008/03/14 15:09:11 cube Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 #include <sys/kauth.h> 125 #include <sys/intr.h> 126 127 #include <sys/bus.h> 128 129 #include <dev/ic/comreg.h> 130 #include <dev/ic/comvar.h> 131 #include <dev/ic/ns16550reg.h> 132 #include <dev/ic/st16650reg.h> 133 #ifdef COM_HAYESP 134 #include <dev/ic/hayespreg.h> 135 #endif 136 #define com_lcr com_cfcr 137 #include <dev/cons.h> 138 139 #ifdef COM_REGMAP 140 #define CSR_WRITE_1(r, o, v) \ 141 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 142 #define CSR_READ_1(r, o) \ 143 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 144 #define CSR_WRITE_2(r, o, v) \ 145 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 146 #define CSR_READ_2(r, o) \ 147 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 148 #define CSR_WRITE_MULTI(r, o, p, n) \ 149 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], p, n) 150 #else 151 #define CSR_WRITE_1(r, o, v) \ 152 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, o, v) 153 #define CSR_READ_1(r, o) \ 154 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, o) 155 #define CSR_WRITE_2(r, o, v) \ 156 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, o, v) 157 #define CSR_READ_2(r, o) \ 158 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, o) 159 #define CSR_WRITE_MULTI(r, o, p, n) \ 160 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, o, p, n) 161 #endif 162 163 164 static void com_enable_debugport(struct com_softc *); 165 166 void com_config(struct com_softc *); 167 void com_shutdown(struct com_softc *); 168 int comspeed(long, long, int); 169 static u_char cflag2lcr(tcflag_t); 170 int comparam(struct tty *, struct termios *); 171 void comstart(struct tty *); 172 int comhwiflow(struct tty *, int); 173 174 void com_loadchannelregs(struct com_softc *); 175 void com_hwiflow(struct com_softc *); 176 void com_break(struct com_softc *, int); 177 void com_modem(struct com_softc *, int); 178 void tiocm_to_com(struct com_softc *, u_long, int); 179 int com_to_tiocm(struct com_softc *); 180 void com_iflush(struct com_softc *); 181 182 int com_common_getc(dev_t, struct com_regs *); 183 void com_common_putc(dev_t, struct com_regs *, int); 184 185 int cominit(struct com_regs *, int, int, int, tcflag_t); 186 187 int comcngetc(dev_t); 188 void comcnputc(dev_t, int); 189 void comcnpollc(dev_t, int); 190 191 #define integrate static inline 192 void comsoft(void *); 193 integrate void com_rxsoft(struct com_softc *, struct tty *); 194 integrate void com_txsoft(struct com_softc *, struct tty *); 195 integrate void com_stsoft(struct com_softc *, struct tty *); 196 integrate void com_schedrx(struct com_softc *); 197 void comdiag(void *); 198 199 extern struct cfdriver com_cd; 200 201 dev_type_open(comopen); 202 dev_type_close(comclose); 203 dev_type_read(comread); 204 dev_type_write(comwrite); 205 dev_type_ioctl(comioctl); 206 dev_type_stop(comstop); 207 dev_type_tty(comtty); 208 dev_type_poll(compoll); 209 210 const struct cdevsw com_cdevsw = { 211 comopen, comclose, comread, comwrite, comioctl, 212 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 213 }; 214 215 /* 216 * Make this an option variable one can patch. 217 * But be warned: this must be a power of 2! 218 */ 219 u_int com_rbuf_size = COM_RING_SIZE; 220 221 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 222 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 223 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 224 225 static struct com_regs comconsregs; 226 static int comconsattached; 227 static int comconsrate; 228 static tcflag_t comconscflag; 229 static struct cnm_state com_cnm_state; 230 231 #ifdef KGDB 232 #include <sys/kgdb.h> 233 234 static struct com_regs comkgdbregs; 235 static int com_kgdb_attached; 236 237 int com_kgdb_getc(void *); 238 void com_kgdb_putc(void *, int); 239 #endif /* KGDB */ 240 241 #ifdef COM_REGMAP 242 /* initializer for typical 16550-ish hardware */ 243 #define COM_REG_16550 { \ 244 com_data, com_data, com_dlbl, com_dlbh, com_ier, com_iir, com_fifo, \ 245 com_efr, com_lcr, com_mcr, com_lsr, com_msr } 246 247 const bus_size_t com_std_map[16] = COM_REG_16550; 248 #endif /* COM_REGMAP */ 249 250 #define COMUNIT_MASK 0x7ffff 251 #define COMDIALOUT_MASK 0x80000 252 253 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 254 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 255 256 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 257 device_is_active((sc)->sc_dev)) 258 259 #define BR BUS_SPACE_BARRIER_READ 260 #define BW BUS_SPACE_BARRIER_WRITE 261 #define COM_BARRIER(r, f) \ 262 bus_space_barrier((r)->cr_iot, (r)->cr_ioh, 0, (r)->cr_nports, (f)) 263 264 /*ARGSUSED*/ 265 int 266 comspeed(long speed, long frequency, int type) 267 { 268 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 269 270 int x, err; 271 272 #if 0 273 if (speed == 0) 274 return (0); 275 #endif 276 if (speed <= 0) 277 return (-1); 278 x = divrnd(frequency / 16, speed); 279 if (x <= 0) 280 return (-1); 281 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 282 if (err < 0) 283 err = -err; 284 if (err > COM_TOLERANCE) 285 return (-1); 286 return (x); 287 288 #undef divrnd 289 } 290 291 #ifdef COM_DEBUG 292 int com_debug = 0; 293 294 void comstatus(struct com_softc *, const char *); 295 void 296 comstatus(struct com_softc *sc, const char *str) 297 { 298 struct tty *tp = sc->sc_tty; 299 300 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 301 sc->sc_dev.dv_xname, str, 302 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 303 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 304 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 305 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 306 sc->sc_tx_stopped ? '+' : '-'); 307 308 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 309 sc->sc_dev.dv_xname, str, 310 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 311 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 312 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 313 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 314 sc->sc_rx_flags); 315 } 316 #endif 317 318 int 319 com_probe_subr(struct com_regs *regs) 320 { 321 322 /* force access to id reg */ 323 CSR_WRITE_1(regs, COM_REG_LCR, LCR_8BITS); 324 CSR_WRITE_1(regs, COM_REG_IIR, 0); 325 if ((CSR_READ_1(regs, COM_REG_LCR) != LCR_8BITS) || 326 (CSR_READ_1(regs, COM_REG_IIR) & 0x38)) 327 return (0); 328 329 return (1); 330 } 331 332 int 333 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 334 { 335 struct com_regs regs; 336 337 regs.cr_iot = iot; 338 regs.cr_ioh = ioh; 339 #ifdef COM_REGMAP 340 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map));; 341 #endif 342 343 return com_probe_subr(®s); 344 } 345 346 /* 347 * No locking in this routine; it is only called during attach, 348 * or with the port already locked. 349 */ 350 static void 351 com_enable_debugport(struct com_softc *sc) 352 { 353 354 /* Turn on line break interrupt, set carrier. */ 355 sc->sc_ier = IER_ERXRDY; 356 if (sc->sc_type == COM_TYPE_PXA2x0) 357 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 358 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 359 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 360 CSR_WRITE_1(&sc->sc_regs, COM_REG_MCR, sc->sc_mcr); 361 } 362 363 void 364 com_attach_subr(struct com_softc *sc) 365 { 366 struct com_regs *regsp = &sc->sc_regs; 367 struct tty *tp; 368 #ifdef COM_16650 369 u_int8_t lcr; 370 #endif 371 const char *fifo_msg = NULL; 372 373 aprint_naive("\n"); 374 375 callout_init(&sc->sc_diag_callout, 0); 376 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 377 378 /* Disable interrupts before configuring the device. */ 379 if (sc->sc_type == COM_TYPE_PXA2x0) 380 sc->sc_ier = IER_EUART; 381 else 382 sc->sc_ier = 0; 383 384 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 385 386 if (regsp->cr_iot == comconsregs.cr_iot && 387 regsp->cr_iobase == comconsregs.cr_iobase) { 388 comconsattached = 1; 389 390 /* Make sure the console is always "hardwired". */ 391 delay(10000); /* wait for output to finish */ 392 SET(sc->sc_hwflags, COM_HW_CONSOLE); 393 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 394 } 395 396 /* Probe for FIFO */ 397 switch (sc->sc_type) { 398 case COM_TYPE_HAYESP: 399 goto fifodone; 400 401 case COM_TYPE_AU1x00: 402 sc->sc_fifolen = 16; 403 fifo_msg = "Au1X00 UART, working fifo"; 404 SET(sc->sc_hwflags, COM_HW_FIFO); 405 goto fifodelay; 406 } 407 408 sc->sc_fifolen = 1; 409 /* look for a NS 16550AF UART with FIFOs */ 410 CSR_WRITE_1(regsp, COM_REG_FIFO, 411 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 412 delay(100); 413 if (ISSET(CSR_READ_1(regsp, COM_REG_IIR), IIR_FIFO_MASK) 414 == IIR_FIFO_MASK) 415 if (ISSET(CSR_READ_1(regsp, COM_REG_FIFO), FIFO_TRIGGER_14) 416 == FIFO_TRIGGER_14) { 417 SET(sc->sc_hwflags, COM_HW_FIFO); 418 419 #ifdef COM_16650 420 /* 421 * IIR changes into the EFR if LCR is set to LCR_EERS 422 * on 16650s. We also know IIR != 0 at this point. 423 * Write 0 into the EFR, and read it. If the result 424 * is 0, we have a 16650. 425 * 426 * Older 16650s were broken; the test to detect them 427 * is taken from the Linux driver. Apparently 428 * setting DLAB enable gives access to the EFR on 429 * these chips. 430 */ 431 lcr = CSR_READ_1(regsp, COM_REG_LCR); 432 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 433 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 434 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 435 CSR_WRITE_1(regsp, COM_REG_LCR, 436 lcr | LCR_DLAB); 437 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 438 CLR(sc->sc_hwflags, COM_HW_FIFO); 439 sc->sc_fifolen = 0; 440 } else { 441 SET(sc->sc_hwflags, COM_HW_FLOW); 442 sc->sc_fifolen = 32; 443 } 444 } else 445 #endif 446 sc->sc_fifolen = 16; 447 448 #ifdef COM_16650 449 CSR_WRITE_1(regsp, COM_REG_LCR, lcr); 450 if (sc->sc_fifolen == 0) 451 fifo_msg = "st16650, broken fifo"; 452 else if (sc->sc_fifolen == 32) 453 fifo_msg = "st16650a, working fifo"; 454 else 455 #endif 456 fifo_msg = "ns16550a, working fifo"; 457 } else 458 fifo_msg = "ns16550, broken fifo"; 459 else 460 fifo_msg = "ns8250 or ns16450, no fifo"; 461 CSR_WRITE_1(regsp, COM_REG_FIFO, 0); 462 fifodelay: 463 /* 464 * Some chips will clear down both Tx and Rx FIFOs when zero is 465 * written to com_fifo. If this chip is the console, writing zero 466 * results in some of the chip/FIFO description being lost, so delay 467 * printing it until now. 468 */ 469 delay(10); 470 aprint_normal(": %s\n", fifo_msg); 471 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 472 sc->sc_fifolen = 1; 473 aprint_normal_dev(sc->sc_dev, "txfifo disabled\n"); 474 } 475 476 fifodone: 477 478 tp = ttymalloc(); 479 tp->t_oproc = comstart; 480 tp->t_param = comparam; 481 tp->t_hwiflow = comhwiflow; 482 483 sc->sc_tty = tp; 484 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 485 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 486 sc->sc_rbavail = com_rbuf_size; 487 if (sc->sc_rbuf == NULL) { 488 aprint_error_dev(sc->sc_dev, 489 "unable to allocate ring buffer\n"); 490 return; 491 } 492 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 493 494 tty_attach(tp); 495 496 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 497 SET(sc->sc_mcr, MCR_IENABLE); 498 499 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 500 int maj; 501 502 /* locate the major number */ 503 maj = cdevsw_lookup_major(&com_cdevsw); 504 505 tp->t_dev = cn_tab->cn_dev = makedev(maj, 506 device_unit(sc->sc_dev)); 507 508 aprint_normal_dev(sc->sc_dev, "console\n"); 509 } 510 511 #ifdef KGDB 512 /* 513 * Allow kgdb to "take over" this port. If this is 514 * not the console and is the kgdb device, it has 515 * exclusive use. If it's the console _and_ the 516 * kgdb device, it doesn't. 517 */ 518 if (regsp->cr_iot == comkgdbregs.cr_iot && 519 regsp->cr_iobase == comkgdbregs.cr_iobase) { 520 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 521 com_kgdb_attached = 1; 522 523 SET(sc->sc_hwflags, COM_HW_KGDB); 524 } 525 aprint_normal_dev(sc->sc_dev, "kgdb\n"); 526 } 527 #endif 528 529 sc->sc_si = softint_establish(SOFTINT_SERIAL, comsoft, sc); 530 531 #if NRND > 0 && defined(RND_COM) 532 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 533 RND_TYPE_TTY, 0); 534 #endif 535 536 /* if there are no enable/disable functions, assume the device 537 is always enabled */ 538 if (!sc->enable) 539 sc->enabled = 1; 540 541 com_config(sc); 542 543 SET(sc->sc_hwflags, COM_HW_DEV_OK); 544 } 545 546 void 547 com_config(struct com_softc *sc) 548 { 549 struct com_regs *regsp = &sc->sc_regs; 550 551 /* Disable interrupts before configuring the device. */ 552 if (sc->sc_type == COM_TYPE_PXA2x0) 553 sc->sc_ier = IER_EUART; 554 else 555 sc->sc_ier = 0; 556 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 557 (void) CSR_READ_1(regsp, COM_REG_IIR); 558 559 #ifdef COM_HAYESP 560 /* Look for a Hayes ESP board. */ 561 if (sc->sc_type == COM_TYPE_HAYESP) { 562 563 /* Set 16550 compatibility mode */ 564 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 565 HAYESP_SETMODE); 566 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 567 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 568 HAYESP_MODE_SCALE); 569 570 /* Set RTS/CTS flow control */ 571 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 572 HAYESP_SETFLOWTYPE); 573 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 574 HAYESP_FLOW_RTS); 575 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 576 HAYESP_FLOW_CTS); 577 578 /* Set flow control levels */ 579 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 580 HAYESP_SETRXFLOW); 581 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 582 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 583 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 584 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 585 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 586 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 587 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 588 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 589 } 590 #endif 591 592 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 593 com_enable_debugport(sc); 594 } 595 596 int 597 com_detach(device_t self, int flags) 598 { 599 struct com_softc *sc = device_private(self); 600 int maj, mn; 601 602 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 603 return EBUSY; 604 605 /* locate the major number */ 606 maj = cdevsw_lookup_major(&com_cdevsw); 607 608 /* Nuke the vnodes for any open instances. */ 609 mn = device_unit(self); 610 vdevgone(maj, mn, mn, VCHR); 611 612 mn |= COMDIALOUT_MASK; 613 vdevgone(maj, mn, mn, VCHR); 614 615 if (sc->sc_rbuf == NULL) { 616 /* 617 * Ring buffer allocation failed in the com_attach_subr, 618 * only the tty is allocated, and nothing else. 619 */ 620 ttyfree(sc->sc_tty); 621 return 0; 622 } 623 624 /* Free the receive buffer. */ 625 free(sc->sc_rbuf, M_DEVBUF); 626 627 /* Detach and free the tty. */ 628 tty_detach(sc->sc_tty); 629 ttyfree(sc->sc_tty); 630 631 /* Unhook the soft interrupt handler. */ 632 softint_disestablish(sc->sc_si); 633 634 #if NRND > 0 && defined(RND_COM) 635 /* Unhook the entropy source. */ 636 rnd_detach_source(&sc->rnd_source); 637 #endif 638 callout_destroy(&sc->sc_diag_callout); 639 640 /* Destroy the lock. */ 641 mutex_destroy(&sc->sc_lock); 642 643 return (0); 644 } 645 646 int 647 com_activate(device_t self, enum devact act) 648 { 649 struct com_softc *sc = device_private(self); 650 int rv = 0; 651 652 switch (act) { 653 case DVACT_ACTIVATE: 654 rv = EOPNOTSUPP; 655 break; 656 657 case DVACT_DEACTIVATE: 658 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 659 rv = EBUSY; 660 break; 661 } 662 663 if (sc->disable != NULL && sc->enabled != 0) { 664 (*sc->disable)(sc); 665 sc->enabled = 0; 666 } 667 break; 668 } 669 670 return (rv); 671 } 672 673 void 674 com_shutdown(struct com_softc *sc) 675 { 676 struct tty *tp = sc->sc_tty; 677 678 mutex_spin_enter(&sc->sc_lock); 679 680 /* If we were asserting flow control, then deassert it. */ 681 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 682 com_hwiflow(sc); 683 684 /* Clear any break condition set with TIOCSBRK. */ 685 com_break(sc, 0); 686 687 /* 688 * Hang up if necessary. Wait a bit, so the other side has time to 689 * notice even if we immediately open the port again. 690 * Avoid tsleeping above splhigh(). 691 */ 692 if (ISSET(tp->t_cflag, HUPCL)) { 693 com_modem(sc, 0); 694 mutex_spin_exit(&sc->sc_lock); 695 /* XXX will only timeout */ 696 (void) kpause(ttclos, false, hz, NULL); 697 mutex_spin_enter(&sc->sc_lock); 698 } 699 700 /* Turn off interrupts. */ 701 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 702 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 703 if (sc->sc_type == COM_TYPE_PXA2x0) 704 sc->sc_ier |= IER_ERXTOUT; 705 } else 706 sc->sc_ier = 0; 707 708 if (sc->sc_type == COM_TYPE_PXA2x0) 709 sc->sc_ier |= IER_EUART; 710 711 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 712 713 mutex_spin_exit(&sc->sc_lock); 714 715 if (sc->disable) { 716 #ifdef DIAGNOSTIC 717 if (!sc->enabled) 718 panic("com_shutdown: not enabled?"); 719 #endif 720 (*sc->disable)(sc); 721 sc->enabled = 0; 722 } 723 } 724 725 int 726 comopen(dev_t dev, int flag, int mode, struct lwp *l) 727 { 728 struct com_softc *sc; 729 struct tty *tp; 730 int s; 731 int error; 732 733 sc = device_lookup_private(&com_cd, COMUNIT(dev)); 734 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 735 sc->sc_rbuf == NULL) 736 return (ENXIO); 737 738 if (!device_is_active(sc->sc_dev)) 739 return (ENXIO); 740 741 #ifdef KGDB 742 /* 743 * If this is the kgdb port, no other use is permitted. 744 */ 745 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 746 return (EBUSY); 747 #endif 748 749 tp = sc->sc_tty; 750 751 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 752 return (EBUSY); 753 754 s = spltty(); 755 756 /* 757 * Do the following iff this is a first open. 758 */ 759 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 760 struct termios t; 761 762 tp->t_dev = dev; 763 764 765 if (sc->enable) { 766 if ((*sc->enable)(sc)) { 767 splx(s); 768 aprint_error_dev(sc->sc_dev, 769 "device enable failed\n"); 770 return (EIO); 771 } 772 mutex_spin_enter(&sc->sc_lock); 773 sc->enabled = 1; 774 com_config(sc); 775 } else { 776 mutex_spin_enter(&sc->sc_lock); 777 } 778 779 /* Turn on interrupts. */ 780 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 781 if (sc->sc_type == COM_TYPE_PXA2x0) 782 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 783 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 784 785 /* Fetch the current modem control status, needed later. */ 786 sc->sc_msr = CSR_READ_1(&sc->sc_regs, COM_REG_MSR); 787 788 /* Clear PPS capture state on first open. */ 789 memset(&sc->sc_pps_state, 0, sizeof(sc->sc_pps_state)); 790 sc->sc_pps_state.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 791 pps_init(&sc->sc_pps_state); 792 793 mutex_spin_exit(&sc->sc_lock); 794 795 /* 796 * Initialize the termios status to the defaults. Add in the 797 * sticky bits from TIOCSFLAGS. 798 */ 799 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 800 t.c_ospeed = comconsrate; 801 t.c_cflag = comconscflag; 802 } else { 803 t.c_ospeed = TTYDEF_SPEED; 804 t.c_cflag = TTYDEF_CFLAG; 805 } 806 t.c_ispeed = t.c_ospeed; 807 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 808 SET(t.c_cflag, CLOCAL); 809 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 810 SET(t.c_cflag, CRTSCTS); 811 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 812 SET(t.c_cflag, MDMBUF); 813 /* Make sure comparam() will do something. */ 814 tp->t_ospeed = 0; 815 (void) comparam(tp, &t); 816 tp->t_iflag = TTYDEF_IFLAG; 817 tp->t_oflag = TTYDEF_OFLAG; 818 tp->t_lflag = TTYDEF_LFLAG; 819 ttychars(tp); 820 ttsetwater(tp); 821 822 mutex_spin_enter(&sc->sc_lock); 823 824 /* 825 * Turn on DTR. We must always do this, even if carrier is not 826 * present, because otherwise we'd have to use TIOCSDTR 827 * immediately after setting CLOCAL, which applications do not 828 * expect. We always assert DTR while the device is open 829 * unless explicitly requested to deassert it. 830 */ 831 com_modem(sc, 1); 832 833 /* Clear the input ring, and unblock. */ 834 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 835 sc->sc_rbavail = com_rbuf_size; 836 com_iflush(sc); 837 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 838 com_hwiflow(sc); 839 840 #ifdef COM_DEBUG 841 if (com_debug) 842 comstatus(sc, "comopen "); 843 #endif 844 845 mutex_spin_exit(&sc->sc_lock); 846 } 847 848 splx(s); 849 850 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 851 if (error) 852 goto bad; 853 854 error = (*tp->t_linesw->l_open)(dev, tp); 855 if (error) 856 goto bad; 857 858 return (0); 859 860 bad: 861 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 862 /* 863 * We failed to open the device, and nobody else had it opened. 864 * Clean up the state as appropriate. 865 */ 866 com_shutdown(sc); 867 } 868 869 return (error); 870 } 871 872 int 873 comclose(dev_t dev, int flag, int mode, struct lwp *l) 874 { 875 struct com_softc *sc = 876 device_lookup_private(&com_cd, COMUNIT(dev)); 877 struct tty *tp = sc->sc_tty; 878 879 /* XXX This is for cons.c. */ 880 if (!ISSET(tp->t_state, TS_ISOPEN)) 881 return (0); 882 883 (*tp->t_linesw->l_close)(tp, flag); 884 ttyclose(tp); 885 886 if (COM_ISALIVE(sc) == 0) 887 return (0); 888 889 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 890 /* 891 * Although we got a last close, the device may still be in 892 * use; e.g. if this was the dialout node, and there are still 893 * processes waiting for carrier on the non-dialout node. 894 */ 895 com_shutdown(sc); 896 } 897 898 return (0); 899 } 900 901 int 902 comread(dev_t dev, struct uio *uio, int flag) 903 { 904 struct com_softc *sc = 905 device_lookup_private(&com_cd, COMUNIT(dev)); 906 struct tty *tp = sc->sc_tty; 907 908 if (COM_ISALIVE(sc) == 0) 909 return (EIO); 910 911 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 912 } 913 914 int 915 comwrite(dev_t dev, struct uio *uio, int flag) 916 { 917 struct com_softc *sc = 918 device_lookup_private(&com_cd, COMUNIT(dev)); 919 struct tty *tp = sc->sc_tty; 920 921 if (COM_ISALIVE(sc) == 0) 922 return (EIO); 923 924 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 925 } 926 927 int 928 compoll(dev_t dev, int events, struct lwp *l) 929 { 930 struct com_softc *sc = 931 device_lookup_private(&com_cd, COMUNIT(dev)); 932 struct tty *tp = sc->sc_tty; 933 934 if (COM_ISALIVE(sc) == 0) 935 return (POLLHUP); 936 937 return ((*tp->t_linesw->l_poll)(tp, events, l)); 938 } 939 940 struct tty * 941 comtty(dev_t dev) 942 { 943 struct com_softc *sc = 944 device_lookup_private(&com_cd, COMUNIT(dev)); 945 struct tty *tp = sc->sc_tty; 946 947 return (tp); 948 } 949 950 int 951 comioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 952 { 953 struct com_softc *sc; 954 struct tty *tp; 955 int error; 956 957 sc = device_lookup_private(&com_cd, COMUNIT(dev)); 958 if (sc == NULL) 959 return ENXIO; 960 if (COM_ISALIVE(sc) == 0) 961 return (EIO); 962 963 tp = sc->sc_tty; 964 965 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 966 if (error != EPASSTHROUGH) 967 return (error); 968 969 error = ttioctl(tp, cmd, data, flag, l); 970 if (error != EPASSTHROUGH) 971 return (error); 972 973 error = 0; 974 switch (cmd) { 975 case TIOCSFLAGS: 976 error = kauth_authorize_device_tty(l->l_cred, 977 KAUTH_DEVICE_TTY_PRIVSET, tp); 978 break; 979 default: 980 /* nothing */ 981 break; 982 } 983 if (error) { 984 return error; 985 } 986 987 mutex_spin_enter(&sc->sc_lock); 988 989 switch (cmd) { 990 case TIOCSBRK: 991 com_break(sc, 1); 992 break; 993 994 case TIOCCBRK: 995 com_break(sc, 0); 996 break; 997 998 case TIOCSDTR: 999 com_modem(sc, 1); 1000 break; 1001 1002 case TIOCCDTR: 1003 com_modem(sc, 0); 1004 break; 1005 1006 case TIOCGFLAGS: 1007 *(int *)data = sc->sc_swflags; 1008 break; 1009 1010 case TIOCSFLAGS: 1011 sc->sc_swflags = *(int *)data; 1012 break; 1013 1014 case TIOCMSET: 1015 case TIOCMBIS: 1016 case TIOCMBIC: 1017 tiocm_to_com(sc, cmd, *(int *)data); 1018 break; 1019 1020 case TIOCMGET: 1021 *(int *)data = com_to_tiocm(sc); 1022 break; 1023 1024 case PPS_IOC_CREATE: 1025 case PPS_IOC_DESTROY: 1026 case PPS_IOC_GETPARAMS: 1027 case PPS_IOC_SETPARAMS: 1028 case PPS_IOC_GETCAP: 1029 case PPS_IOC_FETCH: 1030 #ifdef PPS_SYNC 1031 case PPS_IOC_KCBIND: 1032 #endif 1033 error = pps_ioctl(cmd, data, &sc->sc_pps_state); 1034 break; 1035 1036 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1037 #ifndef PPS_TRAILING_EDGE 1038 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1039 &sc->sc_pps_state.ppsinfo.assert_timestamp); 1040 #else 1041 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1042 &sc->sc_pps_state.ppsinfo.clear_timestamp); 1043 #endif 1044 break; 1045 1046 default: 1047 error = EPASSTHROUGH; 1048 break; 1049 } 1050 1051 mutex_spin_exit(&sc->sc_lock); 1052 1053 #ifdef COM_DEBUG 1054 if (com_debug) 1055 comstatus(sc, "comioctl "); 1056 #endif 1057 1058 return (error); 1059 } 1060 1061 integrate void 1062 com_schedrx(struct com_softc *sc) 1063 { 1064 1065 sc->sc_rx_ready = 1; 1066 1067 /* Wake up the poller. */ 1068 softint_schedule(sc->sc_si); 1069 } 1070 1071 void 1072 com_break(struct com_softc *sc, int onoff) 1073 { 1074 1075 if (onoff) 1076 SET(sc->sc_lcr, LCR_SBREAK); 1077 else 1078 CLR(sc->sc_lcr, LCR_SBREAK); 1079 1080 if (!sc->sc_heldchange) { 1081 if (sc->sc_tx_busy) { 1082 sc->sc_heldtbc = sc->sc_tbc; 1083 sc->sc_tbc = 0; 1084 sc->sc_heldchange = 1; 1085 } else 1086 com_loadchannelregs(sc); 1087 } 1088 } 1089 1090 void 1091 com_modem(struct com_softc *sc, int onoff) 1092 { 1093 1094 if (sc->sc_mcr_dtr == 0) 1095 return; 1096 1097 if (onoff) 1098 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1099 else 1100 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1101 1102 if (!sc->sc_heldchange) { 1103 if (sc->sc_tx_busy) { 1104 sc->sc_heldtbc = sc->sc_tbc; 1105 sc->sc_tbc = 0; 1106 sc->sc_heldchange = 1; 1107 } else 1108 com_loadchannelregs(sc); 1109 } 1110 } 1111 1112 void 1113 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1114 { 1115 u_char combits; 1116 1117 combits = 0; 1118 if (ISSET(ttybits, TIOCM_DTR)) 1119 SET(combits, MCR_DTR); 1120 if (ISSET(ttybits, TIOCM_RTS)) 1121 SET(combits, MCR_RTS); 1122 1123 switch (how) { 1124 case TIOCMBIC: 1125 CLR(sc->sc_mcr, combits); 1126 break; 1127 1128 case TIOCMBIS: 1129 SET(sc->sc_mcr, combits); 1130 break; 1131 1132 case TIOCMSET: 1133 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1134 SET(sc->sc_mcr, combits); 1135 break; 1136 } 1137 1138 if (!sc->sc_heldchange) { 1139 if (sc->sc_tx_busy) { 1140 sc->sc_heldtbc = sc->sc_tbc; 1141 sc->sc_tbc = 0; 1142 sc->sc_heldchange = 1; 1143 } else 1144 com_loadchannelregs(sc); 1145 } 1146 } 1147 1148 int 1149 com_to_tiocm(struct com_softc *sc) 1150 { 1151 u_char combits; 1152 int ttybits = 0; 1153 1154 combits = sc->sc_mcr; 1155 if (ISSET(combits, MCR_DTR)) 1156 SET(ttybits, TIOCM_DTR); 1157 if (ISSET(combits, MCR_RTS)) 1158 SET(ttybits, TIOCM_RTS); 1159 1160 combits = sc->sc_msr; 1161 if (ISSET(combits, MSR_DCD)) 1162 SET(ttybits, TIOCM_CD); 1163 if (ISSET(combits, MSR_CTS)) 1164 SET(ttybits, TIOCM_CTS); 1165 if (ISSET(combits, MSR_DSR)) 1166 SET(ttybits, TIOCM_DSR); 1167 if (ISSET(combits, MSR_RI | MSR_TERI)) 1168 SET(ttybits, TIOCM_RI); 1169 1170 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1171 SET(ttybits, TIOCM_LE); 1172 1173 return (ttybits); 1174 } 1175 1176 static u_char 1177 cflag2lcr(tcflag_t cflag) 1178 { 1179 u_char lcr = 0; 1180 1181 switch (ISSET(cflag, CSIZE)) { 1182 case CS5: 1183 SET(lcr, LCR_5BITS); 1184 break; 1185 case CS6: 1186 SET(lcr, LCR_6BITS); 1187 break; 1188 case CS7: 1189 SET(lcr, LCR_7BITS); 1190 break; 1191 case CS8: 1192 SET(lcr, LCR_8BITS); 1193 break; 1194 } 1195 if (ISSET(cflag, PARENB)) { 1196 SET(lcr, LCR_PENAB); 1197 if (!ISSET(cflag, PARODD)) 1198 SET(lcr, LCR_PEVEN); 1199 } 1200 if (ISSET(cflag, CSTOPB)) 1201 SET(lcr, LCR_STOPB); 1202 1203 return (lcr); 1204 } 1205 1206 int 1207 comparam(struct tty *tp, struct termios *t) 1208 { 1209 struct com_softc *sc = 1210 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1211 int ospeed; 1212 u_char lcr; 1213 1214 if (COM_ISALIVE(sc) == 0) 1215 return (EIO); 1216 1217 #ifdef COM_HAYESP 1218 if (sc->sc_type == COM_TYPE_HAYESP) { 1219 int prescaler, speed; 1220 1221 /* 1222 * Calculate UART clock prescaler. It should be in 1223 * range of 0 .. 3. 1224 */ 1225 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1226 prescaler++, speed /= 2) 1227 if ((ospeed = comspeed(speed, sc->sc_frequency, 1228 sc->sc_type)) > 0) 1229 break; 1230 1231 if (prescaler == 4) 1232 return (EINVAL); 1233 sc->sc_prescaler = prescaler; 1234 } else 1235 #endif 1236 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1237 1238 /* Check requested parameters. */ 1239 if (ospeed < 0) 1240 return (EINVAL); 1241 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1242 return (EINVAL); 1243 1244 /* 1245 * For the console, always force CLOCAL and !HUPCL, so that the port 1246 * is always active. 1247 */ 1248 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1249 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1250 SET(t->c_cflag, CLOCAL); 1251 CLR(t->c_cflag, HUPCL); 1252 } 1253 1254 /* 1255 * If there were no changes, don't do anything. This avoids dropping 1256 * input and improves performance when all we did was frob things like 1257 * VMIN and VTIME. 1258 */ 1259 if (tp->t_ospeed == t->c_ospeed && 1260 tp->t_cflag == t->c_cflag) 1261 return (0); 1262 1263 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1264 1265 mutex_spin_enter(&sc->sc_lock); 1266 1267 sc->sc_lcr = lcr; 1268 1269 /* 1270 * If we're not in a mode that assumes a connection is present, then 1271 * ignore carrier changes. 1272 */ 1273 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1274 sc->sc_msr_dcd = 0; 1275 else 1276 sc->sc_msr_dcd = MSR_DCD; 1277 /* 1278 * Set the flow control pins depending on the current flow control 1279 * mode. 1280 */ 1281 if (ISSET(t->c_cflag, CRTSCTS)) { 1282 sc->sc_mcr_dtr = MCR_DTR; 1283 sc->sc_mcr_rts = MCR_RTS; 1284 sc->sc_msr_cts = MSR_CTS; 1285 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1286 } else if (ISSET(t->c_cflag, MDMBUF)) { 1287 /* 1288 * For DTR/DCD flow control, make sure we don't toggle DTR for 1289 * carrier detection. 1290 */ 1291 sc->sc_mcr_dtr = 0; 1292 sc->sc_mcr_rts = MCR_DTR; 1293 sc->sc_msr_cts = MSR_DCD; 1294 sc->sc_efr = 0; 1295 } else { 1296 /* 1297 * If no flow control, then always set RTS. This will make 1298 * the other side happy if it mistakenly thinks we're doing 1299 * RTS/CTS flow control. 1300 */ 1301 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1302 sc->sc_mcr_rts = 0; 1303 sc->sc_msr_cts = 0; 1304 sc->sc_efr = 0; 1305 if (ISSET(sc->sc_mcr, MCR_DTR)) 1306 SET(sc->sc_mcr, MCR_RTS); 1307 else 1308 CLR(sc->sc_mcr, MCR_RTS); 1309 } 1310 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1311 1312 #if 0 1313 if (ospeed == 0) 1314 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1315 else 1316 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1317 #endif 1318 1319 sc->sc_dlbl = ospeed; 1320 sc->sc_dlbh = ospeed >> 8; 1321 1322 /* 1323 * Set the FIFO threshold based on the receive speed. 1324 * 1325 * * If it's a low speed, it's probably a mouse or some other 1326 * interactive device, so set the threshold low. 1327 * * If it's a high speed, trim the trigger level down to prevent 1328 * overflows. 1329 * * Otherwise set it a bit higher. 1330 */ 1331 if (sc->sc_type == COM_TYPE_HAYESP) 1332 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1333 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1334 sc->sc_fifo = FIFO_ENABLE | 1335 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8); 1336 else 1337 sc->sc_fifo = 0; 1338 1339 /* And copy to tty. */ 1340 tp->t_ispeed = t->c_ospeed; 1341 tp->t_ospeed = t->c_ospeed; 1342 tp->t_cflag = t->c_cflag; 1343 1344 if (!sc->sc_heldchange) { 1345 if (sc->sc_tx_busy) { 1346 sc->sc_heldtbc = sc->sc_tbc; 1347 sc->sc_tbc = 0; 1348 sc->sc_heldchange = 1; 1349 } else 1350 com_loadchannelregs(sc); 1351 } 1352 1353 if (!ISSET(t->c_cflag, CHWFLOW)) { 1354 /* Disable the high water mark. */ 1355 sc->sc_r_hiwat = 0; 1356 sc->sc_r_lowat = 0; 1357 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1358 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1359 com_schedrx(sc); 1360 } 1361 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1362 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1363 com_hwiflow(sc); 1364 } 1365 } else { 1366 sc->sc_r_hiwat = com_rbuf_hiwat; 1367 sc->sc_r_lowat = com_rbuf_lowat; 1368 } 1369 1370 mutex_spin_exit(&sc->sc_lock); 1371 1372 /* 1373 * Update the tty layer's idea of the carrier bit, in case we changed 1374 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1375 * explicit request. 1376 */ 1377 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1378 1379 #ifdef COM_DEBUG 1380 if (com_debug) 1381 comstatus(sc, "comparam "); 1382 #endif 1383 1384 if (!ISSET(t->c_cflag, CHWFLOW)) { 1385 if (sc->sc_tx_stopped) { 1386 sc->sc_tx_stopped = 0; 1387 comstart(tp); 1388 } 1389 } 1390 1391 return (0); 1392 } 1393 1394 void 1395 com_iflush(struct com_softc *sc) 1396 { 1397 struct com_regs *regsp = &sc->sc_regs; 1398 #ifdef DIAGNOSTIC 1399 int reg; 1400 #endif 1401 int timo; 1402 1403 #ifdef DIAGNOSTIC 1404 reg = 0xffff; 1405 #endif 1406 timo = 50000; 1407 /* flush any pending I/O */ 1408 while (ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY) 1409 && --timo) 1410 #ifdef DIAGNOSTIC 1411 reg = 1412 #else 1413 (void) 1414 #endif 1415 CSR_READ_1(regsp, COM_REG_RXDATA); 1416 #ifdef DIAGNOSTIC 1417 if (!timo) 1418 aprint_error_dev(sc->sc_dev, "com_iflush timeout %02x\n", reg); 1419 #endif 1420 } 1421 1422 void 1423 com_loadchannelregs(struct com_softc *sc) 1424 { 1425 struct com_regs *regsp = &sc->sc_regs; 1426 1427 /* XXXXX necessary? */ 1428 com_iflush(sc); 1429 1430 if (sc->sc_type == COM_TYPE_PXA2x0) 1431 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 1432 else 1433 CSR_WRITE_1(regsp, COM_REG_IER, 0); 1434 1435 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1436 if (sc->sc_type != COM_TYPE_AU1x00) { /* no EFR on alchemy */ 1437 CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr); 1438 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 1439 } 1440 } 1441 if (sc->sc_type == COM_TYPE_AU1x00) { 1442 /* alchemy has single separate 16-bit clock divisor register */ 1443 CSR_WRITE_2(regsp, COM_REG_DLBL, sc->sc_dlbl + 1444 (sc->sc_dlbh << 8)); 1445 } else { 1446 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB); 1447 CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl); 1448 CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh); 1449 } 1450 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr); 1451 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active = sc->sc_mcr); 1452 CSR_WRITE_1(regsp, COM_REG_FIFO, sc->sc_fifo); 1453 #ifdef COM_HAYESP 1454 if (sc->sc_type == COM_TYPE_HAYESP) { 1455 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 1456 HAYESP_SETPRESCALER); 1457 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 1458 sc->sc_prescaler); 1459 } 1460 #endif 1461 1462 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1463 } 1464 1465 int 1466 comhwiflow(struct tty *tp, int block) 1467 { 1468 struct com_softc *sc = 1469 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1470 1471 if (COM_ISALIVE(sc) == 0) 1472 return (0); 1473 1474 if (sc->sc_mcr_rts == 0) 1475 return (0); 1476 1477 mutex_spin_enter(&sc->sc_lock); 1478 1479 if (block) { 1480 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1481 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1482 com_hwiflow(sc); 1483 } 1484 } else { 1485 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1486 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1487 com_schedrx(sc); 1488 } 1489 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1490 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1491 com_hwiflow(sc); 1492 } 1493 } 1494 1495 mutex_spin_exit(&sc->sc_lock); 1496 return (1); 1497 } 1498 1499 /* 1500 * (un)block input via hw flowcontrol 1501 */ 1502 void 1503 com_hwiflow(struct com_softc *sc) 1504 { 1505 struct com_regs *regsp= &sc->sc_regs; 1506 1507 if (sc->sc_mcr_rts == 0) 1508 return; 1509 1510 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1511 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1512 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1513 } else { 1514 SET(sc->sc_mcr, sc->sc_mcr_rts); 1515 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1516 } 1517 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active); 1518 } 1519 1520 1521 void 1522 comstart(struct tty *tp) 1523 { 1524 struct com_softc *sc = 1525 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1526 struct com_regs *regsp = &sc->sc_regs; 1527 int s; 1528 1529 if (COM_ISALIVE(sc) == 0) 1530 return; 1531 1532 s = spltty(); 1533 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1534 goto out; 1535 if (sc->sc_tx_stopped) 1536 goto out; 1537 if (!ttypull(tp)) 1538 goto out; 1539 1540 /* Grab the first contiguous region of buffer space. */ 1541 { 1542 u_char *tba; 1543 int tbc; 1544 1545 tba = tp->t_outq.c_cf; 1546 tbc = ndqb(&tp->t_outq, 0); 1547 1548 mutex_spin_enter(&sc->sc_lock); 1549 1550 sc->sc_tba = tba; 1551 sc->sc_tbc = tbc; 1552 } 1553 1554 SET(tp->t_state, TS_BUSY); 1555 sc->sc_tx_busy = 1; 1556 1557 /* Enable transmit completion interrupts if necessary. */ 1558 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1559 SET(sc->sc_ier, IER_ETXRDY); 1560 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1561 } 1562 1563 /* Output the first chunk of the contiguous buffer. */ 1564 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1565 u_int n; 1566 1567 n = sc->sc_tbc; 1568 if (n > sc->sc_fifolen) 1569 n = sc->sc_fifolen; 1570 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1571 sc->sc_tbc -= n; 1572 sc->sc_tba += n; 1573 } 1574 1575 mutex_spin_exit(&sc->sc_lock); 1576 out: 1577 splx(s); 1578 return; 1579 } 1580 1581 /* 1582 * Stop output on a line. 1583 */ 1584 void 1585 comstop(struct tty *tp, int flag) 1586 { 1587 struct com_softc *sc = 1588 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1589 1590 mutex_spin_enter(&sc->sc_lock); 1591 if (ISSET(tp->t_state, TS_BUSY)) { 1592 /* Stop transmitting at the next chunk. */ 1593 sc->sc_tbc = 0; 1594 sc->sc_heldtbc = 0; 1595 if (!ISSET(tp->t_state, TS_TTSTOP)) 1596 SET(tp->t_state, TS_FLUSH); 1597 } 1598 mutex_spin_exit(&sc->sc_lock); 1599 } 1600 1601 void 1602 comdiag(void *arg) 1603 { 1604 struct com_softc *sc = arg; 1605 int overflows, floods; 1606 1607 mutex_spin_enter(&sc->sc_lock); 1608 overflows = sc->sc_overflows; 1609 sc->sc_overflows = 0; 1610 floods = sc->sc_floods; 1611 sc->sc_floods = 0; 1612 sc->sc_errors = 0; 1613 mutex_spin_exit(&sc->sc_lock); 1614 1615 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1616 device_xname(sc->sc_dev), 1617 overflows, overflows == 1 ? "" : "s", 1618 floods, floods == 1 ? "" : "s"); 1619 } 1620 1621 integrate void 1622 com_rxsoft(struct com_softc *sc, struct tty *tp) 1623 { 1624 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1625 u_char *get, *end; 1626 u_int cc, scc; 1627 u_char lsr; 1628 int code; 1629 1630 end = sc->sc_ebuf; 1631 get = sc->sc_rbget; 1632 scc = cc = com_rbuf_size - sc->sc_rbavail; 1633 1634 if (cc == com_rbuf_size) { 1635 sc->sc_floods++; 1636 if (sc->sc_errors++ == 0) 1637 callout_reset(&sc->sc_diag_callout, 60 * hz, 1638 comdiag, sc); 1639 } 1640 1641 /* If not yet open, drop the entire buffer content here */ 1642 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1643 get += cc << 1; 1644 if (get >= end) 1645 get -= com_rbuf_size << 1; 1646 cc = 0; 1647 } 1648 while (cc) { 1649 code = get[0]; 1650 lsr = get[1]; 1651 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1652 if (ISSET(lsr, LSR_OE)) { 1653 sc->sc_overflows++; 1654 if (sc->sc_errors++ == 0) 1655 callout_reset(&sc->sc_diag_callout, 1656 60 * hz, comdiag, sc); 1657 } 1658 if (ISSET(lsr, LSR_BI | LSR_FE)) 1659 SET(code, TTY_FE); 1660 if (ISSET(lsr, LSR_PE)) 1661 SET(code, TTY_PE); 1662 } 1663 if ((*rint)(code, tp) == -1) { 1664 /* 1665 * The line discipline's buffer is out of space. 1666 */ 1667 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1668 /* 1669 * We're either not using flow control, or the 1670 * line discipline didn't tell us to block for 1671 * some reason. Either way, we have no way to 1672 * know when there's more space available, so 1673 * just drop the rest of the data. 1674 */ 1675 get += cc << 1; 1676 if (get >= end) 1677 get -= com_rbuf_size << 1; 1678 cc = 0; 1679 } else { 1680 /* 1681 * Don't schedule any more receive processing 1682 * until the line discipline tells us there's 1683 * space available (through comhwiflow()). 1684 * Leave the rest of the data in the input 1685 * buffer. 1686 */ 1687 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1688 } 1689 break; 1690 } 1691 get += 2; 1692 if (get >= end) 1693 get = sc->sc_rbuf; 1694 cc--; 1695 } 1696 1697 if (cc != scc) { 1698 sc->sc_rbget = get; 1699 mutex_spin_enter(&sc->sc_lock); 1700 1701 cc = sc->sc_rbavail += scc - cc; 1702 /* Buffers should be ok again, release possible block. */ 1703 if (cc >= sc->sc_r_lowat) { 1704 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1705 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1706 SET(sc->sc_ier, IER_ERXRDY); 1707 #ifdef COM_PXA2X0 1708 if (sc->sc_type == COM_TYPE_PXA2x0) 1709 SET(sc->sc_ier, IER_ERXTOUT); 1710 #endif 1711 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 1712 } 1713 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1714 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1715 com_hwiflow(sc); 1716 } 1717 } 1718 mutex_spin_exit(&sc->sc_lock); 1719 } 1720 } 1721 1722 integrate void 1723 com_txsoft(struct com_softc *sc, struct tty *tp) 1724 { 1725 1726 CLR(tp->t_state, TS_BUSY); 1727 if (ISSET(tp->t_state, TS_FLUSH)) 1728 CLR(tp->t_state, TS_FLUSH); 1729 else 1730 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1731 (*tp->t_linesw->l_start)(tp); 1732 } 1733 1734 integrate void 1735 com_stsoft(struct com_softc *sc, struct tty *tp) 1736 { 1737 u_char msr, delta; 1738 1739 mutex_spin_enter(&sc->sc_lock); 1740 msr = sc->sc_msr; 1741 delta = sc->sc_msr_delta; 1742 sc->sc_msr_delta = 0; 1743 mutex_spin_exit(&sc->sc_lock); 1744 1745 if (ISSET(delta, sc->sc_msr_dcd)) { 1746 /* 1747 * Inform the tty layer that carrier detect changed. 1748 */ 1749 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1750 } 1751 1752 if (ISSET(delta, sc->sc_msr_cts)) { 1753 /* Block or unblock output according to flow control. */ 1754 if (ISSET(msr, sc->sc_msr_cts)) { 1755 sc->sc_tx_stopped = 0; 1756 (*tp->t_linesw->l_start)(tp); 1757 } else { 1758 sc->sc_tx_stopped = 1; 1759 } 1760 } 1761 1762 #ifdef COM_DEBUG 1763 if (com_debug) 1764 comstatus(sc, "com_stsoft"); 1765 #endif 1766 } 1767 1768 void 1769 comsoft(void *arg) 1770 { 1771 struct com_softc *sc = arg; 1772 struct tty *tp; 1773 1774 if (COM_ISALIVE(sc) == 0) 1775 return; 1776 1777 tp = sc->sc_tty; 1778 1779 if (sc->sc_rx_ready) { 1780 sc->sc_rx_ready = 0; 1781 com_rxsoft(sc, tp); 1782 } 1783 1784 if (sc->sc_st_check) { 1785 sc->sc_st_check = 0; 1786 com_stsoft(sc, tp); 1787 } 1788 1789 if (sc->sc_tx_done) { 1790 sc->sc_tx_done = 0; 1791 com_txsoft(sc, tp); 1792 } 1793 } 1794 1795 int 1796 comintr(void *arg) 1797 { 1798 struct com_softc *sc = arg; 1799 struct com_regs *regsp = &sc->sc_regs; 1800 1801 u_char *put, *end; 1802 u_int cc; 1803 u_char lsr, iir; 1804 1805 if (COM_ISALIVE(sc) == 0) 1806 return (0); 1807 1808 mutex_spin_enter(&sc->sc_lock); 1809 iir = CSR_READ_1(regsp, COM_REG_IIR); 1810 if (ISSET(iir, IIR_NOPEND)) { 1811 mutex_spin_exit(&sc->sc_lock); 1812 return (0); 1813 } 1814 1815 end = sc->sc_ebuf; 1816 put = sc->sc_rbput; 1817 cc = sc->sc_rbavail; 1818 1819 again: do { 1820 u_char msr, delta; 1821 1822 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1823 if (ISSET(lsr, LSR_BI)) { 1824 int cn_trapped = 0; 1825 1826 cn_check_magic(sc->sc_tty->t_dev, 1827 CNC_BREAK, com_cnm_state); 1828 if (cn_trapped) 1829 continue; 1830 #if defined(KGDB) && !defined(DDB) 1831 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1832 kgdb_connect(1); 1833 continue; 1834 } 1835 #endif 1836 } 1837 1838 if (ISSET(lsr, LSR_RCV_MASK) && 1839 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1840 while (cc > 0) { 1841 int cn_trapped = 0; 1842 put[0] = CSR_READ_1(regsp, COM_REG_RXDATA); 1843 put[1] = lsr; 1844 cn_check_magic(sc->sc_tty->t_dev, 1845 put[0], com_cnm_state); 1846 if (cn_trapped) 1847 goto next; 1848 put += 2; 1849 if (put >= end) 1850 put = sc->sc_rbuf; 1851 cc--; 1852 next: 1853 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1854 if (!ISSET(lsr, LSR_RCV_MASK)) 1855 break; 1856 } 1857 1858 /* 1859 * Current string of incoming characters ended because 1860 * no more data was available or we ran out of space. 1861 * Schedule a receive event if any data was received. 1862 * If we're out of space, turn off receive interrupts. 1863 */ 1864 sc->sc_rbput = put; 1865 sc->sc_rbavail = cc; 1866 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1867 sc->sc_rx_ready = 1; 1868 1869 /* 1870 * See if we are in danger of overflowing a buffer. If 1871 * so, use hardware flow control to ease the pressure. 1872 */ 1873 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1874 cc < sc->sc_r_hiwat) { 1875 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1876 com_hwiflow(sc); 1877 } 1878 1879 /* 1880 * If we're out of space, disable receive interrupts 1881 * until the queue has drained a bit. 1882 */ 1883 if (!cc) { 1884 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1885 #ifdef COM_PXA2X0 1886 if (sc->sc_type == COM_TYPE_PXA2x0) 1887 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 1888 else 1889 #endif 1890 CLR(sc->sc_ier, IER_ERXRDY); 1891 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1892 } 1893 } else { 1894 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 1895 (void) CSR_READ_1(regsp, COM_REG_RXDATA); 1896 continue; 1897 } 1898 } 1899 1900 msr = CSR_READ_1(regsp, COM_REG_MSR); 1901 delta = msr ^ sc->sc_msr; 1902 sc->sc_msr = msr; 1903 if ((sc->sc_pps_state.ppsparam.mode & PPS_CAPTUREBOTH) && 1904 (delta & MSR_DCD)) { 1905 pps_capture(&sc->sc_pps_state); 1906 pps_event(&sc->sc_pps_state, 1907 (msr & MSR_DCD) ? 1908 PPS_CAPTUREASSERT : 1909 PPS_CAPTURECLEAR); 1910 } 1911 1912 /* 1913 * Process normal status changes 1914 */ 1915 if (ISSET(delta, sc->sc_msr_mask)) { 1916 SET(sc->sc_msr_delta, delta); 1917 1918 /* 1919 * Stop output immediately if we lose the output 1920 * flow control signal or carrier detect. 1921 */ 1922 if (ISSET(~msr, sc->sc_msr_mask)) { 1923 sc->sc_tbc = 0; 1924 sc->sc_heldtbc = 0; 1925 #ifdef COM_DEBUG 1926 if (com_debug) 1927 comstatus(sc, "comintr "); 1928 #endif 1929 } 1930 1931 sc->sc_st_check = 1; 1932 } 1933 } while (!ISSET((iir = 1934 CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND) && 1935 /* 1936 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 1937 * by IIR read, so we can't do this way: `process all interrupts, 1938 * then do TX if possble'. 1939 */ 1940 (iir & IIR_IMASK) != IIR_TXRDY); 1941 1942 /* 1943 * Read LSR again, since there may be an interrupt between 1944 * the last LSR read and IIR read above. 1945 */ 1946 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1947 1948 /* 1949 * See if data can be transmitted as well. 1950 * Schedule tx done event if no data left 1951 * and tty was marked busy. 1952 */ 1953 if (ISSET(lsr, LSR_TXRDY)) { 1954 /* 1955 * If we've delayed a parameter change, do it now, and restart 1956 * output. 1957 */ 1958 if (sc->sc_heldchange) { 1959 com_loadchannelregs(sc); 1960 sc->sc_heldchange = 0; 1961 sc->sc_tbc = sc->sc_heldtbc; 1962 sc->sc_heldtbc = 0; 1963 } 1964 1965 /* Output the next chunk of the contiguous buffer, if any. */ 1966 if (sc->sc_tbc > 0) { 1967 u_int n; 1968 1969 n = sc->sc_tbc; 1970 if (n > sc->sc_fifolen) 1971 n = sc->sc_fifolen; 1972 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1973 sc->sc_tbc -= n; 1974 sc->sc_tba += n; 1975 } else { 1976 /* Disable transmit completion interrupts if necessary. */ 1977 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1978 CLR(sc->sc_ier, IER_ETXRDY); 1979 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1980 } 1981 if (sc->sc_tx_busy) { 1982 sc->sc_tx_busy = 0; 1983 sc->sc_tx_done = 1; 1984 } 1985 } 1986 } 1987 1988 if (!ISSET((iir = CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND)) 1989 goto again; 1990 1991 mutex_spin_exit(&sc->sc_lock); 1992 1993 /* Wake up the poller. */ 1994 softint_schedule(sc->sc_si); 1995 1996 #if NRND > 0 && defined(RND_COM) 1997 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1998 #endif 1999 2000 return (1); 2001 } 2002 2003 /* 2004 * The following functions are polled getc and putc routines, shared 2005 * by the console and kgdb glue. 2006 * 2007 * The read-ahead code is so that you can detect pending in-band 2008 * cn_magic in polled mode while doing output rather than having to 2009 * wait until the kernel decides it needs input. 2010 */ 2011 2012 #define MAX_READAHEAD 20 2013 static int com_readahead[MAX_READAHEAD]; 2014 static int com_readaheadcount = 0; 2015 2016 int 2017 com_common_getc(dev_t dev, struct com_regs *regsp) 2018 { 2019 int s = splserial(); 2020 u_char stat, c; 2021 2022 /* got a character from reading things earlier */ 2023 if (com_readaheadcount > 0) { 2024 int i; 2025 2026 c = com_readahead[0]; 2027 for (i = 1; i < com_readaheadcount; i++) { 2028 com_readahead[i-1] = com_readahead[i]; 2029 } 2030 com_readaheadcount--; 2031 splx(s); 2032 return (c); 2033 } 2034 2035 /* block until a character becomes available */ 2036 while (!ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) 2037 ; 2038 2039 c = CSR_READ_1(regsp, COM_REG_RXDATA); 2040 stat = CSR_READ_1(regsp, COM_REG_IIR); 2041 { 2042 int cn_trapped = 0; /* unused */ 2043 #ifdef DDB 2044 extern int db_active; 2045 if (!db_active) 2046 #endif 2047 cn_check_magic(dev, c, com_cnm_state); 2048 } 2049 splx(s); 2050 return (c); 2051 } 2052 2053 void 2054 com_common_putc(dev_t dev, struct com_regs *regsp, int c) 2055 { 2056 int s = splserial(); 2057 int cin, stat, timo; 2058 2059 if (com_readaheadcount < MAX_READAHEAD 2060 && ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) { 2061 int cn_trapped = 0; 2062 cin = CSR_READ_1(regsp, COM_REG_RXDATA); 2063 stat = CSR_READ_1(regsp, COM_REG_IIR); 2064 cn_check_magic(dev, cin, com_cnm_state); 2065 com_readahead[com_readaheadcount++] = cin; 2066 } 2067 2068 /* wait for any pending transmission to finish */ 2069 timo = 150000; 2070 while (!ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_TXRDY) && --timo) 2071 continue; 2072 2073 CSR_WRITE_1(regsp, COM_REG_TXDATA, c); 2074 COM_BARRIER(regsp, BR | BW); 2075 2076 splx(s); 2077 } 2078 2079 /* 2080 * Initialize UART for use as console or KGDB line. 2081 */ 2082 int 2083 cominit(struct com_regs *regsp, int rate, int frequency, int type, 2084 tcflag_t cflag) 2085 { 2086 2087 if (bus_space_map(regsp->cr_iot, regsp->cr_iobase, regsp->cr_nports, 0, 2088 ®sp->cr_ioh)) 2089 return (ENOMEM); /* ??? */ 2090 2091 rate = comspeed(rate, frequency, type); 2092 if (type != COM_TYPE_AU1x00) { 2093 /* no EFR on alchemy */ 2094 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 2095 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 2096 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_DLAB); 2097 CSR_WRITE_1(regsp, COM_REG_DLBL, rate & 0xff); 2098 CSR_WRITE_1(regsp, COM_REG_DLBH, rate >> 8); 2099 } else { 2100 CSR_WRITE_1(regsp, COM_REG_DLBL, rate); 2101 } 2102 CSR_WRITE_1(regsp, COM_REG_LCR, cflag2lcr(cflag)); 2103 CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS); 2104 CSR_WRITE_1(regsp, COM_REG_FIFO, 2105 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2106 #ifdef COM_PXA2X0 2107 if (type == COM_TYPE_PXA2x0) 2108 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 2109 else 2110 #endif 2111 CSR_WRITE_1(regsp, COM_REG_IER, 0); 2112 2113 return (0); 2114 } 2115 2116 /* 2117 * Following are all routines needed for COM to act as console 2118 */ 2119 struct consdev comcons = { 2120 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2121 NODEV, CN_NORMAL 2122 }; 2123 2124 2125 int 2126 comcnattach1(struct com_regs *regsp, int rate, int frequency, int type, 2127 tcflag_t cflag) 2128 { 2129 int res; 2130 2131 comconsregs = *regsp; 2132 2133 res = cominit(&comconsregs, rate, frequency, type, cflag); 2134 if (res) 2135 return (res); 2136 2137 cn_tab = &comcons; 2138 cn_init_magic(&com_cnm_state); 2139 cn_set_magic("\047\001"); /* default magic is BREAK */ 2140 2141 comconsrate = rate; 2142 comconscflag = cflag; 2143 2144 return (0); 2145 } 2146 2147 int 2148 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2149 int type, tcflag_t cflag) 2150 { 2151 struct com_regs regs; 2152 2153 memset(®s, 0, sizeof regs); 2154 regs.cr_iot = iot; 2155 regs.cr_iobase = iobase; 2156 regs.cr_nports = COM_NPORTS; 2157 #ifdef COM_REGMAP 2158 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2159 #endif 2160 2161 return comcnattach1(®s, rate, frequency, type, cflag); 2162 } 2163 2164 int 2165 comcngetc(dev_t dev) 2166 { 2167 2168 return (com_common_getc(dev, &comconsregs)); 2169 } 2170 2171 /* 2172 * Console kernel output character routine. 2173 */ 2174 void 2175 comcnputc(dev_t dev, int c) 2176 { 2177 2178 com_common_putc(dev, &comconsregs, c); 2179 } 2180 2181 void 2182 comcnpollc(dev_t dev, int on) 2183 { 2184 2185 } 2186 2187 #ifdef KGDB 2188 int 2189 com_kgdb_attach1(struct com_regs *regsp, int rate, int frequency, int type, 2190 tcflag_t cflag) 2191 { 2192 int res; 2193 2194 if (regsp->cr_iot == comconsregs.cr_iot && 2195 regsp->cr_iobase == comconsregs.cr_iobase) { 2196 #if !defined(DDB) 2197 return (EBUSY); /* cannot share with console */ 2198 #else 2199 comkgdbregs = *regsp; 2200 comkgdbregs.cr_ioh = comconsregs.cr_ioh; 2201 #endif 2202 } else { 2203 comkgdbregs = *regsp; 2204 res = cominit(&comkgdbregs, rate, frequency, type, cflag); 2205 if (res) 2206 return (res); 2207 2208 /* 2209 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2210 * expects this to be initialized 2211 */ 2212 cn_init_magic(&com_cnm_state); 2213 cn_set_magic("\047\001"); 2214 } 2215 2216 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2217 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2218 2219 return (0); 2220 } 2221 2222 int 2223 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2224 int frequency, int type, tcflag_t cflag) 2225 { 2226 struct com_regs regs; 2227 2228 regs.cr_iot = iot; 2229 regs.cr_nports = COM_NPORTS; 2230 regs.cr_iobase = iobase; 2231 #ifdef COM_REGMAP 2232 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2233 #endif 2234 2235 return com_kgdb_attach1(®s, rate, frequency, type, cflag); 2236 } 2237 2238 /* ARGSUSED */ 2239 int 2240 com_kgdb_getc(void *arg) 2241 { 2242 2243 return (com_common_getc(NODEV, &comkgdbregs)); 2244 } 2245 2246 /* ARGSUSED */ 2247 void 2248 com_kgdb_putc(void *arg, int c) 2249 { 2250 2251 com_common_putc(NODEV, &comkgdbregs, c); 2252 } 2253 #endif /* KGDB */ 2254 2255 /* helper function to identify the com ports used by 2256 console or KGDB (and not yet autoconf attached) */ 2257 int 2258 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2259 { 2260 bus_space_handle_t help; 2261 2262 if (!comconsattached && 2263 iot == comconsregs.cr_iot && iobase == comconsregs.cr_iobase) 2264 help = comconsregs.cr_ioh; 2265 #ifdef KGDB 2266 else if (!com_kgdb_attached && 2267 iot == comkgdbregs.cr_iot && iobase == comkgdbregs.cr_iobase) 2268 help = comkgdbregs.cr_ioh; 2269 #endif 2270 else 2271 return (0); 2272 2273 if (ioh) 2274 *ioh = help; 2275 return (1); 2276 } 2277 2278 /* 2279 * this routine exists to serve as a shutdown hook for systems that 2280 * have firmware which doesn't interact properly with a com device in 2281 * FIFO mode. 2282 */ 2283 bool 2284 com_cleanup(device_t self, int how) 2285 { 2286 struct com_softc *sc = device_private(self); 2287 2288 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 2289 CSR_WRITE_1(&sc->sc_regs, COM_REG_FIFO, 0); 2290 2291 return true; 2292 } 2293 2294 bool 2295 com_suspend(device_t self PMF_FN_ARGS) 2296 { 2297 struct com_softc *sc = device_private(self); 2298 2299 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, 0); 2300 (void)CSR_READ_1(&sc->sc_regs, COM_REG_IIR); 2301 2302 return true; 2303 } 2304 2305 bool 2306 com_resume(device_t self PMF_FN_ARGS) 2307 { 2308 struct com_softc *sc = device_private(self); 2309 2310 mutex_spin_enter(&sc->sc_lock); 2311 com_loadchannelregs(sc); 2312 mutex_spin_exit(&sc->sc_lock); 2313 2314 return true; 2315 } 2316
Indexes created Wed Sep 24 05:09:52 GMT 2025