com.c revision 1.279
1 /* $NetBSD: com.c,v 1.279 2008/04/21 12:56:31 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.279 2008/04/21 12:56:31 ad Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 #include <sys/kauth.h> 125 #include <sys/intr.h> 126 127 #include <sys/bus.h> 128 129 #include <dev/ic/comreg.h> 130 #include <dev/ic/comvar.h> 131 #include <dev/ic/ns16550reg.h> 132 #include <dev/ic/st16650reg.h> 133 #ifdef COM_HAYESP 134 #include <dev/ic/hayespreg.h> 135 #endif 136 #define com_lcr com_cfcr 137 #include <dev/cons.h> 138 139 #ifdef COM_REGMAP 140 #define CSR_WRITE_1(r, o, v) \ 141 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 142 #define CSR_READ_1(r, o) \ 143 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 144 #define CSR_WRITE_2(r, o, v) \ 145 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 146 #define CSR_READ_2(r, o) \ 147 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 148 #define CSR_WRITE_MULTI(r, o, p, n) \ 149 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], p, n) 150 #else 151 #define CSR_WRITE_1(r, o, v) \ 152 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, o, v) 153 #define CSR_READ_1(r, o) \ 154 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, o) 155 #define CSR_WRITE_2(r, o, v) \ 156 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, o, v) 157 #define CSR_READ_2(r, o) \ 158 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, o) 159 #define CSR_WRITE_MULTI(r, o, p, n) \ 160 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, o, p, n) 161 #endif 162 163 164 static void com_enable_debugport(struct com_softc *); 165 166 void com_config(struct com_softc *); 167 void com_shutdown(struct com_softc *); 168 int comspeed(long, long, int); 169 static u_char cflag2lcr(tcflag_t); 170 int comparam(struct tty *, struct termios *); 171 void comstart(struct tty *); 172 int comhwiflow(struct tty *, int); 173 174 void com_loadchannelregs(struct com_softc *); 175 void com_hwiflow(struct com_softc *); 176 void com_break(struct com_softc *, int); 177 void com_modem(struct com_softc *, int); 178 void tiocm_to_com(struct com_softc *, u_long, int); 179 int com_to_tiocm(struct com_softc *); 180 void com_iflush(struct com_softc *); 181 182 int com_common_getc(dev_t, struct com_regs *); 183 void com_common_putc(dev_t, struct com_regs *, int); 184 185 int cominit(struct com_regs *, int, int, int, tcflag_t); 186 187 int comcngetc(dev_t); 188 void comcnputc(dev_t, int); 189 void comcnpollc(dev_t, int); 190 191 #define integrate static inline 192 void comsoft(void *); 193 integrate void com_rxsoft(struct com_softc *, struct tty *); 194 integrate void com_txsoft(struct com_softc *, struct tty *); 195 integrate void com_stsoft(struct com_softc *, struct tty *); 196 integrate void com_schedrx(struct com_softc *); 197 void comdiag(void *); 198 199 extern struct cfdriver com_cd; 200 201 dev_type_open(comopen); 202 dev_type_close(comclose); 203 dev_type_read(comread); 204 dev_type_write(comwrite); 205 dev_type_ioctl(comioctl); 206 dev_type_stop(comstop); 207 dev_type_tty(comtty); 208 dev_type_poll(compoll); 209 210 const struct cdevsw com_cdevsw = { 211 comopen, comclose, comread, comwrite, comioctl, 212 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 213 }; 214 215 /* 216 * Make this an option variable one can patch. 217 * But be warned: this must be a power of 2! 218 */ 219 u_int com_rbuf_size = COM_RING_SIZE; 220 221 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 222 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 223 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 224 225 static struct com_regs comconsregs; 226 static int comconsattached; 227 static int comconsrate; 228 static tcflag_t comconscflag; 229 static struct cnm_state com_cnm_state; 230 231 #ifdef KGDB 232 #include <sys/kgdb.h> 233 234 static struct com_regs comkgdbregs; 235 static int com_kgdb_attached; 236 237 int com_kgdb_getc(void *); 238 void com_kgdb_putc(void *, int); 239 #endif /* KGDB */ 240 241 #ifdef COM_REGMAP 242 /* initializer for typical 16550-ish hardware */ 243 #define COM_REG_16550 { \ 244 com_data, com_data, com_dlbl, com_dlbh, com_ier, com_iir, com_fifo, \ 245 com_efr, com_lcr, com_mcr, com_lsr, com_msr } 246 247 const bus_size_t com_std_map[16] = COM_REG_16550; 248 #endif /* COM_REGMAP */ 249 250 #define COMUNIT_MASK 0x7ffff 251 #define COMDIALOUT_MASK 0x80000 252 253 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 254 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 255 256 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 257 device_is_active((sc)->sc_dev)) 258 259 #define BR BUS_SPACE_BARRIER_READ 260 #define BW BUS_SPACE_BARRIER_WRITE 261 #define COM_BARRIER(r, f) \ 262 bus_space_barrier((r)->cr_iot, (r)->cr_ioh, 0, (r)->cr_nports, (f)) 263 264 /*ARGSUSED*/ 265 int 266 comspeed(long speed, long frequency, int type) 267 { 268 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 269 270 int x, err; 271 272 #if 0 273 if (speed == 0) 274 return (0); 275 #endif 276 if (speed <= 0) 277 return (-1); 278 x = divrnd(frequency / 16, speed); 279 if (x <= 0) 280 return (-1); 281 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 282 if (err < 0) 283 err = -err; 284 if (err > COM_TOLERANCE) 285 return (-1); 286 return (x); 287 288 #undef divrnd 289 } 290 291 #ifdef COM_DEBUG 292 int com_debug = 0; 293 294 void comstatus(struct com_softc *, const char *); 295 void 296 comstatus(struct com_softc *sc, const char *str) 297 { 298 struct tty *tp = sc->sc_tty; 299 300 aprint_normal_dev(sc->sc_dev, 301 "%s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 302 str, 303 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 304 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 305 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 306 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 307 sc->sc_tx_stopped ? '+' : '-'); 308 309 aprint_normal_dev(sc->sc_dev, 310 "%s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 311 str, 312 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 313 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 314 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 315 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 316 sc->sc_rx_flags); 317 } 318 #endif 319 320 int 321 com_probe_subr(struct com_regs *regs) 322 { 323 324 /* force access to id reg */ 325 CSR_WRITE_1(regs, COM_REG_LCR, LCR_8BITS); 326 CSR_WRITE_1(regs, COM_REG_IIR, 0); 327 if ((CSR_READ_1(regs, COM_REG_LCR) != LCR_8BITS) || 328 (CSR_READ_1(regs, COM_REG_IIR) & 0x38)) 329 return (0); 330 331 return (1); 332 } 333 334 int 335 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 336 { 337 struct com_regs regs; 338 339 regs.cr_iot = iot; 340 regs.cr_ioh = ioh; 341 #ifdef COM_REGMAP 342 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map));; 343 #endif 344 345 return com_probe_subr(®s); 346 } 347 348 /* 349 * No locking in this routine; it is only called during attach, 350 * or with the port already locked. 351 */ 352 static void 353 com_enable_debugport(struct com_softc *sc) 354 { 355 356 /* Turn on line break interrupt, set carrier. */ 357 sc->sc_ier = IER_ERXRDY; 358 if (sc->sc_type == COM_TYPE_PXA2x0) 359 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 360 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 361 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 362 CSR_WRITE_1(&sc->sc_regs, COM_REG_MCR, sc->sc_mcr); 363 } 364 365 void 366 com_attach_subr(struct com_softc *sc) 367 { 368 struct com_regs *regsp = &sc->sc_regs; 369 struct tty *tp; 370 #ifdef COM_16650 371 u_int8_t lcr; 372 #endif 373 const char *fifo_msg = NULL; 374 375 aprint_naive("\n"); 376 377 callout_init(&sc->sc_diag_callout, 0); 378 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 379 380 /* Disable interrupts before configuring the device. */ 381 if (sc->sc_type == COM_TYPE_PXA2x0) 382 sc->sc_ier = IER_EUART; 383 else 384 sc->sc_ier = 0; 385 386 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 387 388 if (regsp->cr_iot == comconsregs.cr_iot && 389 regsp->cr_iobase == comconsregs.cr_iobase) { 390 comconsattached = 1; 391 392 /* Make sure the console is always "hardwired". */ 393 delay(10000); /* wait for output to finish */ 394 SET(sc->sc_hwflags, COM_HW_CONSOLE); 395 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 396 } 397 398 /* Probe for FIFO */ 399 switch (sc->sc_type) { 400 case COM_TYPE_HAYESP: 401 goto fifodone; 402 403 case COM_TYPE_AU1x00: 404 sc->sc_fifolen = 16; 405 fifo_msg = "Au1X00 UART, working fifo"; 406 SET(sc->sc_hwflags, COM_HW_FIFO); 407 goto fifodelay; 408 } 409 410 sc->sc_fifolen = 1; 411 /* look for a NS 16550AF UART with FIFOs */ 412 CSR_WRITE_1(regsp, COM_REG_FIFO, 413 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 414 delay(100); 415 if (ISSET(CSR_READ_1(regsp, COM_REG_IIR), IIR_FIFO_MASK) 416 == IIR_FIFO_MASK) 417 if (ISSET(CSR_READ_1(regsp, COM_REG_FIFO), FIFO_TRIGGER_14) 418 == FIFO_TRIGGER_14) { 419 SET(sc->sc_hwflags, COM_HW_FIFO); 420 421 #ifdef COM_16650 422 /* 423 * IIR changes into the EFR if LCR is set to LCR_EERS 424 * on 16650s. We also know IIR != 0 at this point. 425 * Write 0 into the EFR, and read it. If the result 426 * is 0, we have a 16650. 427 * 428 * Older 16650s were broken; the test to detect them 429 * is taken from the Linux driver. Apparently 430 * setting DLAB enable gives access to the EFR on 431 * these chips. 432 */ 433 lcr = CSR_READ_1(regsp, COM_REG_LCR); 434 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 435 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 436 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 437 CSR_WRITE_1(regsp, COM_REG_LCR, 438 lcr | LCR_DLAB); 439 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 440 CLR(sc->sc_hwflags, COM_HW_FIFO); 441 sc->sc_fifolen = 0; 442 } else { 443 SET(sc->sc_hwflags, COM_HW_FLOW); 444 sc->sc_fifolen = 32; 445 } 446 } else 447 #endif 448 sc->sc_fifolen = 16; 449 450 #ifdef COM_16650 451 CSR_WRITE_1(regsp, COM_REG_LCR, lcr); 452 if (sc->sc_fifolen == 0) 453 fifo_msg = "st16650, broken fifo"; 454 else if (sc->sc_fifolen == 32) 455 fifo_msg = "st16650a, working fifo"; 456 else 457 #endif 458 fifo_msg = "ns16550a, working fifo"; 459 } else 460 fifo_msg = "ns16550, broken fifo"; 461 else 462 fifo_msg = "ns8250 or ns16450, no fifo"; 463 CSR_WRITE_1(regsp, COM_REG_FIFO, 0); 464 fifodelay: 465 /* 466 * Some chips will clear down both Tx and Rx FIFOs when zero is 467 * written to com_fifo. If this chip is the console, writing zero 468 * results in some of the chip/FIFO description being lost, so delay 469 * printing it until now. 470 */ 471 delay(10); 472 aprint_normal(": %s\n", fifo_msg); 473 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 474 sc->sc_fifolen = 1; 475 aprint_normal_dev(sc->sc_dev, "txfifo disabled\n"); 476 } 477 478 fifodone: 479 480 tp = ttymalloc(); 481 tp->t_oproc = comstart; 482 tp->t_param = comparam; 483 tp->t_hwiflow = comhwiflow; 484 485 sc->sc_tty = tp; 486 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 487 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 488 sc->sc_rbavail = com_rbuf_size; 489 if (sc->sc_rbuf == NULL) { 490 aprint_error_dev(sc->sc_dev, 491 "unable to allocate ring buffer\n"); 492 return; 493 } 494 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 495 496 tty_attach(tp); 497 498 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 499 SET(sc->sc_mcr, MCR_IENABLE); 500 501 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 502 int maj; 503 504 /* locate the major number */ 505 maj = cdevsw_lookup_major(&com_cdevsw); 506 507 tp->t_dev = cn_tab->cn_dev = makedev(maj, 508 device_unit(sc->sc_dev)); 509 510 aprint_normal_dev(sc->sc_dev, "console\n"); 511 } 512 513 #ifdef KGDB 514 /* 515 * Allow kgdb to "take over" this port. If this is 516 * not the console and is the kgdb device, it has 517 * exclusive use. If it's the console _and_ the 518 * kgdb device, it doesn't. 519 */ 520 if (regsp->cr_iot == comkgdbregs.cr_iot && 521 regsp->cr_iobase == comkgdbregs.cr_iobase) { 522 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 523 com_kgdb_attached = 1; 524 525 SET(sc->sc_hwflags, COM_HW_KGDB); 526 } 527 aprint_normal_dev(sc->sc_dev, "kgdb\n"); 528 } 529 #endif 530 531 sc->sc_si = softint_establish(SOFTINT_SERIAL, comsoft, sc); 532 533 #if NRND > 0 && defined(RND_COM) 534 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 535 RND_TYPE_TTY, 0); 536 #endif 537 538 /* if there are no enable/disable functions, assume the device 539 is always enabled */ 540 if (!sc->enable) 541 sc->enabled = 1; 542 543 com_config(sc); 544 545 SET(sc->sc_hwflags, COM_HW_DEV_OK); 546 } 547 548 void 549 com_config(struct com_softc *sc) 550 { 551 struct com_regs *regsp = &sc->sc_regs; 552 553 /* Disable interrupts before configuring the device. */ 554 if (sc->sc_type == COM_TYPE_PXA2x0) 555 sc->sc_ier = IER_EUART; 556 else 557 sc->sc_ier = 0; 558 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 559 (void) CSR_READ_1(regsp, COM_REG_IIR); 560 561 #ifdef COM_HAYESP 562 /* Look for a Hayes ESP board. */ 563 if (sc->sc_type == COM_TYPE_HAYESP) { 564 565 /* Set 16550 compatibility mode */ 566 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 567 HAYESP_SETMODE); 568 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 569 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 570 HAYESP_MODE_SCALE); 571 572 /* Set RTS/CTS flow control */ 573 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 574 HAYESP_SETFLOWTYPE); 575 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 576 HAYESP_FLOW_RTS); 577 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 578 HAYESP_FLOW_CTS); 579 580 /* Set flow control levels */ 581 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 582 HAYESP_SETRXFLOW); 583 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 584 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 585 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 586 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 587 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 588 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 589 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 590 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 591 } 592 #endif 593 594 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 595 com_enable_debugport(sc); 596 } 597 598 int 599 com_detach(device_t self, int flags) 600 { 601 struct com_softc *sc = device_private(self); 602 int maj, mn; 603 604 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 605 return EBUSY; 606 607 /* locate the major number */ 608 maj = cdevsw_lookup_major(&com_cdevsw); 609 610 /* Nuke the vnodes for any open instances. */ 611 mn = device_unit(self); 612 vdevgone(maj, mn, mn, VCHR); 613 614 mn |= COMDIALOUT_MASK; 615 vdevgone(maj, mn, mn, VCHR); 616 617 if (sc->sc_rbuf == NULL) { 618 /* 619 * Ring buffer allocation failed in the com_attach_subr, 620 * only the tty is allocated, and nothing else. 621 */ 622 ttyfree(sc->sc_tty); 623 return 0; 624 } 625 626 /* Free the receive buffer. */ 627 free(sc->sc_rbuf, M_DEVBUF); 628 629 /* Detach and free the tty. */ 630 tty_detach(sc->sc_tty); 631 ttyfree(sc->sc_tty); 632 633 /* Unhook the soft interrupt handler. */ 634 softint_disestablish(sc->sc_si); 635 636 #if NRND > 0 && defined(RND_COM) 637 /* Unhook the entropy source. */ 638 rnd_detach_source(&sc->rnd_source); 639 #endif 640 callout_destroy(&sc->sc_diag_callout); 641 642 /* Destroy the lock. */ 643 mutex_destroy(&sc->sc_lock); 644 645 return (0); 646 } 647 648 int 649 com_activate(device_t self, enum devact act) 650 { 651 struct com_softc *sc = device_private(self); 652 int rv = 0; 653 654 switch (act) { 655 case DVACT_ACTIVATE: 656 rv = EOPNOTSUPP; 657 break; 658 659 case DVACT_DEACTIVATE: 660 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 661 rv = EBUSY; 662 break; 663 } 664 665 if (sc->disable != NULL && sc->enabled != 0) { 666 (*sc->disable)(sc); 667 sc->enabled = 0; 668 } 669 break; 670 } 671 672 return (rv); 673 } 674 675 void 676 com_shutdown(struct com_softc *sc) 677 { 678 struct tty *tp = sc->sc_tty; 679 680 mutex_spin_enter(&sc->sc_lock); 681 682 /* If we were asserting flow control, then deassert it. */ 683 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 684 com_hwiflow(sc); 685 686 /* Clear any break condition set with TIOCSBRK. */ 687 com_break(sc, 0); 688 689 /* 690 * Hang up if necessary. Wait a bit, so the other side has time to 691 * notice even if we immediately open the port again. 692 * Avoid tsleeping above splhigh(). 693 */ 694 if (ISSET(tp->t_cflag, HUPCL)) { 695 com_modem(sc, 0); 696 mutex_spin_exit(&sc->sc_lock); 697 /* XXX will only timeout */ 698 (void) kpause(ttclos, false, hz, NULL); 699 mutex_spin_enter(&sc->sc_lock); 700 } 701 702 /* Turn off interrupts. */ 703 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 704 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 705 if (sc->sc_type == COM_TYPE_PXA2x0) 706 sc->sc_ier |= IER_ERXTOUT; 707 } else 708 sc->sc_ier = 0; 709 710 if (sc->sc_type == COM_TYPE_PXA2x0) 711 sc->sc_ier |= IER_EUART; 712 713 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 714 715 mutex_spin_exit(&sc->sc_lock); 716 717 if (sc->disable) { 718 #ifdef DIAGNOSTIC 719 if (!sc->enabled) 720 panic("com_shutdown: not enabled?"); 721 #endif 722 (*sc->disable)(sc); 723 sc->enabled = 0; 724 } 725 } 726 727 int 728 comopen(dev_t dev, int flag, int mode, struct lwp *l) 729 { 730 struct com_softc *sc; 731 struct tty *tp; 732 int s; 733 int error; 734 735 sc = device_lookup_private(&com_cd, COMUNIT(dev)); 736 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 737 sc->sc_rbuf == NULL) 738 return (ENXIO); 739 740 if (!device_is_active(sc->sc_dev)) 741 return (ENXIO); 742 743 #ifdef KGDB 744 /* 745 * If this is the kgdb port, no other use is permitted. 746 */ 747 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 748 return (EBUSY); 749 #endif 750 751 tp = sc->sc_tty; 752 753 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 754 return (EBUSY); 755 756 s = spltty(); 757 758 /* 759 * Do the following iff this is a first open. 760 */ 761 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 762 struct termios t; 763 764 tp->t_dev = dev; 765 766 767 if (sc->enable) { 768 if ((*sc->enable)(sc)) { 769 splx(s); 770 aprint_error_dev(sc->sc_dev, 771 "device enable failed\n"); 772 return (EIO); 773 } 774 mutex_spin_enter(&sc->sc_lock); 775 sc->enabled = 1; 776 com_config(sc); 777 } else { 778 mutex_spin_enter(&sc->sc_lock); 779 } 780 781 /* Turn on interrupts. */ 782 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 783 if (sc->sc_type == COM_TYPE_PXA2x0) 784 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 785 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 786 787 /* Fetch the current modem control status, needed later. */ 788 sc->sc_msr = CSR_READ_1(&sc->sc_regs, COM_REG_MSR); 789 790 /* Clear PPS capture state on first open. */ 791 mutex_spin_enter(&timecounter_lock); 792 memset(&sc->sc_pps_state, 0, sizeof(sc->sc_pps_state)); 793 sc->sc_pps_state.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 794 pps_init(&sc->sc_pps_state); 795 mutex_spin_exit(&timecounter_lock); 796 797 mutex_spin_exit(&sc->sc_lock); 798 799 /* 800 * Initialize the termios status to the defaults. Add in the 801 * sticky bits from TIOCSFLAGS. 802 */ 803 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 804 t.c_ospeed = comconsrate; 805 t.c_cflag = comconscflag; 806 } else { 807 t.c_ospeed = TTYDEF_SPEED; 808 t.c_cflag = TTYDEF_CFLAG; 809 } 810 t.c_ispeed = t.c_ospeed; 811 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 812 SET(t.c_cflag, CLOCAL); 813 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 814 SET(t.c_cflag, CRTSCTS); 815 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 816 SET(t.c_cflag, MDMBUF); 817 /* Make sure comparam() will do something. */ 818 tp->t_ospeed = 0; 819 (void) comparam(tp, &t); 820 tp->t_iflag = TTYDEF_IFLAG; 821 tp->t_oflag = TTYDEF_OFLAG; 822 tp->t_lflag = TTYDEF_LFLAG; 823 ttychars(tp); 824 ttsetwater(tp); 825 826 mutex_spin_enter(&sc->sc_lock); 827 828 /* 829 * Turn on DTR. We must always do this, even if carrier is not 830 * present, because otherwise we'd have to use TIOCSDTR 831 * immediately after setting CLOCAL, which applications do not 832 * expect. We always assert DTR while the device is open 833 * unless explicitly requested to deassert it. 834 */ 835 com_modem(sc, 1); 836 837 /* Clear the input ring, and unblock. */ 838 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 839 sc->sc_rbavail = com_rbuf_size; 840 com_iflush(sc); 841 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 842 com_hwiflow(sc); 843 844 #ifdef COM_DEBUG 845 if (com_debug) 846 comstatus(sc, "comopen "); 847 #endif 848 849 mutex_spin_exit(&sc->sc_lock); 850 } 851 852 splx(s); 853 854 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 855 if (error) 856 goto bad; 857 858 error = (*tp->t_linesw->l_open)(dev, tp); 859 if (error) 860 goto bad; 861 862 return (0); 863 864 bad: 865 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 866 /* 867 * We failed to open the device, and nobody else had it opened. 868 * Clean up the state as appropriate. 869 */ 870 com_shutdown(sc); 871 } 872 873 return (error); 874 } 875 876 int 877 comclose(dev_t dev, int flag, int mode, struct lwp *l) 878 { 879 struct com_softc *sc = 880 device_lookup_private(&com_cd, COMUNIT(dev)); 881 struct tty *tp = sc->sc_tty; 882 883 /* XXX This is for cons.c. */ 884 if (!ISSET(tp->t_state, TS_ISOPEN)) 885 return (0); 886 887 (*tp->t_linesw->l_close)(tp, flag); 888 ttyclose(tp); 889 890 if (COM_ISALIVE(sc) == 0) 891 return (0); 892 893 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 894 /* 895 * Although we got a last close, the device may still be in 896 * use; e.g. if this was the dialout node, and there are still 897 * processes waiting for carrier on the non-dialout node. 898 */ 899 com_shutdown(sc); 900 } 901 902 return (0); 903 } 904 905 int 906 comread(dev_t dev, struct uio *uio, int flag) 907 { 908 struct com_softc *sc = 909 device_lookup_private(&com_cd, COMUNIT(dev)); 910 struct tty *tp = sc->sc_tty; 911 912 if (COM_ISALIVE(sc) == 0) 913 return (EIO); 914 915 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 916 } 917 918 int 919 comwrite(dev_t dev, struct uio *uio, int flag) 920 { 921 struct com_softc *sc = 922 device_lookup_private(&com_cd, COMUNIT(dev)); 923 struct tty *tp = sc->sc_tty; 924 925 if (COM_ISALIVE(sc) == 0) 926 return (EIO); 927 928 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 929 } 930 931 int 932 compoll(dev_t dev, int events, struct lwp *l) 933 { 934 struct com_softc *sc = 935 device_lookup_private(&com_cd, COMUNIT(dev)); 936 struct tty *tp = sc->sc_tty; 937 938 if (COM_ISALIVE(sc) == 0) 939 return (POLLHUP); 940 941 return ((*tp->t_linesw->l_poll)(tp, events, l)); 942 } 943 944 struct tty * 945 comtty(dev_t dev) 946 { 947 struct com_softc *sc = 948 device_lookup_private(&com_cd, COMUNIT(dev)); 949 struct tty *tp = sc->sc_tty; 950 951 return (tp); 952 } 953 954 int 955 comioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 956 { 957 struct com_softc *sc; 958 struct tty *tp; 959 int error; 960 961 sc = device_lookup_private(&com_cd, COMUNIT(dev)); 962 if (sc == NULL) 963 return ENXIO; 964 if (COM_ISALIVE(sc) == 0) 965 return (EIO); 966 967 tp = sc->sc_tty; 968 969 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 970 if (error != EPASSTHROUGH) 971 return (error); 972 973 error = ttioctl(tp, cmd, data, flag, l); 974 if (error != EPASSTHROUGH) 975 return (error); 976 977 error = 0; 978 switch (cmd) { 979 case TIOCSFLAGS: 980 error = kauth_authorize_device_tty(l->l_cred, 981 KAUTH_DEVICE_TTY_PRIVSET, tp); 982 break; 983 default: 984 /* nothing */ 985 break; 986 } 987 if (error) { 988 return error; 989 } 990 991 mutex_spin_enter(&sc->sc_lock); 992 993 switch (cmd) { 994 case TIOCSBRK: 995 com_break(sc, 1); 996 break; 997 998 case TIOCCBRK: 999 com_break(sc, 0); 1000 break; 1001 1002 case TIOCSDTR: 1003 com_modem(sc, 1); 1004 break; 1005 1006 case TIOCCDTR: 1007 com_modem(sc, 0); 1008 break; 1009 1010 case TIOCGFLAGS: 1011 *(int *)data = sc->sc_swflags; 1012 break; 1013 1014 case TIOCSFLAGS: 1015 sc->sc_swflags = *(int *)data; 1016 break; 1017 1018 case TIOCMSET: 1019 case TIOCMBIS: 1020 case TIOCMBIC: 1021 tiocm_to_com(sc, cmd, *(int *)data); 1022 break; 1023 1024 case TIOCMGET: 1025 *(int *)data = com_to_tiocm(sc); 1026 break; 1027 1028 case PPS_IOC_CREATE: 1029 case PPS_IOC_DESTROY: 1030 case PPS_IOC_GETPARAMS: 1031 case PPS_IOC_SETPARAMS: 1032 case PPS_IOC_GETCAP: 1033 case PPS_IOC_FETCH: 1034 #ifdef PPS_SYNC 1035 case PPS_IOC_KCBIND: 1036 #endif 1037 mutex_spin_enter(&timecounter_lock); 1038 error = pps_ioctl(cmd, data, &sc->sc_pps_state); 1039 mutex_spin_exit(&timecounter_lock); 1040 break; 1041 1042 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1043 mutex_spin_enter(&timecounter_lock); 1044 #ifndef PPS_TRAILING_EDGE 1045 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1046 &sc->sc_pps_state.ppsinfo.assert_timestamp); 1047 #else 1048 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1049 &sc->sc_pps_state.ppsinfo.clear_timestamp); 1050 #endif 1051 mutex_spin_exit(&timecounter_lock); 1052 break; 1053 1054 default: 1055 error = EPASSTHROUGH; 1056 break; 1057 } 1058 1059 mutex_spin_exit(&sc->sc_lock); 1060 1061 #ifdef COM_DEBUG 1062 if (com_debug) 1063 comstatus(sc, "comioctl "); 1064 #endif 1065 1066 return (error); 1067 } 1068 1069 integrate void 1070 com_schedrx(struct com_softc *sc) 1071 { 1072 1073 sc->sc_rx_ready = 1; 1074 1075 /* Wake up the poller. */ 1076 softint_schedule(sc->sc_si); 1077 } 1078 1079 void 1080 com_break(struct com_softc *sc, int onoff) 1081 { 1082 1083 if (onoff) 1084 SET(sc->sc_lcr, LCR_SBREAK); 1085 else 1086 CLR(sc->sc_lcr, LCR_SBREAK); 1087 1088 if (!sc->sc_heldchange) { 1089 if (sc->sc_tx_busy) { 1090 sc->sc_heldtbc = sc->sc_tbc; 1091 sc->sc_tbc = 0; 1092 sc->sc_heldchange = 1; 1093 } else 1094 com_loadchannelregs(sc); 1095 } 1096 } 1097 1098 void 1099 com_modem(struct com_softc *sc, int onoff) 1100 { 1101 1102 if (sc->sc_mcr_dtr == 0) 1103 return; 1104 1105 if (onoff) 1106 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1107 else 1108 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1109 1110 if (!sc->sc_heldchange) { 1111 if (sc->sc_tx_busy) { 1112 sc->sc_heldtbc = sc->sc_tbc; 1113 sc->sc_tbc = 0; 1114 sc->sc_heldchange = 1; 1115 } else 1116 com_loadchannelregs(sc); 1117 } 1118 } 1119 1120 void 1121 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1122 { 1123 u_char combits; 1124 1125 combits = 0; 1126 if (ISSET(ttybits, TIOCM_DTR)) 1127 SET(combits, MCR_DTR); 1128 if (ISSET(ttybits, TIOCM_RTS)) 1129 SET(combits, MCR_RTS); 1130 1131 switch (how) { 1132 case TIOCMBIC: 1133 CLR(sc->sc_mcr, combits); 1134 break; 1135 1136 case TIOCMBIS: 1137 SET(sc->sc_mcr, combits); 1138 break; 1139 1140 case TIOCMSET: 1141 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1142 SET(sc->sc_mcr, combits); 1143 break; 1144 } 1145 1146 if (!sc->sc_heldchange) { 1147 if (sc->sc_tx_busy) { 1148 sc->sc_heldtbc = sc->sc_tbc; 1149 sc->sc_tbc = 0; 1150 sc->sc_heldchange = 1; 1151 } else 1152 com_loadchannelregs(sc); 1153 } 1154 } 1155 1156 int 1157 com_to_tiocm(struct com_softc *sc) 1158 { 1159 u_char combits; 1160 int ttybits = 0; 1161 1162 combits = sc->sc_mcr; 1163 if (ISSET(combits, MCR_DTR)) 1164 SET(ttybits, TIOCM_DTR); 1165 if (ISSET(combits, MCR_RTS)) 1166 SET(ttybits, TIOCM_RTS); 1167 1168 combits = sc->sc_msr; 1169 if (ISSET(combits, MSR_DCD)) 1170 SET(ttybits, TIOCM_CD); 1171 if (ISSET(combits, MSR_CTS)) 1172 SET(ttybits, TIOCM_CTS); 1173 if (ISSET(combits, MSR_DSR)) 1174 SET(ttybits, TIOCM_DSR); 1175 if (ISSET(combits, MSR_RI | MSR_TERI)) 1176 SET(ttybits, TIOCM_RI); 1177 1178 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1179 SET(ttybits, TIOCM_LE); 1180 1181 return (ttybits); 1182 } 1183 1184 static u_char 1185 cflag2lcr(tcflag_t cflag) 1186 { 1187 u_char lcr = 0; 1188 1189 switch (ISSET(cflag, CSIZE)) { 1190 case CS5: 1191 SET(lcr, LCR_5BITS); 1192 break; 1193 case CS6: 1194 SET(lcr, LCR_6BITS); 1195 break; 1196 case CS7: 1197 SET(lcr, LCR_7BITS); 1198 break; 1199 case CS8: 1200 SET(lcr, LCR_8BITS); 1201 break; 1202 } 1203 if (ISSET(cflag, PARENB)) { 1204 SET(lcr, LCR_PENAB); 1205 if (!ISSET(cflag, PARODD)) 1206 SET(lcr, LCR_PEVEN); 1207 } 1208 if (ISSET(cflag, CSTOPB)) 1209 SET(lcr, LCR_STOPB); 1210 1211 return (lcr); 1212 } 1213 1214 int 1215 comparam(struct tty *tp, struct termios *t) 1216 { 1217 struct com_softc *sc = 1218 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1219 int ospeed; 1220 u_char lcr; 1221 1222 if (COM_ISALIVE(sc) == 0) 1223 return (EIO); 1224 1225 #ifdef COM_HAYESP 1226 if (sc->sc_type == COM_TYPE_HAYESP) { 1227 int prescaler, speed; 1228 1229 /* 1230 * Calculate UART clock prescaler. It should be in 1231 * range of 0 .. 3. 1232 */ 1233 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1234 prescaler++, speed /= 2) 1235 if ((ospeed = comspeed(speed, sc->sc_frequency, 1236 sc->sc_type)) > 0) 1237 break; 1238 1239 if (prescaler == 4) 1240 return (EINVAL); 1241 sc->sc_prescaler = prescaler; 1242 } else 1243 #endif 1244 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1245 1246 /* Check requested parameters. */ 1247 if (ospeed < 0) 1248 return (EINVAL); 1249 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1250 return (EINVAL); 1251 1252 /* 1253 * For the console, always force CLOCAL and !HUPCL, so that the port 1254 * is always active. 1255 */ 1256 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1257 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1258 SET(t->c_cflag, CLOCAL); 1259 CLR(t->c_cflag, HUPCL); 1260 } 1261 1262 /* 1263 * If there were no changes, don't do anything. This avoids dropping 1264 * input and improves performance when all we did was frob things like 1265 * VMIN and VTIME. 1266 */ 1267 if (tp->t_ospeed == t->c_ospeed && 1268 tp->t_cflag == t->c_cflag) 1269 return (0); 1270 1271 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1272 1273 mutex_spin_enter(&sc->sc_lock); 1274 1275 sc->sc_lcr = lcr; 1276 1277 /* 1278 * If we're not in a mode that assumes a connection is present, then 1279 * ignore carrier changes. 1280 */ 1281 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1282 sc->sc_msr_dcd = 0; 1283 else 1284 sc->sc_msr_dcd = MSR_DCD; 1285 /* 1286 * Set the flow control pins depending on the current flow control 1287 * mode. 1288 */ 1289 if (ISSET(t->c_cflag, CRTSCTS)) { 1290 sc->sc_mcr_dtr = MCR_DTR; 1291 sc->sc_mcr_rts = MCR_RTS; 1292 sc->sc_msr_cts = MSR_CTS; 1293 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1294 } else if (ISSET(t->c_cflag, MDMBUF)) { 1295 /* 1296 * For DTR/DCD flow control, make sure we don't toggle DTR for 1297 * carrier detection. 1298 */ 1299 sc->sc_mcr_dtr = 0; 1300 sc->sc_mcr_rts = MCR_DTR; 1301 sc->sc_msr_cts = MSR_DCD; 1302 sc->sc_efr = 0; 1303 } else { 1304 /* 1305 * If no flow control, then always set RTS. This will make 1306 * the other side happy if it mistakenly thinks we're doing 1307 * RTS/CTS flow control. 1308 */ 1309 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1310 sc->sc_mcr_rts = 0; 1311 sc->sc_msr_cts = 0; 1312 sc->sc_efr = 0; 1313 if (ISSET(sc->sc_mcr, MCR_DTR)) 1314 SET(sc->sc_mcr, MCR_RTS); 1315 else 1316 CLR(sc->sc_mcr, MCR_RTS); 1317 } 1318 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1319 1320 #if 0 1321 if (ospeed == 0) 1322 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1323 else 1324 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1325 #endif 1326 1327 sc->sc_dlbl = ospeed; 1328 sc->sc_dlbh = ospeed >> 8; 1329 1330 /* 1331 * Set the FIFO threshold based on the receive speed. 1332 * 1333 * * If it's a low speed, it's probably a mouse or some other 1334 * interactive device, so set the threshold low. 1335 * * If it's a high speed, trim the trigger level down to prevent 1336 * overflows. 1337 * * Otherwise set it a bit higher. 1338 */ 1339 if (sc->sc_type == COM_TYPE_HAYESP) 1340 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1341 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) { 1342 if (t->c_ospeed <= 1200) 1343 sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_1; 1344 else if (t->c_ospeed <= 38400) 1345 sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_8; 1346 else 1347 sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_4; 1348 } else 1349 sc->sc_fifo = 0; 1350 1351 /* And copy to tty. */ 1352 tp->t_ispeed = t->c_ospeed; 1353 tp->t_ospeed = t->c_ospeed; 1354 tp->t_cflag = t->c_cflag; 1355 1356 if (!sc->sc_heldchange) { 1357 if (sc->sc_tx_busy) { 1358 sc->sc_heldtbc = sc->sc_tbc; 1359 sc->sc_tbc = 0; 1360 sc->sc_heldchange = 1; 1361 } else 1362 com_loadchannelregs(sc); 1363 } 1364 1365 if (!ISSET(t->c_cflag, CHWFLOW)) { 1366 /* Disable the high water mark. */ 1367 sc->sc_r_hiwat = 0; 1368 sc->sc_r_lowat = 0; 1369 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1370 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1371 com_schedrx(sc); 1372 } 1373 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1374 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1375 com_hwiflow(sc); 1376 } 1377 } else { 1378 sc->sc_r_hiwat = com_rbuf_hiwat; 1379 sc->sc_r_lowat = com_rbuf_lowat; 1380 } 1381 1382 mutex_spin_exit(&sc->sc_lock); 1383 1384 /* 1385 * Update the tty layer's idea of the carrier bit, in case we changed 1386 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1387 * explicit request. 1388 */ 1389 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1390 1391 #ifdef COM_DEBUG 1392 if (com_debug) 1393 comstatus(sc, "comparam "); 1394 #endif 1395 1396 if (!ISSET(t->c_cflag, CHWFLOW)) { 1397 if (sc->sc_tx_stopped) { 1398 sc->sc_tx_stopped = 0; 1399 comstart(tp); 1400 } 1401 } 1402 1403 return (0); 1404 } 1405 1406 void 1407 com_iflush(struct com_softc *sc) 1408 { 1409 struct com_regs *regsp = &sc->sc_regs; 1410 #ifdef DIAGNOSTIC 1411 int reg; 1412 #endif 1413 int timo; 1414 1415 #ifdef DIAGNOSTIC 1416 reg = 0xffff; 1417 #endif 1418 timo = 50000; 1419 /* flush any pending I/O */ 1420 while (ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY) 1421 && --timo) 1422 #ifdef DIAGNOSTIC 1423 reg = 1424 #else 1425 (void) 1426 #endif 1427 CSR_READ_1(regsp, COM_REG_RXDATA); 1428 #ifdef DIAGNOSTIC 1429 if (!timo) 1430 aprint_error_dev(sc->sc_dev, "com_iflush timeout %02x\n", reg); 1431 #endif 1432 } 1433 1434 void 1435 com_loadchannelregs(struct com_softc *sc) 1436 { 1437 struct com_regs *regsp = &sc->sc_regs; 1438 1439 /* XXXXX necessary? */ 1440 com_iflush(sc); 1441 1442 if (sc->sc_type == COM_TYPE_PXA2x0) 1443 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 1444 else 1445 CSR_WRITE_1(regsp, COM_REG_IER, 0); 1446 1447 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1448 if (sc->sc_type != COM_TYPE_AU1x00) { /* no EFR on alchemy */ 1449 CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr); 1450 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 1451 } 1452 } 1453 if (sc->sc_type == COM_TYPE_AU1x00) { 1454 /* alchemy has single separate 16-bit clock divisor register */ 1455 CSR_WRITE_2(regsp, COM_REG_DLBL, sc->sc_dlbl + 1456 (sc->sc_dlbh << 8)); 1457 } else { 1458 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB); 1459 CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl); 1460 CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh); 1461 } 1462 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr); 1463 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active = sc->sc_mcr); 1464 CSR_WRITE_1(regsp, COM_REG_FIFO, sc->sc_fifo); 1465 #ifdef COM_HAYESP 1466 if (sc->sc_type == COM_TYPE_HAYESP) { 1467 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 1468 HAYESP_SETPRESCALER); 1469 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 1470 sc->sc_prescaler); 1471 } 1472 #endif 1473 1474 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1475 } 1476 1477 int 1478 comhwiflow(struct tty *tp, int block) 1479 { 1480 struct com_softc *sc = 1481 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1482 1483 if (COM_ISALIVE(sc) == 0) 1484 return (0); 1485 1486 if (sc->sc_mcr_rts == 0) 1487 return (0); 1488 1489 mutex_spin_enter(&sc->sc_lock); 1490 1491 if (block) { 1492 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1493 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1494 com_hwiflow(sc); 1495 } 1496 } else { 1497 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1498 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1499 com_schedrx(sc); 1500 } 1501 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1502 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1503 com_hwiflow(sc); 1504 } 1505 } 1506 1507 mutex_spin_exit(&sc->sc_lock); 1508 return (1); 1509 } 1510 1511 /* 1512 * (un)block input via hw flowcontrol 1513 */ 1514 void 1515 com_hwiflow(struct com_softc *sc) 1516 { 1517 struct com_regs *regsp= &sc->sc_regs; 1518 1519 if (sc->sc_mcr_rts == 0) 1520 return; 1521 1522 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1523 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1524 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1525 } else { 1526 SET(sc->sc_mcr, sc->sc_mcr_rts); 1527 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1528 } 1529 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active); 1530 } 1531 1532 1533 void 1534 comstart(struct tty *tp) 1535 { 1536 struct com_softc *sc = 1537 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1538 struct com_regs *regsp = &sc->sc_regs; 1539 int s; 1540 1541 if (COM_ISALIVE(sc) == 0) 1542 return; 1543 1544 s = spltty(); 1545 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1546 goto out; 1547 if (sc->sc_tx_stopped) 1548 goto out; 1549 if (!ttypull(tp)) 1550 goto out; 1551 1552 /* Grab the first contiguous region of buffer space. */ 1553 { 1554 u_char *tba; 1555 int tbc; 1556 1557 tba = tp->t_outq.c_cf; 1558 tbc = ndqb(&tp->t_outq, 0); 1559 1560 mutex_spin_enter(&sc->sc_lock); 1561 1562 sc->sc_tba = tba; 1563 sc->sc_tbc = tbc; 1564 } 1565 1566 SET(tp->t_state, TS_BUSY); 1567 sc->sc_tx_busy = 1; 1568 1569 /* Enable transmit completion interrupts if necessary. */ 1570 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1571 SET(sc->sc_ier, IER_ETXRDY); 1572 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1573 } 1574 1575 /* Output the first chunk of the contiguous buffer. */ 1576 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1577 u_int n; 1578 1579 n = sc->sc_tbc; 1580 if (n > sc->sc_fifolen) 1581 n = sc->sc_fifolen; 1582 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1583 sc->sc_tbc -= n; 1584 sc->sc_tba += n; 1585 } 1586 1587 mutex_spin_exit(&sc->sc_lock); 1588 out: 1589 splx(s); 1590 return; 1591 } 1592 1593 /* 1594 * Stop output on a line. 1595 */ 1596 void 1597 comstop(struct tty *tp, int flag) 1598 { 1599 struct com_softc *sc = 1600 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1601 1602 mutex_spin_enter(&sc->sc_lock); 1603 if (ISSET(tp->t_state, TS_BUSY)) { 1604 /* Stop transmitting at the next chunk. */ 1605 sc->sc_tbc = 0; 1606 sc->sc_heldtbc = 0; 1607 if (!ISSET(tp->t_state, TS_TTSTOP)) 1608 SET(tp->t_state, TS_FLUSH); 1609 } 1610 mutex_spin_exit(&sc->sc_lock); 1611 } 1612 1613 void 1614 comdiag(void *arg) 1615 { 1616 struct com_softc *sc = arg; 1617 int overflows, floods; 1618 1619 mutex_spin_enter(&sc->sc_lock); 1620 overflows = sc->sc_overflows; 1621 sc->sc_overflows = 0; 1622 floods = sc->sc_floods; 1623 sc->sc_floods = 0; 1624 sc->sc_errors = 0; 1625 mutex_spin_exit(&sc->sc_lock); 1626 1627 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1628 device_xname(sc->sc_dev), 1629 overflows, overflows == 1 ? "" : "s", 1630 floods, floods == 1 ? "" : "s"); 1631 } 1632 1633 integrate void 1634 com_rxsoft(struct com_softc *sc, struct tty *tp) 1635 { 1636 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1637 u_char *get, *end; 1638 u_int cc, scc; 1639 u_char lsr; 1640 int code; 1641 1642 end = sc->sc_ebuf; 1643 get = sc->sc_rbget; 1644 scc = cc = com_rbuf_size - sc->sc_rbavail; 1645 1646 if (cc == com_rbuf_size) { 1647 sc->sc_floods++; 1648 if (sc->sc_errors++ == 0) 1649 callout_reset(&sc->sc_diag_callout, 60 * hz, 1650 comdiag, sc); 1651 } 1652 1653 /* If not yet open, drop the entire buffer content here */ 1654 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1655 get += cc << 1; 1656 if (get >= end) 1657 get -= com_rbuf_size << 1; 1658 cc = 0; 1659 } 1660 while (cc) { 1661 code = get[0]; 1662 lsr = get[1]; 1663 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1664 if (ISSET(lsr, LSR_OE)) { 1665 sc->sc_overflows++; 1666 if (sc->sc_errors++ == 0) 1667 callout_reset(&sc->sc_diag_callout, 1668 60 * hz, comdiag, sc); 1669 } 1670 if (ISSET(lsr, LSR_BI | LSR_FE)) 1671 SET(code, TTY_FE); 1672 if (ISSET(lsr, LSR_PE)) 1673 SET(code, TTY_PE); 1674 } 1675 if ((*rint)(code, tp) == -1) { 1676 /* 1677 * The line discipline's buffer is out of space. 1678 */ 1679 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1680 /* 1681 * We're either not using flow control, or the 1682 * line discipline didn't tell us to block for 1683 * some reason. Either way, we have no way to 1684 * know when there's more space available, so 1685 * just drop the rest of the data. 1686 */ 1687 get += cc << 1; 1688 if (get >= end) 1689 get -= com_rbuf_size << 1; 1690 cc = 0; 1691 } else { 1692 /* 1693 * Don't schedule any more receive processing 1694 * until the line discipline tells us there's 1695 * space available (through comhwiflow()). 1696 * Leave the rest of the data in the input 1697 * buffer. 1698 */ 1699 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1700 } 1701 break; 1702 } 1703 get += 2; 1704 if (get >= end) 1705 get = sc->sc_rbuf; 1706 cc--; 1707 } 1708 1709 if (cc != scc) { 1710 sc->sc_rbget = get; 1711 mutex_spin_enter(&sc->sc_lock); 1712 1713 cc = sc->sc_rbavail += scc - cc; 1714 /* Buffers should be ok again, release possible block. */ 1715 if (cc >= sc->sc_r_lowat) { 1716 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1717 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1718 SET(sc->sc_ier, IER_ERXRDY); 1719 #ifdef COM_PXA2X0 1720 if (sc->sc_type == COM_TYPE_PXA2x0) 1721 SET(sc->sc_ier, IER_ERXTOUT); 1722 #endif 1723 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 1724 } 1725 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1726 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1727 com_hwiflow(sc); 1728 } 1729 } 1730 mutex_spin_exit(&sc->sc_lock); 1731 } 1732 } 1733 1734 integrate void 1735 com_txsoft(struct com_softc *sc, struct tty *tp) 1736 { 1737 1738 CLR(tp->t_state, TS_BUSY); 1739 if (ISSET(tp->t_state, TS_FLUSH)) 1740 CLR(tp->t_state, TS_FLUSH); 1741 else 1742 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1743 (*tp->t_linesw->l_start)(tp); 1744 } 1745 1746 integrate void 1747 com_stsoft(struct com_softc *sc, struct tty *tp) 1748 { 1749 u_char msr, delta; 1750 1751 mutex_spin_enter(&sc->sc_lock); 1752 msr = sc->sc_msr; 1753 delta = sc->sc_msr_delta; 1754 sc->sc_msr_delta = 0; 1755 mutex_spin_exit(&sc->sc_lock); 1756 1757 if (ISSET(delta, sc->sc_msr_dcd)) { 1758 /* 1759 * Inform the tty layer that carrier detect changed. 1760 */ 1761 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1762 } 1763 1764 if (ISSET(delta, sc->sc_msr_cts)) { 1765 /* Block or unblock output according to flow control. */ 1766 if (ISSET(msr, sc->sc_msr_cts)) { 1767 sc->sc_tx_stopped = 0; 1768 (*tp->t_linesw->l_start)(tp); 1769 } else { 1770 sc->sc_tx_stopped = 1; 1771 } 1772 } 1773 1774 #ifdef COM_DEBUG 1775 if (com_debug) 1776 comstatus(sc, "com_stsoft"); 1777 #endif 1778 } 1779 1780 void 1781 comsoft(void *arg) 1782 { 1783 struct com_softc *sc = arg; 1784 struct tty *tp; 1785 1786 if (COM_ISALIVE(sc) == 0) 1787 return; 1788 1789 tp = sc->sc_tty; 1790 1791 if (sc->sc_rx_ready) { 1792 sc->sc_rx_ready = 0; 1793 com_rxsoft(sc, tp); 1794 } 1795 1796 if (sc->sc_st_check) { 1797 sc->sc_st_check = 0; 1798 com_stsoft(sc, tp); 1799 } 1800 1801 if (sc->sc_tx_done) { 1802 sc->sc_tx_done = 0; 1803 com_txsoft(sc, tp); 1804 } 1805 } 1806 1807 int 1808 comintr(void *arg) 1809 { 1810 struct com_softc *sc = arg; 1811 struct com_regs *regsp = &sc->sc_regs; 1812 1813 u_char *put, *end; 1814 u_int cc; 1815 u_char lsr, iir; 1816 1817 if (COM_ISALIVE(sc) == 0) 1818 return (0); 1819 1820 mutex_spin_enter(&sc->sc_lock); 1821 iir = CSR_READ_1(regsp, COM_REG_IIR); 1822 if (ISSET(iir, IIR_NOPEND)) { 1823 mutex_spin_exit(&sc->sc_lock); 1824 return (0); 1825 } 1826 1827 end = sc->sc_ebuf; 1828 put = sc->sc_rbput; 1829 cc = sc->sc_rbavail; 1830 1831 again: do { 1832 u_char msr, delta; 1833 1834 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1835 if (ISSET(lsr, LSR_BI)) { 1836 int cn_trapped = 0; 1837 1838 cn_check_magic(sc->sc_tty->t_dev, 1839 CNC_BREAK, com_cnm_state); 1840 if (cn_trapped) 1841 continue; 1842 #if defined(KGDB) && !defined(DDB) 1843 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1844 kgdb_connect(1); 1845 continue; 1846 } 1847 #endif 1848 } 1849 1850 if (ISSET(lsr, LSR_RCV_MASK) && 1851 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1852 while (cc > 0) { 1853 int cn_trapped = 0; 1854 put[0] = CSR_READ_1(regsp, COM_REG_RXDATA); 1855 put[1] = lsr; 1856 cn_check_magic(sc->sc_tty->t_dev, 1857 put[0], com_cnm_state); 1858 if (cn_trapped) 1859 goto next; 1860 put += 2; 1861 if (put >= end) 1862 put = sc->sc_rbuf; 1863 cc--; 1864 next: 1865 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1866 if (!ISSET(lsr, LSR_RCV_MASK)) 1867 break; 1868 } 1869 1870 /* 1871 * Current string of incoming characters ended because 1872 * no more data was available or we ran out of space. 1873 * Schedule a receive event if any data was received. 1874 * If we're out of space, turn off receive interrupts. 1875 */ 1876 sc->sc_rbput = put; 1877 sc->sc_rbavail = cc; 1878 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1879 sc->sc_rx_ready = 1; 1880 1881 /* 1882 * See if we are in danger of overflowing a buffer. If 1883 * so, use hardware flow control to ease the pressure. 1884 */ 1885 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1886 cc < sc->sc_r_hiwat) { 1887 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1888 com_hwiflow(sc); 1889 } 1890 1891 /* 1892 * If we're out of space, disable receive interrupts 1893 * until the queue has drained a bit. 1894 */ 1895 if (!cc) { 1896 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1897 #ifdef COM_PXA2X0 1898 if (sc->sc_type == COM_TYPE_PXA2x0) 1899 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 1900 else 1901 #endif 1902 CLR(sc->sc_ier, IER_ERXRDY); 1903 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1904 } 1905 } else { 1906 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 1907 (void) CSR_READ_1(regsp, COM_REG_RXDATA); 1908 continue; 1909 } 1910 } 1911 1912 msr = CSR_READ_1(regsp, COM_REG_MSR); 1913 delta = msr ^ sc->sc_msr; 1914 sc->sc_msr = msr; 1915 if ((sc->sc_pps_state.ppsparam.mode & PPS_CAPTUREBOTH) && 1916 (delta & MSR_DCD)) { 1917 mutex_spin_enter(&timecounter_lock); 1918 pps_capture(&sc->sc_pps_state); 1919 pps_event(&sc->sc_pps_state, 1920 (msr & MSR_DCD) ? 1921 PPS_CAPTUREASSERT : 1922 PPS_CAPTURECLEAR); 1923 mutex_spin_exit(&timecounter_lock); 1924 } 1925 1926 /* 1927 * Process normal status changes 1928 */ 1929 if (ISSET(delta, sc->sc_msr_mask)) { 1930 SET(sc->sc_msr_delta, delta); 1931 1932 /* 1933 * Stop output immediately if we lose the output 1934 * flow control signal or carrier detect. 1935 */ 1936 if (ISSET(~msr, sc->sc_msr_mask)) { 1937 sc->sc_tbc = 0; 1938 sc->sc_heldtbc = 0; 1939 #ifdef COM_DEBUG 1940 if (com_debug) 1941 comstatus(sc, "comintr "); 1942 #endif 1943 } 1944 1945 sc->sc_st_check = 1; 1946 } 1947 } while (!ISSET((iir = 1948 CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND) && 1949 /* 1950 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 1951 * by IIR read, so we can't do this way: `process all interrupts, 1952 * then do TX if possble'. 1953 */ 1954 (iir & IIR_IMASK) != IIR_TXRDY); 1955 1956 /* 1957 * Read LSR again, since there may be an interrupt between 1958 * the last LSR read and IIR read above. 1959 */ 1960 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1961 1962 /* 1963 * See if data can be transmitted as well. 1964 * Schedule tx done event if no data left 1965 * and tty was marked busy. 1966 */ 1967 if (ISSET(lsr, LSR_TXRDY)) { 1968 /* 1969 * If we've delayed a parameter change, do it now, and restart 1970 * output. 1971 */ 1972 if (sc->sc_heldchange) { 1973 com_loadchannelregs(sc); 1974 sc->sc_heldchange = 0; 1975 sc->sc_tbc = sc->sc_heldtbc; 1976 sc->sc_heldtbc = 0; 1977 } 1978 1979 /* Output the next chunk of the contiguous buffer, if any. */ 1980 if (sc->sc_tbc > 0) { 1981 u_int n; 1982 1983 n = sc->sc_tbc; 1984 if (n > sc->sc_fifolen) 1985 n = sc->sc_fifolen; 1986 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1987 sc->sc_tbc -= n; 1988 sc->sc_tba += n; 1989 } else { 1990 /* Disable transmit completion interrupts if necessary. */ 1991 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1992 CLR(sc->sc_ier, IER_ETXRDY); 1993 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1994 } 1995 if (sc->sc_tx_busy) { 1996 sc->sc_tx_busy = 0; 1997 sc->sc_tx_done = 1; 1998 } 1999 } 2000 } 2001 2002 if (!ISSET((iir = CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND)) 2003 goto again; 2004 2005 mutex_spin_exit(&sc->sc_lock); 2006 2007 /* Wake up the poller. */ 2008 softint_schedule(sc->sc_si); 2009 2010 #if NRND > 0 && defined(RND_COM) 2011 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2012 #endif 2013 2014 return (1); 2015 } 2016 2017 /* 2018 * The following functions are polled getc and putc routines, shared 2019 * by the console and kgdb glue. 2020 * 2021 * The read-ahead code is so that you can detect pending in-band 2022 * cn_magic in polled mode while doing output rather than having to 2023 * wait until the kernel decides it needs input. 2024 */ 2025 2026 #define MAX_READAHEAD 20 2027 static int com_readahead[MAX_READAHEAD]; 2028 static int com_readaheadcount = 0; 2029 2030 int 2031 com_common_getc(dev_t dev, struct com_regs *regsp) 2032 { 2033 int s = splserial(); 2034 u_char stat, c; 2035 2036 /* got a character from reading things earlier */ 2037 if (com_readaheadcount > 0) { 2038 int i; 2039 2040 c = com_readahead[0]; 2041 for (i = 1; i < com_readaheadcount; i++) { 2042 com_readahead[i-1] = com_readahead[i]; 2043 } 2044 com_readaheadcount--; 2045 splx(s); 2046 return (c); 2047 } 2048 2049 /* block until a character becomes available */ 2050 while (!ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) 2051 ; 2052 2053 c = CSR_READ_1(regsp, COM_REG_RXDATA); 2054 stat = CSR_READ_1(regsp, COM_REG_IIR); 2055 { 2056 int cn_trapped = 0; /* unused */ 2057 #ifdef DDB 2058 extern int db_active; 2059 if (!db_active) 2060 #endif 2061 cn_check_magic(dev, c, com_cnm_state); 2062 } 2063 splx(s); 2064 return (c); 2065 } 2066 2067 void 2068 com_common_putc(dev_t dev, struct com_regs *regsp, int c) 2069 { 2070 int s = splserial(); 2071 int cin, stat, timo; 2072 2073 if (com_readaheadcount < MAX_READAHEAD 2074 && ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) { 2075 int cn_trapped = 0; 2076 cin = CSR_READ_1(regsp, COM_REG_RXDATA); 2077 stat = CSR_READ_1(regsp, COM_REG_IIR); 2078 cn_check_magic(dev, cin, com_cnm_state); 2079 com_readahead[com_readaheadcount++] = cin; 2080 } 2081 2082 /* wait for any pending transmission to finish */ 2083 timo = 150000; 2084 while (!ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_TXRDY) && --timo) 2085 continue; 2086 2087 CSR_WRITE_1(regsp, COM_REG_TXDATA, c); 2088 COM_BARRIER(regsp, BR | BW); 2089 2090 splx(s); 2091 } 2092 2093 /* 2094 * Initialize UART for use as console or KGDB line. 2095 */ 2096 int 2097 cominit(struct com_regs *regsp, int rate, int frequency, int type, 2098 tcflag_t cflag) 2099 { 2100 2101 if (bus_space_map(regsp->cr_iot, regsp->cr_iobase, regsp->cr_nports, 0, 2102 ®sp->cr_ioh)) 2103 return (ENOMEM); /* ??? */ 2104 2105 rate = comspeed(rate, frequency, type); 2106 if (type != COM_TYPE_AU1x00) { 2107 /* no EFR on alchemy */ 2108 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 2109 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 2110 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_DLAB); 2111 CSR_WRITE_1(regsp, COM_REG_DLBL, rate & 0xff); 2112 CSR_WRITE_1(regsp, COM_REG_DLBH, rate >> 8); 2113 } else { 2114 CSR_WRITE_1(regsp, COM_REG_DLBL, rate); 2115 } 2116 CSR_WRITE_1(regsp, COM_REG_LCR, cflag2lcr(cflag)); 2117 CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS); 2118 CSR_WRITE_1(regsp, COM_REG_FIFO, 2119 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2120 #ifdef COM_PXA2X0 2121 if (type == COM_TYPE_PXA2x0) 2122 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 2123 else 2124 #endif 2125 CSR_WRITE_1(regsp, COM_REG_IER, 0); 2126 2127 return (0); 2128 } 2129 2130 /* 2131 * Following are all routines needed for COM to act as console 2132 */ 2133 struct consdev comcons = { 2134 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2135 NODEV, CN_NORMAL 2136 }; 2137 2138 2139 int 2140 comcnattach1(struct com_regs *regsp, int rate, int frequency, int type, 2141 tcflag_t cflag) 2142 { 2143 int res; 2144 2145 comconsregs = *regsp; 2146 2147 res = cominit(&comconsregs, rate, frequency, type, cflag); 2148 if (res) 2149 return (res); 2150 2151 cn_tab = &comcons; 2152 cn_init_magic(&com_cnm_state); 2153 cn_set_magic("\047\001"); /* default magic is BREAK */ 2154 2155 comconsrate = rate; 2156 comconscflag = cflag; 2157 2158 return (0); 2159 } 2160 2161 int 2162 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2163 int type, tcflag_t cflag) 2164 { 2165 struct com_regs regs; 2166 2167 memset(®s, 0, sizeof regs); 2168 regs.cr_iot = iot; 2169 regs.cr_iobase = iobase; 2170 regs.cr_nports = COM_NPORTS; 2171 #ifdef COM_REGMAP 2172 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2173 #endif 2174 2175 return comcnattach1(®s, rate, frequency, type, cflag); 2176 } 2177 2178 int 2179 comcngetc(dev_t dev) 2180 { 2181 2182 return (com_common_getc(dev, &comconsregs)); 2183 } 2184 2185 /* 2186 * Console kernel output character routine. 2187 */ 2188 void 2189 comcnputc(dev_t dev, int c) 2190 { 2191 2192 com_common_putc(dev, &comconsregs, c); 2193 } 2194 2195 void 2196 comcnpollc(dev_t dev, int on) 2197 { 2198 2199 } 2200 2201 #ifdef KGDB 2202 int 2203 com_kgdb_attach1(struct com_regs *regsp, int rate, int frequency, int type, 2204 tcflag_t cflag) 2205 { 2206 int res; 2207 2208 if (regsp->cr_iot == comconsregs.cr_iot && 2209 regsp->cr_iobase == comconsregs.cr_iobase) { 2210 #if !defined(DDB) 2211 return (EBUSY); /* cannot share with console */ 2212 #else 2213 comkgdbregs = *regsp; 2214 comkgdbregs.cr_ioh = comconsregs.cr_ioh; 2215 #endif 2216 } else { 2217 comkgdbregs = *regsp; 2218 res = cominit(&comkgdbregs, rate, frequency, type, cflag); 2219 if (res) 2220 return (res); 2221 2222 /* 2223 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2224 * expects this to be initialized 2225 */ 2226 cn_init_magic(&com_cnm_state); 2227 cn_set_magic("\047\001"); 2228 } 2229 2230 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2231 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2232 2233 return (0); 2234 } 2235 2236 int 2237 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2238 int frequency, int type, tcflag_t cflag) 2239 { 2240 struct com_regs regs; 2241 2242 regs.cr_iot = iot; 2243 regs.cr_nports = COM_NPORTS; 2244 regs.cr_iobase = iobase; 2245 #ifdef COM_REGMAP 2246 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2247 #endif 2248 2249 return com_kgdb_attach1(®s, rate, frequency, type, cflag); 2250 } 2251 2252 /* ARGSUSED */ 2253 int 2254 com_kgdb_getc(void *arg) 2255 { 2256 2257 return (com_common_getc(NODEV, &comkgdbregs)); 2258 } 2259 2260 /* ARGSUSED */ 2261 void 2262 com_kgdb_putc(void *arg, int c) 2263 { 2264 2265 com_common_putc(NODEV, &comkgdbregs, c); 2266 } 2267 #endif /* KGDB */ 2268 2269 /* helper function to identify the com ports used by 2270 console or KGDB (and not yet autoconf attached) */ 2271 int 2272 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2273 { 2274 bus_space_handle_t help; 2275 2276 if (!comconsattached && 2277 iot == comconsregs.cr_iot && iobase == comconsregs.cr_iobase) 2278 help = comconsregs.cr_ioh; 2279 #ifdef KGDB 2280 else if (!com_kgdb_attached && 2281 iot == comkgdbregs.cr_iot && iobase == comkgdbregs.cr_iobase) 2282 help = comkgdbregs.cr_ioh; 2283 #endif 2284 else 2285 return (0); 2286 2287 if (ioh) 2288 *ioh = help; 2289 return (1); 2290 } 2291 2292 /* 2293 * this routine exists to serve as a shutdown hook for systems that 2294 * have firmware which doesn't interact properly with a com device in 2295 * FIFO mode. 2296 */ 2297 bool 2298 com_cleanup(device_t self, int how) 2299 { 2300 struct com_softc *sc = device_private(self); 2301 2302 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 2303 CSR_WRITE_1(&sc->sc_regs, COM_REG_FIFO, 0); 2304 2305 return true; 2306 } 2307 2308 bool 2309 com_suspend(device_t self PMF_FN_ARGS) 2310 { 2311 struct com_softc *sc = device_private(self); 2312 2313 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, 0); 2314 (void)CSR_READ_1(&sc->sc_regs, COM_REG_IIR); 2315 2316 return true; 2317 } 2318 2319 bool 2320 com_resume(device_t self PMF_FN_ARGS) 2321 { 2322 struct com_softc *sc = device_private(self); 2323 2324 mutex_spin_enter(&sc->sc_lock); 2325 com_loadchannelregs(sc); 2326 mutex_spin_exit(&sc->sc_lock); 2327 2328 return true; 2329 } 2330
Indexes created Wed Sep 24 15:09:51 GMT 2025