com.c revision 1.64 1 /* $NetBSD: com.c,v 1.64 1996/01/14 23:44:34 christos Exp $ */
2
3 /*-
4 * Copyright (c) 1993, 1994, 1995 Charles M. Hannum. All rights reserved.
5 * Copyright (c) 1991 The Regents of the University of California.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the University of
19 * California, Berkeley and its contributors.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * @(#)com.c 7.5 (Berkeley) 5/16/91
37 */
38
39 /*
40 * COM driver, based on HP dca driver
41 * uses National Semiconductor NS16450/NS16550AF UART
42 */
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/ioctl.h>
46 #include <sys/select.h>
47 #include <sys/tty.h>
48 #include <sys/proc.h>
49 #include <sys/user.h>
50 #include <sys/conf.h>
51 #include <sys/file.h>
52 #include <sys/uio.h>
53 #include <sys/kernel.h>
54 #include <sys/syslog.h>
55 #include <sys/types.h>
56 #include <sys/device.h>
57
58 #include <machine/cpu.h>
59 #include <machine/pio.h>
60
61 #include <dev/isa/isavar.h>
62 #include <dev/isa/comreg.h>
63 #include <dev/ic/ns16550reg.h>
64 #define com_lcr com_cfcr
65
66 /*
67 * XXX: IO Address for ESP (jumpered on card), or configured by the ESP setup
68 * program. It would be better not to hard-code this but probe for it, but
69 * how?
70 */
71 #define ESP_PORT 0x300
72
73 #define ESP_CMD1_GETTEST 0x01
74 #define ESP_CMD1_GETDIPS 0x02
75 #define ESP_CMD1_SETFLOWTYPE 0x0A
76 #define ESP_CMD1_SETRXFLOW 0x0A
77 #define ESP_CMD1_SETMODE 0x10
78
79 #define ESP_CMD1 4
80 #define ESP_CMD2 5
81 #define ESP_STATUS1 4
82 #define ESP_STATUS2 5
83
84 /* For flow control */
85 #define ESP_HIWMARK 768
86 #define ESP_LOWMARK 512
87 #define ESP_HIBYTE(w) ((char)(((short)(w) >> 8) & 0xff))
88 #define ESP_LOBYTE(w) ((char)(w))
89
90
91 #define COM_IBUFSIZE (2 * 512)
92 #define COM_IHIGHWATER ((3 * COM_IBUFSIZE) / 4)
93
94 struct com_softc {
95 struct device sc_dev;
96 void *sc_ih;
97 struct tty *sc_tty;
98
99 int sc_overflows;
100 int sc_floods;
101 int sc_errors;
102
103 int sc_iobase;
104 u_char sc_hwflags;
105 #define COM_HW_NOIEN 0x01
106 #define COM_HW_FIFO 0x02
107 #define COM_HW_ESP 0x04
108 #define COM_HW_CONSOLE 0x40
109 u_char sc_swflags;
110 #define COM_SW_SOFTCAR 0x01
111 #define COM_SW_CLOCAL 0x02
112 #define COM_SW_CRTSCTS 0x04
113 #define COM_SW_MDMBUF 0x08
114 u_char sc_msr, sc_mcr, sc_lcr;
115 u_char sc_dtr;
116
117 u_char *sc_ibuf, *sc_ibufp, *sc_ibufhigh, *sc_ibufend;
118 u_char sc_ibufs[2][COM_IBUFSIZE];
119 };
120
121 int comprobe __P((struct device *, void *, void *));
122 void comattach __P((struct device *, struct device *, void *));
123 int comopen __P((dev_t, int, int, struct proc *));
124 int comclose __P((dev_t, int, int, struct proc *));
125 void comdiag __P((void *));
126 int comintr __P((void *));
127 void compoll __P((void *));
128 int comparam __P((struct tty *, struct termios *));
129 void comstart __P((struct tty *));
130
131 struct cfdriver comcd = {
132 NULL, "com", comprobe, comattach, DV_TTY, sizeof(struct com_softc)
133 };
134
135 int comdefaultrate = TTYDEF_SPEED;
136 #ifdef COMCONSOLE
137 int comconsole = COMCONSOLE;
138 #else
139 int comconsole = -1;
140 #endif
141 int comconsinit;
142 int commajor;
143 int comsopen = 0;
144 int comevents = 0;
145
146 #ifdef KGDB
147 #include <machine/remote-sl.h>
148 extern int kgdb_dev;
149 extern int kgdb_rate;
150 extern int kgdb_debug_init;
151 #endif
152
153 #define COMUNIT(x) (minor(x))
154
155 /* Macros to clear/set/test flags. */
156 #define SET(t, f) (t) |= (f)
157 #define CLR(t, f) (t) &= ~(f)
158 #define ISSET(t, f) ((t) & (f))
159
160 int
161 comspeed(speed)
162 long speed;
163 {
164 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
165
166 int x, err;
167
168 if (speed == 0)
169 return 0;
170 if (speed < 0)
171 return -1;
172 x = divrnd((COM_FREQ / 16), speed);
173 if (x <= 0)
174 return -1;
175 err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000;
176 if (err < 0)
177 err = -err;
178 if (err > COM_TOLERANCE)
179 return -1;
180 return x;
181
182 #undef divrnd(n, q)
183 }
184
185 int
186 comprobe1(iobase)
187 int iobase;
188 {
189
190 /* force access to id reg */
191 outb(iobase + com_lcr, 0);
192 outb(iobase + com_iir, 0);
193 if (inb(iobase + com_iir) & 0x38)
194 return 0;
195
196 return 1;
197 }
198
199 void
200 comprobeESP(esp_iobase, com_iobase, sc)
201 int esp_iobase;
202 int com_iobase;
203 struct com_softc *sc;
204 {
205 char val;
206 char dips;
207 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
208
209 /*
210 * Hayes ESP cards have two iobases. One is for compatibility with
211 * 16550 serial chips, and at the same ISA PC base addresses. The
212 * other is for ESP-specific enhanced features, and lies at a
213 * different addressing range entirely (0x140, 0x180, or 0x280).
214 * Hence the need for esp_iobase and com_iobase.
215 */
216
217 /* Test for ESP signature */
218 if ((inb(esp_iobase) & 0xf3) == 0)
219 return;
220
221 /*
222 * ESP is present at ESP enhanced base address; unknown com port
223 */
224
225 /* Get the dip-switch configurations */
226 outb(esp_iobase + ESP_CMD1, ESP_CMD1_GETDIPS);
227 dips = inb(esp_iobase + ESP_STATUS1);
228
229 /* Determine which com port this ESP card services: bits 0,1 of */
230 /* dips is the port # (0-3); combaselist[val] is the com_iobase */
231 if (com_iobase == combaselist[dips & 0x03]) {
232 printf(": ESP");
233 } else {
234 /* this com port is not us */
235 return;
236 }
237
238 /* Check for ESP version 2.0: bits 4,5,6 == 010 */
239 outb(esp_iobase + ESP_CMD1, ESP_CMD1_GETTEST);
240 val = inb(esp_iobase + ESP_STATUS1); /* Clear reg 1 */
241 val = inb(esp_iobase + ESP_STATUS2);
242 if ((val & 0x70) < 0x20) {
243 printf("-old (%o)", val & 0x70);
244 /* we do not support the necessary features */
245 return;
246 }
247
248 /* Check for ability to emulate 16550: bit 8 == 1 */
249 if ((dips & 0x80) == 0) {
250 printf(" slave");
251 /* XXX Does slave really mean no 16550 support?? */
252 return;
253 }
254
255 /*
256 * If we made it this far, we are a full-featured ESP v2.0 (or
257 * better), at the correct com port address.
258 */
259
260 SET(sc->sc_hwflags, COM_HW_ESP);
261 }
262
263 int
264 comprobe(parent, match, aux)
265 struct device *parent;
266 void *match, *aux;
267 {
268 struct isa_attach_args *ia = aux;
269 int iobase = ia->ia_iobase;
270
271 if (!comprobe1(iobase))
272 return 0;
273
274 ia->ia_iosize = COM_NPORTS;
275 ia->ia_msize = 0;
276 return 1;
277 }
278
279 void
280 comattach(parent, self, aux)
281 struct device *parent, *self;
282 void *aux;
283 {
284 struct com_softc *sc = (void *)self;
285 struct isa_attach_args *ia = aux;
286 struct cfdata *cf = sc->sc_dev.dv_cfdata;
287 int iobase = ia->ia_iobase;
288 struct tty *tp;
289
290 sc->sc_iobase = iobase;
291 sc->sc_hwflags = ISSET(cf->cf_flags, COM_HW_NOIEN);
292 sc->sc_swflags = 0;
293
294 if (sc->sc_dev.dv_unit == comconsole)
295 delay(1000);
296
297 /* look for a Hayes ESP board at ESP_PORT */
298 comprobeESP(ESP_PORT, iobase, sc);
299
300 /* look for a NS 16550AF UART with FIFOs */
301 outb(iobase + com_fifo,
302 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14);
303 delay(100);
304 if (ISSET(inb(iobase + com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK)
305 if (ISSET(inb(iobase + com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) {
306 SET(sc->sc_hwflags, COM_HW_FIFO);
307 printf(": ns16550a, working fifo\n");
308 } else
309 printf(": ns16550, broken fifo\n");
310 else
311 printf(": ns8250 or ns16450, no fifo\n");
312 outb(iobase + com_fifo, 0);
313
314 /* disable interrupts */
315 outb(iobase + com_ier, 0);
316 outb(iobase + com_mcr, 0);
317
318 if (ia->ia_irq != IRQUNK)
319 sc->sc_ih = isa_intr_establish(ia->ia_irq, IST_EDGE, IPL_TTY,
320 comintr, sc);
321
322 #ifdef KGDB
323 if (kgdb_dev == makedev(commajor, unit)) {
324 if (comconsole == unit)
325 kgdb_dev = -1; /* can't debug over console port */
326 else {
327 (void) cominit(unit, kgdb_rate);
328 if (kgdb_debug_init) {
329 /*
330 * Print prefix of device name,
331 * let kgdb_connect print the rest.
332 */
333 printf("%s: ", sc->sc_dev.dv_xname);
334 kgdb_connect(1);
335 } else
336 printf("%s: kgdb enabled\n",
337 sc->sc_dev.dv_xname);
338 }
339 }
340 #endif
341
342 if (sc->sc_dev.dv_unit == comconsole) {
343 /*
344 * Need to reset baud rate, etc. of next print so reset
345 * comconsinit. Also make sure console is always "hardwired".
346 */
347 comconsinit = 0;
348 SET(sc->sc_hwflags, COM_HW_CONSOLE);
349 SET(sc->sc_swflags, COM_SW_SOFTCAR);
350 }
351 }
352
353 int
354 comopen(dev, flag, mode, p)
355 dev_t dev;
356 int flag, mode;
357 struct proc *p;
358 {
359 int unit = COMUNIT(dev);
360 struct com_softc *sc;
361 int iobase;
362 struct tty *tp;
363 int s;
364 int error = 0;
365
366 if (unit >= comcd.cd_ndevs)
367 return ENXIO;
368 sc = comcd.cd_devs[unit];
369 if (!sc)
370 return ENXIO;
371
372 if (!sc->sc_tty)
373 tp = sc->sc_tty = ttymalloc();
374 else
375 tp = sc->sc_tty;
376
377 tp->t_oproc = comstart;
378 tp->t_param = comparam;
379 tp->t_dev = dev;
380 if (!ISSET(tp->t_state, TS_ISOPEN)) {
381 SET(tp->t_state, TS_WOPEN);
382 ttychars(tp);
383 tp->t_iflag = TTYDEF_IFLAG;
384 tp->t_oflag = TTYDEF_OFLAG;
385 tp->t_cflag = TTYDEF_CFLAG;
386 if (ISSET(sc->sc_swflags, COM_SW_CLOCAL))
387 SET(tp->t_cflag, CLOCAL);
388 if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS))
389 SET(tp->t_cflag, CRTSCTS);
390 if (ISSET(sc->sc_swflags, COM_SW_MDMBUF))
391 SET(tp->t_cflag, MDMBUF);
392 tp->t_lflag = TTYDEF_LFLAG;
393 tp->t_ispeed = tp->t_ospeed = comdefaultrate;
394
395 s = spltty();
396
397 comparam(tp, &tp->t_termios);
398 ttsetwater(tp);
399
400 if (comsopen++ == 0)
401 timeout(compoll, NULL, 1);
402
403 sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0];
404 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
405 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
406
407 iobase = sc->sc_iobase;
408 /* Setup the ESP board */
409 if (ISSET(sc->sc_hwflags, COM_HW_ESP)) {
410 outb(iobase + com_fifo,
411 FIFO_DMA_MODE|FIFO_ENABLE|
412 FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8);
413 /* Set 16550 compatibility mode */
414 outb(ESP_PORT + ESP_CMD1, ESP_CMD1_SETMODE);
415 outb(ESP_PORT + ESP_CMD2, 0x80 | 0x04 | 0x02);
416 /* Set RTS/CTS flow control */
417 outb(ESP_PORT + ESP_CMD1, ESP_CMD1_SETFLOWTYPE);
418 outb(ESP_PORT + ESP_CMD2, 0x04);
419 outb(ESP_PORT + ESP_CMD2, 0x10);
420 /* Set flow control levels */
421 outb(ESP_PORT + ESP_CMD1, ESP_CMD1_SETRXFLOW);
422 outb(ESP_PORT + ESP_CMD2, ESP_HIBYTE(ESP_HIWMARK));
423 outb(ESP_PORT + ESP_CMD2, ESP_LOBYTE(ESP_HIWMARK));
424 outb(ESP_PORT + ESP_CMD2, ESP_HIBYTE(ESP_LOWMARK));
425 outb(ESP_PORT + ESP_CMD2, ESP_LOBYTE(ESP_LOWMARK));
426 } else if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
427 /* Set the FIFO threshold based on the receive speed. */
428 outb(iobase + com_fifo,
429 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST |
430 (tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8));
431 /* flush any pending I/O */
432 while (ISSET(inb(iobase + com_lsr), LSR_RXRDY))
433 (void) inb(iobase + com_data);
434 /* you turn me on, baby */
435 sc->sc_mcr = MCR_DTR | MCR_RTS;
436 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
437 SET(sc->sc_mcr, MCR_IENABLE);
438 outb(iobase + com_mcr, sc->sc_mcr);
439 outb(iobase + com_ier,
440 IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC);
441
442 sc->sc_msr = inb(iobase + com_msr);
443 if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) ||
444 ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF))
445 SET(tp->t_state, TS_CARR_ON);
446 else
447 CLR(tp->t_state, TS_CARR_ON);
448 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0)
449 return EBUSY;
450 else
451 s = spltty();
452
453 /* wait for carrier if necessary */
454 if (!ISSET(flag, O_NONBLOCK))
455 while (!ISSET(tp->t_cflag, CLOCAL) &&
456 !ISSET(tp->t_state, TS_CARR_ON)) {
457 SET(tp->t_state, TS_WOPEN);
458 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH,
459 ttopen, 0);
460 if (error) {
461 /* XXX should turn off chip if we're the
462 only waiter */
463 splx(s);
464 return error;
465 }
466 }
467 splx(s);
468
469 return (*linesw[tp->t_line].l_open)(dev, tp);
470 }
471
472 int
473 comclose(dev, flag, mode, p)
474 dev_t dev;
475 int flag, mode;
476 struct proc *p;
477 {
478 int unit = COMUNIT(dev);
479 struct com_softc *sc = comcd.cd_devs[unit];
480 struct tty *tp = sc->sc_tty;
481 int iobase = sc->sc_iobase;
482 int s;
483
484 /* XXX This is for cons.c. */
485 if (!ISSET(tp->t_state, TS_ISOPEN))
486 return 0;
487
488 (*linesw[tp->t_line].l_close)(tp, flag);
489 s = spltty();
490 CLR(sc->sc_lcr, LCR_SBREAK);
491 outb(iobase + com_lcr, sc->sc_lcr);
492 outb(iobase + com_ier, 0);
493 if (ISSET(tp->t_cflag, HUPCL) &&
494 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) {
495 /* XXX perhaps only clear DTR */
496 outb(iobase + com_mcr, 0);
497 }
498 CLR(tp->t_state, TS_BUSY | TS_FLUSH);
499 if (--comsopen == 0)
500 untimeout(compoll, NULL);
501 splx(s);
502 ttyclose(tp);
503 #ifdef notyet /* XXXX */
504 if (unit != comconsole) {
505 ttyfree(tp);
506 sc->sc_tty = 0;
507 }
508 #endif
509 return 0;
510 }
511
512 int
513 comread(dev, uio, flag)
514 dev_t dev;
515 struct uio *uio;
516 int flag;
517 {
518 struct com_softc *sc = comcd.cd_devs[COMUNIT(dev)];
519 struct tty *tp = sc->sc_tty;
520
521 return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
522 }
523
524 int
525 comwrite(dev, uio, flag)
526 dev_t dev;
527 struct uio *uio;
528 int flag;
529 {
530 struct com_softc *sc = comcd.cd_devs[COMUNIT(dev)];
531 struct tty *tp = sc->sc_tty;
532
533 return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
534 }
535
536 struct tty *
537 comtty(dev)
538 dev_t dev;
539 {
540 struct com_softc *sc = comcd.cd_devs[COMUNIT(dev)];
541 struct tty *tp = sc->sc_tty;
542
543 return (tp);
544 }
545
546 static u_char
547 tiocm_xxx2mcr(data)
548 int data;
549 {
550 u_char m = 0;
551
552 if (ISSET(data, TIOCM_DTR))
553 SET(m, MCR_DTR);
554 if (ISSET(data, TIOCM_RTS))
555 SET(m, MCR_RTS);
556 return m;
557 }
558
559 int
560 comioctl(dev, cmd, data, flag, p)
561 dev_t dev;
562 u_long cmd;
563 caddr_t data;
564 int flag;
565 struct proc *p;
566 {
567 int unit = COMUNIT(dev);
568 struct com_softc *sc = comcd.cd_devs[unit];
569 struct tty *tp = sc->sc_tty;
570 int iobase = sc->sc_iobase;
571 int error;
572
573 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
574 if (error >= 0)
575 return error;
576 error = ttioctl(tp, cmd, data, flag, p);
577 if (error >= 0)
578 return error;
579
580 switch (cmd) {
581 case TIOCSBRK:
582 SET(sc->sc_lcr, LCR_SBREAK);
583 outb(iobase + com_lcr, sc->sc_lcr);
584 break;
585 case TIOCCBRK:
586 CLR(sc->sc_lcr, LCR_SBREAK);
587 outb(iobase + com_lcr, sc->sc_lcr);
588 break;
589 case TIOCSDTR:
590 SET(sc->sc_mcr, sc->sc_dtr);
591 outb(iobase + com_mcr, sc->sc_mcr);
592 break;
593 case TIOCCDTR:
594 CLR(sc->sc_mcr, sc->sc_dtr);
595 outb(iobase + com_mcr, sc->sc_mcr);
596 break;
597 case TIOCMSET:
598 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
599 case TIOCMBIS:
600 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
601 outb(iobase + com_mcr, sc->sc_mcr);
602 break;
603 case TIOCMBIC:
604 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
605 outb(iobase + com_mcr, sc->sc_mcr);
606 break;
607 case TIOCMGET: {
608 u_char m;
609 int bits = 0;
610
611 m = sc->sc_mcr;
612 if (ISSET(m, MCR_DTR))
613 SET(bits, TIOCM_DTR);
614 if (ISSET(m, MCR_RTS))
615 SET(bits, TIOCM_RTS);
616 m = sc->sc_msr;
617 if (ISSET(m, MSR_DCD))
618 SET(bits, TIOCM_CD);
619 if (ISSET(m, MSR_CTS))
620 SET(bits, TIOCM_CTS);
621 if (ISSET(m, MSR_DSR))
622 SET(bits, TIOCM_DSR);
623 if (ISSET(m, MSR_RI | MSR_TERI))
624 SET(bits, TIOCM_RI);
625 if (inb(iobase + com_ier))
626 SET(bits, TIOCM_LE);
627 *(int *)data = bits;
628 break;
629 }
630 case TIOCGFLAGS: {
631 int driverbits, userbits = 0;
632
633 driverbits = sc->sc_swflags;
634 if (ISSET(driverbits, COM_SW_SOFTCAR))
635 SET(userbits, TIOCFLAG_SOFTCAR);
636 if (ISSET(driverbits, COM_SW_CLOCAL))
637 SET(userbits, TIOCFLAG_CLOCAL);
638 if (ISSET(driverbits, COM_SW_CRTSCTS))
639 SET(userbits, TIOCFLAG_CRTSCTS);
640 if (ISSET(driverbits, COM_SW_MDMBUF))
641 SET(userbits, TIOCFLAG_MDMBUF);
642
643 *(int *)data = userbits;
644 break;
645 }
646 case TIOCSFLAGS: {
647 int userbits, driverbits = 0;
648
649 error = suser(p->p_ucred, &p->p_acflag);
650 if (error != 0)
651 return(EPERM);
652
653 userbits = *(int *)data;
654 if (ISSET(userbits, TIOCFLAG_SOFTCAR) ||
655 ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
656 SET(driverbits, COM_SW_SOFTCAR);
657 if (ISSET(userbits, TIOCFLAG_CLOCAL))
658 SET(driverbits, COM_SW_CLOCAL);
659 if (ISSET(userbits, TIOCFLAG_CRTSCTS))
660 SET(driverbits, COM_SW_CRTSCTS);
661 if (ISSET(userbits, TIOCFLAG_MDMBUF))
662 SET(driverbits, COM_SW_MDMBUF);
663
664 sc->sc_swflags = driverbits;
665 break;
666 }
667 default:
668 return ENOTTY;
669 }
670
671 return 0;
672 }
673
674 int
675 comparam(tp, t)
676 struct tty *tp;
677 struct termios *t;
678 {
679 struct com_softc *sc = comcd.cd_devs[COMUNIT(tp->t_dev)];
680 int iobase = sc->sc_iobase;
681 int ospeed = comspeed(t->c_ospeed);
682 u_char lcr;
683 tcflag_t oldcflag;
684 int s;
685
686 /* check requested parameters */
687 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
688 return EINVAL;
689
690 lcr = sc->sc_lcr & LCR_SBREAK;
691
692 switch (ISSET(t->c_cflag, CSIZE)) {
693 case CS5:
694 SET(lcr, LCR_5BITS);
695 break;
696 case CS6:
697 SET(lcr, LCR_6BITS);
698 break;
699 case CS7:
700 SET(lcr, LCR_7BITS);
701 break;
702 case CS8:
703 SET(lcr, LCR_8BITS);
704 break;
705 }
706 if (ISSET(t->c_cflag, PARENB)) {
707 SET(lcr, LCR_PENAB);
708 if (!ISSET(t->c_cflag, PARODD))
709 SET(lcr, LCR_PEVEN);
710 }
711 if (ISSET(t->c_cflag, CSTOPB))
712 SET(lcr, LCR_STOPB);
713
714 sc->sc_lcr = lcr;
715
716 s = spltty();
717
718 if (ospeed == 0) {
719 CLR(sc->sc_mcr, MCR_DTR);
720 outb(iobase + com_mcr, sc->sc_mcr);
721 }
722
723 /*
724 * Set the FIFO threshold based on the receive speed, if we are
725 * changing it.
726 */
727 if (tp->t_ispeed != t->c_ispeed && !ISSET(sc->sc_hwflags, COM_HW_ESP)) {
728 if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
729 outb(iobase + com_fifo,
730 FIFO_ENABLE |
731 (t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8));
732 }
733
734 if (ospeed != 0) {
735 outb(iobase + com_lcr, lcr | LCR_DLAB);
736 outb(iobase + com_dlbl, ospeed);
737 outb(iobase + com_dlbh, ospeed >> 8);
738 outb(iobase + com_lcr, lcr);
739 SET(sc->sc_mcr, MCR_DTR);
740 outb(iobase + com_mcr, sc->sc_mcr);
741 } else
742 outb(iobase + com_lcr, lcr);
743
744 /* When not using CRTSCTS, RTS follows DTR. */
745 if (!ISSET(t->c_cflag, CRTSCTS)) {
746 if (ISSET(sc->sc_mcr, MCR_DTR)) {
747 if (!ISSET(sc->sc_mcr, MCR_RTS)) {
748 SET(sc->sc_mcr, MCR_RTS);
749 outb(iobase + com_mcr, sc->sc_mcr);
750 }
751 } else {
752 if (ISSET(sc->sc_mcr, MCR_RTS)) {
753 CLR(sc->sc_mcr, MCR_RTS);
754 outb(iobase + com_mcr, sc->sc_mcr);
755 }
756 }
757 sc->sc_dtr = MCR_DTR | MCR_RTS;
758 } else
759 sc->sc_dtr = MCR_DTR;
760
761 /* and copy to tty */
762 tp->t_ispeed = t->c_ispeed;
763 tp->t_ospeed = t->c_ospeed;
764 oldcflag = tp->t_cflag;
765 tp->t_cflag = t->c_cflag;
766
767 /*
768 * If DCD is off and MDMBUF is changed, ask the tty layer if we should
769 * stop the device.
770 */
771 if (!ISSET(sc->sc_msr, MSR_DCD) &&
772 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) &&
773 ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) &&
774 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
775 CLR(sc->sc_mcr, sc->sc_dtr);
776 outb(iobase + com_mcr, sc->sc_mcr);
777 }
778
779 splx(s);
780 return 0;
781 }
782
783 void
784 comstart(tp)
785 struct tty *tp;
786 {
787 struct com_softc *sc = comcd.cd_devs[COMUNIT(tp->t_dev)];
788 int iobase = sc->sc_iobase;
789 int s;
790
791 s = spltty();
792 if (ISSET(tp->t_state, TS_TTSTOP | TS_BUSY))
793 goto out;
794 if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS))
795 goto out;
796 if (tp->t_outq.c_cc <= tp->t_lowat) {
797 if (ISSET(tp->t_state, TS_ASLEEP)) {
798 CLR(tp->t_state, TS_ASLEEP);
799 wakeup(&tp->t_outq);
800 }
801 if (tp->t_outq.c_cc == 0)
802 goto out;
803 selwakeup(&tp->t_wsel);
804 }
805 SET(tp->t_state, TS_BUSY);
806
807 if (ISSET(sc->sc_hwflags, COM_HW_ESP)) {
808 u_char buffer[1024], *cp = buffer;
809 int n = q_to_b(&tp->t_outq, cp, sizeof buffer);
810 do
811 outb(iobase + com_data, *cp++);
812 while (--n);
813 }
814 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
815 u_char buffer[16], *cp = buffer;
816 int n = q_to_b(&tp->t_outq, cp, sizeof buffer);
817 do {
818 outb(iobase + com_data, *cp++);
819 } while (--n);
820 } else
821 outb(iobase + com_data, getc(&tp->t_outq));
822 out:
823 splx(s);
824 }
825
826 /*
827 * Stop output on a line.
828 */
829 void
830 comstop(tp, flag)
831 struct tty *tp;
832 {
833 int s;
834
835 s = spltty();
836 if (ISSET(tp->t_state, TS_BUSY))
837 if (!ISSET(tp->t_state, TS_TTSTOP))
838 SET(tp->t_state, TS_FLUSH);
839 splx(s);
840 }
841
842 void
843 comdiag(arg)
844 void *arg;
845 {
846 struct com_softc *sc = arg;
847 int overflows, floods;
848 int s;
849
850 s = spltty();
851 sc->sc_errors = 0;
852 overflows = sc->sc_overflows;
853 sc->sc_overflows = 0;
854 floods = sc->sc_floods;
855 sc->sc_floods = 0;
856 splx(s);
857
858 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf overflow%s\n",
859 sc->sc_dev.dv_xname,
860 overflows, overflows == 1 ? "" : "s",
861 floods, floods == 1 ? "" : "s");
862 }
863
864 void
865 compoll(arg)
866 void *arg;
867 {
868 int unit;
869 struct com_softc *sc;
870 struct tty *tp;
871 register u_char *ibufp;
872 u_char *ibufend;
873 register int c;
874 int s;
875 static int lsrmap[8] = {
876 0, TTY_PE,
877 TTY_FE, TTY_PE|TTY_FE,
878 TTY_FE, TTY_PE|TTY_FE,
879 TTY_FE, TTY_PE|TTY_FE
880 };
881
882 s = spltty();
883 if (comevents == 0) {
884 splx(s);
885 goto out;
886 }
887 comevents = 0;
888 splx(s);
889
890 for (unit = 0; unit < comcd.cd_ndevs; unit++) {
891 sc = comcd.cd_devs[unit];
892 if (sc == 0 || sc->sc_ibufp == sc->sc_ibuf)
893 continue;
894
895 tp = sc->sc_tty;
896
897 s = spltty();
898
899 ibufp = sc->sc_ibuf;
900 ibufend = sc->sc_ibufp;
901
902 if (ibufp == ibufend) {
903 splx(s);
904 continue;
905 }
906
907 sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ?
908 sc->sc_ibufs[1] : sc->sc_ibufs[0];
909 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
910 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
911
912 if (tp == 0 || !ISSET(tp->t_state, TS_ISOPEN)) {
913 splx(s);
914 continue;
915 }
916
917 if (ISSET(tp->t_cflag, CRTSCTS) &&
918 !ISSET(sc->sc_mcr, MCR_RTS)) {
919 /* XXX */
920 SET(sc->sc_mcr, MCR_RTS);
921 outb(sc->sc_iobase + com_mcr, sc->sc_mcr);
922 }
923
924 splx(s);
925
926 while (ibufp < ibufend) {
927 c = *ibufp++;
928 if (*ibufp & LSR_OE) {
929 sc->sc_overflows++;
930 if (sc->sc_errors++ == 0)
931 timeout(comdiag, sc, 60 * hz);
932 }
933 /* This is ugly, but fast. */
934 c |= lsrmap[(*ibufp++ & (LSR_BI|LSR_FE|LSR_PE)) >> 2];
935 (*linesw[tp->t_line].l_rint)(c, tp);
936 }
937 }
938
939 out:
940 timeout(compoll, NULL, 1);
941 }
942
943 int
944 comintr(arg)
945 void *arg;
946 {
947 struct com_softc *sc = arg;
948 int iobase = sc->sc_iobase;
949 struct tty *tp;
950 u_char lsr, data, msr, delta;
951
952 if (ISSET(inb(iobase + com_iir), IIR_NOPEND))
953 return (0);
954
955 tp = sc->sc_tty;
956
957 for (;;) {
958 lsr = inb(iobase + com_lsr);
959
960 if (ISSET(lsr, LSR_RCV_MASK)) {
961 register u_char *p = sc->sc_ibufp;
962
963 comevents = 1;
964 do {
965 data = ISSET(lsr, LSR_RXRDY) ?
966 inb(iobase + com_data) : 0;
967 if (ISSET(lsr, LSR_BI)) {
968 #ifdef DDB
969 if (sc->sc_dev.dv_unit == comconsole) {
970 Debugger();
971 goto next;
972 }
973 #endif
974 data = '\0';
975 }
976 if (p >= sc->sc_ibufend) {
977 sc->sc_floods++;
978 if (sc->sc_errors++ == 0)
979 timeout(comdiag, sc, 60 * hz);
980 } else {
981 *p++ = data;
982 *p++ = lsr;
983 if (p == sc->sc_ibufhigh &&
984 ISSET(tp->t_cflag, CRTSCTS)) {
985 /* XXX */
986 CLR(sc->sc_mcr, MCR_RTS);
987 outb(iobase + com_mcr,
988 sc->sc_mcr);
989 }
990 }
991 next:
992 lsr = inb(iobase + com_lsr);
993 } while (ISSET(lsr, LSR_RCV_MASK));
994
995 sc->sc_ibufp = p;
996 }
997 #if 0
998 else if (ISSET(lsr, LSR_BI|LSR_FE|LSR_PE|LSR_OE))
999 printf("weird lsr %02x\n", lsr);
1000 #endif
1001
1002 msr = inb(iobase + com_msr);
1003
1004 if (msr != sc->sc_msr) {
1005 delta = msr ^ sc->sc_msr;
1006 sc->sc_msr = msr;
1007 if (ISSET(delta, MSR_DCD) &&
1008 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) &&
1009 (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) {
1010 CLR(sc->sc_mcr, sc->sc_dtr);
1011 outb(iobase + com_mcr, sc->sc_mcr);
1012 }
1013 if (ISSET(delta & msr, MSR_CTS) &&
1014 ISSET(tp->t_cflag, CRTSCTS)) {
1015 /* the line is up and we want to do rts/cts flow control */
1016 (*linesw[tp->t_line].l_start)(tp);
1017 }
1018 }
1019
1020 if (ISSET(lsr, LSR_TXRDY) && ISSET(tp->t_state, TS_BUSY)) {
1021 CLR(tp->t_state, TS_BUSY);
1022 if (ISSET(tp->t_state, TS_FLUSH))
1023 CLR(tp->t_state, TS_FLUSH);
1024 else
1025 (*linesw[tp->t_line].l_start)(tp);
1026 }
1027
1028 if (ISSET(inb(iobase + com_iir), IIR_NOPEND))
1029 return (1);
1030 }
1031 }
1032
1033 /*
1034 * Following are all routines needed for COM to act as console
1035 */
1036 #include <dev/cons.h>
1037
1038 void
1039 comcnprobe(cp)
1040 struct consdev *cp;
1041 {
1042
1043 if (!comprobe1(CONADDR)) {
1044 cp->cn_pri = CN_DEAD;
1045 return;
1046 }
1047
1048 /* locate the major number */
1049 for (commajor = 0; commajor < nchrdev; commajor++)
1050 if (cdevsw[commajor].d_open == comopen)
1051 break;
1052
1053 /* initialize required fields */
1054 cp->cn_dev = makedev(commajor, CONUNIT);
1055 #ifdef COMCONSOLE
1056 cp->cn_pri = CN_REMOTE; /* Force a serial port console */
1057 #else
1058 cp->cn_pri = CN_NORMAL;
1059 #endif
1060 }
1061
1062 void
1063 comcninit(cp)
1064 struct consdev *cp;
1065 {
1066
1067 cominit(CONUNIT, comdefaultrate);
1068 comconsole = CONUNIT;
1069 comconsinit = 0;
1070 }
1071
1072 cominit(unit, rate)
1073 int unit, rate;
1074 {
1075 int s = splhigh();
1076 int iobase = CONADDR;
1077 u_char stat;
1078
1079 outb(iobase + com_lcr, LCR_DLAB);
1080 rate = comspeed(comdefaultrate);
1081 outb(iobase + com_dlbl, rate);
1082 outb(iobase + com_dlbh, rate >> 8);
1083 outb(iobase + com_lcr, LCR_8BITS);
1084 outb(iobase + com_ier, IER_ERXRDY | IER_ETXRDY);
1085 outb(iobase + com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_4);
1086 stat = inb(iobase + com_iir);
1087 splx(s);
1088 }
1089
1090 comcngetc(dev)
1091 dev_t dev;
1092 {
1093 int s = splhigh();
1094 int iobase = CONADDR;
1095 u_char stat, c;
1096
1097 while (!ISSET(stat = inb(iobase + com_lsr), LSR_RXRDY))
1098 ;
1099 c = inb(iobase + com_data);
1100 stat = inb(iobase + com_iir);
1101 splx(s);
1102 return c;
1103 }
1104
1105 /*
1106 * Console kernel output character routine.
1107 */
1108 void
1109 comcnputc(dev, c)
1110 dev_t dev;
1111 int c;
1112 {
1113 int s = splhigh();
1114 int iobase = CONADDR;
1115 u_char stat;
1116 register int timo;
1117
1118 #ifdef KGDB
1119 if (dev != kgdb_dev)
1120 #endif
1121 if (comconsinit == 0) {
1122 (void) cominit(COMUNIT(dev), comdefaultrate);
1123 comconsinit = 1;
1124 }
1125 /* wait for any pending transmission to finish */
1126 timo = 50000;
1127 while (!ISSET(stat = inb(iobase + com_lsr), LSR_TXRDY) && --timo)
1128 ;
1129 outb(iobase + com_data, c);
1130 /* wait for this transmission to complete */
1131 timo = 1500000;
1132 while (!ISSET(stat = inb(iobase + com_lsr), LSR_TXRDY) && --timo)
1133 ;
1134 /* clear any interrupts generated by this transmission */
1135 stat = inb(iobase + com_iir);
1136 splx(s);
1137 }
1138
1139 void
1140 comcnpollc(dev, on)
1141 dev_t dev;
1142 int on;
1143 {
1144
1145 }
1146