com.c revision 1.65 1 /* $NetBSD: com.c,v 1.65 1996/02/10 20:23:18 christos Exp $ */
2
3 /*-
4 * Copyright (c) 1993, 1994, 1995 Charles M. Hannum. All rights reserved.
5 * Copyright (c) 1991 The Regents of the University of California.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the University of
19 * California, Berkeley and its contributors.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * @(#)com.c 7.5 (Berkeley) 5/16/91
37 */
38
39 /*
40 * COM driver, based on HP dca driver
41 * uses National Semiconductor NS16450/NS16550AF UART
42 */
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/ioctl.h>
46 #include <sys/select.h>
47 #include <sys/tty.h>
48 #include <sys/proc.h>
49 #include <sys/user.h>
50 #include <sys/conf.h>
51 #include <sys/file.h>
52 #include <sys/uio.h>
53 #include <sys/kernel.h>
54 #include <sys/syslog.h>
55 #include <sys/types.h>
56 #include <sys/device.h>
57
58 #include <machine/cpu.h>
59 #include <machine/pio.h>
60
61 #include <dev/isa/isavar.h>
62 #include <dev/isa/comreg.h>
63 #include <dev/ic/ns16550reg.h>
64 #ifdef COM_HAYESP
65 #include <dev/ic/hayespreg.h>
66 #endif
67 #define com_lcr com_cfcr
68
69 #define COM_IBUFSIZE (2 * 512)
70 #define COM_IHIGHWATER ((3 * COM_IBUFSIZE) / 4)
71
72 struct com_softc {
73 struct device sc_dev;
74 void *sc_ih;
75 struct tty *sc_tty;
76
77 int sc_overflows;
78 int sc_floods;
79 int sc_errors;
80
81 int sc_iobase;
82 #ifdef COM_HAYESP
83 int sc_hayespbase;
84 #endif
85 u_char sc_hwflags;
86 #define COM_HW_NOIEN 0x01
87 #define COM_HW_FIFO 0x02
88 #define COM_HW_HAYESP 0x04
89 #define COM_HW_CONSOLE 0x40
90 u_char sc_swflags;
91 #define COM_SW_SOFTCAR 0x01
92 #define COM_SW_CLOCAL 0x02
93 #define COM_SW_CRTSCTS 0x04
94 #define COM_SW_MDMBUF 0x08
95 u_char sc_msr, sc_mcr, sc_lcr;
96 u_char sc_dtr;
97
98 u_char *sc_ibuf, *sc_ibufp, *sc_ibufhigh, *sc_ibufend;
99 u_char sc_ibufs[2][COM_IBUFSIZE];
100 };
101
102 int comprobe __P((struct device *, void *, void *));
103 void comattach __P((struct device *, struct device *, void *));
104 int comopen __P((dev_t, int, int, struct proc *));
105 int comclose __P((dev_t, int, int, struct proc *));
106 void comdiag __P((void *));
107 int comintr __P((void *));
108 void compoll __P((void *));
109 int comparam __P((struct tty *, struct termios *));
110 void comstart __P((struct tty *));
111
112 struct cfdriver comcd = {
113 NULL, "com", comprobe, comattach, DV_TTY, sizeof(struct com_softc)
114 };
115
116 int comdefaultrate = TTYDEF_SPEED;
117 #ifdef COMCONSOLE
118 int comconsole = COMCONSOLE;
119 #else
120 int comconsole = -1;
121 #endif
122 int comconsinit;
123 int commajor;
124 int comsopen = 0;
125 int comevents = 0;
126
127 #ifdef KGDB
128 #include <machine/remote-sl.h>
129 extern int kgdb_dev;
130 extern int kgdb_rate;
131 extern int kgdb_debug_init;
132 #endif
133
134 #define COMUNIT(x) (minor(x))
135
136 /* Macros to clear/set/test flags. */
137 #define SET(t, f) (t) |= (f)
138 #define CLR(t, f) (t) &= ~(f)
139 #define ISSET(t, f) ((t) & (f))
140
141 int
142 comspeed(speed)
143 long speed;
144 {
145 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
146
147 int x, err;
148
149 if (speed == 0)
150 return 0;
151 if (speed < 0)
152 return -1;
153 x = divrnd((COM_FREQ / 16), speed);
154 if (x <= 0)
155 return -1;
156 err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000;
157 if (err < 0)
158 err = -err;
159 if (err > COM_TOLERANCE)
160 return -1;
161 return x;
162
163 #undef divrnd(n, q)
164 }
165
166 int
167 comprobe1(iobase)
168 int iobase;
169 {
170
171 /* force access to id reg */
172 outb(iobase + com_lcr, 0);
173 outb(iobase + com_iir, 0);
174 if (inb(iobase + com_iir) & 0x38)
175 return 0;
176
177 return 1;
178 }
179
180 #ifdef COM_HAYESP
181 int
182 comprobeHAYESP(iobase, sc)
183 int iobase;
184 struct com_softc *sc;
185 {
186 char val, dips;
187 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
188
189 /*
190 * Hayes ESP cards have two iobases. One is for compatibility with
191 * 16550 serial chips, and at the same ISA PC base addresses. The
192 * other is for ESP-specific enhanced features, and lies at a
193 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300).
194 */
195
196 /* Test for ESP signature */
197 if ((inb(iobase) & 0xf3) == 0)
198 return 0;
199
200 /*
201 * ESP is present at ESP enhanced base address; unknown com port
202 */
203
204 /* Get the dip-switch configurations */
205 outb(iobase + HAYESP_CMD1, HAYESP_GETDIPS);
206 dips = inb(iobase + HAYESP_STATUS1);
207
208 /* Determine which com port this ESP card services: bits 0,1 of */
209 /* dips is the port # (0-3); combaselist[val] is the com_iobase */
210 if (sc->sc_iobase != combaselist[dips & 0x03])
211 return 0;
212
213 printf(": ESP");
214
215 /* Check ESP Self Test bits. */
216 /* Check for ESP version 2.0: bits 4,5,6 == 010 */
217 outb(iobase + HAYESP_CMD1, HAYESP_GETTEST);
218 val = inb(iobase + HAYESP_STATUS1); /* Clear reg 1 */
219 val = inb(iobase + HAYESP_STATUS2);
220 if ((val & 0x70) < 0x20) {
221 printf("-old (%o)", val & 0x70);
222 /* we do not support the necessary features */
223 return 0;
224 }
225
226 /* Check for ability to emulate 16550: bit 8 == 1 */
227 if ((dips & 0x80) == 0) {
228 printf(" slave");
229 /* XXX Does slave really mean no 16550 support?? */
230 return 0;
231 }
232
233 /*
234 * If we made it this far, we are a full-featured ESP v2.0 (or
235 * better), at the correct com port address.
236 */
237
238 SET(sc->sc_hwflags, COM_HW_HAYESP);
239 printf(", 1024k fifo\n");
240 return 1;
241 }
242 #endif
243
244 int
245 comprobe(parent, match, aux)
246 struct device *parent;
247 void *match, *aux;
248 {
249 struct isa_attach_args *ia = aux;
250 int iobase = ia->ia_iobase;
251
252 if (!comprobe1(iobase))
253 return 0;
254
255 ia->ia_iosize = COM_NPORTS;
256 ia->ia_msize = 0;
257 return 1;
258 }
259
260 void
261 comattach(parent, self, aux)
262 struct device *parent, *self;
263 void *aux;
264 {
265 struct com_softc *sc = (void *)self;
266 struct isa_attach_args *ia = aux;
267 struct cfdata *cf = sc->sc_dev.dv_cfdata;
268 int iobase = ia->ia_iobase;
269 struct tty *tp;
270 #ifdef COM_HAYESP
271 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 };
272 int *hayespp;
273 #endif
274
275 sc->sc_iobase = iobase;
276 sc->sc_hwflags = ISSET(cf->cf_flags, COM_HW_NOIEN);
277 sc->sc_swflags = 0;
278
279 if (sc->sc_dev.dv_unit == comconsole)
280 delay(1000);
281
282 #ifdef COM_HAYESP
283 /* Look for a Hayes ESP board. */
284 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++)
285 if (comprobeHAYESP(*hayespp, sc)) {
286 sc->sc_hayespbase = *hayespp;
287 break;
288 }
289 /* No ESP; look for other things. */
290 if (*hayespp == 0) {
291 #endif
292
293 /* look for a NS 16550AF UART with FIFOs */
294 outb(iobase + com_fifo,
295 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14);
296 delay(100);
297 if (ISSET(inb(iobase + com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK)
298 if (ISSET(inb(iobase + com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) {
299 SET(sc->sc_hwflags, COM_HW_FIFO);
300 printf(": ns16550a, working fifo\n");
301 } else
302 printf(": ns16550, broken fifo\n");
303 else
304 printf(": ns8250 or ns16450, no fifo\n");
305 outb(iobase + com_fifo, 0);
306 #ifdef COM_HAYESP
307 }
308 #endif
309
310 /* disable interrupts */
311 outb(iobase + com_ier, 0);
312 outb(iobase + com_mcr, 0);
313
314 if (ia->ia_irq != IRQUNK)
315 sc->sc_ih = isa_intr_establish(ia->ia_irq, IST_EDGE, IPL_TTY,
316 comintr, sc);
317
318 #ifdef KGDB
319 if (kgdb_dev == makedev(commajor, unit)) {
320 if (comconsole == unit)
321 kgdb_dev = -1; /* can't debug over console port */
322 else {
323 (void) cominit(unit, kgdb_rate);
324 if (kgdb_debug_init) {
325 /*
326 * Print prefix of device name,
327 * let kgdb_connect print the rest.
328 */
329 printf("%s: ", sc->sc_dev.dv_xname);
330 kgdb_connect(1);
331 } else
332 printf("%s: kgdb enabled\n",
333 sc->sc_dev.dv_xname);
334 }
335 }
336 #endif
337
338 if (sc->sc_dev.dv_unit == comconsole) {
339 /*
340 * Need to reset baud rate, etc. of next print so reset
341 * comconsinit. Also make sure console is always "hardwired".
342 */
343 comconsinit = 0;
344 SET(sc->sc_hwflags, COM_HW_CONSOLE);
345 SET(sc->sc_swflags, COM_SW_SOFTCAR);
346 }
347 }
348
349 int
350 comopen(dev, flag, mode, p)
351 dev_t dev;
352 int flag, mode;
353 struct proc *p;
354 {
355 int unit = COMUNIT(dev);
356 struct com_softc *sc;
357 int iobase;
358 struct tty *tp;
359 int s;
360 int error = 0;
361
362 if (unit >= comcd.cd_ndevs)
363 return ENXIO;
364 sc = comcd.cd_devs[unit];
365 if (!sc)
366 return ENXIO;
367
368 if (!sc->sc_tty)
369 tp = sc->sc_tty = ttymalloc();
370 else
371 tp = sc->sc_tty;
372
373 tp->t_oproc = comstart;
374 tp->t_param = comparam;
375 tp->t_dev = dev;
376 if (!ISSET(tp->t_state, TS_ISOPEN)) {
377 SET(tp->t_state, TS_WOPEN);
378 ttychars(tp);
379 tp->t_iflag = TTYDEF_IFLAG;
380 tp->t_oflag = TTYDEF_OFLAG;
381 tp->t_cflag = TTYDEF_CFLAG;
382 if (ISSET(sc->sc_swflags, COM_SW_CLOCAL))
383 SET(tp->t_cflag, CLOCAL);
384 if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS))
385 SET(tp->t_cflag, CRTSCTS);
386 if (ISSET(sc->sc_swflags, COM_SW_MDMBUF))
387 SET(tp->t_cflag, MDMBUF);
388 tp->t_lflag = TTYDEF_LFLAG;
389 tp->t_ispeed = tp->t_ospeed = comdefaultrate;
390
391 s = spltty();
392
393 comparam(tp, &tp->t_termios);
394 ttsetwater(tp);
395
396 if (comsopen++ == 0)
397 timeout(compoll, NULL, 1);
398
399 sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0];
400 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
401 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
402
403 iobase = sc->sc_iobase;
404 #ifdef COM_HAYESP
405 /* Setup the ESP board */
406 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) {
407 int hayespbase = sc->sc_hayespbase;
408
409 outb(iobase + com_fifo,
410 FIFO_DMA_MODE|FIFO_ENABLE|
411 FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8);
412
413 /* Set 16550 compatibility mode */
414 outb(hayespbase + HAYESP_CMD1, HAYESP_SETMODE);
415 outb(hayespbase + HAYESP_CMD2,
416 HAYESP_MODE_FIFO|HAYESP_MODE_RTS|
417 HAYESP_MODE_SCALE);
418
419 /* Set RTS/CTS flow control */
420 outb(hayespbase + HAYESP_CMD1, HAYESP_SETFLOWTYPE);
421 outb(hayespbase + HAYESP_CMD2, HAYESP_FLOW_RTS);
422 outb(hayespbase + HAYESP_CMD2, HAYESP_FLOW_CTS);
423
424 /* Set flow control levels */
425 outb(hayespbase + HAYESP_CMD1, HAYESP_SETRXFLOW);
426 outb(hayespbase + HAYESP_CMD2,
427 HAYESP_HIBYTE(HAYESP_RXHIWMARK));
428 outb(hayespbase + HAYESP_CMD2,
429 HAYESP_LOBYTE(HAYESP_RXHIWMARK));
430 outb(hayespbase + HAYESP_CMD2,
431 HAYESP_HIBYTE(HAYESP_RXLOWMARK));
432 outb(hayespbase + HAYESP_CMD2,
433 HAYESP_LOBYTE(HAYESP_RXLOWMARK));
434 } else
435 #endif
436 if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
437 /* Set the FIFO threshold based on the receive speed. */
438 outb(iobase + com_fifo,
439 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST |
440 (tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8));
441 /* flush any pending I/O */
442 while (ISSET(inb(iobase + com_lsr), LSR_RXRDY))
443 (void) inb(iobase + com_data);
444 /* you turn me on, baby */
445 sc->sc_mcr = MCR_DTR | MCR_RTS;
446 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
447 SET(sc->sc_mcr, MCR_IENABLE);
448 outb(iobase + com_mcr, sc->sc_mcr);
449 outb(iobase + com_ier,
450 IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC);
451
452 sc->sc_msr = inb(iobase + com_msr);
453 if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) ||
454 ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF))
455 SET(tp->t_state, TS_CARR_ON);
456 else
457 CLR(tp->t_state, TS_CARR_ON);
458 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0)
459 return EBUSY;
460 else
461 s = spltty();
462
463 /* wait for carrier if necessary */
464 if (!ISSET(flag, O_NONBLOCK))
465 while (!ISSET(tp->t_cflag, CLOCAL) &&
466 !ISSET(tp->t_state, TS_CARR_ON)) {
467 SET(tp->t_state, TS_WOPEN);
468 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH,
469 ttopen, 0);
470 if (error) {
471 /* XXX should turn off chip if we're the
472 only waiter */
473 splx(s);
474 return error;
475 }
476 }
477 splx(s);
478
479 return (*linesw[tp->t_line].l_open)(dev, tp);
480 }
481
482 int
483 comclose(dev, flag, mode, p)
484 dev_t dev;
485 int flag, mode;
486 struct proc *p;
487 {
488 int unit = COMUNIT(dev);
489 struct com_softc *sc = comcd.cd_devs[unit];
490 struct tty *tp = sc->sc_tty;
491 int iobase = sc->sc_iobase;
492 int s;
493
494 /* XXX This is for cons.c. */
495 if (!ISSET(tp->t_state, TS_ISOPEN))
496 return 0;
497
498 (*linesw[tp->t_line].l_close)(tp, flag);
499 s = spltty();
500 CLR(sc->sc_lcr, LCR_SBREAK);
501 outb(iobase + com_lcr, sc->sc_lcr);
502 outb(iobase + com_ier, 0);
503 if (ISSET(tp->t_cflag, HUPCL) &&
504 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) {
505 /* XXX perhaps only clear DTR */
506 outb(iobase + com_mcr, 0);
507 }
508 CLR(tp->t_state, TS_BUSY | TS_FLUSH);
509 if (--comsopen == 0)
510 untimeout(compoll, NULL);
511 splx(s);
512 ttyclose(tp);
513 #ifdef notyet /* XXXX */
514 if (unit != comconsole) {
515 ttyfree(tp);
516 sc->sc_tty = 0;
517 }
518 #endif
519 return 0;
520 }
521
522 int
523 comread(dev, uio, flag)
524 dev_t dev;
525 struct uio *uio;
526 int flag;
527 {
528 struct com_softc *sc = comcd.cd_devs[COMUNIT(dev)];
529 struct tty *tp = sc->sc_tty;
530
531 return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
532 }
533
534 int
535 comwrite(dev, uio, flag)
536 dev_t dev;
537 struct uio *uio;
538 int flag;
539 {
540 struct com_softc *sc = comcd.cd_devs[COMUNIT(dev)];
541 struct tty *tp = sc->sc_tty;
542
543 return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
544 }
545
546 struct tty *
547 comtty(dev)
548 dev_t dev;
549 {
550 struct com_softc *sc = comcd.cd_devs[COMUNIT(dev)];
551 struct tty *tp = sc->sc_tty;
552
553 return (tp);
554 }
555
556 static u_char
557 tiocm_xxx2mcr(data)
558 int data;
559 {
560 u_char m = 0;
561
562 if (ISSET(data, TIOCM_DTR))
563 SET(m, MCR_DTR);
564 if (ISSET(data, TIOCM_RTS))
565 SET(m, MCR_RTS);
566 return m;
567 }
568
569 int
570 comioctl(dev, cmd, data, flag, p)
571 dev_t dev;
572 u_long cmd;
573 caddr_t data;
574 int flag;
575 struct proc *p;
576 {
577 int unit = COMUNIT(dev);
578 struct com_softc *sc = comcd.cd_devs[unit];
579 struct tty *tp = sc->sc_tty;
580 int iobase = sc->sc_iobase;
581 int error;
582
583 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
584 if (error >= 0)
585 return error;
586 error = ttioctl(tp, cmd, data, flag, p);
587 if (error >= 0)
588 return error;
589
590 switch (cmd) {
591 case TIOCSBRK:
592 SET(sc->sc_lcr, LCR_SBREAK);
593 outb(iobase + com_lcr, sc->sc_lcr);
594 break;
595 case TIOCCBRK:
596 CLR(sc->sc_lcr, LCR_SBREAK);
597 outb(iobase + com_lcr, sc->sc_lcr);
598 break;
599 case TIOCSDTR:
600 SET(sc->sc_mcr, sc->sc_dtr);
601 outb(iobase + com_mcr, sc->sc_mcr);
602 break;
603 case TIOCCDTR:
604 CLR(sc->sc_mcr, sc->sc_dtr);
605 outb(iobase + com_mcr, sc->sc_mcr);
606 break;
607 case TIOCMSET:
608 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
609 case TIOCMBIS:
610 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
611 outb(iobase + com_mcr, sc->sc_mcr);
612 break;
613 case TIOCMBIC:
614 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
615 outb(iobase + com_mcr, sc->sc_mcr);
616 break;
617 case TIOCMGET: {
618 u_char m;
619 int bits = 0;
620
621 m = sc->sc_mcr;
622 if (ISSET(m, MCR_DTR))
623 SET(bits, TIOCM_DTR);
624 if (ISSET(m, MCR_RTS))
625 SET(bits, TIOCM_RTS);
626 m = sc->sc_msr;
627 if (ISSET(m, MSR_DCD))
628 SET(bits, TIOCM_CD);
629 if (ISSET(m, MSR_CTS))
630 SET(bits, TIOCM_CTS);
631 if (ISSET(m, MSR_DSR))
632 SET(bits, TIOCM_DSR);
633 if (ISSET(m, MSR_RI | MSR_TERI))
634 SET(bits, TIOCM_RI);
635 if (inb(iobase + com_ier))
636 SET(bits, TIOCM_LE);
637 *(int *)data = bits;
638 break;
639 }
640 case TIOCGFLAGS: {
641 int driverbits, userbits = 0;
642
643 driverbits = sc->sc_swflags;
644 if (ISSET(driverbits, COM_SW_SOFTCAR))
645 SET(userbits, TIOCFLAG_SOFTCAR);
646 if (ISSET(driverbits, COM_SW_CLOCAL))
647 SET(userbits, TIOCFLAG_CLOCAL);
648 if (ISSET(driverbits, COM_SW_CRTSCTS))
649 SET(userbits, TIOCFLAG_CRTSCTS);
650 if (ISSET(driverbits, COM_SW_MDMBUF))
651 SET(userbits, TIOCFLAG_MDMBUF);
652
653 *(int *)data = userbits;
654 break;
655 }
656 case TIOCSFLAGS: {
657 int userbits, driverbits = 0;
658
659 error = suser(p->p_ucred, &p->p_acflag);
660 if (error != 0)
661 return(EPERM);
662
663 userbits = *(int *)data;
664 if (ISSET(userbits, TIOCFLAG_SOFTCAR) ||
665 ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
666 SET(driverbits, COM_SW_SOFTCAR);
667 if (ISSET(userbits, TIOCFLAG_CLOCAL))
668 SET(driverbits, COM_SW_CLOCAL);
669 if (ISSET(userbits, TIOCFLAG_CRTSCTS))
670 SET(driverbits, COM_SW_CRTSCTS);
671 if (ISSET(userbits, TIOCFLAG_MDMBUF))
672 SET(driverbits, COM_SW_MDMBUF);
673
674 sc->sc_swflags = driverbits;
675 break;
676 }
677 default:
678 return ENOTTY;
679 }
680
681 return 0;
682 }
683
684 int
685 comparam(tp, t)
686 struct tty *tp;
687 struct termios *t;
688 {
689 struct com_softc *sc = comcd.cd_devs[COMUNIT(tp->t_dev)];
690 int iobase = sc->sc_iobase;
691 int ospeed = comspeed(t->c_ospeed);
692 u_char lcr;
693 tcflag_t oldcflag;
694 int s;
695
696 /* check requested parameters */
697 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
698 return EINVAL;
699
700 lcr = sc->sc_lcr & LCR_SBREAK;
701
702 switch (ISSET(t->c_cflag, CSIZE)) {
703 case CS5:
704 SET(lcr, LCR_5BITS);
705 break;
706 case CS6:
707 SET(lcr, LCR_6BITS);
708 break;
709 case CS7:
710 SET(lcr, LCR_7BITS);
711 break;
712 case CS8:
713 SET(lcr, LCR_8BITS);
714 break;
715 }
716 if (ISSET(t->c_cflag, PARENB)) {
717 SET(lcr, LCR_PENAB);
718 if (!ISSET(t->c_cflag, PARODD))
719 SET(lcr, LCR_PEVEN);
720 }
721 if (ISSET(t->c_cflag, CSTOPB))
722 SET(lcr, LCR_STOPB);
723
724 sc->sc_lcr = lcr;
725
726 s = spltty();
727
728 if (ospeed == 0) {
729 CLR(sc->sc_mcr, MCR_DTR);
730 outb(iobase + com_mcr, sc->sc_mcr);
731 }
732
733 /*
734 * Set the FIFO threshold based on the receive speed, if we are
735 * changing it.
736 */
737 if (tp->t_ispeed != t->c_ispeed) {
738 if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
739 outb(iobase + com_fifo,
740 FIFO_ENABLE |
741 (t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8));
742 }
743
744 if (ospeed != 0) {
745 outb(iobase + com_lcr, lcr | LCR_DLAB);
746 outb(iobase + com_dlbl, ospeed);
747 outb(iobase + com_dlbh, ospeed >> 8);
748 outb(iobase + com_lcr, lcr);
749 SET(sc->sc_mcr, MCR_DTR);
750 outb(iobase + com_mcr, sc->sc_mcr);
751 } else
752 outb(iobase + com_lcr, lcr);
753
754 /* When not using CRTSCTS, RTS follows DTR. */
755 if (!ISSET(t->c_cflag, CRTSCTS)) {
756 if (ISSET(sc->sc_mcr, MCR_DTR)) {
757 if (!ISSET(sc->sc_mcr, MCR_RTS)) {
758 SET(sc->sc_mcr, MCR_RTS);
759 outb(iobase + com_mcr, sc->sc_mcr);
760 }
761 } else {
762 if (ISSET(sc->sc_mcr, MCR_RTS)) {
763 CLR(sc->sc_mcr, MCR_RTS);
764 outb(iobase + com_mcr, sc->sc_mcr);
765 }
766 }
767 sc->sc_dtr = MCR_DTR | MCR_RTS;
768 } else
769 sc->sc_dtr = MCR_DTR;
770
771 /* and copy to tty */
772 tp->t_ispeed = t->c_ispeed;
773 tp->t_ospeed = t->c_ospeed;
774 oldcflag = tp->t_cflag;
775 tp->t_cflag = t->c_cflag;
776
777 /*
778 * If DCD is off and MDMBUF is changed, ask the tty layer if we should
779 * stop the device.
780 */
781 if (!ISSET(sc->sc_msr, MSR_DCD) &&
782 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) &&
783 ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) &&
784 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
785 CLR(sc->sc_mcr, sc->sc_dtr);
786 outb(iobase + com_mcr, sc->sc_mcr);
787 }
788
789 splx(s);
790 return 0;
791 }
792
793 void
794 comstart(tp)
795 struct tty *tp;
796 {
797 struct com_softc *sc = comcd.cd_devs[COMUNIT(tp->t_dev)];
798 int iobase = sc->sc_iobase;
799 int s;
800
801 s = spltty();
802 if (ISSET(tp->t_state, TS_TTSTOP | TS_BUSY))
803 goto out;
804 if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS))
805 goto out;
806 if (tp->t_outq.c_cc <= tp->t_lowat) {
807 if (ISSET(tp->t_state, TS_ASLEEP)) {
808 CLR(tp->t_state, TS_ASLEEP);
809 wakeup(&tp->t_outq);
810 }
811 if (tp->t_outq.c_cc == 0)
812 goto out;
813 selwakeup(&tp->t_wsel);
814 }
815 SET(tp->t_state, TS_BUSY);
816
817 #ifdef COM_HAYESP
818 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) {
819 u_char buffer[1024], *cp = buffer;
820 int n = q_to_b(&tp->t_outq, cp, sizeof buffer);
821 do
822 outb(iobase + com_data, *cp++);
823 while (--n);
824 }
825 else
826 #endif
827 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
828 u_char buffer[16], *cp = buffer;
829 int n = q_to_b(&tp->t_outq, cp, sizeof buffer);
830 do {
831 outb(iobase + com_data, *cp++);
832 } while (--n);
833 } else
834 outb(iobase + com_data, getc(&tp->t_outq));
835 out:
836 splx(s);
837 }
838
839 /*
840 * Stop output on a line.
841 */
842 void
843 comstop(tp, flag)
844 struct tty *tp;
845 {
846 int s;
847
848 s = spltty();
849 if (ISSET(tp->t_state, TS_BUSY))
850 if (!ISSET(tp->t_state, TS_TTSTOP))
851 SET(tp->t_state, TS_FLUSH);
852 splx(s);
853 }
854
855 void
856 comdiag(arg)
857 void *arg;
858 {
859 struct com_softc *sc = arg;
860 int overflows, floods;
861 int s;
862
863 s = spltty();
864 sc->sc_errors = 0;
865 overflows = sc->sc_overflows;
866 sc->sc_overflows = 0;
867 floods = sc->sc_floods;
868 sc->sc_floods = 0;
869 splx(s);
870
871 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf overflow%s\n",
872 sc->sc_dev.dv_xname,
873 overflows, overflows == 1 ? "" : "s",
874 floods, floods == 1 ? "" : "s");
875 }
876
877 void
878 compoll(arg)
879 void *arg;
880 {
881 int unit;
882 struct com_softc *sc;
883 struct tty *tp;
884 register u_char *ibufp;
885 u_char *ibufend;
886 register int c;
887 int s;
888 static int lsrmap[8] = {
889 0, TTY_PE,
890 TTY_FE, TTY_PE|TTY_FE,
891 TTY_FE, TTY_PE|TTY_FE,
892 TTY_FE, TTY_PE|TTY_FE
893 };
894
895 s = spltty();
896 if (comevents == 0) {
897 splx(s);
898 goto out;
899 }
900 comevents = 0;
901 splx(s);
902
903 for (unit = 0; unit < comcd.cd_ndevs; unit++) {
904 sc = comcd.cd_devs[unit];
905 if (sc == 0 || sc->sc_ibufp == sc->sc_ibuf)
906 continue;
907
908 tp = sc->sc_tty;
909
910 s = spltty();
911
912 ibufp = sc->sc_ibuf;
913 ibufend = sc->sc_ibufp;
914
915 if (ibufp == ibufend) {
916 splx(s);
917 continue;
918 }
919
920 sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ?
921 sc->sc_ibufs[1] : sc->sc_ibufs[0];
922 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
923 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
924
925 if (tp == 0 || !ISSET(tp->t_state, TS_ISOPEN)) {
926 splx(s);
927 continue;
928 }
929
930 if (ISSET(tp->t_cflag, CRTSCTS) &&
931 !ISSET(sc->sc_mcr, MCR_RTS)) {
932 /* XXX */
933 SET(sc->sc_mcr, MCR_RTS);
934 outb(sc->sc_iobase + com_mcr, sc->sc_mcr);
935 }
936
937 splx(s);
938
939 while (ibufp < ibufend) {
940 c = *ibufp++;
941 if (*ibufp & LSR_OE) {
942 sc->sc_overflows++;
943 if (sc->sc_errors++ == 0)
944 timeout(comdiag, sc, 60 * hz);
945 }
946 /* This is ugly, but fast. */
947 c |= lsrmap[(*ibufp++ & (LSR_BI|LSR_FE|LSR_PE)) >> 2];
948 (*linesw[tp->t_line].l_rint)(c, tp);
949 }
950 }
951
952 out:
953 timeout(compoll, NULL, 1);
954 }
955
956 int
957 comintr(arg)
958 void *arg;
959 {
960 struct com_softc *sc = arg;
961 int iobase = sc->sc_iobase;
962 struct tty *tp;
963 u_char lsr, data, msr, delta;
964
965 if (ISSET(inb(iobase + com_iir), IIR_NOPEND))
966 return (0);
967
968 tp = sc->sc_tty;
969
970 for (;;) {
971 lsr = inb(iobase + com_lsr);
972
973 if (ISSET(lsr, LSR_RCV_MASK)) {
974 register u_char *p = sc->sc_ibufp;
975
976 comevents = 1;
977 do {
978 data = ISSET(lsr, LSR_RXRDY) ?
979 inb(iobase + com_data) : 0;
980 if (ISSET(lsr, LSR_BI)) {
981 #ifdef DDB
982 if (sc->sc_dev.dv_unit == comconsole) {
983 Debugger();
984 goto next;
985 }
986 #endif
987 data = '\0';
988 }
989 if (p >= sc->sc_ibufend) {
990 sc->sc_floods++;
991 if (sc->sc_errors++ == 0)
992 timeout(comdiag, sc, 60 * hz);
993 } else {
994 *p++ = data;
995 *p++ = lsr;
996 if (p == sc->sc_ibufhigh &&
997 ISSET(tp->t_cflag, CRTSCTS)) {
998 /* XXX */
999 CLR(sc->sc_mcr, MCR_RTS);
1000 outb(iobase + com_mcr,
1001 sc->sc_mcr);
1002 }
1003 }
1004 next:
1005 lsr = inb(iobase + com_lsr);
1006 } while (ISSET(lsr, LSR_RCV_MASK));
1007
1008 sc->sc_ibufp = p;
1009 }
1010 #if 0
1011 else if (ISSET(lsr, LSR_BI|LSR_FE|LSR_PE|LSR_OE))
1012 printf("weird lsr %02x\n", lsr);
1013 #endif
1014
1015 msr = inb(iobase + com_msr);
1016
1017 if (msr != sc->sc_msr) {
1018 delta = msr ^ sc->sc_msr;
1019 sc->sc_msr = msr;
1020 if (ISSET(delta, MSR_DCD) &&
1021 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) &&
1022 (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) {
1023 CLR(sc->sc_mcr, sc->sc_dtr);
1024 outb(iobase + com_mcr, sc->sc_mcr);
1025 }
1026 if (ISSET(delta & msr, MSR_CTS) &&
1027 ISSET(tp->t_cflag, CRTSCTS)) {
1028 /* the line is up and we want to do rts/cts flow control */
1029 (*linesw[tp->t_line].l_start)(tp);
1030 }
1031 }
1032
1033 if (ISSET(lsr, LSR_TXRDY) && ISSET(tp->t_state, TS_BUSY)) {
1034 CLR(tp->t_state, TS_BUSY);
1035 if (ISSET(tp->t_state, TS_FLUSH))
1036 CLR(tp->t_state, TS_FLUSH);
1037 else
1038 (*linesw[tp->t_line].l_start)(tp);
1039 }
1040
1041 if (ISSET(inb(iobase + com_iir), IIR_NOPEND))
1042 return (1);
1043 }
1044 }
1045
1046 /*
1047 * Following are all routines needed for COM to act as console
1048 */
1049 #include <dev/cons.h>
1050
1051 void
1052 comcnprobe(cp)
1053 struct consdev *cp;
1054 {
1055
1056 if (!comprobe1(CONADDR)) {
1057 cp->cn_pri = CN_DEAD;
1058 return;
1059 }
1060
1061 /* locate the major number */
1062 for (commajor = 0; commajor < nchrdev; commajor++)
1063 if (cdevsw[commajor].d_open == comopen)
1064 break;
1065
1066 /* initialize required fields */
1067 cp->cn_dev = makedev(commajor, CONUNIT);
1068 #ifdef COMCONSOLE
1069 cp->cn_pri = CN_REMOTE; /* Force a serial port console */
1070 #else
1071 cp->cn_pri = CN_NORMAL;
1072 #endif
1073 }
1074
1075 void
1076 comcninit(cp)
1077 struct consdev *cp;
1078 {
1079
1080 cominit(CONUNIT, comdefaultrate);
1081 comconsole = CONUNIT;
1082 comconsinit = 0;
1083 }
1084
1085 cominit(unit, rate)
1086 int unit, rate;
1087 {
1088 int s = splhigh();
1089 int iobase = CONADDR;
1090 u_char stat;
1091
1092 outb(iobase + com_lcr, LCR_DLAB);
1093 rate = comspeed(comdefaultrate);
1094 outb(iobase + com_dlbl, rate);
1095 outb(iobase + com_dlbh, rate >> 8);
1096 outb(iobase + com_lcr, LCR_8BITS);
1097 outb(iobase + com_ier, IER_ERXRDY | IER_ETXRDY);
1098 outb(iobase + com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_4);
1099 stat = inb(iobase + com_iir);
1100 splx(s);
1101 }
1102
1103 comcngetc(dev)
1104 dev_t dev;
1105 {
1106 int s = splhigh();
1107 int iobase = CONADDR;
1108 u_char stat, c;
1109
1110 while (!ISSET(stat = inb(iobase + com_lsr), LSR_RXRDY))
1111 ;
1112 c = inb(iobase + com_data);
1113 stat = inb(iobase + com_iir);
1114 splx(s);
1115 return c;
1116 }
1117
1118 /*
1119 * Console kernel output character routine.
1120 */
1121 void
1122 comcnputc(dev, c)
1123 dev_t dev;
1124 int c;
1125 {
1126 int s = splhigh();
1127 int iobase = CONADDR;
1128 u_char stat;
1129 register int timo;
1130
1131 #ifdef KGDB
1132 if (dev != kgdb_dev)
1133 #endif
1134 if (comconsinit == 0) {
1135 (void) cominit(COMUNIT(dev), comdefaultrate);
1136 comconsinit = 1;
1137 }
1138 /* wait for any pending transmission to finish */
1139 timo = 50000;
1140 while (!ISSET(stat = inb(iobase + com_lsr), LSR_TXRDY) && --timo)
1141 ;
1142 outb(iobase + com_data, c);
1143 /* wait for this transmission to complete */
1144 timo = 1500000;
1145 while (!ISSET(stat = inb(iobase + com_lsr), LSR_TXRDY) && --timo)
1146 ;
1147 /* clear any interrupts generated by this transmission */
1148 stat = inb(iobase + com_iir);
1149 splx(s);
1150 }
1151
1152 void
1153 comcnpollc(dev, on)
1154 dev_t dev;
1155 int on;
1156 {
1157
1158 }
1159