com.c revision 1.75
1 /* $NetBSD: com.c,v 1.75 1996/03/10 09:01:24 cgd Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996 5 * Charles M. Hannum. All rights reserved. 6 * Copyright (c) 1991 The Regents of the University of California. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)com.c 7.5 (Berkeley) 5/16/91 38 */ 39 40 /* 41 * COM driver, based on HP dca driver 42 * uses National Semiconductor NS16450/NS16550AF UART 43 */ 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/tty.h> 49 #include <sys/proc.h> 50 #include <sys/user.h> 51 #include <sys/conf.h> 52 #include <sys/file.h> 53 #include <sys/uio.h> 54 #include <sys/kernel.h> 55 #include <sys/syslog.h> 56 #include <sys/types.h> 57 #include <sys/device.h> 58 59 #include <machine/cpu.h> 60 #include <machine/bus.h> 61 62 #include <dev/isa/isavar.h> 63 #include <dev/isa/comreg.h> 64 #include <dev/isa/comvar.h> 65 #include <dev/ic/ns16550reg.h> 66 #ifdef COM_HAYESP 67 #include <dev/ic/hayespreg.h> 68 #endif 69 #define com_lcr com_cfcr 70 71 #define COM_IBUFSIZE (2 * 512) 72 #define COM_IHIGHWATER ((3 * COM_IBUFSIZE) / 4) 73 74 struct com_softc { 75 struct device sc_dev; 76 void *sc_ih; 77 struct tty *sc_tty; 78 79 int sc_overflows; 80 int sc_floods; 81 int sc_errors; 82 83 int sc_halt; 84 85 int sc_iobase; 86 #ifdef COM_HAYESP 87 int sc_hayespbase; 88 #endif 89 90 bus_chipset_tag_t sc_bc; 91 bus_io_handle_t sc_ioh; 92 bus_io_handle_t sc_hayespioh; 93 94 u_char sc_hwflags; 95 #define COM_HW_NOIEN 0x01 96 #define COM_HW_FIFO 0x02 97 #define COM_HW_HAYESP 0x04 98 #define COM_HW_CONSOLE 0x40 99 u_char sc_swflags; 100 #define COM_SW_SOFTCAR 0x01 101 #define COM_SW_CLOCAL 0x02 102 #define COM_SW_CRTSCTS 0x04 103 #define COM_SW_MDMBUF 0x08 104 u_char sc_msr, sc_mcr, sc_lcr, sc_ier; 105 u_char sc_dtr; 106 107 u_char *sc_ibuf, *sc_ibufp, *sc_ibufhigh, *sc_ibufend; 108 u_char sc_ibufs[2][COM_IBUFSIZE]; 109 }; 110 111 int comprobe __P((struct device *, void *, void *)); 112 #ifdef COM_HAYESP 113 int comprobeHAYESP __P((bus_io_handle_t hayespioh, struct com_softc *sc)); 114 #endif 115 void comattach __P((struct device *, struct device *, void *)); 116 int comopen __P((dev_t, int, int, struct proc *)); 117 int comclose __P((dev_t, int, int, struct proc *)); 118 void comdiag __P((void *)); 119 int comintr __P((void *)); 120 void compoll __P((void *)); 121 int comparam __P((struct tty *, struct termios *)); 122 void comstart __P((struct tty *)); 123 124 int cominit __P((bus_chipset_tag_t, bus_io_handle_t, int)); 125 126 struct cfdriver comcd = { 127 NULL, "com", comprobe, comattach, DV_TTY, sizeof(struct com_softc) 128 }; 129 130 #ifdef COMCONSOLE 131 int comdefaultrate = CONSPEED; /* XXX why set default? */ 132 #else 133 int comdefaultrate = TTYDEF_SPEED; 134 #endif 135 int comconsaddr; 136 int comconsinit; 137 int comconsattached; 138 bus_chipset_tag_t comconsbc; 139 bus_io_handle_t comconsioh; 140 141 int commajor; 142 int comsopen = 0; 143 int comevents = 0; 144 145 #ifdef KGDB 146 #include <machine/remote-sl.h> 147 extern int kgdb_dev; 148 extern int kgdb_rate; 149 extern int kgdb_debug_init; 150 #endif 151 152 #define COMUNIT(x) (minor(x)) 153 154 /* Macros to clear/set/test flags. */ 155 #define SET(t, f) (t) |= (f) 156 #define CLR(t, f) (t) &= ~(f) 157 #define ISSET(t, f) ((t) & (f)) 158 159 int 160 comspeed(speed) 161 long speed; 162 { 163 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 164 165 int x, err; 166 167 if (speed == 0) 168 return 0; 169 if (speed < 0) 170 return -1; 171 x = divrnd((COM_FREQ / 16), speed); 172 if (x <= 0) 173 return -1; 174 err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000; 175 if (err < 0) 176 err = -err; 177 if (err > COM_TOLERANCE) 178 return -1; 179 return x; 180 181 #undef divrnd(n, q) 182 } 183 184 int 185 comprobe1(bc, ioh, iobase) 186 bus_chipset_tag_t bc; 187 bus_io_handle_t ioh; 188 int iobase; 189 { 190 191 /* force access to id reg */ 192 bus_io_write_1(bc, ioh, com_lcr, 0); 193 bus_io_write_1(bc, ioh, com_iir, 0); 194 if (bus_io_read_1(bc, ioh, com_iir) & 0x38) 195 return 0; 196 197 return 1; 198 } 199 200 #ifdef COM_HAYESP 201 int 202 comprobeHAYESP(hayespioh, sc) 203 bus_io_handle_t hayespioh; 204 struct com_softc *sc; 205 { 206 char val, dips; 207 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 208 bus_chipset_tag_t bc = sc->sc_bc; 209 210 /* 211 * Hayes ESP cards have two iobases. One is for compatibility with 212 * 16550 serial chips, and at the same ISA PC base addresses. The 213 * other is for ESP-specific enhanced features, and lies at a 214 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 215 */ 216 217 /* Test for ESP signature */ 218 if ((bus_io_read_1(bc, hayespioh, 0) & 0xf3) == 0) 219 return 0; 220 221 /* 222 * ESP is present at ESP enhanced base address; unknown com port 223 */ 224 225 /* Get the dip-switch configurations */ 226 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 227 dips = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1); 228 229 /* Determine which com port this ESP card services: bits 0,1 of */ 230 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 231 if (sc->sc_iobase != combaselist[dips & 0x03]) 232 return 0; 233 234 printf(": ESP"); 235 236 /* Check ESP Self Test bits. */ 237 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 238 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 239 val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */ 240 val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS2); 241 if ((val & 0x70) < 0x20) { 242 printf("-old (%o)", val & 0x70); 243 /* we do not support the necessary features */ 244 return 0; 245 } 246 247 /* Check for ability to emulate 16550: bit 8 == 1 */ 248 if ((dips & 0x80) == 0) { 249 printf(" slave"); 250 /* XXX Does slave really mean no 16550 support?? */ 251 return 0; 252 } 253 254 /* 255 * If we made it this far, we are a full-featured ESP v2.0 (or 256 * better), at the correct com port address. 257 */ 258 259 SET(sc->sc_hwflags, COM_HW_HAYESP); 260 printf(", 1024 byte fifo\n"); 261 return 1; 262 } 263 #endif 264 265 int 266 comprobe(parent, match, aux) 267 struct device *parent; 268 void *match, *aux; 269 { 270 struct cfdata *cf = match; 271 bus_chipset_tag_t bc; 272 bus_io_handle_t ioh; 273 int iobase, needioh; 274 int rv = 1; 275 276 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 277 struct isa_attach_args *ia = aux; 278 279 bc = ia->ia_bc; 280 iobase = ia->ia_iobase; 281 needioh = 1; 282 } else { 283 struct commulti_attach_args *ca = aux; 284 285 if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != ca->ca_slave) 286 return (0); 287 288 bc = ca->ca_bc; 289 iobase = ca->ca_iobase; 290 ioh = ca->ca_ioh; 291 needioh = 0; 292 } 293 294 /* if it's in use as console, it's there. */ 295 if (iobase == comconsaddr && !comconsattached) 296 goto out; 297 298 if (needioh && bus_io_map(bc, iobase, COM_NPORTS, &ioh)) { 299 rv = 0; 300 goto out; 301 } 302 rv = comprobe1(bc, ioh, iobase); 303 if (needioh) 304 bus_io_unmap(bc, ioh, COM_NPORTS); 305 306 out: 307 if (rv && !strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 308 struct isa_attach_args *ia = aux; 309 310 ia->ia_iosize = COM_NPORTS; 311 ia->ia_msize = 0; 312 } 313 return (rv); 314 } 315 316 void 317 comattach(parent, self, aux) 318 struct device *parent, *self; 319 void *aux; 320 { 321 struct com_softc *sc = (void *)self; 322 struct cfdata *cf = sc->sc_dev.dv_cfdata; 323 int iobase, irq; 324 bus_chipset_tag_t bc; 325 bus_io_handle_t ioh; 326 struct tty *tp; 327 #ifdef COM_HAYESP 328 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 329 int *hayespp; 330 #endif 331 332 sc->sc_hwflags = 0; 333 sc->sc_swflags = 0; 334 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 335 struct isa_attach_args *ia = aux; 336 337 /* 338 * We're living on an isa. 339 */ 340 iobase = ia->ia_iobase; 341 bc = ia->ia_bc; 342 if (iobase != comconsaddr) { 343 if (bus_io_map(bc, iobase, COM_NPORTS, &ioh)) 344 panic("comattach: io mapping failed"); 345 } else 346 ioh = comconsioh; 347 irq = ia->ia_irq; 348 } else { 349 struct commulti_attach_args *ca = aux; 350 351 /* 352 * We're living on a commulti. 353 */ 354 iobase = ca->ca_iobase; 355 bc = ca->ca_bc; 356 ioh = ca->ca_ioh; 357 irq = IRQUNK; 358 359 if (ca->ca_noien) 360 sc->sc_hwflags |= COM_HW_NOIEN; 361 } 362 363 sc->sc_bc = bc; 364 sc->sc_ioh = ioh; 365 sc->sc_iobase = iobase; 366 367 if (iobase == comconsaddr) { 368 comconsattached = 1; 369 370 /* 371 * Need to reset baud rate, etc. of next print so reset 372 * comconsinit. Also make sure console is always "hardwired". 373 */ 374 delay(1000); /* wait for output to finish */ 375 comconsinit = 0; 376 SET(sc->sc_hwflags, COM_HW_CONSOLE); 377 SET(sc->sc_swflags, COM_SW_SOFTCAR); 378 } 379 380 #ifdef COM_HAYESP 381 /* Look for a Hayes ESP board. */ 382 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 383 bus_io_handle_t hayespioh; 384 385 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 386 if (bus_io_map(bc, *hayespp, HAYESP_NPORTS, &hayespioh)) 387 continue; 388 if (comprobeHAYESP(hayespioh, sc)) { 389 sc->sc_hayespbase = *hayespp; 390 sc->sc_hayespioh = hayespioh; 391 break; 392 } 393 bus_io_unmap(bc, hayespioh, HAYESP_NPORTS); 394 } 395 /* No ESP; look for other things. */ 396 if (*hayespp == 0) { 397 #endif 398 399 /* look for a NS 16550AF UART with FIFOs */ 400 bus_io_write_1(bc, ioh, com_fifo, 401 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 402 delay(100); 403 if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK) 404 if (ISSET(bus_io_read_1(bc, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) { 405 SET(sc->sc_hwflags, COM_HW_FIFO); 406 printf(": ns16550a, working fifo\n"); 407 } else 408 printf(": ns16550, broken fifo\n"); 409 else 410 printf(": ns8250 or ns16450, no fifo\n"); 411 bus_io_write_1(bc, ioh, com_fifo, 0); 412 #ifdef COM_HAYESP 413 } 414 #endif 415 416 /* disable interrupts */ 417 bus_io_write_1(bc, ioh, com_ier, 0); 418 bus_io_write_1(bc, ioh, com_mcr, 0); 419 420 if (irq != IRQUNK) 421 sc->sc_ih = isa_intr_establish(irq, IST_EDGE, IPL_TTY, 422 comintr, sc); 423 424 #ifdef KGDB 425 if (kgdb_dev == makedev(commajor, unit)) { 426 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 427 kgdb_dev = -1; /* can't debug over console port */ 428 else { 429 (void) cominit(bc, ioh, kgdb_rate); 430 if (kgdb_debug_init) { 431 /* 432 * Print prefix of device name, 433 * let kgdb_connect print the rest. 434 */ 435 printf("%s: ", sc->sc_dev.dv_xname); 436 kgdb_connect(1); 437 } else 438 printf("%s: kgdb enabled\n", 439 sc->sc_dev.dv_xname); 440 } 441 } 442 #endif 443 444 /* XXX maybe move up some? */ 445 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 446 printf("%s: console\n", sc->sc_dev.dv_xname); 447 } 448 449 int 450 comopen(dev, flag, mode, p) 451 dev_t dev; 452 int flag, mode; 453 struct proc *p; 454 { 455 int unit = COMUNIT(dev); 456 struct com_softc *sc; 457 bus_chipset_tag_t bc; 458 bus_io_handle_t ioh; 459 struct tty *tp; 460 int s; 461 int error = 0; 462 463 if (unit >= comcd.cd_ndevs) 464 return ENXIO; 465 sc = comcd.cd_devs[unit]; 466 if (!sc) 467 return ENXIO; 468 469 if (!sc->sc_tty) 470 tp = sc->sc_tty = ttymalloc(); 471 else 472 tp = sc->sc_tty; 473 474 tp->t_oproc = comstart; 475 tp->t_param = comparam; 476 tp->t_dev = dev; 477 if (!ISSET(tp->t_state, TS_ISOPEN)) { 478 SET(tp->t_state, TS_WOPEN); 479 ttychars(tp); 480 tp->t_iflag = TTYDEF_IFLAG; 481 tp->t_oflag = TTYDEF_OFLAG; 482 tp->t_cflag = TTYDEF_CFLAG; 483 if (ISSET(sc->sc_swflags, COM_SW_CLOCAL)) 484 SET(tp->t_cflag, CLOCAL); 485 if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS)) 486 SET(tp->t_cflag, CRTSCTS); 487 if (ISSET(sc->sc_swflags, COM_SW_MDMBUF)) 488 SET(tp->t_cflag, MDMBUF); 489 tp->t_lflag = TTYDEF_LFLAG; 490 tp->t_ispeed = tp->t_ospeed = comdefaultrate; 491 492 s = spltty(); 493 494 comparam(tp, &tp->t_termios); 495 ttsetwater(tp); 496 497 if (comsopen++ == 0) 498 timeout(compoll, NULL, 1); 499 500 sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0]; 501 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 502 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 503 504 bc = sc->sc_bc; 505 ioh = sc->sc_ioh; 506 #ifdef COM_HAYESP 507 /* Setup the ESP board */ 508 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 509 bus_io_handle_t hayespioh = sc->sc_hayespioh; 510 511 bus_io_write_1(bc, ioh, com_fifo, 512 FIFO_DMA_MODE|FIFO_ENABLE| 513 FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8); 514 515 /* Set 16550 compatibility mode */ 516 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 517 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 518 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 519 HAYESP_MODE_SCALE); 520 521 /* Set RTS/CTS flow control */ 522 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 523 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 524 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 525 526 /* Set flow control levels */ 527 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 528 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 529 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 530 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 531 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 532 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 533 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 534 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 535 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 536 } else 537 #endif 538 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 539 /* Set the FIFO threshold based on the receive speed. */ 540 bus_io_write_1(bc, ioh, com_fifo, 541 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | 542 (tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 543 /* flush any pending I/O */ 544 while (ISSET(bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY)) 545 (void) bus_io_read_1(bc, ioh, com_data); 546 /* you turn me on, baby */ 547 sc->sc_mcr = MCR_DTR | MCR_RTS; 548 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 549 SET(sc->sc_mcr, MCR_IENABLE); 550 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 551 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 552 bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); 553 554 sc->sc_msr = bus_io_read_1(bc, ioh, com_msr); 555 if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || 556 ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF)) 557 SET(tp->t_state, TS_CARR_ON); 558 else 559 CLR(tp->t_state, TS_CARR_ON); 560 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) 561 return EBUSY; 562 else 563 s = spltty(); 564 565 /* wait for carrier if necessary */ 566 if (!ISSET(flag, O_NONBLOCK)) 567 while (!ISSET(tp->t_cflag, CLOCAL) && 568 !ISSET(tp->t_state, TS_CARR_ON)) { 569 SET(tp->t_state, TS_WOPEN); 570 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 571 ttopen, 0); 572 if (error) { 573 /* XXX should turn off chip if we're the 574 only waiter */ 575 splx(s); 576 return error; 577 } 578 } 579 splx(s); 580 581 return (*linesw[tp->t_line].l_open)(dev, tp); 582 } 583 584 int 585 comclose(dev, flag, mode, p) 586 dev_t dev; 587 int flag, mode; 588 struct proc *p; 589 { 590 int unit = COMUNIT(dev); 591 struct com_softc *sc = comcd.cd_devs[unit]; 592 struct tty *tp = sc->sc_tty; 593 bus_chipset_tag_t bc = sc->sc_bc; 594 bus_io_handle_t ioh = sc->sc_ioh; 595 int s; 596 597 /* XXX This is for cons.c. */ 598 if (!ISSET(tp->t_state, TS_ISOPEN)) 599 return 0; 600 601 (*linesw[tp->t_line].l_close)(tp, flag); 602 s = spltty(); 603 CLR(sc->sc_lcr, LCR_SBREAK); 604 bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); 605 bus_io_write_1(bc, ioh, com_ier, 0); 606 if (ISSET(tp->t_cflag, HUPCL) && 607 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) { 608 /* XXX perhaps only clear DTR */ 609 bus_io_write_1(bc, ioh, com_mcr, 0); 610 } 611 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 612 if (--comsopen == 0) 613 untimeout(compoll, NULL); 614 splx(s); 615 ttyclose(tp); 616 #ifdef notyet /* XXXX */ 617 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 618 ttyfree(tp); 619 sc->sc_tty = 0; 620 } 621 #endif 622 return 0; 623 } 624 625 int 626 comread(dev, uio, flag) 627 dev_t dev; 628 struct uio *uio; 629 int flag; 630 { 631 struct com_softc *sc = comcd.cd_devs[COMUNIT(dev)]; 632 struct tty *tp = sc->sc_tty; 633 634 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 635 } 636 637 int 638 comwrite(dev, uio, flag) 639 dev_t dev; 640 struct uio *uio; 641 int flag; 642 { 643 struct com_softc *sc = comcd.cd_devs[COMUNIT(dev)]; 644 struct tty *tp = sc->sc_tty; 645 646 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 647 } 648 649 struct tty * 650 comtty(dev) 651 dev_t dev; 652 { 653 struct com_softc *sc = comcd.cd_devs[COMUNIT(dev)]; 654 struct tty *tp = sc->sc_tty; 655 656 return (tp); 657 } 658 659 static u_char 660 tiocm_xxx2mcr(data) 661 int data; 662 { 663 u_char m = 0; 664 665 if (ISSET(data, TIOCM_DTR)) 666 SET(m, MCR_DTR); 667 if (ISSET(data, TIOCM_RTS)) 668 SET(m, MCR_RTS); 669 return m; 670 } 671 672 int 673 comioctl(dev, cmd, data, flag, p) 674 dev_t dev; 675 u_long cmd; 676 caddr_t data; 677 int flag; 678 struct proc *p; 679 { 680 int unit = COMUNIT(dev); 681 struct com_softc *sc = comcd.cd_devs[unit]; 682 struct tty *tp = sc->sc_tty; 683 bus_chipset_tag_t bc = sc->sc_bc; 684 bus_io_handle_t ioh = sc->sc_ioh; 685 int error; 686 687 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 688 if (error >= 0) 689 return error; 690 error = ttioctl(tp, cmd, data, flag, p); 691 if (error >= 0) 692 return error; 693 694 switch (cmd) { 695 case TIOCSBRK: 696 SET(sc->sc_lcr, LCR_SBREAK); 697 bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); 698 break; 699 case TIOCCBRK: 700 CLR(sc->sc_lcr, LCR_SBREAK); 701 bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); 702 break; 703 case TIOCSDTR: 704 SET(sc->sc_mcr, sc->sc_dtr); 705 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 706 break; 707 case TIOCCDTR: 708 CLR(sc->sc_mcr, sc->sc_dtr); 709 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 710 break; 711 case TIOCMSET: 712 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 713 case TIOCMBIS: 714 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 715 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 716 break; 717 case TIOCMBIC: 718 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 719 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 720 break; 721 case TIOCMGET: { 722 u_char m; 723 int bits = 0; 724 725 m = sc->sc_mcr; 726 if (ISSET(m, MCR_DTR)) 727 SET(bits, TIOCM_DTR); 728 if (ISSET(m, MCR_RTS)) 729 SET(bits, TIOCM_RTS); 730 m = sc->sc_msr; 731 if (ISSET(m, MSR_DCD)) 732 SET(bits, TIOCM_CD); 733 if (ISSET(m, MSR_CTS)) 734 SET(bits, TIOCM_CTS); 735 if (ISSET(m, MSR_DSR)) 736 SET(bits, TIOCM_DSR); 737 if (ISSET(m, MSR_RI | MSR_TERI)) 738 SET(bits, TIOCM_RI); 739 if (bus_io_read_1(bc, ioh, com_ier)) 740 SET(bits, TIOCM_LE); 741 *(int *)data = bits; 742 break; 743 } 744 case TIOCGFLAGS: { 745 int driverbits, userbits = 0; 746 747 driverbits = sc->sc_swflags; 748 if (ISSET(driverbits, COM_SW_SOFTCAR)) 749 SET(userbits, TIOCFLAG_SOFTCAR); 750 if (ISSET(driverbits, COM_SW_CLOCAL)) 751 SET(userbits, TIOCFLAG_CLOCAL); 752 if (ISSET(driverbits, COM_SW_CRTSCTS)) 753 SET(userbits, TIOCFLAG_CRTSCTS); 754 if (ISSET(driverbits, COM_SW_MDMBUF)) 755 SET(userbits, TIOCFLAG_MDMBUF); 756 757 *(int *)data = userbits; 758 break; 759 } 760 case TIOCSFLAGS: { 761 int userbits, driverbits = 0; 762 763 error = suser(p->p_ucred, &p->p_acflag); 764 if (error != 0) 765 return(EPERM); 766 767 userbits = *(int *)data; 768 if (ISSET(userbits, TIOCFLAG_SOFTCAR) || 769 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 770 SET(driverbits, COM_SW_SOFTCAR); 771 if (ISSET(userbits, TIOCFLAG_CLOCAL)) 772 SET(driverbits, COM_SW_CLOCAL); 773 if (ISSET(userbits, TIOCFLAG_CRTSCTS)) 774 SET(driverbits, COM_SW_CRTSCTS); 775 if (ISSET(userbits, TIOCFLAG_MDMBUF)) 776 SET(driverbits, COM_SW_MDMBUF); 777 778 sc->sc_swflags = driverbits; 779 break; 780 } 781 default: 782 return ENOTTY; 783 } 784 785 return 0; 786 } 787 788 int 789 comparam(tp, t) 790 struct tty *tp; 791 struct termios *t; 792 { 793 struct com_softc *sc = comcd.cd_devs[COMUNIT(tp->t_dev)]; 794 bus_chipset_tag_t bc = sc->sc_bc; 795 bus_io_handle_t ioh = sc->sc_ioh; 796 int ospeed = comspeed(t->c_ospeed); 797 u_char lcr; 798 tcflag_t oldcflag; 799 int s; 800 801 /* check requested parameters */ 802 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed)) 803 return EINVAL; 804 805 lcr = ISSET(sc->sc_lcr, LCR_SBREAK); 806 807 switch (ISSET(t->c_cflag, CSIZE)) { 808 case CS5: 809 SET(lcr, LCR_5BITS); 810 break; 811 case CS6: 812 SET(lcr, LCR_6BITS); 813 break; 814 case CS7: 815 SET(lcr, LCR_7BITS); 816 break; 817 case CS8: 818 SET(lcr, LCR_8BITS); 819 break; 820 } 821 if (ISSET(t->c_cflag, PARENB)) { 822 SET(lcr, LCR_PENAB); 823 if (!ISSET(t->c_cflag, PARODD)) 824 SET(lcr, LCR_PEVEN); 825 } 826 if (ISSET(t->c_cflag, CSTOPB)) 827 SET(lcr, LCR_STOPB); 828 829 sc->sc_lcr = lcr; 830 831 s = spltty(); 832 833 if (ospeed == 0) { 834 CLR(sc->sc_mcr, MCR_DTR); 835 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 836 } 837 838 /* 839 * Set the FIFO threshold based on the receive speed, if we are 840 * changing it. 841 */ 842 #if 1 843 if (tp->t_ispeed != t->c_ispeed) { 844 #else 845 if (1) { 846 #endif 847 if (ospeed != 0) { 848 /* 849 * Make sure the transmit FIFO is empty before 850 * proceeding. If we don't do this, some revisions 851 * of the UART will hang. Interestingly enough, 852 * even if we do this will the last character is 853 * still being pushed out, they don't hang. This 854 * seems good enough. 855 */ 856 while (ISSET(tp->t_state, TS_BUSY)) { 857 int error; 858 859 ++sc->sc_halt; 860 error = ttysleep(tp, &tp->t_outq, 861 TTOPRI | PCATCH, "comprm", 0); 862 --sc->sc_halt; 863 if (error) { 864 splx(s); 865 comstart(tp); 866 return (error); 867 } 868 } 869 870 bus_io_write_1(bc, ioh, com_lcr, lcr | LCR_DLAB); 871 bus_io_write_1(bc, ioh, com_dlbl, ospeed); 872 bus_io_write_1(bc, ioh, com_dlbh, ospeed >> 8); 873 bus_io_write_1(bc, ioh, com_lcr, lcr); 874 SET(sc->sc_mcr, MCR_DTR); 875 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 876 } else 877 bus_io_write_1(bc, ioh, com_lcr, lcr); 878 879 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP) && 880 ISSET(sc->sc_hwflags, COM_HW_FIFO)) 881 bus_io_write_1(bc, ioh, com_fifo, 882 FIFO_ENABLE | 883 (t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 884 } else 885 bus_io_write_1(bc, ioh, com_lcr, lcr); 886 887 /* When not using CRTSCTS, RTS follows DTR. */ 888 if (!ISSET(t->c_cflag, CRTSCTS)) { 889 if (ISSET(sc->sc_mcr, MCR_DTR)) { 890 if (!ISSET(sc->sc_mcr, MCR_RTS)) { 891 SET(sc->sc_mcr, MCR_RTS); 892 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 893 } 894 } else { 895 if (ISSET(sc->sc_mcr, MCR_RTS)) { 896 CLR(sc->sc_mcr, MCR_RTS); 897 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 898 } 899 } 900 sc->sc_dtr = MCR_DTR | MCR_RTS; 901 } else 902 sc->sc_dtr = MCR_DTR; 903 904 /* and copy to tty */ 905 tp->t_ispeed = t->c_ispeed; 906 tp->t_ospeed = t->c_ospeed; 907 oldcflag = tp->t_cflag; 908 tp->t_cflag = t->c_cflag; 909 910 /* 911 * If DCD is off and MDMBUF is changed, ask the tty layer if we should 912 * stop the device. 913 */ 914 if (!ISSET(sc->sc_msr, MSR_DCD) && 915 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 916 ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) && 917 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) { 918 CLR(sc->sc_mcr, sc->sc_dtr); 919 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 920 } 921 922 /* Just to be sure... */ 923 splx(s); 924 comstart(tp); 925 return 0; 926 } 927 928 void 929 comstart(tp) 930 struct tty *tp; 931 { 932 struct com_softc *sc = comcd.cd_devs[COMUNIT(tp->t_dev)]; 933 bus_chipset_tag_t bc = sc->sc_bc; 934 bus_io_handle_t ioh = sc->sc_ioh; 935 int s; 936 937 s = spltty(); 938 if (ISSET(tp->t_state, TS_BUSY)) 939 goto out; 940 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP) || 941 sc->sc_halt > 0) 942 goto stopped; 943 if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS)) 944 goto stopped; 945 if (tp->t_outq.c_cc <= tp->t_lowat) { 946 if (ISSET(tp->t_state, TS_ASLEEP)) { 947 CLR(tp->t_state, TS_ASLEEP); 948 wakeup(&tp->t_outq); 949 } 950 if (tp->t_outq.c_cc == 0) 951 goto stopped; 952 selwakeup(&tp->t_wsel); 953 } 954 SET(tp->t_state, TS_BUSY); 955 956 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 957 SET(sc->sc_ier, IER_ETXRDY); 958 bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); 959 } 960 #ifdef COM_HAYESP 961 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 962 u_char buffer[1024], *cp = buffer; 963 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 964 do 965 bus_io_write_1(bc, ioh, com_data, *cp++); 966 while (--n); 967 } 968 else 969 #endif 970 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) { 971 u_char buffer[16], *cp = buffer; 972 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 973 do { 974 bus_io_write_1(bc, ioh, com_data, *cp++); 975 } while (--n); 976 } else 977 bus_io_write_1(bc, ioh, com_data, getc(&tp->t_outq)); 978 out: 979 splx(s); 980 return; 981 stopped: 982 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 983 CLR(sc->sc_ier, IER_ETXRDY); 984 bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); 985 } 986 splx(s); 987 } 988 989 /* 990 * Stop output on a line. 991 */ 992 void 993 comstop(tp, flag) 994 struct tty *tp; 995 { 996 int s; 997 998 s = spltty(); 999 if (ISSET(tp->t_state, TS_BUSY)) 1000 if (!ISSET(tp->t_state, TS_TTSTOP)) 1001 SET(tp->t_state, TS_FLUSH); 1002 splx(s); 1003 } 1004 1005 void 1006 comdiag(arg) 1007 void *arg; 1008 { 1009 struct com_softc *sc = arg; 1010 int overflows, floods; 1011 int s; 1012 1013 s = spltty(); 1014 sc->sc_errors = 0; 1015 overflows = sc->sc_overflows; 1016 sc->sc_overflows = 0; 1017 floods = sc->sc_floods; 1018 sc->sc_floods = 0; 1019 splx(s); 1020 1021 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf overflow%s\n", 1022 sc->sc_dev.dv_xname, 1023 overflows, overflows == 1 ? "" : "s", 1024 floods, floods == 1 ? "" : "s"); 1025 } 1026 1027 void 1028 compoll(arg) 1029 void *arg; 1030 { 1031 int unit; 1032 struct com_softc *sc; 1033 struct tty *tp; 1034 register u_char *ibufp; 1035 u_char *ibufend; 1036 register int c; 1037 int s; 1038 static int lsrmap[8] = { 1039 0, TTY_PE, 1040 TTY_FE, TTY_PE|TTY_FE, 1041 TTY_FE, TTY_PE|TTY_FE, 1042 TTY_FE, TTY_PE|TTY_FE 1043 }; 1044 1045 s = spltty(); 1046 if (comevents == 0) { 1047 splx(s); 1048 goto out; 1049 } 1050 comevents = 0; 1051 splx(s); 1052 1053 for (unit = 0; unit < comcd.cd_ndevs; unit++) { 1054 sc = comcd.cd_devs[unit]; 1055 if (sc == 0 || sc->sc_ibufp == sc->sc_ibuf) 1056 continue; 1057 1058 tp = sc->sc_tty; 1059 1060 s = spltty(); 1061 1062 ibufp = sc->sc_ibuf; 1063 ibufend = sc->sc_ibufp; 1064 1065 if (ibufp == ibufend) { 1066 splx(s); 1067 continue; 1068 } 1069 1070 sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ? 1071 sc->sc_ibufs[1] : sc->sc_ibufs[0]; 1072 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 1073 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 1074 1075 if (tp == 0 || !ISSET(tp->t_state, TS_ISOPEN)) { 1076 splx(s); 1077 continue; 1078 } 1079 1080 if (ISSET(tp->t_cflag, CRTSCTS) && 1081 !ISSET(sc->sc_mcr, MCR_RTS)) { 1082 /* XXX */ 1083 SET(sc->sc_mcr, MCR_RTS); 1084 bus_io_write_1(sc->sc_bc, sc->sc_ioh, com_mcr, 1085 sc->sc_mcr); 1086 } 1087 1088 splx(s); 1089 1090 while (ibufp < ibufend) { 1091 c = *ibufp++; 1092 if (*ibufp & LSR_OE) { 1093 sc->sc_overflows++; 1094 if (sc->sc_errors++ == 0) 1095 timeout(comdiag, sc, 60 * hz); 1096 } 1097 /* This is ugly, but fast. */ 1098 c |= lsrmap[(*ibufp++ & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1099 (*linesw[tp->t_line].l_rint)(c, tp); 1100 } 1101 } 1102 1103 out: 1104 timeout(compoll, NULL, 1); 1105 } 1106 1107 int 1108 comintr(arg) 1109 void *arg; 1110 { 1111 struct com_softc *sc = arg; 1112 bus_chipset_tag_t bc = sc->sc_bc; 1113 bus_io_handle_t ioh = sc->sc_ioh; 1114 struct tty *tp; 1115 u_char lsr, data, msr, delta; 1116 #ifdef COM_DEBUG 1117 int n; 1118 struct { 1119 u_char iir, lsr, msr; 1120 } iter[32]; 1121 #endif 1122 1123 #ifdef COM_DEBUG 1124 n = 0; 1125 if (ISSET(iter[n].iir = bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1126 return (0); 1127 #else 1128 if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1129 return (0); 1130 #endif 1131 1132 tp = sc->sc_tty; 1133 1134 for (;;) { 1135 #ifdef COM_DEBUG 1136 iter[n].lsr = 1137 #endif 1138 lsr = bus_io_read_1(bc, ioh, com_lsr); 1139 1140 if (ISSET(lsr, LSR_RXRDY)) { 1141 register u_char *p = sc->sc_ibufp; 1142 1143 comevents = 1; 1144 do { 1145 data = bus_io_read_1(bc, ioh, com_data); 1146 if (ISSET(lsr, LSR_BI)) { 1147 #ifdef notdef 1148 printf("break %02x %02x %02x %02x\n", 1149 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, 1150 sc->sc_dtr); 1151 #endif 1152 #ifdef DDB 1153 if (ISSET(sc->sc_hwflags, 1154 COM_HW_CONSOLE)) { 1155 Debugger(); 1156 goto next; 1157 } 1158 #endif 1159 } 1160 if (p >= sc->sc_ibufend) { 1161 sc->sc_floods++; 1162 if (sc->sc_errors++ == 0) 1163 timeout(comdiag, sc, 60 * hz); 1164 } else { 1165 *p++ = data; 1166 *p++ = lsr; 1167 if (p == sc->sc_ibufhigh && 1168 ISSET(tp->t_cflag, CRTSCTS)) { 1169 /* XXX */ 1170 CLR(sc->sc_mcr, MCR_RTS); 1171 bus_io_write_1(bc, ioh, com_mcr, 1172 sc->sc_mcr); 1173 } 1174 } 1175 next: 1176 #ifdef COM_DEBUG 1177 if (++n >= 32) 1178 goto ohfudge; 1179 iter[n].lsr = 1180 #endif 1181 lsr = bus_io_read_1(bc, ioh, com_lsr); 1182 } while (ISSET(lsr, LSR_RXRDY)); 1183 1184 sc->sc_ibufp = p; 1185 } 1186 #ifdef COM_DEBUG 1187 else if (ISSET(lsr, LSR_BI|LSR_FE|LSR_PE|LSR_OE)) 1188 printf("weird lsr %02x\n", lsr); 1189 #endif 1190 1191 #ifdef COM_DEBUG 1192 iter[n].msr = 1193 #endif 1194 msr = bus_io_read_1(bc, ioh, com_msr); 1195 1196 if (msr != sc->sc_msr) { 1197 delta = msr ^ sc->sc_msr; 1198 sc->sc_msr = msr; 1199 if (ISSET(delta, MSR_DCD) && 1200 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 1201 (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) { 1202 CLR(sc->sc_mcr, sc->sc_dtr); 1203 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 1204 } 1205 if (ISSET(delta & msr, MSR_CTS) && 1206 ISSET(tp->t_cflag, CRTSCTS)) { 1207 /* the line is up and we want to do rts/cts flow control */ 1208 (*linesw[tp->t_line].l_start)(tp); 1209 } 1210 } 1211 1212 if (ISSET(lsr, LSR_TXRDY) && ISSET(tp->t_state, TS_BUSY)) { 1213 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 1214 if (sc->sc_halt > 0) 1215 wakeup(&tp->t_outq); 1216 (*linesw[tp->t_line].l_start)(tp); 1217 } 1218 1219 #ifdef COM_DEBUG 1220 if (++n >= 32) 1221 goto ohfudge; 1222 if (ISSET(iter[n].iir = bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1223 return (1); 1224 #else 1225 if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1226 return (1); 1227 #endif 1228 } 1229 #ifdef COM_DEBUG 1230 ohfudge: 1231 printf("comintr: too many iterations"); 1232 for (n = 0; n < 32; n++) { 1233 if ((n % 4) == 0) 1234 printf("\ncomintr: iter[%02d]", n); 1235 printf(" %02x %02x %02x", iter[n].iir, iter[n].lsr, iter[n].msr); 1236 } 1237 printf("\n"); 1238 printf("comintr: msr %02x mcr %02x lcr %02x ier %02x\n", 1239 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, sc->sc_ier); 1240 printf("comintr: state %08x cc %d\n", sc->sc_tty->t_state, 1241 sc->sc_tty->t_outq.c_cc); 1242 #endif 1243 } 1244 1245 /* 1246 * Following are all routines needed for COM to act as console 1247 */ 1248 #include <dev/cons.h> 1249 1250 void 1251 comcnprobe(cp) 1252 struct consdev *cp; 1253 { 1254 bus_chipset_tag_t bc; 1255 bus_io_handle_t ioh; 1256 int found; 1257 1258 #if 0 1259 XXX NEEDS TO BE FIXED XXX 1260 bc = ???; 1261 #endif 1262 if (bus_io_map(bc, CONADDR, COM_NPORTS, &ioh)) { 1263 cp->cn_pri = CN_DEAD; 1264 return; 1265 } 1266 found = comprobe1(bc, ioh, CONADDR); 1267 bus_io_unmap(bc, ioh, COM_NPORTS); 1268 if (!found) { 1269 cp->cn_pri = CN_DEAD; 1270 return; 1271 } 1272 1273 /* locate the major number */ 1274 for (commajor = 0; commajor < nchrdev; commajor++) 1275 if (cdevsw[commajor].d_open == comopen) 1276 break; 1277 1278 /* initialize required fields */ 1279 cp->cn_dev = makedev(commajor, CONUNIT); 1280 #ifdef COMCONSOLE 1281 cp->cn_pri = CN_REMOTE; /* Force a serial port console */ 1282 #else 1283 cp->cn_pri = CN_NORMAL; 1284 #endif 1285 } 1286 1287 void 1288 comcninit(cp) 1289 struct consdev *cp; 1290 { 1291 1292 #if 0 1293 XXX NEEDS TO BE FIXED XXX 1294 comconsbc = ???; 1295 #endif 1296 if (bus_io_map(comconsbc, CONADDR, COM_NPORTS, &comconsioh)) 1297 panic("comcninit: mapping failed"); 1298 1299 cominit(comconsbc, comconsioh, comdefaultrate); 1300 comconsaddr = CONADDR; 1301 comconsinit = 0; 1302 } 1303 1304 cominit(bc, ioh, rate) 1305 bus_chipset_tag_t bc; 1306 bus_io_handle_t ioh; 1307 int rate; 1308 { 1309 int s = splhigh(); 1310 u_char stat; 1311 1312 bus_io_write_1(bc, ioh, com_lcr, LCR_DLAB); 1313 rate = comspeed(comdefaultrate); 1314 bus_io_write_1(bc, ioh, com_dlbl, rate); 1315 bus_io_write_1(bc, ioh, com_dlbh, rate >> 8); 1316 bus_io_write_1(bc, ioh, com_lcr, LCR_8BITS); 1317 bus_io_write_1(bc, ioh, com_ier, IER_ERXRDY | IER_ETXRDY); 1318 bus_io_write_1(bc, ioh, com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_4); 1319 stat = bus_io_read_1(bc, ioh, com_iir); 1320 splx(s); 1321 } 1322 1323 comcngetc(dev) 1324 dev_t dev; 1325 { 1326 int s = splhigh(); 1327 bus_chipset_tag_t bc = comconsbc; 1328 bus_io_handle_t ioh = comconsioh; 1329 u_char stat, c; 1330 1331 while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY)) 1332 ; 1333 c = bus_io_read_1(bc, ioh, com_data); 1334 stat = bus_io_read_1(bc, ioh, com_iir); 1335 splx(s); 1336 return c; 1337 } 1338 1339 /* 1340 * Console kernel output character routine. 1341 */ 1342 void 1343 comcnputc(dev, c) 1344 dev_t dev; 1345 int c; 1346 { 1347 int s = splhigh(); 1348 bus_chipset_tag_t bc = comconsbc; 1349 bus_io_handle_t ioh = comconsioh; 1350 u_char stat; 1351 register int timo; 1352 1353 #ifdef KGDB 1354 if (dev != kgdb_dev) 1355 #endif 1356 if (comconsinit == 0) { 1357 (void) cominit(bc, ioh, comdefaultrate); 1358 comconsinit = 1; 1359 } 1360 /* wait for any pending transmission to finish */ 1361 timo = 50000; 1362 while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo) 1363 ; 1364 bus_io_write_1(bc, ioh, com_data, c); 1365 /* wait for this transmission to complete */ 1366 timo = 1500000; 1367 while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo) 1368 ; 1369 /* clear any interrupts generated by this transmission */ 1370 stat = bus_io_read_1(bc, ioh, com_iir); 1371 splx(s); 1372 } 1373 1374 void 1375 comcnpollc(dev, on) 1376 dev_t dev; 1377 int on; 1378 { 1379 1380 } 1381
Indexes created Tue Sep 23 14:10:03 GMT 2025