com.c revision 1.78
1 /* $NetBSD: com.c,v 1.78 1996/04/11 22:28:31 cgd Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996 5 * Charles M. Hannum. All rights reserved. 6 * Copyright (c) 1991 The Regents of the University of California. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)com.c 7.5 (Berkeley) 5/16/91 38 */ 39 40 /* 41 * COM driver, based on HP dca driver 42 * uses National Semiconductor NS16450/NS16550AF UART 43 */ 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/tty.h> 49 #include <sys/proc.h> 50 #include <sys/user.h> 51 #include <sys/conf.h> 52 #include <sys/file.h> 53 #include <sys/uio.h> 54 #include <sys/kernel.h> 55 #include <sys/syslog.h> 56 #include <sys/types.h> 57 #include <sys/device.h> 58 59 #ifdef i386 /* XXX */ 60 #include <machine/cpu.h> /* XXX */ 61 #else /* XXX */ 62 #include <machine/intr.h> 63 #endif /* XXX */ 64 #include <machine/bus.h> 65 66 #include <dev/isa/isavar.h> 67 #include <dev/isa/comreg.h> 68 #include <dev/isa/comvar.h> 69 #include <dev/ic/ns16550reg.h> 70 #ifdef COM_HAYESP 71 #include <dev/ic/hayespreg.h> 72 #endif 73 #define com_lcr com_cfcr 74 75 #include "com.h" 76 77 #define COM_IBUFSIZE (2 * 512) 78 #define COM_IHIGHWATER ((3 * COM_IBUFSIZE) / 4) 79 80 struct com_softc { 81 struct device sc_dev; 82 void *sc_ih; 83 struct tty *sc_tty; 84 85 int sc_overflows; 86 int sc_floods; 87 int sc_errors; 88 89 int sc_halt; 90 91 int sc_iobase; 92 #ifdef COM_HAYESP 93 int sc_hayespbase; 94 #endif 95 96 bus_chipset_tag_t sc_bc; 97 bus_io_handle_t sc_ioh; 98 bus_io_handle_t sc_hayespioh; 99 100 u_char sc_hwflags; 101 #define COM_HW_NOIEN 0x01 102 #define COM_HW_FIFO 0x02 103 #define COM_HW_HAYESP 0x04 104 #define COM_HW_CONSOLE 0x40 105 u_char sc_swflags; 106 #define COM_SW_SOFTCAR 0x01 107 #define COM_SW_CLOCAL 0x02 108 #define COM_SW_CRTSCTS 0x04 109 #define COM_SW_MDMBUF 0x08 110 u_char sc_msr, sc_mcr, sc_lcr, sc_ier; 111 u_char sc_dtr; 112 113 u_char *sc_ibuf, *sc_ibufp, *sc_ibufhigh, *sc_ibufend; 114 u_char sc_ibufs[2][COM_IBUFSIZE]; 115 }; 116 117 #ifdef COM_HAYESP 118 int comprobeHAYESP __P((bus_io_handle_t hayespioh, struct com_softc *sc)); 119 #endif 120 int comopen __P((dev_t, int, int, struct proc *)); 121 int comclose __P((dev_t, int, int, struct proc *)); 122 void comdiag __P((void *)); 123 int comintr __P((void *)); 124 void compoll __P((void *)); 125 int comparam __P((struct tty *, struct termios *)); 126 void comstart __P((struct tty *)); 127 128 /* 129 * XXX the following two cfattach structs should be different, and possibly 130 * XXX elsewhere. 131 */ 132 int comprobe __P((struct device *, void *, void *)); 133 void comattach __P((struct device *, struct device *, void *)); 134 135 #if NCOM_ISA 136 struct cfattach com_isa_ca = { 137 sizeof(struct com_softc), comprobe, comattach 138 }; 139 #endif 140 141 #if NCOM_COMMULTI 142 struct cfattach com_commulti_ca = { 143 sizeof(struct com_softc), comprobe, comattach 144 }; 145 #endif 146 147 struct cfdriver com_cd = { 148 NULL, "com", DV_TTY 149 }; 150 151 int cominit __P((bus_chipset_tag_t, bus_io_handle_t, int)); 152 153 #ifdef COMCONSOLE 154 int comdefaultrate = CONSPEED; /* XXX why set default? */ 155 #else 156 int comdefaultrate = TTYDEF_SPEED; 157 #endif 158 int comconsaddr; 159 int comconsinit; 160 int comconsattached; 161 bus_chipset_tag_t comconsbc; 162 bus_io_handle_t comconsioh; 163 164 int commajor; 165 int comsopen = 0; 166 int comevents = 0; 167 168 #ifdef KGDB 169 #include <machine/remote-sl.h> 170 extern int kgdb_dev; 171 extern int kgdb_rate; 172 extern int kgdb_debug_init; 173 #endif 174 175 #define COMUNIT(x) (minor(x)) 176 177 /* Macros to clear/set/test flags. */ 178 #define SET(t, f) (t) |= (f) 179 #define CLR(t, f) (t) &= ~(f) 180 #define ISSET(t, f) ((t) & (f)) 181 182 int 183 comspeed(speed) 184 long speed; 185 { 186 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 187 188 int x, err; 189 190 if (speed == 0) 191 return 0; 192 if (speed < 0) 193 return -1; 194 x = divrnd((COM_FREQ / 16), speed); 195 if (x <= 0) 196 return -1; 197 err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000; 198 if (err < 0) 199 err = -err; 200 if (err > COM_TOLERANCE) 201 return -1; 202 return x; 203 204 #undef divrnd(n, q) 205 } 206 207 int 208 comprobe1(bc, ioh, iobase) 209 bus_chipset_tag_t bc; 210 bus_io_handle_t ioh; 211 int iobase; 212 { 213 214 /* force access to id reg */ 215 bus_io_write_1(bc, ioh, com_lcr, 0); 216 bus_io_write_1(bc, ioh, com_iir, 0); 217 if (bus_io_read_1(bc, ioh, com_iir) & 0x38) 218 return 0; 219 220 return 1; 221 } 222 223 #ifdef COM_HAYESP 224 int 225 comprobeHAYESP(hayespioh, sc) 226 bus_io_handle_t hayespioh; 227 struct com_softc *sc; 228 { 229 char val, dips; 230 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 231 bus_chipset_tag_t bc = sc->sc_bc; 232 233 /* 234 * Hayes ESP cards have two iobases. One is for compatibility with 235 * 16550 serial chips, and at the same ISA PC base addresses. The 236 * other is for ESP-specific enhanced features, and lies at a 237 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 238 */ 239 240 /* Test for ESP signature */ 241 if ((bus_io_read_1(bc, hayespioh, 0) & 0xf3) == 0) 242 return 0; 243 244 /* 245 * ESP is present at ESP enhanced base address; unknown com port 246 */ 247 248 /* Get the dip-switch configurations */ 249 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 250 dips = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1); 251 252 /* Determine which com port this ESP card services: bits 0,1 of */ 253 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 254 if (sc->sc_iobase != combaselist[dips & 0x03]) 255 return 0; 256 257 printf(": ESP"); 258 259 /* Check ESP Self Test bits. */ 260 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 261 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 262 val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */ 263 val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS2); 264 if ((val & 0x70) < 0x20) { 265 printf("-old (%o)", val & 0x70); 266 /* we do not support the necessary features */ 267 return 0; 268 } 269 270 /* Check for ability to emulate 16550: bit 8 == 1 */ 271 if ((dips & 0x80) == 0) { 272 printf(" slave"); 273 /* XXX Does slave really mean no 16550 support?? */ 274 return 0; 275 } 276 277 /* 278 * If we made it this far, we are a full-featured ESP v2.0 (or 279 * better), at the correct com port address. 280 */ 281 282 SET(sc->sc_hwflags, COM_HW_HAYESP); 283 printf(", 1024 byte fifo\n"); 284 return 1; 285 } 286 #endif 287 288 int 289 comprobe(parent, match, aux) 290 struct device *parent; 291 void *match, *aux; 292 { 293 struct cfdata *cf = match; 294 bus_chipset_tag_t bc; 295 bus_io_handle_t ioh; 296 int iobase, needioh; 297 int rv = 1; 298 299 /* 300 * XXX should be broken out into functions for isa probe and 301 * XXX for commulti probe, with a helper function that contains 302 * XXX most of the interesting stuff. 303 */ 304 #if NCOM_ISA 305 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 306 struct isa_attach_args *ia = aux; 307 308 bc = ia->ia_bc; 309 iobase = ia->ia_iobase; 310 needioh = 1; 311 } else 312 #endif 313 #if NCOM_COMMULTI 314 if (1) { 315 struct commulti_attach_args *ca = aux; 316 317 if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != ca->ca_slave) 318 return (0); 319 320 bc = ca->ca_bc; 321 iobase = ca->ca_iobase; 322 ioh = ca->ca_ioh; 323 needioh = 0; 324 } else 325 #endif 326 return(0); /* This cannot happen */ 327 328 /* if it's in use as console, it's there. */ 329 if (iobase == comconsaddr && !comconsattached) 330 goto out; 331 332 if (needioh && bus_io_map(bc, iobase, COM_NPORTS, &ioh)) { 333 rv = 0; 334 goto out; 335 } 336 rv = comprobe1(bc, ioh, iobase); 337 if (needioh) 338 bus_io_unmap(bc, ioh, COM_NPORTS); 339 340 out: 341 #if NCOM_ISA 342 if (rv && !strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 343 struct isa_attach_args *ia = aux; 344 345 ia->ia_iosize = COM_NPORTS; 346 ia->ia_msize = 0; 347 } 348 #endif 349 return (rv); 350 } 351 352 void 353 comattach(parent, self, aux) 354 struct device *parent, *self; 355 void *aux; 356 { 357 struct com_softc *sc = (void *)self; 358 struct cfdata *cf = sc->sc_dev.dv_cfdata; 359 int iobase, irq; 360 bus_chipset_tag_t bc; 361 bus_io_handle_t ioh; 362 struct tty *tp; 363 #ifdef COM_HAYESP 364 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 365 int *hayespp; 366 #endif 367 368 /* 369 * XXX should be broken out into functions for isa attach and 370 * XXX for commulti attach, with a helper function that contains 371 * XXX most of the interesting stuff. 372 */ 373 sc->sc_hwflags = 0; 374 sc->sc_swflags = 0; 375 #if NCOM_ISA 376 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 377 struct isa_attach_args *ia = aux; 378 379 /* 380 * We're living on an isa. 381 */ 382 iobase = ia->ia_iobase; 383 bc = ia->ia_bc; 384 if (iobase != comconsaddr) { 385 if (bus_io_map(bc, iobase, COM_NPORTS, &ioh)) 386 panic("comattach: io mapping failed"); 387 } else 388 ioh = comconsioh; 389 irq = ia->ia_irq; 390 } else 391 #endif 392 #if NCOM_COMMULTI 393 if (1) { 394 struct commulti_attach_args *ca = aux; 395 396 /* 397 * We're living on a commulti. 398 */ 399 iobase = ca->ca_iobase; 400 bc = ca->ca_bc; 401 ioh = ca->ca_ioh; 402 irq = IRQUNK; 403 404 if (ca->ca_noien) 405 sc->sc_hwflags |= COM_HW_NOIEN; 406 } else 407 #endif 408 panic("comattach: impossible"); 409 410 sc->sc_bc = bc; 411 sc->sc_ioh = ioh; 412 sc->sc_iobase = iobase; 413 414 if (iobase == comconsaddr) { 415 comconsattached = 1; 416 417 /* 418 * Need to reset baud rate, etc. of next print so reset 419 * comconsinit. Also make sure console is always "hardwired". 420 */ 421 delay(1000); /* wait for output to finish */ 422 comconsinit = 0; 423 SET(sc->sc_hwflags, COM_HW_CONSOLE); 424 SET(sc->sc_swflags, COM_SW_SOFTCAR); 425 } 426 427 #ifdef COM_HAYESP 428 /* Look for a Hayes ESP board. */ 429 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 430 bus_io_handle_t hayespioh; 431 432 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 433 if (bus_io_map(bc, *hayespp, HAYESP_NPORTS, &hayespioh)) 434 continue; 435 if (comprobeHAYESP(hayespioh, sc)) { 436 sc->sc_hayespbase = *hayespp; 437 sc->sc_hayespioh = hayespioh; 438 break; 439 } 440 bus_io_unmap(bc, hayespioh, HAYESP_NPORTS); 441 } 442 /* No ESP; look for other things. */ 443 if (*hayespp == 0) { 444 #endif 445 446 /* look for a NS 16550AF UART with FIFOs */ 447 bus_io_write_1(bc, ioh, com_fifo, 448 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 449 delay(100); 450 if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK) 451 if (ISSET(bus_io_read_1(bc, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) { 452 SET(sc->sc_hwflags, COM_HW_FIFO); 453 printf(": ns16550a, working fifo\n"); 454 } else 455 printf(": ns16550, broken fifo\n"); 456 else 457 printf(": ns8250 or ns16450, no fifo\n"); 458 bus_io_write_1(bc, ioh, com_fifo, 0); 459 #ifdef COM_HAYESP 460 } 461 #endif 462 463 /* disable interrupts */ 464 bus_io_write_1(bc, ioh, com_ier, 0); 465 bus_io_write_1(bc, ioh, com_mcr, 0); 466 467 if (irq != IRQUNK) { 468 #if NCOM_ISA 469 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 470 struct isa_attach_args *ia = aux; 471 472 sc->sc_ih = isa_intr_establish(ia->ia_ic, irq, 473 IST_EDGE, IPL_TTY, comintr, sc); 474 } else 475 #endif 476 panic("comattach: IRQ but can't have one"); 477 } 478 479 #ifdef KGDB 480 if (kgdb_dev == makedev(commajor, unit)) { 481 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 482 kgdb_dev = -1; /* can't debug over console port */ 483 else { 484 (void) cominit(bc, ioh, kgdb_rate); 485 if (kgdb_debug_init) { 486 /* 487 * Print prefix of device name, 488 * let kgdb_connect print the rest. 489 */ 490 printf("%s: ", sc->sc_dev.dv_xname); 491 kgdb_connect(1); 492 } else 493 printf("%s: kgdb enabled\n", 494 sc->sc_dev.dv_xname); 495 } 496 } 497 #endif 498 499 /* XXX maybe move up some? */ 500 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 501 printf("%s: console\n", sc->sc_dev.dv_xname); 502 } 503 504 int 505 comopen(dev, flag, mode, p) 506 dev_t dev; 507 int flag, mode; 508 struct proc *p; 509 { 510 int unit = COMUNIT(dev); 511 struct com_softc *sc; 512 bus_chipset_tag_t bc; 513 bus_io_handle_t ioh; 514 struct tty *tp; 515 int s; 516 int error = 0; 517 518 if (unit >= com_cd.cd_ndevs) 519 return ENXIO; 520 sc = com_cd.cd_devs[unit]; 521 if (!sc) 522 return ENXIO; 523 524 if (!sc->sc_tty) 525 tp = sc->sc_tty = ttymalloc(); 526 else 527 tp = sc->sc_tty; 528 529 tp->t_oproc = comstart; 530 tp->t_param = comparam; 531 tp->t_dev = dev; 532 if (!ISSET(tp->t_state, TS_ISOPEN)) { 533 SET(tp->t_state, TS_WOPEN); 534 ttychars(tp); 535 tp->t_iflag = TTYDEF_IFLAG; 536 tp->t_oflag = TTYDEF_OFLAG; 537 tp->t_cflag = TTYDEF_CFLAG; 538 if (ISSET(sc->sc_swflags, COM_SW_CLOCAL)) 539 SET(tp->t_cflag, CLOCAL); 540 if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS)) 541 SET(tp->t_cflag, CRTSCTS); 542 if (ISSET(sc->sc_swflags, COM_SW_MDMBUF)) 543 SET(tp->t_cflag, MDMBUF); 544 tp->t_lflag = TTYDEF_LFLAG; 545 tp->t_ispeed = tp->t_ospeed = comdefaultrate; 546 547 s = spltty(); 548 549 comparam(tp, &tp->t_termios); 550 ttsetwater(tp); 551 552 if (comsopen++ == 0) 553 timeout(compoll, NULL, 1); 554 555 sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0]; 556 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 557 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 558 559 bc = sc->sc_bc; 560 ioh = sc->sc_ioh; 561 #ifdef COM_HAYESP 562 /* Setup the ESP board */ 563 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 564 bus_io_handle_t hayespioh = sc->sc_hayespioh; 565 566 bus_io_write_1(bc, ioh, com_fifo, 567 FIFO_DMA_MODE|FIFO_ENABLE| 568 FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8); 569 570 /* Set 16550 compatibility mode */ 571 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 572 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 573 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 574 HAYESP_MODE_SCALE); 575 576 /* Set RTS/CTS flow control */ 577 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 578 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 579 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 580 581 /* Set flow control levels */ 582 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 583 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 584 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 585 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 586 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 587 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 588 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 589 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 590 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 591 } else 592 #endif 593 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 594 /* Set the FIFO threshold based on the receive speed. */ 595 bus_io_write_1(bc, ioh, com_fifo, 596 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | 597 (tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 598 /* flush any pending I/O */ 599 while (ISSET(bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY)) 600 (void) bus_io_read_1(bc, ioh, com_data); 601 /* you turn me on, baby */ 602 sc->sc_mcr = MCR_DTR | MCR_RTS; 603 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 604 SET(sc->sc_mcr, MCR_IENABLE); 605 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 606 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 607 bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); 608 609 sc->sc_msr = bus_io_read_1(bc, ioh, com_msr); 610 if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || 611 ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF)) 612 SET(tp->t_state, TS_CARR_ON); 613 else 614 CLR(tp->t_state, TS_CARR_ON); 615 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) 616 return EBUSY; 617 else 618 s = spltty(); 619 620 /* wait for carrier if necessary */ 621 if (!ISSET(flag, O_NONBLOCK)) 622 while (!ISSET(tp->t_cflag, CLOCAL) && 623 !ISSET(tp->t_state, TS_CARR_ON)) { 624 SET(tp->t_state, TS_WOPEN); 625 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 626 ttopen, 0); 627 if (error) { 628 /* XXX should turn off chip if we're the 629 only waiter */ 630 splx(s); 631 return error; 632 } 633 } 634 splx(s); 635 636 return (*linesw[tp->t_line].l_open)(dev, tp); 637 } 638 639 int 640 comclose(dev, flag, mode, p) 641 dev_t dev; 642 int flag, mode; 643 struct proc *p; 644 { 645 int unit = COMUNIT(dev); 646 struct com_softc *sc = com_cd.cd_devs[unit]; 647 struct tty *tp = sc->sc_tty; 648 bus_chipset_tag_t bc = sc->sc_bc; 649 bus_io_handle_t ioh = sc->sc_ioh; 650 int s; 651 652 /* XXX This is for cons.c. */ 653 if (!ISSET(tp->t_state, TS_ISOPEN)) 654 return 0; 655 656 (*linesw[tp->t_line].l_close)(tp, flag); 657 s = spltty(); 658 CLR(sc->sc_lcr, LCR_SBREAK); 659 bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); 660 bus_io_write_1(bc, ioh, com_ier, 0); 661 if (ISSET(tp->t_cflag, HUPCL) && 662 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) { 663 /* XXX perhaps only clear DTR */ 664 bus_io_write_1(bc, ioh, com_mcr, 0); 665 } 666 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 667 if (--comsopen == 0) 668 untimeout(compoll, NULL); 669 splx(s); 670 ttyclose(tp); 671 #ifdef notyet /* XXXX */ 672 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 673 ttyfree(tp); 674 sc->sc_tty = 0; 675 } 676 #endif 677 return 0; 678 } 679 680 int 681 comread(dev, uio, flag) 682 dev_t dev; 683 struct uio *uio; 684 int flag; 685 { 686 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 687 struct tty *tp = sc->sc_tty; 688 689 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 690 } 691 692 int 693 comwrite(dev, uio, flag) 694 dev_t dev; 695 struct uio *uio; 696 int flag; 697 { 698 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 699 struct tty *tp = sc->sc_tty; 700 701 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 702 } 703 704 struct tty * 705 comtty(dev) 706 dev_t dev; 707 { 708 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 709 struct tty *tp = sc->sc_tty; 710 711 return (tp); 712 } 713 714 static u_char 715 tiocm_xxx2mcr(data) 716 int data; 717 { 718 u_char m = 0; 719 720 if (ISSET(data, TIOCM_DTR)) 721 SET(m, MCR_DTR); 722 if (ISSET(data, TIOCM_RTS)) 723 SET(m, MCR_RTS); 724 return m; 725 } 726 727 int 728 comioctl(dev, cmd, data, flag, p) 729 dev_t dev; 730 u_long cmd; 731 caddr_t data; 732 int flag; 733 struct proc *p; 734 { 735 int unit = COMUNIT(dev); 736 struct com_softc *sc = com_cd.cd_devs[unit]; 737 struct tty *tp = sc->sc_tty; 738 bus_chipset_tag_t bc = sc->sc_bc; 739 bus_io_handle_t ioh = sc->sc_ioh; 740 int error; 741 742 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 743 if (error >= 0) 744 return error; 745 error = ttioctl(tp, cmd, data, flag, p); 746 if (error >= 0) 747 return error; 748 749 switch (cmd) { 750 case TIOCSBRK: 751 SET(sc->sc_lcr, LCR_SBREAK); 752 bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); 753 break; 754 case TIOCCBRK: 755 CLR(sc->sc_lcr, LCR_SBREAK); 756 bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); 757 break; 758 case TIOCSDTR: 759 SET(sc->sc_mcr, sc->sc_dtr); 760 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 761 break; 762 case TIOCCDTR: 763 CLR(sc->sc_mcr, sc->sc_dtr); 764 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 765 break; 766 case TIOCMSET: 767 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 768 case TIOCMBIS: 769 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 770 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 771 break; 772 case TIOCMBIC: 773 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 774 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 775 break; 776 case TIOCMGET: { 777 u_char m; 778 int bits = 0; 779 780 m = sc->sc_mcr; 781 if (ISSET(m, MCR_DTR)) 782 SET(bits, TIOCM_DTR); 783 if (ISSET(m, MCR_RTS)) 784 SET(bits, TIOCM_RTS); 785 m = sc->sc_msr; 786 if (ISSET(m, MSR_DCD)) 787 SET(bits, TIOCM_CD); 788 if (ISSET(m, MSR_CTS)) 789 SET(bits, TIOCM_CTS); 790 if (ISSET(m, MSR_DSR)) 791 SET(bits, TIOCM_DSR); 792 if (ISSET(m, MSR_RI | MSR_TERI)) 793 SET(bits, TIOCM_RI); 794 if (bus_io_read_1(bc, ioh, com_ier)) 795 SET(bits, TIOCM_LE); 796 *(int *)data = bits; 797 break; 798 } 799 case TIOCGFLAGS: { 800 int driverbits, userbits = 0; 801 802 driverbits = sc->sc_swflags; 803 if (ISSET(driverbits, COM_SW_SOFTCAR)) 804 SET(userbits, TIOCFLAG_SOFTCAR); 805 if (ISSET(driverbits, COM_SW_CLOCAL)) 806 SET(userbits, TIOCFLAG_CLOCAL); 807 if (ISSET(driverbits, COM_SW_CRTSCTS)) 808 SET(userbits, TIOCFLAG_CRTSCTS); 809 if (ISSET(driverbits, COM_SW_MDMBUF)) 810 SET(userbits, TIOCFLAG_MDMBUF); 811 812 *(int *)data = userbits; 813 break; 814 } 815 case TIOCSFLAGS: { 816 int userbits, driverbits = 0; 817 818 error = suser(p->p_ucred, &p->p_acflag); 819 if (error != 0) 820 return(EPERM); 821 822 userbits = *(int *)data; 823 if (ISSET(userbits, TIOCFLAG_SOFTCAR) || 824 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 825 SET(driverbits, COM_SW_SOFTCAR); 826 if (ISSET(userbits, TIOCFLAG_CLOCAL)) 827 SET(driverbits, COM_SW_CLOCAL); 828 if (ISSET(userbits, TIOCFLAG_CRTSCTS)) 829 SET(driverbits, COM_SW_CRTSCTS); 830 if (ISSET(userbits, TIOCFLAG_MDMBUF)) 831 SET(driverbits, COM_SW_MDMBUF); 832 833 sc->sc_swflags = driverbits; 834 break; 835 } 836 default: 837 return ENOTTY; 838 } 839 840 return 0; 841 } 842 843 int 844 comparam(tp, t) 845 struct tty *tp; 846 struct termios *t; 847 { 848 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 849 bus_chipset_tag_t bc = sc->sc_bc; 850 bus_io_handle_t ioh = sc->sc_ioh; 851 int ospeed = comspeed(t->c_ospeed); 852 u_char lcr; 853 tcflag_t oldcflag; 854 int s; 855 856 /* check requested parameters */ 857 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed)) 858 return EINVAL; 859 860 lcr = ISSET(sc->sc_lcr, LCR_SBREAK); 861 862 switch (ISSET(t->c_cflag, CSIZE)) { 863 case CS5: 864 SET(lcr, LCR_5BITS); 865 break; 866 case CS6: 867 SET(lcr, LCR_6BITS); 868 break; 869 case CS7: 870 SET(lcr, LCR_7BITS); 871 break; 872 case CS8: 873 SET(lcr, LCR_8BITS); 874 break; 875 } 876 if (ISSET(t->c_cflag, PARENB)) { 877 SET(lcr, LCR_PENAB); 878 if (!ISSET(t->c_cflag, PARODD)) 879 SET(lcr, LCR_PEVEN); 880 } 881 if (ISSET(t->c_cflag, CSTOPB)) 882 SET(lcr, LCR_STOPB); 883 884 sc->sc_lcr = lcr; 885 886 s = spltty(); 887 888 if (ospeed == 0) { 889 CLR(sc->sc_mcr, MCR_DTR); 890 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 891 } 892 893 /* 894 * Set the FIFO threshold based on the receive speed, if we are 895 * changing it. 896 */ 897 #if 1 898 if (tp->t_ispeed != t->c_ispeed) { 899 #else 900 if (1) { 901 #endif 902 if (ospeed != 0) { 903 /* 904 * Make sure the transmit FIFO is empty before 905 * proceeding. If we don't do this, some revisions 906 * of the UART will hang. Interestingly enough, 907 * even if we do this will the last character is 908 * still being pushed out, they don't hang. This 909 * seems good enough. 910 */ 911 while (ISSET(tp->t_state, TS_BUSY)) { 912 int error; 913 914 ++sc->sc_halt; 915 error = ttysleep(tp, &tp->t_outq, 916 TTOPRI | PCATCH, "comprm", 0); 917 --sc->sc_halt; 918 if (error) { 919 splx(s); 920 comstart(tp); 921 return (error); 922 } 923 } 924 925 bus_io_write_1(bc, ioh, com_lcr, lcr | LCR_DLAB); 926 bus_io_write_1(bc, ioh, com_dlbl, ospeed); 927 bus_io_write_1(bc, ioh, com_dlbh, ospeed >> 8); 928 bus_io_write_1(bc, ioh, com_lcr, lcr); 929 SET(sc->sc_mcr, MCR_DTR); 930 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 931 } else 932 bus_io_write_1(bc, ioh, com_lcr, lcr); 933 934 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP) && 935 ISSET(sc->sc_hwflags, COM_HW_FIFO)) 936 bus_io_write_1(bc, ioh, com_fifo, 937 FIFO_ENABLE | 938 (t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 939 } else 940 bus_io_write_1(bc, ioh, com_lcr, lcr); 941 942 /* When not using CRTSCTS, RTS follows DTR. */ 943 if (!ISSET(t->c_cflag, CRTSCTS)) { 944 if (ISSET(sc->sc_mcr, MCR_DTR)) { 945 if (!ISSET(sc->sc_mcr, MCR_RTS)) { 946 SET(sc->sc_mcr, MCR_RTS); 947 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 948 } 949 } else { 950 if (ISSET(sc->sc_mcr, MCR_RTS)) { 951 CLR(sc->sc_mcr, MCR_RTS); 952 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 953 } 954 } 955 sc->sc_dtr = MCR_DTR | MCR_RTS; 956 } else 957 sc->sc_dtr = MCR_DTR; 958 959 /* and copy to tty */ 960 tp->t_ispeed = t->c_ispeed; 961 tp->t_ospeed = t->c_ospeed; 962 oldcflag = tp->t_cflag; 963 tp->t_cflag = t->c_cflag; 964 965 /* 966 * If DCD is off and MDMBUF is changed, ask the tty layer if we should 967 * stop the device. 968 */ 969 if (!ISSET(sc->sc_msr, MSR_DCD) && 970 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 971 ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) && 972 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) { 973 CLR(sc->sc_mcr, sc->sc_dtr); 974 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 975 } 976 977 /* Just to be sure... */ 978 splx(s); 979 comstart(tp); 980 return 0; 981 } 982 983 void 984 comstart(tp) 985 struct tty *tp; 986 { 987 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 988 bus_chipset_tag_t bc = sc->sc_bc; 989 bus_io_handle_t ioh = sc->sc_ioh; 990 int s; 991 992 s = spltty(); 993 if (ISSET(tp->t_state, TS_BUSY)) 994 goto out; 995 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP) || 996 sc->sc_halt > 0) 997 goto stopped; 998 if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS)) 999 goto stopped; 1000 if (tp->t_outq.c_cc <= tp->t_lowat) { 1001 if (ISSET(tp->t_state, TS_ASLEEP)) { 1002 CLR(tp->t_state, TS_ASLEEP); 1003 wakeup(&tp->t_outq); 1004 } 1005 if (tp->t_outq.c_cc == 0) 1006 goto stopped; 1007 selwakeup(&tp->t_wsel); 1008 } 1009 SET(tp->t_state, TS_BUSY); 1010 1011 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1012 SET(sc->sc_ier, IER_ETXRDY); 1013 bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); 1014 } 1015 #ifdef COM_HAYESP 1016 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1017 u_char buffer[1024], *cp = buffer; 1018 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1019 do 1020 bus_io_write_1(bc, ioh, com_data, *cp++); 1021 while (--n); 1022 } 1023 else 1024 #endif 1025 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) { 1026 u_char buffer[16], *cp = buffer; 1027 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1028 do { 1029 bus_io_write_1(bc, ioh, com_data, *cp++); 1030 } while (--n); 1031 } else 1032 bus_io_write_1(bc, ioh, com_data, getc(&tp->t_outq)); 1033 out: 1034 splx(s); 1035 return; 1036 stopped: 1037 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1038 CLR(sc->sc_ier, IER_ETXRDY); 1039 bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); 1040 } 1041 splx(s); 1042 } 1043 1044 /* 1045 * Stop output on a line. 1046 */ 1047 void 1048 comstop(tp, flag) 1049 struct tty *tp; 1050 { 1051 int s; 1052 1053 s = spltty(); 1054 if (ISSET(tp->t_state, TS_BUSY)) 1055 if (!ISSET(tp->t_state, TS_TTSTOP)) 1056 SET(tp->t_state, TS_FLUSH); 1057 splx(s); 1058 } 1059 1060 void 1061 comdiag(arg) 1062 void *arg; 1063 { 1064 struct com_softc *sc = arg; 1065 int overflows, floods; 1066 int s; 1067 1068 s = spltty(); 1069 sc->sc_errors = 0; 1070 overflows = sc->sc_overflows; 1071 sc->sc_overflows = 0; 1072 floods = sc->sc_floods; 1073 sc->sc_floods = 0; 1074 splx(s); 1075 1076 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf overflow%s\n", 1077 sc->sc_dev.dv_xname, 1078 overflows, overflows == 1 ? "" : "s", 1079 floods, floods == 1 ? "" : "s"); 1080 } 1081 1082 void 1083 compoll(arg) 1084 void *arg; 1085 { 1086 int unit; 1087 struct com_softc *sc; 1088 struct tty *tp; 1089 register u_char *ibufp; 1090 u_char *ibufend; 1091 register int c; 1092 int s; 1093 static int lsrmap[8] = { 1094 0, TTY_PE, 1095 TTY_FE, TTY_PE|TTY_FE, 1096 TTY_FE, TTY_PE|TTY_FE, 1097 TTY_FE, TTY_PE|TTY_FE 1098 }; 1099 1100 s = spltty(); 1101 if (comevents == 0) { 1102 splx(s); 1103 goto out; 1104 } 1105 comevents = 0; 1106 splx(s); 1107 1108 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1109 sc = com_cd.cd_devs[unit]; 1110 if (sc == 0 || sc->sc_ibufp == sc->sc_ibuf) 1111 continue; 1112 1113 tp = sc->sc_tty; 1114 1115 s = spltty(); 1116 1117 ibufp = sc->sc_ibuf; 1118 ibufend = sc->sc_ibufp; 1119 1120 if (ibufp == ibufend) { 1121 splx(s); 1122 continue; 1123 } 1124 1125 sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ? 1126 sc->sc_ibufs[1] : sc->sc_ibufs[0]; 1127 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 1128 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 1129 1130 if (tp == 0 || !ISSET(tp->t_state, TS_ISOPEN)) { 1131 splx(s); 1132 continue; 1133 } 1134 1135 if (ISSET(tp->t_cflag, CRTSCTS) && 1136 !ISSET(sc->sc_mcr, MCR_RTS)) { 1137 /* XXX */ 1138 SET(sc->sc_mcr, MCR_RTS); 1139 bus_io_write_1(sc->sc_bc, sc->sc_ioh, com_mcr, 1140 sc->sc_mcr); 1141 } 1142 1143 splx(s); 1144 1145 while (ibufp < ibufend) { 1146 c = *ibufp++; 1147 if (*ibufp & LSR_OE) { 1148 sc->sc_overflows++; 1149 if (sc->sc_errors++ == 0) 1150 timeout(comdiag, sc, 60 * hz); 1151 } 1152 /* This is ugly, but fast. */ 1153 c |= lsrmap[(*ibufp++ & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1154 (*linesw[tp->t_line].l_rint)(c, tp); 1155 } 1156 } 1157 1158 out: 1159 timeout(compoll, NULL, 1); 1160 } 1161 1162 int 1163 comintr(arg) 1164 void *arg; 1165 { 1166 struct com_softc *sc = arg; 1167 bus_chipset_tag_t bc = sc->sc_bc; 1168 bus_io_handle_t ioh = sc->sc_ioh; 1169 struct tty *tp; 1170 u_char lsr, data, msr, delta; 1171 #ifdef COM_DEBUG 1172 int n; 1173 struct { 1174 u_char iir, lsr, msr; 1175 } iter[32]; 1176 #endif 1177 1178 #ifdef COM_DEBUG 1179 n = 0; 1180 if (ISSET(iter[n].iir = bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1181 return (0); 1182 #else 1183 if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1184 return (0); 1185 #endif 1186 1187 tp = sc->sc_tty; 1188 1189 for (;;) { 1190 #ifdef COM_DEBUG 1191 iter[n].lsr = 1192 #endif 1193 lsr = bus_io_read_1(bc, ioh, com_lsr); 1194 1195 if (ISSET(lsr, LSR_RXRDY)) { 1196 register u_char *p = sc->sc_ibufp; 1197 1198 comevents = 1; 1199 do { 1200 data = bus_io_read_1(bc, ioh, com_data); 1201 if (ISSET(lsr, LSR_BI)) { 1202 #ifdef notdef 1203 printf("break %02x %02x %02x %02x\n", 1204 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, 1205 sc->sc_dtr); 1206 #endif 1207 #ifdef DDB 1208 if (ISSET(sc->sc_hwflags, 1209 COM_HW_CONSOLE)) { 1210 Debugger(); 1211 goto next; 1212 } 1213 #endif 1214 } 1215 if (p >= sc->sc_ibufend) { 1216 sc->sc_floods++; 1217 if (sc->sc_errors++ == 0) 1218 timeout(comdiag, sc, 60 * hz); 1219 } else { 1220 *p++ = data; 1221 *p++ = lsr; 1222 if (p == sc->sc_ibufhigh && 1223 ISSET(tp->t_cflag, CRTSCTS)) { 1224 /* XXX */ 1225 CLR(sc->sc_mcr, MCR_RTS); 1226 bus_io_write_1(bc, ioh, com_mcr, 1227 sc->sc_mcr); 1228 } 1229 } 1230 next: 1231 #ifdef COM_DEBUG 1232 if (++n >= 32) 1233 goto ohfudge; 1234 iter[n].lsr = 1235 #endif 1236 lsr = bus_io_read_1(bc, ioh, com_lsr); 1237 } while (ISSET(lsr, LSR_RXRDY)); 1238 1239 sc->sc_ibufp = p; 1240 } 1241 #ifdef COM_DEBUG 1242 else if (ISSET(lsr, LSR_BI|LSR_FE|LSR_PE|LSR_OE)) 1243 printf("weird lsr %02x\n", lsr); 1244 #endif 1245 1246 #ifdef COM_DEBUG 1247 iter[n].msr = 1248 #endif 1249 msr = bus_io_read_1(bc, ioh, com_msr); 1250 1251 if (msr != sc->sc_msr) { 1252 delta = msr ^ sc->sc_msr; 1253 sc->sc_msr = msr; 1254 if (ISSET(delta, MSR_DCD) && 1255 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 1256 (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) { 1257 CLR(sc->sc_mcr, sc->sc_dtr); 1258 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 1259 } 1260 if (ISSET(delta & msr, MSR_CTS) && 1261 ISSET(tp->t_cflag, CRTSCTS)) { 1262 /* the line is up and we want to do rts/cts flow control */ 1263 (*linesw[tp->t_line].l_start)(tp); 1264 } 1265 } 1266 1267 if (ISSET(lsr, LSR_TXRDY) && ISSET(tp->t_state, TS_BUSY)) { 1268 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 1269 if (sc->sc_halt > 0) 1270 wakeup(&tp->t_outq); 1271 (*linesw[tp->t_line].l_start)(tp); 1272 } 1273 1274 #ifdef COM_DEBUG 1275 if (++n >= 32) 1276 goto ohfudge; 1277 if (ISSET(iter[n].iir = bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1278 return (1); 1279 #else 1280 if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1281 return (1); 1282 #endif 1283 } 1284 #ifdef COM_DEBUG 1285 ohfudge: 1286 printf("comintr: too many iterations"); 1287 for (n = 0; n < 32; n++) { 1288 if ((n % 4) == 0) 1289 printf("\ncomintr: iter[%02d]", n); 1290 printf(" %02x %02x %02x", iter[n].iir, iter[n].lsr, iter[n].msr); 1291 } 1292 printf("\n"); 1293 printf("comintr: msr %02x mcr %02x lcr %02x ier %02x\n", 1294 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, sc->sc_ier); 1295 printf("comintr: state %08x cc %d\n", sc->sc_tty->t_state, 1296 sc->sc_tty->t_outq.c_cc); 1297 #endif 1298 } 1299 1300 /* 1301 * Following are all routines needed for COM to act as console 1302 */ 1303 #include <dev/cons.h> 1304 1305 void 1306 comcnprobe(cp) 1307 struct consdev *cp; 1308 { 1309 bus_chipset_tag_t bc; 1310 bus_io_handle_t ioh; 1311 int found; 1312 1313 #if 0 1314 XXX NEEDS TO BE FIXED XXX 1315 bc = ???; 1316 #endif 1317 if (bus_io_map(bc, CONADDR, COM_NPORTS, &ioh)) { 1318 cp->cn_pri = CN_DEAD; 1319 return; 1320 } 1321 found = comprobe1(bc, ioh, CONADDR); 1322 bus_io_unmap(bc, ioh, COM_NPORTS); 1323 if (!found) { 1324 cp->cn_pri = CN_DEAD; 1325 return; 1326 } 1327 1328 /* locate the major number */ 1329 for (commajor = 0; commajor < nchrdev; commajor++) 1330 if (cdevsw[commajor].d_open == comopen) 1331 break; 1332 1333 /* initialize required fields */ 1334 cp->cn_dev = makedev(commajor, CONUNIT); 1335 #ifdef COMCONSOLE 1336 cp->cn_pri = CN_REMOTE; /* Force a serial port console */ 1337 #else 1338 cp->cn_pri = CN_NORMAL; 1339 #endif 1340 } 1341 1342 void 1343 comcninit(cp) 1344 struct consdev *cp; 1345 { 1346 1347 #if 0 1348 XXX NEEDS TO BE FIXED XXX 1349 comconsbc = ???; 1350 #endif 1351 if (bus_io_map(comconsbc, CONADDR, COM_NPORTS, &comconsioh)) 1352 panic("comcninit: mapping failed"); 1353 1354 cominit(comconsbc, comconsioh, comdefaultrate); 1355 comconsaddr = CONADDR; 1356 comconsinit = 0; 1357 } 1358 1359 cominit(bc, ioh, rate) 1360 bus_chipset_tag_t bc; 1361 bus_io_handle_t ioh; 1362 int rate; 1363 { 1364 int s = splhigh(); 1365 u_char stat; 1366 1367 bus_io_write_1(bc, ioh, com_lcr, LCR_DLAB); 1368 rate = comspeed(comdefaultrate); 1369 bus_io_write_1(bc, ioh, com_dlbl, rate); 1370 bus_io_write_1(bc, ioh, com_dlbh, rate >> 8); 1371 bus_io_write_1(bc, ioh, com_lcr, LCR_8BITS); 1372 bus_io_write_1(bc, ioh, com_ier, IER_ERXRDY | IER_ETXRDY); 1373 bus_io_write_1(bc, ioh, com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_4); 1374 stat = bus_io_read_1(bc, ioh, com_iir); 1375 splx(s); 1376 } 1377 1378 comcngetc(dev) 1379 dev_t dev; 1380 { 1381 int s = splhigh(); 1382 bus_chipset_tag_t bc = comconsbc; 1383 bus_io_handle_t ioh = comconsioh; 1384 u_char stat, c; 1385 1386 while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY)) 1387 ; 1388 c = bus_io_read_1(bc, ioh, com_data); 1389 stat = bus_io_read_1(bc, ioh, com_iir); 1390 splx(s); 1391 return c; 1392 } 1393 1394 /* 1395 * Console kernel output character routine. 1396 */ 1397 void 1398 comcnputc(dev, c) 1399 dev_t dev; 1400 int c; 1401 { 1402 int s = splhigh(); 1403 bus_chipset_tag_t bc = comconsbc; 1404 bus_io_handle_t ioh = comconsioh; 1405 u_char stat; 1406 register int timo; 1407 1408 #ifdef KGDB 1409 if (dev != kgdb_dev) 1410 #endif 1411 if (comconsinit == 0) { 1412 (void) cominit(bc, ioh, comdefaultrate); 1413 comconsinit = 1; 1414 } 1415 /* wait for any pending transmission to finish */ 1416 timo = 50000; 1417 while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo) 1418 ; 1419 bus_io_write_1(bc, ioh, com_data, c); 1420 /* wait for this transmission to complete */ 1421 timo = 1500000; 1422 while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo) 1423 ; 1424 /* clear any interrupts generated by this transmission */ 1425 stat = bus_io_read_1(bc, ioh, com_iir); 1426 splx(s); 1427 } 1428 1429 void 1430 comcnpollc(dev, on) 1431 dev_t dev; 1432 int on; 1433 { 1434 1435 } 1436
Indexes created Tue Sep 23 07:09:52 GMT 2025