com.c revision 1.81
1 /* $NetBSD: com.c,v 1.81 1996/05/05 19:50:44 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996 5 * Charles M. Hannum. All rights reserved. 6 * Copyright (c) 1991 The Regents of the University of California. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)com.c 7.5 (Berkeley) 5/16/91 38 */ 39 40 /* 41 * COM driver, based on HP dca driver 42 * uses National Semiconductor NS16450/NS16550AF UART 43 */ 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/tty.h> 49 #include <sys/proc.h> 50 #include <sys/user.h> 51 #include <sys/conf.h> 52 #include <sys/file.h> 53 #include <sys/uio.h> 54 #include <sys/kernel.h> 55 #include <sys/syslog.h> 56 #include <sys/types.h> 57 #include <sys/device.h> 58 59 #ifdef i386 /* XXX */ 60 #include <machine/cpu.h> /* XXX */ 61 #else /* XXX */ 62 #include <machine/intr.h> 63 #endif /* XXX */ 64 #include <machine/bus.h> 65 66 #include <dev/isa/isavar.h> 67 #include <dev/isa/comreg.h> 68 #include <dev/isa/comvar.h> 69 #include <dev/ic/ns16550reg.h> 70 #ifdef COM_HAYESP 71 #include <dev/ic/hayespreg.h> 72 #endif 73 #define com_lcr com_cfcr 74 75 #include "com.h" 76 77 78 #define COM_IBUFSIZE (2 * 512) 79 #define COM_IHIGHWATER ((3 * COM_IBUFSIZE) / 4) 80 81 struct com_softc { 82 struct device sc_dev; 83 void *sc_ih; 84 struct tty *sc_tty; 85 86 int sc_overflows; 87 int sc_floods; 88 int sc_errors; 89 90 int sc_halt; 91 92 int sc_iobase; 93 #ifdef COM_HAYESP 94 int sc_hayespbase; 95 #endif 96 97 bus_chipset_tag_t sc_bc; 98 bus_io_handle_t sc_ioh; 99 bus_io_handle_t sc_hayespioh; 100 101 u_char sc_hwflags; 102 #define COM_HW_NOIEN 0x01 103 #define COM_HW_FIFO 0x02 104 #define COM_HW_HAYESP 0x04 105 #define COM_HW_CONSOLE 0x40 106 u_char sc_swflags; 107 #define COM_SW_SOFTCAR 0x01 108 #define COM_SW_CLOCAL 0x02 109 #define COM_SW_CRTSCTS 0x04 110 #define COM_SW_MDMBUF 0x08 111 u_char sc_msr, sc_mcr, sc_lcr, sc_ier; 112 u_char sc_dtr; 113 114 u_char *sc_ibuf, *sc_ibufp, *sc_ibufhigh, *sc_ibufend; 115 u_char sc_ibufs[2][COM_IBUFSIZE]; 116 }; 117 118 #ifdef COM_HAYESP 119 int comprobeHAYESP __P((bus_io_handle_t hayespioh, struct com_softc *sc)); 120 #endif 121 void comdiag __P((void *)); 122 int comspeed __P((long)); 123 int comparam __P((struct tty *, struct termios *)); 124 void comstart __P((struct tty *)); 125 void compoll __P((void *)); 126 127 /* XXX: These belong elsewhere */ 128 cdev_decl(com); 129 bdev_decl(com); 130 131 struct consdev; 132 void comcnprobe __P((struct consdev *)); 133 void comcninit __P((struct consdev *)); 134 int comcngetc __P((dev_t)); 135 void comcnputc __P((dev_t, int)); 136 void comcnpollc __P((dev_t, int)); 137 138 static u_char tiocm_xxx2mcr __P((int)); 139 140 /* 141 * XXX the following two cfattach structs should be different, and possibly 142 * XXX elsewhere. 143 */ 144 int comprobe __P((struct device *, void *, void *)); 145 void comattach __P((struct device *, struct device *, void *)); 146 147 #if NCOM_ISA 148 struct cfattach com_isa_ca = { 149 sizeof(struct com_softc), comprobe, comattach 150 }; 151 #endif 152 153 #if NCOM_COMMULTI 154 struct cfattach com_commulti_ca = { 155 sizeof(struct com_softc), comprobe, comattach 156 }; 157 #endif 158 159 struct cfdriver com_cd = { 160 NULL, "com", DV_TTY 161 }; 162 163 void cominit __P((bus_chipset_tag_t, bus_io_handle_t, int)); 164 165 #ifdef COMCONSOLE 166 int comdefaultrate = CONSPEED; /* XXX why set default? */ 167 #else 168 int comdefaultrate = TTYDEF_SPEED; 169 #endif 170 int comconsaddr; 171 int comconsinit; 172 int comconsattached; 173 bus_chipset_tag_t comconsbc; 174 bus_io_handle_t comconsioh; 175 tcflag_t comconscflag = TTYDEF_CFLAG; 176 177 int commajor; 178 int comsopen = 0; 179 int comevents = 0; 180 181 #ifdef KGDB 182 #include <machine/remote-sl.h> 183 extern int kgdb_dev; 184 extern int kgdb_rate; 185 extern int kgdb_debug_init; 186 #endif 187 188 #define COMUNIT(x) (minor(x)) 189 190 /* Macros to clear/set/test flags. */ 191 #define SET(t, f) (t) |= (f) 192 #define CLR(t, f) (t) &= ~(f) 193 #define ISSET(t, f) ((t) & (f)) 194 195 int 196 comspeed(speed) 197 long speed; 198 { 199 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 200 201 int x, err; 202 203 if (speed == 0) 204 return 0; 205 if (speed < 0) 206 return -1; 207 x = divrnd((COM_FREQ / 16), speed); 208 if (x <= 0) 209 return -1; 210 err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000; 211 if (err < 0) 212 err = -err; 213 if (err > COM_TOLERANCE) 214 return -1; 215 return x; 216 217 #undef divrnd(n, q) 218 } 219 220 int 221 comprobe1(bc, ioh, iobase) 222 bus_chipset_tag_t bc; 223 bus_io_handle_t ioh; 224 int iobase; 225 { 226 227 /* force access to id reg */ 228 bus_io_write_1(bc, ioh, com_lcr, 0); 229 bus_io_write_1(bc, ioh, com_iir, 0); 230 if (bus_io_read_1(bc, ioh, com_iir) & 0x38) 231 return 0; 232 233 return 1; 234 } 235 236 #ifdef COM_HAYESP 237 int 238 comprobeHAYESP(hayespioh, sc) 239 bus_io_handle_t hayespioh; 240 struct com_softc *sc; 241 { 242 char val, dips; 243 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 244 bus_chipset_tag_t bc = sc->sc_bc; 245 246 /* 247 * Hayes ESP cards have two iobases. One is for compatibility with 248 * 16550 serial chips, and at the same ISA PC base addresses. The 249 * other is for ESP-specific enhanced features, and lies at a 250 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 251 */ 252 253 /* Test for ESP signature */ 254 if ((bus_io_read_1(bc, hayespioh, 0) & 0xf3) == 0) 255 return 0; 256 257 /* 258 * ESP is present at ESP enhanced base address; unknown com port 259 */ 260 261 /* Get the dip-switch configurations */ 262 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 263 dips = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1); 264 265 /* Determine which com port this ESP card services: bits 0,1 of */ 266 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 267 if (sc->sc_iobase != combaselist[dips & 0x03]) 268 return 0; 269 270 printf(": ESP"); 271 272 /* Check ESP Self Test bits. */ 273 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 274 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 275 val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */ 276 val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS2); 277 if ((val & 0x70) < 0x20) { 278 printf("-old (%o)", val & 0x70); 279 /* we do not support the necessary features */ 280 return 0; 281 } 282 283 /* Check for ability to emulate 16550: bit 8 == 1 */ 284 if ((dips & 0x80) == 0) { 285 printf(" slave"); 286 /* XXX Does slave really mean no 16550 support?? */ 287 return 0; 288 } 289 290 /* 291 * If we made it this far, we are a full-featured ESP v2.0 (or 292 * better), at the correct com port address. 293 */ 294 295 SET(sc->sc_hwflags, COM_HW_HAYESP); 296 printf(", 1024 byte fifo\n"); 297 return 1; 298 } 299 #endif 300 301 int 302 comprobe(parent, match, aux) 303 struct device *parent; 304 void *match, *aux; 305 { 306 bus_chipset_tag_t bc; 307 bus_io_handle_t ioh; 308 int iobase, needioh; 309 int rv = 1; 310 311 /* 312 * XXX should be broken out into functions for isa probe and 313 * XXX for commulti probe, with a helper function that contains 314 * XXX most of the interesting stuff. 315 */ 316 #if NCOM_ISA 317 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 318 struct isa_attach_args *ia = aux; 319 320 bc = ia->ia_bc; 321 iobase = ia->ia_iobase; 322 needioh = 1; 323 } else 324 #endif 325 #if NCOM_COMMULTI 326 if (1) { 327 struct cfdata *cf = match; 328 struct commulti_attach_args *ca = aux; 329 330 if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != ca->ca_slave) 331 return (0); 332 333 bc = ca->ca_bc; 334 iobase = ca->ca_iobase; 335 ioh = ca->ca_ioh; 336 needioh = 0; 337 } else 338 #endif 339 return(0); /* This cannot happen */ 340 341 /* if it's in use as console, it's there. */ 342 if (iobase == comconsaddr && !comconsattached) 343 goto out; 344 345 if (needioh && bus_io_map(bc, iobase, COM_NPORTS, &ioh)) { 346 rv = 0; 347 goto out; 348 } 349 rv = comprobe1(bc, ioh, iobase); 350 if (needioh) 351 bus_io_unmap(bc, ioh, COM_NPORTS); 352 353 out: 354 #if NCOM_ISA 355 if (rv && !strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 356 struct isa_attach_args *ia = aux; 357 358 ia->ia_iosize = COM_NPORTS; 359 ia->ia_msize = 0; 360 } 361 #endif 362 return (rv); 363 } 364 365 void 366 comattach(parent, self, aux) 367 struct device *parent, *self; 368 void *aux; 369 { 370 struct com_softc *sc = (void *)self; 371 int iobase, irq; 372 bus_chipset_tag_t bc; 373 bus_io_handle_t ioh; 374 #ifdef COM_HAYESP 375 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 376 int *hayespp; 377 #endif 378 379 /* 380 * XXX should be broken out into functions for isa attach and 381 * XXX for commulti attach, with a helper function that contains 382 * XXX most of the interesting stuff. 383 */ 384 sc->sc_hwflags = 0; 385 sc->sc_swflags = 0; 386 #if NCOM_ISA 387 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 388 struct isa_attach_args *ia = aux; 389 390 /* 391 * We're living on an isa. 392 */ 393 iobase = ia->ia_iobase; 394 bc = ia->ia_bc; 395 if (iobase != comconsaddr) { 396 if (bus_io_map(bc, iobase, COM_NPORTS, &ioh)) 397 panic("comattach: io mapping failed"); 398 } else 399 ioh = comconsioh; 400 irq = ia->ia_irq; 401 } else 402 #endif 403 #if NCOM_COMMULTI 404 if (1) { 405 struct commulti_attach_args *ca = aux; 406 407 /* 408 * We're living on a commulti. 409 */ 410 iobase = ca->ca_iobase; 411 bc = ca->ca_bc; 412 ioh = ca->ca_ioh; 413 irq = IRQUNK; 414 415 if (ca->ca_noien) 416 sc->sc_hwflags |= COM_HW_NOIEN; 417 } else 418 #endif 419 panic("comattach: impossible"); 420 421 sc->sc_bc = bc; 422 sc->sc_ioh = ioh; 423 sc->sc_iobase = iobase; 424 425 if (iobase == comconsaddr) { 426 comconsattached = 1; 427 428 /* 429 * Need to reset baud rate, etc. of next print so reset 430 * comconsinit. Also make sure console is always "hardwired". 431 */ 432 delay(1000); /* wait for output to finish */ 433 comconsinit = 0; 434 SET(sc->sc_hwflags, COM_HW_CONSOLE); 435 SET(sc->sc_swflags, COM_SW_SOFTCAR); 436 } 437 438 #ifdef COM_HAYESP 439 /* Look for a Hayes ESP board. */ 440 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 441 bus_io_handle_t hayespioh; 442 443 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 444 if (bus_io_map(bc, *hayespp, HAYESP_NPORTS, &hayespioh)) 445 continue; 446 if (comprobeHAYESP(hayespioh, sc)) { 447 sc->sc_hayespbase = *hayespp; 448 sc->sc_hayespioh = hayespioh; 449 break; 450 } 451 bus_io_unmap(bc, hayespioh, HAYESP_NPORTS); 452 } 453 /* No ESP; look for other things. */ 454 if (*hayespp == 0) { 455 #endif 456 457 /* look for a NS 16550AF UART with FIFOs */ 458 bus_io_write_1(bc, ioh, com_fifo, 459 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 460 delay(100); 461 if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK) 462 if (ISSET(bus_io_read_1(bc, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) { 463 SET(sc->sc_hwflags, COM_HW_FIFO); 464 printf(": ns16550a, working fifo\n"); 465 } else 466 printf(": ns16550, broken fifo\n"); 467 else 468 printf(": ns8250 or ns16450, no fifo\n"); 469 bus_io_write_1(bc, ioh, com_fifo, 0); 470 #ifdef COM_HAYESP 471 } 472 #endif 473 474 /* disable interrupts */ 475 bus_io_write_1(bc, ioh, com_ier, 0); 476 bus_io_write_1(bc, ioh, com_mcr, 0); 477 478 if (irq != IRQUNK) { 479 #if NCOM_ISA 480 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 481 struct isa_attach_args *ia = aux; 482 483 sc->sc_ih = isa_intr_establish(ia->ia_ic, irq, 484 IST_EDGE, IPL_TTY, comintr, sc); 485 } else 486 #endif 487 panic("comattach: IRQ but can't have one"); 488 } 489 490 #ifdef KGDB 491 if (kgdb_dev == makedev(commajor, unit)) { 492 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 493 kgdb_dev = -1; /* can't debug over console port */ 494 else { 495 cominit(bc, ioh, kgdb_rate); 496 if (kgdb_debug_init) { 497 /* 498 * Print prefix of device name, 499 * let kgdb_connect print the rest. 500 */ 501 printf("%s: ", sc->sc_dev.dv_xname); 502 kgdb_connect(1); 503 } else 504 printf("%s: kgdb enabled\n", 505 sc->sc_dev.dv_xname); 506 } 507 } 508 #endif 509 510 /* XXX maybe move up some? */ 511 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 512 printf("%s: console\n", sc->sc_dev.dv_xname); 513 } 514 515 int 516 comopen(dev, flag, mode, p) 517 dev_t dev; 518 int flag, mode; 519 struct proc *p; 520 { 521 int unit = COMUNIT(dev); 522 struct com_softc *sc; 523 bus_chipset_tag_t bc; 524 bus_io_handle_t ioh; 525 struct tty *tp; 526 int s; 527 int error = 0; 528 529 if (unit >= com_cd.cd_ndevs) 530 return ENXIO; 531 sc = com_cd.cd_devs[unit]; 532 if (!sc) 533 return ENXIO; 534 535 if (!sc->sc_tty) 536 tp = sc->sc_tty = ttymalloc(); 537 else 538 tp = sc->sc_tty; 539 540 tp->t_oproc = comstart; 541 tp->t_param = comparam; 542 tp->t_dev = dev; 543 if (!ISSET(tp->t_state, TS_ISOPEN)) { 544 SET(tp->t_state, TS_WOPEN); 545 ttychars(tp); 546 tp->t_iflag = TTYDEF_IFLAG; 547 tp->t_oflag = TTYDEF_OFLAG; 548 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 549 tp->t_cflag = comconscflag; 550 else 551 tp->t_cflag = TTYDEF_CFLAG; 552 if (ISSET(sc->sc_swflags, COM_SW_CLOCAL)) 553 SET(tp->t_cflag, CLOCAL); 554 if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS)) 555 SET(tp->t_cflag, CRTSCTS); 556 if (ISSET(sc->sc_swflags, COM_SW_MDMBUF)) 557 SET(tp->t_cflag, MDMBUF); 558 tp->t_lflag = TTYDEF_LFLAG; 559 tp->t_ispeed = tp->t_ospeed = comdefaultrate; 560 561 s = spltty(); 562 563 comparam(tp, &tp->t_termios); 564 ttsetwater(tp); 565 566 if (comsopen++ == 0) 567 timeout(compoll, NULL, 1); 568 569 sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0]; 570 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 571 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 572 573 bc = sc->sc_bc; 574 ioh = sc->sc_ioh; 575 #ifdef COM_HAYESP 576 /* Setup the ESP board */ 577 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 578 bus_io_handle_t hayespioh = sc->sc_hayespioh; 579 580 bus_io_write_1(bc, ioh, com_fifo, 581 FIFO_DMA_MODE|FIFO_ENABLE| 582 FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8); 583 584 /* Set 16550 compatibility mode */ 585 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 586 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 587 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 588 HAYESP_MODE_SCALE); 589 590 /* Set RTS/CTS flow control */ 591 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 592 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 593 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 594 595 /* Set flow control levels */ 596 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 597 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 598 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 599 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 600 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 601 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 602 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 603 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 604 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 605 } else 606 #endif 607 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 608 /* Set the FIFO threshold based on the receive speed. */ 609 bus_io_write_1(bc, ioh, com_fifo, 610 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | 611 (tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 612 /* flush any pending I/O */ 613 while (ISSET(bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY)) 614 (void) bus_io_read_1(bc, ioh, com_data); 615 /* you turn me on, baby */ 616 sc->sc_mcr = MCR_DTR | MCR_RTS; 617 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 618 SET(sc->sc_mcr, MCR_IENABLE); 619 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 620 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 621 bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); 622 623 sc->sc_msr = bus_io_read_1(bc, ioh, com_msr); 624 if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || 625 ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF)) 626 SET(tp->t_state, TS_CARR_ON); 627 else 628 CLR(tp->t_state, TS_CARR_ON); 629 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) 630 return EBUSY; 631 else 632 s = spltty(); 633 634 /* wait for carrier if necessary */ 635 if (!ISSET(flag, O_NONBLOCK)) 636 while (!ISSET(tp->t_cflag, CLOCAL) && 637 !ISSET(tp->t_state, TS_CARR_ON)) { 638 SET(tp->t_state, TS_WOPEN); 639 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 640 ttopen, 0); 641 if (error) { 642 /* XXX should turn off chip if we're the 643 only waiter */ 644 splx(s); 645 return error; 646 } 647 } 648 splx(s); 649 650 return (*linesw[tp->t_line].l_open)(dev, tp); 651 } 652 653 int 654 comclose(dev, flag, mode, p) 655 dev_t dev; 656 int flag, mode; 657 struct proc *p; 658 { 659 int unit = COMUNIT(dev); 660 struct com_softc *sc = com_cd.cd_devs[unit]; 661 struct tty *tp = sc->sc_tty; 662 bus_chipset_tag_t bc = sc->sc_bc; 663 bus_io_handle_t ioh = sc->sc_ioh; 664 int s; 665 666 /* XXX This is for cons.c. */ 667 if (!ISSET(tp->t_state, TS_ISOPEN)) 668 return 0; 669 670 (*linesw[tp->t_line].l_close)(tp, flag); 671 s = spltty(); 672 CLR(sc->sc_lcr, LCR_SBREAK); 673 bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); 674 bus_io_write_1(bc, ioh, com_ier, 0); 675 if (ISSET(tp->t_cflag, HUPCL) && 676 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) { 677 /* XXX perhaps only clear DTR */ 678 bus_io_write_1(bc, ioh, com_mcr, 0); 679 } 680 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 681 if (--comsopen == 0) 682 untimeout(compoll, NULL); 683 splx(s); 684 ttyclose(tp); 685 #ifdef notyet /* XXXX */ 686 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 687 ttyfree(tp); 688 sc->sc_tty = 0; 689 } 690 #endif 691 return 0; 692 } 693 694 int 695 comread(dev, uio, flag) 696 dev_t dev; 697 struct uio *uio; 698 int flag; 699 { 700 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 701 struct tty *tp = sc->sc_tty; 702 703 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 704 } 705 706 int 707 comwrite(dev, uio, flag) 708 dev_t dev; 709 struct uio *uio; 710 int flag; 711 { 712 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 713 struct tty *tp = sc->sc_tty; 714 715 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 716 } 717 718 struct tty * 719 comtty(dev) 720 dev_t dev; 721 { 722 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 723 struct tty *tp = sc->sc_tty; 724 725 return (tp); 726 } 727 728 static u_char 729 tiocm_xxx2mcr(data) 730 int data; 731 { 732 u_char m = 0; 733 734 if (ISSET(data, TIOCM_DTR)) 735 SET(m, MCR_DTR); 736 if (ISSET(data, TIOCM_RTS)) 737 SET(m, MCR_RTS); 738 return m; 739 } 740 741 int 742 comioctl(dev, cmd, data, flag, p) 743 dev_t dev; 744 u_long cmd; 745 caddr_t data; 746 int flag; 747 struct proc *p; 748 { 749 int unit = COMUNIT(dev); 750 struct com_softc *sc = com_cd.cd_devs[unit]; 751 struct tty *tp = sc->sc_tty; 752 bus_chipset_tag_t bc = sc->sc_bc; 753 bus_io_handle_t ioh = sc->sc_ioh; 754 int error; 755 756 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 757 if (error >= 0) 758 return error; 759 error = ttioctl(tp, cmd, data, flag, p); 760 if (error >= 0) 761 return error; 762 763 switch (cmd) { 764 case TIOCSBRK: 765 SET(sc->sc_lcr, LCR_SBREAK); 766 bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); 767 break; 768 case TIOCCBRK: 769 CLR(sc->sc_lcr, LCR_SBREAK); 770 bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); 771 break; 772 case TIOCSDTR: 773 SET(sc->sc_mcr, sc->sc_dtr); 774 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 775 break; 776 case TIOCCDTR: 777 CLR(sc->sc_mcr, sc->sc_dtr); 778 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 779 break; 780 case TIOCMSET: 781 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 782 case TIOCMBIS: 783 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 784 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 785 break; 786 case TIOCMBIC: 787 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 788 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 789 break; 790 case TIOCMGET: { 791 u_char m; 792 int bits = 0; 793 794 m = sc->sc_mcr; 795 if (ISSET(m, MCR_DTR)) 796 SET(bits, TIOCM_DTR); 797 if (ISSET(m, MCR_RTS)) 798 SET(bits, TIOCM_RTS); 799 m = sc->sc_msr; 800 if (ISSET(m, MSR_DCD)) 801 SET(bits, TIOCM_CD); 802 if (ISSET(m, MSR_CTS)) 803 SET(bits, TIOCM_CTS); 804 if (ISSET(m, MSR_DSR)) 805 SET(bits, TIOCM_DSR); 806 if (ISSET(m, MSR_RI | MSR_TERI)) 807 SET(bits, TIOCM_RI); 808 if (bus_io_read_1(bc, ioh, com_ier)) 809 SET(bits, TIOCM_LE); 810 *(int *)data = bits; 811 break; 812 } 813 case TIOCGFLAGS: { 814 int driverbits, userbits = 0; 815 816 driverbits = sc->sc_swflags; 817 if (ISSET(driverbits, COM_SW_SOFTCAR)) 818 SET(userbits, TIOCFLAG_SOFTCAR); 819 if (ISSET(driverbits, COM_SW_CLOCAL)) 820 SET(userbits, TIOCFLAG_CLOCAL); 821 if (ISSET(driverbits, COM_SW_CRTSCTS)) 822 SET(userbits, TIOCFLAG_CRTSCTS); 823 if (ISSET(driverbits, COM_SW_MDMBUF)) 824 SET(userbits, TIOCFLAG_MDMBUF); 825 826 *(int *)data = userbits; 827 break; 828 } 829 case TIOCSFLAGS: { 830 int userbits, driverbits = 0; 831 832 error = suser(p->p_ucred, &p->p_acflag); 833 if (error != 0) 834 return(EPERM); 835 836 userbits = *(int *)data; 837 if (ISSET(userbits, TIOCFLAG_SOFTCAR) || 838 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 839 SET(driverbits, COM_SW_SOFTCAR); 840 if (ISSET(userbits, TIOCFLAG_CLOCAL)) 841 SET(driverbits, COM_SW_CLOCAL); 842 if (ISSET(userbits, TIOCFLAG_CRTSCTS)) 843 SET(driverbits, COM_SW_CRTSCTS); 844 if (ISSET(userbits, TIOCFLAG_MDMBUF)) 845 SET(driverbits, COM_SW_MDMBUF); 846 847 sc->sc_swflags = driverbits; 848 break; 849 } 850 default: 851 return ENOTTY; 852 } 853 854 return 0; 855 } 856 857 int 858 comparam(tp, t) 859 struct tty *tp; 860 struct termios *t; 861 { 862 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 863 bus_chipset_tag_t bc = sc->sc_bc; 864 bus_io_handle_t ioh = sc->sc_ioh; 865 int ospeed = comspeed(t->c_ospeed); 866 u_char lcr; 867 tcflag_t oldcflag; 868 int s; 869 870 /* check requested parameters */ 871 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed)) 872 return EINVAL; 873 874 lcr = ISSET(sc->sc_lcr, LCR_SBREAK); 875 876 switch (ISSET(t->c_cflag, CSIZE)) { 877 case CS5: 878 SET(lcr, LCR_5BITS); 879 break; 880 case CS6: 881 SET(lcr, LCR_6BITS); 882 break; 883 case CS7: 884 SET(lcr, LCR_7BITS); 885 break; 886 case CS8: 887 SET(lcr, LCR_8BITS); 888 break; 889 } 890 if (ISSET(t->c_cflag, PARENB)) { 891 SET(lcr, LCR_PENAB); 892 if (!ISSET(t->c_cflag, PARODD)) 893 SET(lcr, LCR_PEVEN); 894 } 895 if (ISSET(t->c_cflag, CSTOPB)) 896 SET(lcr, LCR_STOPB); 897 898 sc->sc_lcr = lcr; 899 900 s = spltty(); 901 902 if (ospeed == 0) { 903 CLR(sc->sc_mcr, MCR_DTR); 904 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 905 } 906 907 /* 908 * Set the FIFO threshold based on the receive speed, if we are 909 * changing it. 910 */ 911 #if 1 912 if (tp->t_ispeed != t->c_ispeed) { 913 #else 914 if (1) { 915 #endif 916 if (ospeed != 0) { 917 /* 918 * Make sure the transmit FIFO is empty before 919 * proceeding. If we don't do this, some revisions 920 * of the UART will hang. Interestingly enough, 921 * even if we do this will the last character is 922 * still being pushed out, they don't hang. This 923 * seems good enough. 924 */ 925 while (ISSET(tp->t_state, TS_BUSY)) { 926 int error; 927 928 ++sc->sc_halt; 929 error = ttysleep(tp, &tp->t_outq, 930 TTOPRI | PCATCH, "comprm", 0); 931 --sc->sc_halt; 932 if (error) { 933 splx(s); 934 comstart(tp); 935 return (error); 936 } 937 } 938 939 bus_io_write_1(bc, ioh, com_lcr, lcr | LCR_DLAB); 940 bus_io_write_1(bc, ioh, com_dlbl, ospeed); 941 bus_io_write_1(bc, ioh, com_dlbh, ospeed >> 8); 942 bus_io_write_1(bc, ioh, com_lcr, lcr); 943 SET(sc->sc_mcr, MCR_DTR); 944 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 945 } else 946 bus_io_write_1(bc, ioh, com_lcr, lcr); 947 948 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP) && 949 ISSET(sc->sc_hwflags, COM_HW_FIFO)) 950 bus_io_write_1(bc, ioh, com_fifo, 951 FIFO_ENABLE | 952 (t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 953 } else 954 bus_io_write_1(bc, ioh, com_lcr, lcr); 955 956 /* When not using CRTSCTS, RTS follows DTR. */ 957 if (!ISSET(t->c_cflag, CRTSCTS)) { 958 if (ISSET(sc->sc_mcr, MCR_DTR)) { 959 if (!ISSET(sc->sc_mcr, MCR_RTS)) { 960 SET(sc->sc_mcr, MCR_RTS); 961 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 962 } 963 } else { 964 if (ISSET(sc->sc_mcr, MCR_RTS)) { 965 CLR(sc->sc_mcr, MCR_RTS); 966 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 967 } 968 } 969 sc->sc_dtr = MCR_DTR | MCR_RTS; 970 } else 971 sc->sc_dtr = MCR_DTR; 972 973 /* and copy to tty */ 974 tp->t_ispeed = t->c_ispeed; 975 tp->t_ospeed = t->c_ospeed; 976 oldcflag = tp->t_cflag; 977 tp->t_cflag = t->c_cflag; 978 979 /* 980 * If DCD is off and MDMBUF is changed, ask the tty layer if we should 981 * stop the device. 982 */ 983 if (!ISSET(sc->sc_msr, MSR_DCD) && 984 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 985 ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) && 986 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) { 987 CLR(sc->sc_mcr, sc->sc_dtr); 988 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 989 } 990 991 /* Just to be sure... */ 992 splx(s); 993 comstart(tp); 994 return 0; 995 } 996 997 void 998 comstart(tp) 999 struct tty *tp; 1000 { 1001 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1002 bus_chipset_tag_t bc = sc->sc_bc; 1003 bus_io_handle_t ioh = sc->sc_ioh; 1004 int s; 1005 1006 s = spltty(); 1007 if (ISSET(tp->t_state, TS_BUSY)) 1008 goto out; 1009 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP) || 1010 sc->sc_halt > 0) 1011 goto stopped; 1012 if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS)) 1013 goto stopped; 1014 if (tp->t_outq.c_cc <= tp->t_lowat) { 1015 if (ISSET(tp->t_state, TS_ASLEEP)) { 1016 CLR(tp->t_state, TS_ASLEEP); 1017 wakeup(&tp->t_outq); 1018 } 1019 if (tp->t_outq.c_cc == 0) 1020 goto stopped; 1021 selwakeup(&tp->t_wsel); 1022 } 1023 SET(tp->t_state, TS_BUSY); 1024 1025 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1026 SET(sc->sc_ier, IER_ETXRDY); 1027 bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); 1028 } 1029 #ifdef COM_HAYESP 1030 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1031 u_char buffer[1024], *cp = buffer; 1032 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1033 do 1034 bus_io_write_1(bc, ioh, com_data, *cp++); 1035 while (--n); 1036 } 1037 else 1038 #endif 1039 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) { 1040 u_char buffer[16], *cp = buffer; 1041 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1042 do { 1043 bus_io_write_1(bc, ioh, com_data, *cp++); 1044 } while (--n); 1045 } else 1046 bus_io_write_1(bc, ioh, com_data, getc(&tp->t_outq)); 1047 out: 1048 splx(s); 1049 return; 1050 stopped: 1051 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1052 CLR(sc->sc_ier, IER_ETXRDY); 1053 bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); 1054 } 1055 splx(s); 1056 } 1057 1058 /* 1059 * Stop output on a line. 1060 */ 1061 int 1062 comstop(tp, flag) 1063 struct tty *tp; 1064 int flag; 1065 { 1066 int s; 1067 1068 s = spltty(); 1069 if (ISSET(tp->t_state, TS_BUSY)) 1070 if (!ISSET(tp->t_state, TS_TTSTOP)) 1071 SET(tp->t_state, TS_FLUSH); 1072 splx(s); 1073 return 0; 1074 } 1075 1076 void 1077 comdiag(arg) 1078 void *arg; 1079 { 1080 struct com_softc *sc = arg; 1081 int overflows, floods; 1082 int s; 1083 1084 s = spltty(); 1085 sc->sc_errors = 0; 1086 overflows = sc->sc_overflows; 1087 sc->sc_overflows = 0; 1088 floods = sc->sc_floods; 1089 sc->sc_floods = 0; 1090 splx(s); 1091 1092 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf overflow%s\n", 1093 sc->sc_dev.dv_xname, 1094 overflows, overflows == 1 ? "" : "s", 1095 floods, floods == 1 ? "" : "s"); 1096 } 1097 1098 void 1099 compoll(arg) 1100 void *arg; 1101 { 1102 int unit; 1103 struct com_softc *sc; 1104 struct tty *tp; 1105 register u_char *ibufp; 1106 u_char *ibufend; 1107 register int c; 1108 int s; 1109 static int lsrmap[8] = { 1110 0, TTY_PE, 1111 TTY_FE, TTY_PE|TTY_FE, 1112 TTY_FE, TTY_PE|TTY_FE, 1113 TTY_FE, TTY_PE|TTY_FE 1114 }; 1115 1116 s = spltty(); 1117 if (comevents == 0) { 1118 splx(s); 1119 goto out; 1120 } 1121 comevents = 0; 1122 splx(s); 1123 1124 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1125 sc = com_cd.cd_devs[unit]; 1126 if (sc == 0 || sc->sc_ibufp == sc->sc_ibuf) 1127 continue; 1128 1129 tp = sc->sc_tty; 1130 1131 s = spltty(); 1132 1133 ibufp = sc->sc_ibuf; 1134 ibufend = sc->sc_ibufp; 1135 1136 if (ibufp == ibufend) { 1137 splx(s); 1138 continue; 1139 } 1140 1141 sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ? 1142 sc->sc_ibufs[1] : sc->sc_ibufs[0]; 1143 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 1144 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 1145 1146 if (tp == 0 || !ISSET(tp->t_state, TS_ISOPEN)) { 1147 splx(s); 1148 continue; 1149 } 1150 1151 if (ISSET(tp->t_cflag, CRTSCTS) && 1152 !ISSET(sc->sc_mcr, MCR_RTS)) { 1153 /* XXX */ 1154 SET(sc->sc_mcr, MCR_RTS); 1155 bus_io_write_1(sc->sc_bc, sc->sc_ioh, com_mcr, 1156 sc->sc_mcr); 1157 } 1158 1159 splx(s); 1160 1161 while (ibufp < ibufend) { 1162 c = *ibufp++; 1163 if (*ibufp & LSR_OE) { 1164 sc->sc_overflows++; 1165 if (sc->sc_errors++ == 0) 1166 timeout(comdiag, sc, 60 * hz); 1167 } 1168 /* This is ugly, but fast. */ 1169 c |= lsrmap[(*ibufp++ & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1170 (*linesw[tp->t_line].l_rint)(c, tp); 1171 } 1172 } 1173 1174 out: 1175 timeout(compoll, NULL, 1); 1176 } 1177 1178 int 1179 comintr(arg) 1180 void *arg; 1181 { 1182 struct com_softc *sc = arg; 1183 bus_chipset_tag_t bc = sc->sc_bc; 1184 bus_io_handle_t ioh = sc->sc_ioh; 1185 struct tty *tp; 1186 u_char lsr, data, msr, delta; 1187 #ifdef COM_DEBUG 1188 int n; 1189 struct { 1190 u_char iir, lsr, msr; 1191 } iter[32]; 1192 #endif 1193 1194 #ifdef COM_DEBUG 1195 n = 0; 1196 if (ISSET(iter[n].iir = bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1197 return (0); 1198 #else 1199 if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1200 return (0); 1201 #endif 1202 1203 tp = sc->sc_tty; 1204 1205 for (;;) { 1206 #ifdef COM_DEBUG 1207 iter[n].lsr = 1208 #endif 1209 lsr = bus_io_read_1(bc, ioh, com_lsr); 1210 1211 if (ISSET(lsr, LSR_RXRDY)) { 1212 register u_char *p = sc->sc_ibufp; 1213 1214 comevents = 1; 1215 do { 1216 data = bus_io_read_1(bc, ioh, com_data); 1217 if (ISSET(lsr, LSR_BI)) { 1218 #ifdef notdef 1219 printf("break %02x %02x %02x %02x\n", 1220 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, 1221 sc->sc_dtr); 1222 #endif 1223 #ifdef DDB 1224 if (ISSET(sc->sc_hwflags, 1225 COM_HW_CONSOLE)) { 1226 Debugger(); 1227 goto next; 1228 } 1229 #endif 1230 } 1231 if (p >= sc->sc_ibufend) { 1232 sc->sc_floods++; 1233 if (sc->sc_errors++ == 0) 1234 timeout(comdiag, sc, 60 * hz); 1235 } else { 1236 *p++ = data; 1237 *p++ = lsr; 1238 if (p == sc->sc_ibufhigh && 1239 ISSET(tp->t_cflag, CRTSCTS)) { 1240 /* XXX */ 1241 CLR(sc->sc_mcr, MCR_RTS); 1242 bus_io_write_1(bc, ioh, com_mcr, 1243 sc->sc_mcr); 1244 } 1245 } 1246 next: 1247 #ifdef COM_DEBUG 1248 if (++n >= 32) 1249 goto ohfudge; 1250 iter[n].lsr = 1251 #endif 1252 lsr = bus_io_read_1(bc, ioh, com_lsr); 1253 } while (ISSET(lsr, LSR_RXRDY)); 1254 1255 sc->sc_ibufp = p; 1256 } 1257 #ifdef COM_DEBUG 1258 else if (ISSET(lsr, LSR_BI|LSR_FE|LSR_PE|LSR_OE)) 1259 printf("weird lsr %02x\n", lsr); 1260 #endif 1261 1262 #ifdef COM_DEBUG 1263 iter[n].msr = 1264 #endif 1265 msr = bus_io_read_1(bc, ioh, com_msr); 1266 1267 if (msr != sc->sc_msr) { 1268 delta = msr ^ sc->sc_msr; 1269 sc->sc_msr = msr; 1270 if (ISSET(delta, MSR_DCD) && 1271 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 1272 (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) { 1273 CLR(sc->sc_mcr, sc->sc_dtr); 1274 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 1275 } 1276 if (ISSET(delta & msr, MSR_CTS) && 1277 ISSET(tp->t_cflag, CRTSCTS)) { 1278 /* the line is up and we want to do rts/cts flow control */ 1279 (*linesw[tp->t_line].l_start)(tp); 1280 } 1281 } 1282 1283 if (ISSET(lsr, LSR_TXRDY) && ISSET(tp->t_state, TS_BUSY)) { 1284 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 1285 if (sc->sc_halt > 0) 1286 wakeup(&tp->t_outq); 1287 (*linesw[tp->t_line].l_start)(tp); 1288 } 1289 1290 #ifdef COM_DEBUG 1291 if (++n >= 32) 1292 goto ohfudge; 1293 if (ISSET(iter[n].iir = bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1294 return (1); 1295 #else 1296 if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1297 return (1); 1298 #endif 1299 } 1300 #ifdef COM_DEBUG 1301 ohfudge: 1302 printf("comintr: too many iterations"); 1303 for (n = 0; n < 32; n++) { 1304 if ((n % 4) == 0) 1305 printf("\ncomintr: iter[%02d]", n); 1306 printf(" %02x %02x %02x", iter[n].iir, iter[n].lsr, iter[n].msr); 1307 } 1308 printf("\n"); 1309 printf("comintr: msr %02x mcr %02x lcr %02x ier %02x\n", 1310 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, sc->sc_ier); 1311 printf("comintr: state %08x cc %d\n", sc->sc_tty->t_state, 1312 sc->sc_tty->t_outq.c_cc); 1313 #endif 1314 } 1315 1316 /* 1317 * Following are all routines needed for COM to act as console 1318 */ 1319 #include <dev/cons.h> 1320 1321 void 1322 comcnprobe(cp) 1323 struct consdev *cp; 1324 { 1325 /* XXX NEEDS TO BE FIXED XXX */ 1326 bus_chipset_tag_t bc = 0; 1327 bus_io_handle_t ioh; 1328 int found; 1329 1330 if (bus_io_map(bc, CONADDR, COM_NPORTS, &ioh)) { 1331 cp->cn_pri = CN_DEAD; 1332 return; 1333 } 1334 found = comprobe1(bc, ioh, CONADDR); 1335 bus_io_unmap(bc, ioh, COM_NPORTS); 1336 if (!found) { 1337 cp->cn_pri = CN_DEAD; 1338 return; 1339 } 1340 1341 /* locate the major number */ 1342 for (commajor = 0; commajor < nchrdev; commajor++) 1343 if (cdevsw[commajor].d_open == comopen) 1344 break; 1345 1346 /* initialize required fields */ 1347 cp->cn_dev = makedev(commajor, CONUNIT); 1348 #ifdef COMCONSOLE 1349 cp->cn_pri = CN_REMOTE; /* Force a serial port console */ 1350 #else 1351 cp->cn_pri = CN_NORMAL; 1352 #endif 1353 } 1354 1355 void 1356 comcninit(cp) 1357 struct consdev *cp; 1358 { 1359 1360 #if 0 1361 XXX NEEDS TO BE FIXED XXX 1362 comconsbc = ???; 1363 #endif 1364 if (bus_io_map(comconsbc, CONADDR, COM_NPORTS, &comconsioh)) 1365 panic("comcninit: mapping failed"); 1366 1367 cominit(comconsbc, comconsioh, comdefaultrate); 1368 comconsaddr = CONADDR; 1369 comconsinit = 0; 1370 } 1371 1372 void 1373 cominit(bc, ioh, rate) 1374 bus_chipset_tag_t bc; 1375 bus_io_handle_t ioh; 1376 int rate; 1377 { 1378 int s = splhigh(); 1379 u_char stat; 1380 1381 bus_io_write_1(bc, ioh, com_lcr, LCR_DLAB); 1382 rate = comspeed(comdefaultrate); 1383 bus_io_write_1(bc, ioh, com_dlbl, rate); 1384 bus_io_write_1(bc, ioh, com_dlbh, rate >> 8); 1385 bus_io_write_1(bc, ioh, com_lcr, LCR_8BITS); 1386 bus_io_write_1(bc, ioh, com_ier, IER_ERXRDY | IER_ETXRDY); 1387 bus_io_write_1(bc, ioh, com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_4); 1388 stat = bus_io_read_1(bc, ioh, com_iir); 1389 splx(s); 1390 } 1391 1392 int 1393 comcngetc(dev) 1394 dev_t dev; 1395 { 1396 int s = splhigh(); 1397 bus_chipset_tag_t bc = comconsbc; 1398 bus_io_handle_t ioh = comconsioh; 1399 u_char stat, c; 1400 1401 while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY)) 1402 ; 1403 c = bus_io_read_1(bc, ioh, com_data); 1404 stat = bus_io_read_1(bc, ioh, com_iir); 1405 splx(s); 1406 return c; 1407 } 1408 1409 /* 1410 * Console kernel output character routine. 1411 */ 1412 void 1413 comcnputc(dev, c) 1414 dev_t dev; 1415 int c; 1416 { 1417 int s = splhigh(); 1418 bus_chipset_tag_t bc = comconsbc; 1419 bus_io_handle_t ioh = comconsioh; 1420 u_char stat; 1421 register int timo; 1422 1423 #ifdef KGDB 1424 if (dev != kgdb_dev) 1425 #endif 1426 if (comconsinit == 0) { 1427 cominit(bc, ioh, comdefaultrate); 1428 comconsinit = 1; 1429 } 1430 /* wait for any pending transmission to finish */ 1431 timo = 50000; 1432 while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo) 1433 ; 1434 bus_io_write_1(bc, ioh, com_data, c); 1435 /* wait for this transmission to complete */ 1436 timo = 1500000; 1437 while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo) 1438 ; 1439 /* clear any interrupts generated by this transmission */ 1440 stat = bus_io_read_1(bc, ioh, com_iir); 1441 splx(s); 1442 } 1443 1444 void 1445 comcnpollc(dev, on) 1446 dev_t dev; 1447 int on; 1448 { 1449 1450 } 1451
Indexes created Mon Oct 20 01:09:56 GMT 2025