com.c revision 1.82
1 /* $NetBSD: com.c,v 1.82 1996/05/12 23:52:00 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996 5 * Charles M. Hannum. All rights reserved. 6 * Copyright (c) 1991 The Regents of the University of California. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)com.c 7.5 (Berkeley) 5/16/91 38 */ 39 40 /* 41 * COM driver, based on HP dca driver 42 * uses National Semiconductor NS16450/NS16550AF UART 43 */ 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/tty.h> 49 #include <sys/proc.h> 50 #include <sys/user.h> 51 #include <sys/conf.h> 52 #include <sys/file.h> 53 #include <sys/uio.h> 54 #include <sys/kernel.h> 55 #include <sys/syslog.h> 56 #include <sys/types.h> 57 #include <sys/device.h> 58 59 #include <machine/bus.h> 60 #include <machine/intr.h> 61 62 #include <dev/isa/isavar.h> 63 #include <dev/isa/comreg.h> 64 #include <dev/isa/comvar.h> 65 #include <dev/ic/ns16550reg.h> 66 #ifdef COM_HAYESP 67 #include <dev/ic/hayespreg.h> 68 #endif 69 #define com_lcr com_cfcr 70 71 #include "com.h" 72 73 74 #define COM_IBUFSIZE (2 * 512) 75 #define COM_IHIGHWATER ((3 * COM_IBUFSIZE) / 4) 76 77 struct com_softc { 78 struct device sc_dev; 79 void *sc_ih; 80 struct tty *sc_tty; 81 82 int sc_overflows; 83 int sc_floods; 84 int sc_errors; 85 86 int sc_halt; 87 88 int sc_iobase; 89 #ifdef COM_HAYESP 90 int sc_hayespbase; 91 #endif 92 93 bus_chipset_tag_t sc_bc; 94 bus_io_handle_t sc_ioh; 95 bus_io_handle_t sc_hayespioh; 96 97 u_char sc_hwflags; 98 #define COM_HW_NOIEN 0x01 99 #define COM_HW_FIFO 0x02 100 #define COM_HW_HAYESP 0x04 101 #define COM_HW_CONSOLE 0x40 102 u_char sc_swflags; 103 #define COM_SW_SOFTCAR 0x01 104 #define COM_SW_CLOCAL 0x02 105 #define COM_SW_CRTSCTS 0x04 106 #define COM_SW_MDMBUF 0x08 107 u_char sc_msr, sc_mcr, sc_lcr, sc_ier; 108 u_char sc_dtr; 109 110 u_char *sc_ibuf, *sc_ibufp, *sc_ibufhigh, *sc_ibufend; 111 u_char sc_ibufs[2][COM_IBUFSIZE]; 112 }; 113 114 #ifdef COM_HAYESP 115 int comprobeHAYESP __P((bus_io_handle_t hayespioh, struct com_softc *sc)); 116 #endif 117 void comdiag __P((void *)); 118 int comspeed __P((long)); 119 int comparam __P((struct tty *, struct termios *)); 120 void comstart __P((struct tty *)); 121 void compoll __P((void *)); 122 123 /* XXX: These belong elsewhere */ 124 cdev_decl(com); 125 bdev_decl(com); 126 127 struct consdev; 128 void comcnprobe __P((struct consdev *)); 129 void comcninit __P((struct consdev *)); 130 int comcngetc __P((dev_t)); 131 void comcnputc __P((dev_t, int)); 132 void comcnpollc __P((dev_t, int)); 133 134 static u_char tiocm_xxx2mcr __P((int)); 135 136 /* 137 * XXX the following two cfattach structs should be different, and possibly 138 * XXX elsewhere. 139 */ 140 int comprobe __P((struct device *, void *, void *)); 141 void comattach __P((struct device *, struct device *, void *)); 142 143 #if NCOM_ISA 144 struct cfattach com_isa_ca = { 145 sizeof(struct com_softc), comprobe, comattach 146 }; 147 #endif 148 149 #if NCOM_COMMULTI 150 struct cfattach com_commulti_ca = { 151 sizeof(struct com_softc), comprobe, comattach 152 }; 153 #endif 154 155 struct cfdriver com_cd = { 156 NULL, "com", DV_TTY 157 }; 158 159 void cominit __P((bus_chipset_tag_t, bus_io_handle_t, int)); 160 161 #ifdef COMCONSOLE 162 int comdefaultrate = CONSPEED; /* XXX why set default? */ 163 #else 164 int comdefaultrate = TTYDEF_SPEED; 165 #endif 166 int comconsaddr; 167 int comconsinit; 168 int comconsattached; 169 bus_chipset_tag_t comconsbc; 170 bus_io_handle_t comconsioh; 171 tcflag_t comconscflag = TTYDEF_CFLAG; 172 173 int commajor; 174 int comsopen = 0; 175 int comevents = 0; 176 177 #ifdef KGDB 178 #include <machine/remote-sl.h> 179 extern int kgdb_dev; 180 extern int kgdb_rate; 181 extern int kgdb_debug_init; 182 #endif 183 184 #define COMUNIT(x) (minor(x)) 185 186 /* Macros to clear/set/test flags. */ 187 #define SET(t, f) (t) |= (f) 188 #define CLR(t, f) (t) &= ~(f) 189 #define ISSET(t, f) ((t) & (f)) 190 191 int 192 comspeed(speed) 193 long speed; 194 { 195 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 196 197 int x, err; 198 199 if (speed == 0) 200 return 0; 201 if (speed < 0) 202 return -1; 203 x = divrnd((COM_FREQ / 16), speed); 204 if (x <= 0) 205 return -1; 206 err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000; 207 if (err < 0) 208 err = -err; 209 if (err > COM_TOLERANCE) 210 return -1; 211 return x; 212 213 #undef divrnd(n, q) 214 } 215 216 int 217 comprobe1(bc, ioh, iobase) 218 bus_chipset_tag_t bc; 219 bus_io_handle_t ioh; 220 int iobase; 221 { 222 223 /* force access to id reg */ 224 bus_io_write_1(bc, ioh, com_lcr, 0); 225 bus_io_write_1(bc, ioh, com_iir, 0); 226 if (bus_io_read_1(bc, ioh, com_iir) & 0x38) 227 return 0; 228 229 return 1; 230 } 231 232 #ifdef COM_HAYESP 233 int 234 comprobeHAYESP(hayespioh, sc) 235 bus_io_handle_t hayespioh; 236 struct com_softc *sc; 237 { 238 char val, dips; 239 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 240 bus_chipset_tag_t bc = sc->sc_bc; 241 242 /* 243 * Hayes ESP cards have two iobases. One is for compatibility with 244 * 16550 serial chips, and at the same ISA PC base addresses. The 245 * other is for ESP-specific enhanced features, and lies at a 246 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 247 */ 248 249 /* Test for ESP signature */ 250 if ((bus_io_read_1(bc, hayespioh, 0) & 0xf3) == 0) 251 return 0; 252 253 /* 254 * ESP is present at ESP enhanced base address; unknown com port 255 */ 256 257 /* Get the dip-switch configurations */ 258 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 259 dips = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1); 260 261 /* Determine which com port this ESP card services: bits 0,1 of */ 262 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 263 if (sc->sc_iobase != combaselist[dips & 0x03]) 264 return 0; 265 266 printf(": ESP"); 267 268 /* Check ESP Self Test bits. */ 269 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 270 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 271 val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */ 272 val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS2); 273 if ((val & 0x70) < 0x20) { 274 printf("-old (%o)", val & 0x70); 275 /* we do not support the necessary features */ 276 return 0; 277 } 278 279 /* Check for ability to emulate 16550: bit 8 == 1 */ 280 if ((dips & 0x80) == 0) { 281 printf(" slave"); 282 /* XXX Does slave really mean no 16550 support?? */ 283 return 0; 284 } 285 286 /* 287 * If we made it this far, we are a full-featured ESP v2.0 (or 288 * better), at the correct com port address. 289 */ 290 291 SET(sc->sc_hwflags, COM_HW_HAYESP); 292 printf(", 1024 byte fifo\n"); 293 return 1; 294 } 295 #endif 296 297 int 298 comprobe(parent, match, aux) 299 struct device *parent; 300 void *match, *aux; 301 { 302 bus_chipset_tag_t bc; 303 bus_io_handle_t ioh; 304 int iobase, needioh; 305 int rv = 1; 306 307 /* 308 * XXX should be broken out into functions for isa probe and 309 * XXX for commulti probe, with a helper function that contains 310 * XXX most of the interesting stuff. 311 */ 312 #if NCOM_ISA 313 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 314 struct isa_attach_args *ia = aux; 315 316 bc = ia->ia_bc; 317 iobase = ia->ia_iobase; 318 needioh = 1; 319 } else 320 #endif 321 #if NCOM_COMMULTI 322 if (1) { 323 struct cfdata *cf = match; 324 struct commulti_attach_args *ca = aux; 325 326 if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != ca->ca_slave) 327 return (0); 328 329 bc = ca->ca_bc; 330 iobase = ca->ca_iobase; 331 ioh = ca->ca_ioh; 332 needioh = 0; 333 } else 334 #endif 335 return(0); /* This cannot happen */ 336 337 /* if it's in use as console, it's there. */ 338 if (iobase == comconsaddr && !comconsattached) 339 goto out; 340 341 if (needioh && bus_io_map(bc, iobase, COM_NPORTS, &ioh)) { 342 rv = 0; 343 goto out; 344 } 345 rv = comprobe1(bc, ioh, iobase); 346 if (needioh) 347 bus_io_unmap(bc, ioh, COM_NPORTS); 348 349 out: 350 #if NCOM_ISA 351 if (rv && !strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 352 struct isa_attach_args *ia = aux; 353 354 ia->ia_iosize = COM_NPORTS; 355 ia->ia_msize = 0; 356 } 357 #endif 358 return (rv); 359 } 360 361 void 362 comattach(parent, self, aux) 363 struct device *parent, *self; 364 void *aux; 365 { 366 struct com_softc *sc = (void *)self; 367 int iobase, irq; 368 bus_chipset_tag_t bc; 369 bus_io_handle_t ioh; 370 #ifdef COM_HAYESP 371 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 372 int *hayespp; 373 #endif 374 375 /* 376 * XXX should be broken out into functions for isa attach and 377 * XXX for commulti attach, with a helper function that contains 378 * XXX most of the interesting stuff. 379 */ 380 sc->sc_hwflags = 0; 381 sc->sc_swflags = 0; 382 #if NCOM_ISA 383 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 384 struct isa_attach_args *ia = aux; 385 386 /* 387 * We're living on an isa. 388 */ 389 iobase = ia->ia_iobase; 390 bc = ia->ia_bc; 391 if (iobase != comconsaddr) { 392 if (bus_io_map(bc, iobase, COM_NPORTS, &ioh)) 393 panic("comattach: io mapping failed"); 394 } else 395 ioh = comconsioh; 396 irq = ia->ia_irq; 397 } else 398 #endif 399 #if NCOM_COMMULTI 400 if (1) { 401 struct commulti_attach_args *ca = aux; 402 403 /* 404 * We're living on a commulti. 405 */ 406 iobase = ca->ca_iobase; 407 bc = ca->ca_bc; 408 ioh = ca->ca_ioh; 409 irq = IRQUNK; 410 411 if (ca->ca_noien) 412 sc->sc_hwflags |= COM_HW_NOIEN; 413 } else 414 #endif 415 panic("comattach: impossible"); 416 417 sc->sc_bc = bc; 418 sc->sc_ioh = ioh; 419 sc->sc_iobase = iobase; 420 421 if (iobase == comconsaddr) { 422 comconsattached = 1; 423 424 /* 425 * Need to reset baud rate, etc. of next print so reset 426 * comconsinit. Also make sure console is always "hardwired". 427 */ 428 delay(1000); /* wait for output to finish */ 429 comconsinit = 0; 430 SET(sc->sc_hwflags, COM_HW_CONSOLE); 431 SET(sc->sc_swflags, COM_SW_SOFTCAR); 432 } 433 434 #ifdef COM_HAYESP 435 /* Look for a Hayes ESP board. */ 436 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 437 bus_io_handle_t hayespioh; 438 439 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 440 if (bus_io_map(bc, *hayespp, HAYESP_NPORTS, &hayespioh)) 441 continue; 442 if (comprobeHAYESP(hayespioh, sc)) { 443 sc->sc_hayespbase = *hayespp; 444 sc->sc_hayespioh = hayespioh; 445 break; 446 } 447 bus_io_unmap(bc, hayespioh, HAYESP_NPORTS); 448 } 449 /* No ESP; look for other things. */ 450 if (*hayespp == 0) { 451 #endif 452 453 /* look for a NS 16550AF UART with FIFOs */ 454 bus_io_write_1(bc, ioh, com_fifo, 455 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 456 delay(100); 457 if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK) 458 if (ISSET(bus_io_read_1(bc, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) { 459 SET(sc->sc_hwflags, COM_HW_FIFO); 460 printf(": ns16550a, working fifo\n"); 461 } else 462 printf(": ns16550, broken fifo\n"); 463 else 464 printf(": ns8250 or ns16450, no fifo\n"); 465 bus_io_write_1(bc, ioh, com_fifo, 0); 466 #ifdef COM_HAYESP 467 } 468 #endif 469 470 /* disable interrupts */ 471 bus_io_write_1(bc, ioh, com_ier, 0); 472 bus_io_write_1(bc, ioh, com_mcr, 0); 473 474 if (irq != IRQUNK) { 475 #if NCOM_ISA 476 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 477 struct isa_attach_args *ia = aux; 478 479 sc->sc_ih = isa_intr_establish(ia->ia_ic, irq, 480 IST_EDGE, IPL_TTY, comintr, sc); 481 } else 482 #endif 483 panic("comattach: IRQ but can't have one"); 484 } 485 486 #ifdef KGDB 487 if (kgdb_dev == makedev(commajor, unit)) { 488 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 489 kgdb_dev = -1; /* can't debug over console port */ 490 else { 491 cominit(bc, ioh, kgdb_rate); 492 if (kgdb_debug_init) { 493 /* 494 * Print prefix of device name, 495 * let kgdb_connect print the rest. 496 */ 497 printf("%s: ", sc->sc_dev.dv_xname); 498 kgdb_connect(1); 499 } else 500 printf("%s: kgdb enabled\n", 501 sc->sc_dev.dv_xname); 502 } 503 } 504 #endif 505 506 /* XXX maybe move up some? */ 507 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 508 printf("%s: console\n", sc->sc_dev.dv_xname); 509 } 510 511 int 512 comopen(dev, flag, mode, p) 513 dev_t dev; 514 int flag, mode; 515 struct proc *p; 516 { 517 int unit = COMUNIT(dev); 518 struct com_softc *sc; 519 bus_chipset_tag_t bc; 520 bus_io_handle_t ioh; 521 struct tty *tp; 522 int s; 523 int error = 0; 524 525 if (unit >= com_cd.cd_ndevs) 526 return ENXIO; 527 sc = com_cd.cd_devs[unit]; 528 if (!sc) 529 return ENXIO; 530 531 if (!sc->sc_tty) 532 tp = sc->sc_tty = ttymalloc(); 533 else 534 tp = sc->sc_tty; 535 536 tp->t_oproc = comstart; 537 tp->t_param = comparam; 538 tp->t_dev = dev; 539 if (!ISSET(tp->t_state, TS_ISOPEN)) { 540 SET(tp->t_state, TS_WOPEN); 541 ttychars(tp); 542 tp->t_iflag = TTYDEF_IFLAG; 543 tp->t_oflag = TTYDEF_OFLAG; 544 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 545 tp->t_cflag = comconscflag; 546 else 547 tp->t_cflag = TTYDEF_CFLAG; 548 if (ISSET(sc->sc_swflags, COM_SW_CLOCAL)) 549 SET(tp->t_cflag, CLOCAL); 550 if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS)) 551 SET(tp->t_cflag, CRTSCTS); 552 if (ISSET(sc->sc_swflags, COM_SW_MDMBUF)) 553 SET(tp->t_cflag, MDMBUF); 554 tp->t_lflag = TTYDEF_LFLAG; 555 tp->t_ispeed = tp->t_ospeed = comdefaultrate; 556 557 s = spltty(); 558 559 comparam(tp, &tp->t_termios); 560 ttsetwater(tp); 561 562 if (comsopen++ == 0) 563 timeout(compoll, NULL, 1); 564 565 sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0]; 566 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 567 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 568 569 bc = sc->sc_bc; 570 ioh = sc->sc_ioh; 571 #ifdef COM_HAYESP 572 /* Setup the ESP board */ 573 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 574 bus_io_handle_t hayespioh = sc->sc_hayespioh; 575 576 bus_io_write_1(bc, ioh, com_fifo, 577 FIFO_DMA_MODE|FIFO_ENABLE| 578 FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8); 579 580 /* Set 16550 compatibility mode */ 581 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 582 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 583 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 584 HAYESP_MODE_SCALE); 585 586 /* Set RTS/CTS flow control */ 587 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 588 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 589 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 590 591 /* Set flow control levels */ 592 bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 593 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 594 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 595 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 596 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 597 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 598 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 599 bus_io_write_1(bc, hayespioh, HAYESP_CMD2, 600 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 601 } else 602 #endif 603 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 604 /* Set the FIFO threshold based on the receive speed. */ 605 bus_io_write_1(bc, ioh, com_fifo, 606 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | 607 (tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 608 /* flush any pending I/O */ 609 while (ISSET(bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY)) 610 (void) bus_io_read_1(bc, ioh, com_data); 611 /* you turn me on, baby */ 612 sc->sc_mcr = MCR_DTR | MCR_RTS; 613 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 614 SET(sc->sc_mcr, MCR_IENABLE); 615 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 616 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 617 bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); 618 619 sc->sc_msr = bus_io_read_1(bc, ioh, com_msr); 620 if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || 621 ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF)) 622 SET(tp->t_state, TS_CARR_ON); 623 else 624 CLR(tp->t_state, TS_CARR_ON); 625 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) 626 return EBUSY; 627 else 628 s = spltty(); 629 630 /* wait for carrier if necessary */ 631 if (!ISSET(flag, O_NONBLOCK)) 632 while (!ISSET(tp->t_cflag, CLOCAL) && 633 !ISSET(tp->t_state, TS_CARR_ON)) { 634 SET(tp->t_state, TS_WOPEN); 635 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 636 ttopen, 0); 637 if (error) { 638 /* XXX should turn off chip if we're the 639 only waiter */ 640 splx(s); 641 return error; 642 } 643 } 644 splx(s); 645 646 return (*linesw[tp->t_line].l_open)(dev, tp); 647 } 648 649 int 650 comclose(dev, flag, mode, p) 651 dev_t dev; 652 int flag, mode; 653 struct proc *p; 654 { 655 int unit = COMUNIT(dev); 656 struct com_softc *sc = com_cd.cd_devs[unit]; 657 struct tty *tp = sc->sc_tty; 658 bus_chipset_tag_t bc = sc->sc_bc; 659 bus_io_handle_t ioh = sc->sc_ioh; 660 int s; 661 662 /* XXX This is for cons.c. */ 663 if (!ISSET(tp->t_state, TS_ISOPEN)) 664 return 0; 665 666 (*linesw[tp->t_line].l_close)(tp, flag); 667 s = spltty(); 668 CLR(sc->sc_lcr, LCR_SBREAK); 669 bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); 670 bus_io_write_1(bc, ioh, com_ier, 0); 671 if (ISSET(tp->t_cflag, HUPCL) && 672 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) { 673 /* XXX perhaps only clear DTR */ 674 bus_io_write_1(bc, ioh, com_mcr, 0); 675 } 676 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 677 if (--comsopen == 0) 678 untimeout(compoll, NULL); 679 splx(s); 680 ttyclose(tp); 681 #ifdef notyet /* XXXX */ 682 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 683 ttyfree(tp); 684 sc->sc_tty = 0; 685 } 686 #endif 687 return 0; 688 } 689 690 int 691 comread(dev, uio, flag) 692 dev_t dev; 693 struct uio *uio; 694 int flag; 695 { 696 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 697 struct tty *tp = sc->sc_tty; 698 699 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 700 } 701 702 int 703 comwrite(dev, uio, flag) 704 dev_t dev; 705 struct uio *uio; 706 int flag; 707 { 708 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 709 struct tty *tp = sc->sc_tty; 710 711 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 712 } 713 714 struct tty * 715 comtty(dev) 716 dev_t dev; 717 { 718 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 719 struct tty *tp = sc->sc_tty; 720 721 return (tp); 722 } 723 724 static u_char 725 tiocm_xxx2mcr(data) 726 int data; 727 { 728 u_char m = 0; 729 730 if (ISSET(data, TIOCM_DTR)) 731 SET(m, MCR_DTR); 732 if (ISSET(data, TIOCM_RTS)) 733 SET(m, MCR_RTS); 734 return m; 735 } 736 737 int 738 comioctl(dev, cmd, data, flag, p) 739 dev_t dev; 740 u_long cmd; 741 caddr_t data; 742 int flag; 743 struct proc *p; 744 { 745 int unit = COMUNIT(dev); 746 struct com_softc *sc = com_cd.cd_devs[unit]; 747 struct tty *tp = sc->sc_tty; 748 bus_chipset_tag_t bc = sc->sc_bc; 749 bus_io_handle_t ioh = sc->sc_ioh; 750 int error; 751 752 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 753 if (error >= 0) 754 return error; 755 error = ttioctl(tp, cmd, data, flag, p); 756 if (error >= 0) 757 return error; 758 759 switch (cmd) { 760 case TIOCSBRK: 761 SET(sc->sc_lcr, LCR_SBREAK); 762 bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); 763 break; 764 case TIOCCBRK: 765 CLR(sc->sc_lcr, LCR_SBREAK); 766 bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); 767 break; 768 case TIOCSDTR: 769 SET(sc->sc_mcr, sc->sc_dtr); 770 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 771 break; 772 case TIOCCDTR: 773 CLR(sc->sc_mcr, sc->sc_dtr); 774 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 775 break; 776 case TIOCMSET: 777 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 778 case TIOCMBIS: 779 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 780 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 781 break; 782 case TIOCMBIC: 783 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 784 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 785 break; 786 case TIOCMGET: { 787 u_char m; 788 int bits = 0; 789 790 m = sc->sc_mcr; 791 if (ISSET(m, MCR_DTR)) 792 SET(bits, TIOCM_DTR); 793 if (ISSET(m, MCR_RTS)) 794 SET(bits, TIOCM_RTS); 795 m = sc->sc_msr; 796 if (ISSET(m, MSR_DCD)) 797 SET(bits, TIOCM_CD); 798 if (ISSET(m, MSR_CTS)) 799 SET(bits, TIOCM_CTS); 800 if (ISSET(m, MSR_DSR)) 801 SET(bits, TIOCM_DSR); 802 if (ISSET(m, MSR_RI | MSR_TERI)) 803 SET(bits, TIOCM_RI); 804 if (bus_io_read_1(bc, ioh, com_ier)) 805 SET(bits, TIOCM_LE); 806 *(int *)data = bits; 807 break; 808 } 809 case TIOCGFLAGS: { 810 int driverbits, userbits = 0; 811 812 driverbits = sc->sc_swflags; 813 if (ISSET(driverbits, COM_SW_SOFTCAR)) 814 SET(userbits, TIOCFLAG_SOFTCAR); 815 if (ISSET(driverbits, COM_SW_CLOCAL)) 816 SET(userbits, TIOCFLAG_CLOCAL); 817 if (ISSET(driverbits, COM_SW_CRTSCTS)) 818 SET(userbits, TIOCFLAG_CRTSCTS); 819 if (ISSET(driverbits, COM_SW_MDMBUF)) 820 SET(userbits, TIOCFLAG_MDMBUF); 821 822 *(int *)data = userbits; 823 break; 824 } 825 case TIOCSFLAGS: { 826 int userbits, driverbits = 0; 827 828 error = suser(p->p_ucred, &p->p_acflag); 829 if (error != 0) 830 return(EPERM); 831 832 userbits = *(int *)data; 833 if (ISSET(userbits, TIOCFLAG_SOFTCAR) || 834 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 835 SET(driverbits, COM_SW_SOFTCAR); 836 if (ISSET(userbits, TIOCFLAG_CLOCAL)) 837 SET(driverbits, COM_SW_CLOCAL); 838 if (ISSET(userbits, TIOCFLAG_CRTSCTS)) 839 SET(driverbits, COM_SW_CRTSCTS); 840 if (ISSET(userbits, TIOCFLAG_MDMBUF)) 841 SET(driverbits, COM_SW_MDMBUF); 842 843 sc->sc_swflags = driverbits; 844 break; 845 } 846 default: 847 return ENOTTY; 848 } 849 850 return 0; 851 } 852 853 int 854 comparam(tp, t) 855 struct tty *tp; 856 struct termios *t; 857 { 858 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 859 bus_chipset_tag_t bc = sc->sc_bc; 860 bus_io_handle_t ioh = sc->sc_ioh; 861 int ospeed = comspeed(t->c_ospeed); 862 u_char lcr; 863 tcflag_t oldcflag; 864 int s; 865 866 /* check requested parameters */ 867 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed)) 868 return EINVAL; 869 870 lcr = ISSET(sc->sc_lcr, LCR_SBREAK); 871 872 switch (ISSET(t->c_cflag, CSIZE)) { 873 case CS5: 874 SET(lcr, LCR_5BITS); 875 break; 876 case CS6: 877 SET(lcr, LCR_6BITS); 878 break; 879 case CS7: 880 SET(lcr, LCR_7BITS); 881 break; 882 case CS8: 883 SET(lcr, LCR_8BITS); 884 break; 885 } 886 if (ISSET(t->c_cflag, PARENB)) { 887 SET(lcr, LCR_PENAB); 888 if (!ISSET(t->c_cflag, PARODD)) 889 SET(lcr, LCR_PEVEN); 890 } 891 if (ISSET(t->c_cflag, CSTOPB)) 892 SET(lcr, LCR_STOPB); 893 894 sc->sc_lcr = lcr; 895 896 s = spltty(); 897 898 if (ospeed == 0) { 899 CLR(sc->sc_mcr, MCR_DTR); 900 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 901 } 902 903 /* 904 * Set the FIFO threshold based on the receive speed, if we are 905 * changing it. 906 */ 907 #if 1 908 if (tp->t_ispeed != t->c_ispeed) { 909 #else 910 if (1) { 911 #endif 912 if (ospeed != 0) { 913 /* 914 * Make sure the transmit FIFO is empty before 915 * proceeding. If we don't do this, some revisions 916 * of the UART will hang. Interestingly enough, 917 * even if we do this will the last character is 918 * still being pushed out, they don't hang. This 919 * seems good enough. 920 */ 921 while (ISSET(tp->t_state, TS_BUSY)) { 922 int error; 923 924 ++sc->sc_halt; 925 error = ttysleep(tp, &tp->t_outq, 926 TTOPRI | PCATCH, "comprm", 0); 927 --sc->sc_halt; 928 if (error) { 929 splx(s); 930 comstart(tp); 931 return (error); 932 } 933 } 934 935 bus_io_write_1(bc, ioh, com_lcr, lcr | LCR_DLAB); 936 bus_io_write_1(bc, ioh, com_dlbl, ospeed); 937 bus_io_write_1(bc, ioh, com_dlbh, ospeed >> 8); 938 bus_io_write_1(bc, ioh, com_lcr, lcr); 939 SET(sc->sc_mcr, MCR_DTR); 940 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 941 } else 942 bus_io_write_1(bc, ioh, com_lcr, lcr); 943 944 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP) && 945 ISSET(sc->sc_hwflags, COM_HW_FIFO)) 946 bus_io_write_1(bc, ioh, com_fifo, 947 FIFO_ENABLE | 948 (t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 949 } else 950 bus_io_write_1(bc, ioh, com_lcr, lcr); 951 952 /* When not using CRTSCTS, RTS follows DTR. */ 953 if (!ISSET(t->c_cflag, CRTSCTS)) { 954 if (ISSET(sc->sc_mcr, MCR_DTR)) { 955 if (!ISSET(sc->sc_mcr, MCR_RTS)) { 956 SET(sc->sc_mcr, MCR_RTS); 957 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 958 } 959 } else { 960 if (ISSET(sc->sc_mcr, MCR_RTS)) { 961 CLR(sc->sc_mcr, MCR_RTS); 962 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 963 } 964 } 965 sc->sc_dtr = MCR_DTR | MCR_RTS; 966 } else 967 sc->sc_dtr = MCR_DTR; 968 969 /* and copy to tty */ 970 tp->t_ispeed = t->c_ispeed; 971 tp->t_ospeed = t->c_ospeed; 972 oldcflag = tp->t_cflag; 973 tp->t_cflag = t->c_cflag; 974 975 /* 976 * If DCD is off and MDMBUF is changed, ask the tty layer if we should 977 * stop the device. 978 */ 979 if (!ISSET(sc->sc_msr, MSR_DCD) && 980 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 981 ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) && 982 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) { 983 CLR(sc->sc_mcr, sc->sc_dtr); 984 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 985 } 986 987 /* Just to be sure... */ 988 splx(s); 989 comstart(tp); 990 return 0; 991 } 992 993 void 994 comstart(tp) 995 struct tty *tp; 996 { 997 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 998 bus_chipset_tag_t bc = sc->sc_bc; 999 bus_io_handle_t ioh = sc->sc_ioh; 1000 int s; 1001 1002 s = spltty(); 1003 if (ISSET(tp->t_state, TS_BUSY)) 1004 goto out; 1005 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP) || 1006 sc->sc_halt > 0) 1007 goto stopped; 1008 if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS)) 1009 goto stopped; 1010 if (tp->t_outq.c_cc <= tp->t_lowat) { 1011 if (ISSET(tp->t_state, TS_ASLEEP)) { 1012 CLR(tp->t_state, TS_ASLEEP); 1013 wakeup(&tp->t_outq); 1014 } 1015 if (tp->t_outq.c_cc == 0) 1016 goto stopped; 1017 selwakeup(&tp->t_wsel); 1018 } 1019 SET(tp->t_state, TS_BUSY); 1020 1021 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1022 SET(sc->sc_ier, IER_ETXRDY); 1023 bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); 1024 } 1025 #ifdef COM_HAYESP 1026 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1027 u_char buffer[1024], *cp = buffer; 1028 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1029 do 1030 bus_io_write_1(bc, ioh, com_data, *cp++); 1031 while (--n); 1032 } 1033 else 1034 #endif 1035 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) { 1036 u_char buffer[16], *cp = buffer; 1037 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1038 do { 1039 bus_io_write_1(bc, ioh, com_data, *cp++); 1040 } while (--n); 1041 } else 1042 bus_io_write_1(bc, ioh, com_data, getc(&tp->t_outq)); 1043 out: 1044 splx(s); 1045 return; 1046 stopped: 1047 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1048 CLR(sc->sc_ier, IER_ETXRDY); 1049 bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); 1050 } 1051 splx(s); 1052 } 1053 1054 /* 1055 * Stop output on a line. 1056 */ 1057 int 1058 comstop(tp, flag) 1059 struct tty *tp; 1060 int flag; 1061 { 1062 int s; 1063 1064 s = spltty(); 1065 if (ISSET(tp->t_state, TS_BUSY)) 1066 if (!ISSET(tp->t_state, TS_TTSTOP)) 1067 SET(tp->t_state, TS_FLUSH); 1068 splx(s); 1069 return 0; 1070 } 1071 1072 void 1073 comdiag(arg) 1074 void *arg; 1075 { 1076 struct com_softc *sc = arg; 1077 int overflows, floods; 1078 int s; 1079 1080 s = spltty(); 1081 sc->sc_errors = 0; 1082 overflows = sc->sc_overflows; 1083 sc->sc_overflows = 0; 1084 floods = sc->sc_floods; 1085 sc->sc_floods = 0; 1086 splx(s); 1087 1088 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf overflow%s\n", 1089 sc->sc_dev.dv_xname, 1090 overflows, overflows == 1 ? "" : "s", 1091 floods, floods == 1 ? "" : "s"); 1092 } 1093 1094 void 1095 compoll(arg) 1096 void *arg; 1097 { 1098 int unit; 1099 struct com_softc *sc; 1100 struct tty *tp; 1101 register u_char *ibufp; 1102 u_char *ibufend; 1103 register int c; 1104 int s; 1105 static int lsrmap[8] = { 1106 0, TTY_PE, 1107 TTY_FE, TTY_PE|TTY_FE, 1108 TTY_FE, TTY_PE|TTY_FE, 1109 TTY_FE, TTY_PE|TTY_FE 1110 }; 1111 1112 s = spltty(); 1113 if (comevents == 0) { 1114 splx(s); 1115 goto out; 1116 } 1117 comevents = 0; 1118 splx(s); 1119 1120 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1121 sc = com_cd.cd_devs[unit]; 1122 if (sc == 0 || sc->sc_ibufp == sc->sc_ibuf) 1123 continue; 1124 1125 tp = sc->sc_tty; 1126 1127 s = spltty(); 1128 1129 ibufp = sc->sc_ibuf; 1130 ibufend = sc->sc_ibufp; 1131 1132 if (ibufp == ibufend) { 1133 splx(s); 1134 continue; 1135 } 1136 1137 sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ? 1138 sc->sc_ibufs[1] : sc->sc_ibufs[0]; 1139 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 1140 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 1141 1142 if (tp == 0 || !ISSET(tp->t_state, TS_ISOPEN)) { 1143 splx(s); 1144 continue; 1145 } 1146 1147 if (ISSET(tp->t_cflag, CRTSCTS) && 1148 !ISSET(sc->sc_mcr, MCR_RTS)) { 1149 /* XXX */ 1150 SET(sc->sc_mcr, MCR_RTS); 1151 bus_io_write_1(sc->sc_bc, sc->sc_ioh, com_mcr, 1152 sc->sc_mcr); 1153 } 1154 1155 splx(s); 1156 1157 while (ibufp < ibufend) { 1158 c = *ibufp++; 1159 if (*ibufp & LSR_OE) { 1160 sc->sc_overflows++; 1161 if (sc->sc_errors++ == 0) 1162 timeout(comdiag, sc, 60 * hz); 1163 } 1164 /* This is ugly, but fast. */ 1165 c |= lsrmap[(*ibufp++ & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1166 (*linesw[tp->t_line].l_rint)(c, tp); 1167 } 1168 } 1169 1170 out: 1171 timeout(compoll, NULL, 1); 1172 } 1173 1174 int 1175 comintr(arg) 1176 void *arg; 1177 { 1178 struct com_softc *sc = arg; 1179 bus_chipset_tag_t bc = sc->sc_bc; 1180 bus_io_handle_t ioh = sc->sc_ioh; 1181 struct tty *tp; 1182 u_char lsr, data, msr, delta; 1183 #ifdef COM_DEBUG 1184 int n; 1185 struct { 1186 u_char iir, lsr, msr; 1187 } iter[32]; 1188 #endif 1189 1190 #ifdef COM_DEBUG 1191 n = 0; 1192 if (ISSET(iter[n].iir = bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1193 return (0); 1194 #else 1195 if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1196 return (0); 1197 #endif 1198 1199 tp = sc->sc_tty; 1200 1201 for (;;) { 1202 #ifdef COM_DEBUG 1203 iter[n].lsr = 1204 #endif 1205 lsr = bus_io_read_1(bc, ioh, com_lsr); 1206 1207 if (ISSET(lsr, LSR_RXRDY)) { 1208 register u_char *p = sc->sc_ibufp; 1209 1210 comevents = 1; 1211 do { 1212 data = bus_io_read_1(bc, ioh, com_data); 1213 if (ISSET(lsr, LSR_BI)) { 1214 #ifdef notdef 1215 printf("break %02x %02x %02x %02x\n", 1216 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, 1217 sc->sc_dtr); 1218 #endif 1219 #ifdef DDB 1220 if (ISSET(sc->sc_hwflags, 1221 COM_HW_CONSOLE)) { 1222 Debugger(); 1223 goto next; 1224 } 1225 #endif 1226 } 1227 if (p >= sc->sc_ibufend) { 1228 sc->sc_floods++; 1229 if (sc->sc_errors++ == 0) 1230 timeout(comdiag, sc, 60 * hz); 1231 } else { 1232 *p++ = data; 1233 *p++ = lsr; 1234 if (p == sc->sc_ibufhigh && 1235 ISSET(tp->t_cflag, CRTSCTS)) { 1236 /* XXX */ 1237 CLR(sc->sc_mcr, MCR_RTS); 1238 bus_io_write_1(bc, ioh, com_mcr, 1239 sc->sc_mcr); 1240 } 1241 } 1242 next: 1243 #ifdef COM_DEBUG 1244 if (++n >= 32) 1245 goto ohfudge; 1246 iter[n].lsr = 1247 #endif 1248 lsr = bus_io_read_1(bc, ioh, com_lsr); 1249 } while (ISSET(lsr, LSR_RXRDY)); 1250 1251 sc->sc_ibufp = p; 1252 } 1253 #ifdef COM_DEBUG 1254 else if (ISSET(lsr, LSR_BI|LSR_FE|LSR_PE|LSR_OE)) 1255 printf("weird lsr %02x\n", lsr); 1256 #endif 1257 1258 #ifdef COM_DEBUG 1259 iter[n].msr = 1260 #endif 1261 msr = bus_io_read_1(bc, ioh, com_msr); 1262 1263 if (msr != sc->sc_msr) { 1264 delta = msr ^ sc->sc_msr; 1265 sc->sc_msr = msr; 1266 if (ISSET(delta, MSR_DCD) && 1267 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 1268 (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) { 1269 CLR(sc->sc_mcr, sc->sc_dtr); 1270 bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); 1271 } 1272 if (ISSET(delta & msr, MSR_CTS) && 1273 ISSET(tp->t_cflag, CRTSCTS)) { 1274 /* the line is up and we want to do rts/cts flow control */ 1275 (*linesw[tp->t_line].l_start)(tp); 1276 } 1277 } 1278 1279 if (ISSET(lsr, LSR_TXRDY) && ISSET(tp->t_state, TS_BUSY)) { 1280 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 1281 if (sc->sc_halt > 0) 1282 wakeup(&tp->t_outq); 1283 (*linesw[tp->t_line].l_start)(tp); 1284 } 1285 1286 #ifdef COM_DEBUG 1287 if (++n >= 32) 1288 goto ohfudge; 1289 if (ISSET(iter[n].iir = bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1290 return (1); 1291 #else 1292 if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) 1293 return (1); 1294 #endif 1295 } 1296 #ifdef COM_DEBUG 1297 ohfudge: 1298 printf("comintr: too many iterations"); 1299 for (n = 0; n < 32; n++) { 1300 if ((n % 4) == 0) 1301 printf("\ncomintr: iter[%02d]", n); 1302 printf(" %02x %02x %02x", iter[n].iir, iter[n].lsr, iter[n].msr); 1303 } 1304 printf("\n"); 1305 printf("comintr: msr %02x mcr %02x lcr %02x ier %02x\n", 1306 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, sc->sc_ier); 1307 printf("comintr: state %08x cc %d\n", sc->sc_tty->t_state, 1308 sc->sc_tty->t_outq.c_cc); 1309 #endif 1310 } 1311 1312 /* 1313 * Following are all routines needed for COM to act as console 1314 */ 1315 #include <dev/cons.h> 1316 1317 void 1318 comcnprobe(cp) 1319 struct consdev *cp; 1320 { 1321 /* XXX NEEDS TO BE FIXED XXX */ 1322 bus_chipset_tag_t bc = 0; 1323 bus_io_handle_t ioh; 1324 int found; 1325 1326 if (bus_io_map(bc, CONADDR, COM_NPORTS, &ioh)) { 1327 cp->cn_pri = CN_DEAD; 1328 return; 1329 } 1330 found = comprobe1(bc, ioh, CONADDR); 1331 bus_io_unmap(bc, ioh, COM_NPORTS); 1332 if (!found) { 1333 cp->cn_pri = CN_DEAD; 1334 return; 1335 } 1336 1337 /* locate the major number */ 1338 for (commajor = 0; commajor < nchrdev; commajor++) 1339 if (cdevsw[commajor].d_open == comopen) 1340 break; 1341 1342 /* initialize required fields */ 1343 cp->cn_dev = makedev(commajor, CONUNIT); 1344 #ifdef COMCONSOLE 1345 cp->cn_pri = CN_REMOTE; /* Force a serial port console */ 1346 #else 1347 cp->cn_pri = CN_NORMAL; 1348 #endif 1349 } 1350 1351 void 1352 comcninit(cp) 1353 struct consdev *cp; 1354 { 1355 1356 #if 0 1357 XXX NEEDS TO BE FIXED XXX 1358 comconsbc = ???; 1359 #endif 1360 if (bus_io_map(comconsbc, CONADDR, COM_NPORTS, &comconsioh)) 1361 panic("comcninit: mapping failed"); 1362 1363 cominit(comconsbc, comconsioh, comdefaultrate); 1364 comconsaddr = CONADDR; 1365 comconsinit = 0; 1366 } 1367 1368 void 1369 cominit(bc, ioh, rate) 1370 bus_chipset_tag_t bc; 1371 bus_io_handle_t ioh; 1372 int rate; 1373 { 1374 int s = splhigh(); 1375 u_char stat; 1376 1377 bus_io_write_1(bc, ioh, com_lcr, LCR_DLAB); 1378 rate = comspeed(comdefaultrate); 1379 bus_io_write_1(bc, ioh, com_dlbl, rate); 1380 bus_io_write_1(bc, ioh, com_dlbh, rate >> 8); 1381 bus_io_write_1(bc, ioh, com_lcr, LCR_8BITS); 1382 bus_io_write_1(bc, ioh, com_ier, IER_ERXRDY | IER_ETXRDY); 1383 bus_io_write_1(bc, ioh, com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_4); 1384 stat = bus_io_read_1(bc, ioh, com_iir); 1385 splx(s); 1386 } 1387 1388 int 1389 comcngetc(dev) 1390 dev_t dev; 1391 { 1392 int s = splhigh(); 1393 bus_chipset_tag_t bc = comconsbc; 1394 bus_io_handle_t ioh = comconsioh; 1395 u_char stat, c; 1396 1397 while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY)) 1398 ; 1399 c = bus_io_read_1(bc, ioh, com_data); 1400 stat = bus_io_read_1(bc, ioh, com_iir); 1401 splx(s); 1402 return c; 1403 } 1404 1405 /* 1406 * Console kernel output character routine. 1407 */ 1408 void 1409 comcnputc(dev, c) 1410 dev_t dev; 1411 int c; 1412 { 1413 int s = splhigh(); 1414 bus_chipset_tag_t bc = comconsbc; 1415 bus_io_handle_t ioh = comconsioh; 1416 u_char stat; 1417 register int timo; 1418 1419 #ifdef KGDB 1420 if (dev != kgdb_dev) 1421 #endif 1422 if (comconsinit == 0) { 1423 cominit(bc, ioh, comdefaultrate); 1424 comconsinit = 1; 1425 } 1426 /* wait for any pending transmission to finish */ 1427 timo = 50000; 1428 while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo) 1429 ; 1430 bus_io_write_1(bc, ioh, com_data, c); 1431 /* wait for this transmission to complete */ 1432 timo = 1500000; 1433 while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo) 1434 ; 1435 /* clear any interrupts generated by this transmission */ 1436 stat = bus_io_read_1(bc, ioh, com_iir); 1437 splx(s); 1438 } 1439 1440 void 1441 comcnpollc(dev, on) 1442 dev_t dev; 1443 int on; 1444 { 1445 1446 } 1447
Indexes created Fri Sep 26 08:10:20 GMT 2025