com.c revision 1.92
1 /* $NetBSD: com.c,v 1.92 1996/10/22 00:45:25 cgd Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996 5 * Charles M. Hannum. All rights reserved. 6 * Copyright (c) 1991 The Regents of the University of California. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)com.c 7.5 (Berkeley) 5/16/91 38 */ 39 40 /* 41 * COM driver, based on HP dca driver 42 * uses National Semiconductor NS16450/NS16550AF UART 43 */ 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/tty.h> 49 #include <sys/proc.h> 50 #include <sys/user.h> 51 #include <sys/conf.h> 52 #include <sys/file.h> 53 #include <sys/uio.h> 54 #include <sys/kernel.h> 55 #include <sys/syslog.h> 56 #include <sys/types.h> 57 #include <sys/device.h> 58 59 #include <machine/bus.h> 60 #include <machine/intr.h> 61 62 #include <dev/isa/isavar.h> 63 #include <dev/isa/comreg.h> 64 #include <dev/isa/comvar.h> 65 #include <dev/ic/ns16550reg.h> 66 #ifdef COM_HAYESP 67 #include <dev/ic/hayespreg.h> 68 #endif 69 #define com_lcr com_cfcr 70 71 #include "com.h" 72 73 74 #define COM_IBUFSIZE (2 * 512) 75 #define COM_IHIGHWATER ((3 * COM_IBUFSIZE) / 4) 76 77 struct com_softc { 78 struct device sc_dev; 79 void *sc_ih; 80 struct tty *sc_tty; 81 82 int sc_overflows; 83 int sc_floods; 84 int sc_failures; 85 int sc_errors; 86 87 int sc_halt; 88 89 int sc_iobase; 90 #ifdef COM_HAYESP 91 int sc_hayespbase; 92 #endif 93 94 bus_space_tag_t sc_iot; 95 bus_space_handle_t sc_ioh; 96 bus_space_handle_t sc_hayespioh; 97 98 u_char sc_hwflags; 99 #define COM_HW_NOIEN 0x01 100 #define COM_HW_FIFO 0x02 101 #define COM_HW_HAYESP 0x04 102 #define COM_HW_CONSOLE 0x40 103 u_char sc_swflags; 104 #define COM_SW_SOFTCAR 0x01 105 #define COM_SW_CLOCAL 0x02 106 #define COM_SW_CRTSCTS 0x04 107 #define COM_SW_MDMBUF 0x08 108 u_char sc_msr, sc_mcr, sc_lcr, sc_ier; 109 u_char sc_dtr; 110 111 u_char *sc_ibuf, *sc_ibufp, *sc_ibufhigh, *sc_ibufend; 112 u_char sc_ibufs[2][COM_IBUFSIZE]; 113 }; 114 115 #ifdef COM_HAYESP 116 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 117 #endif 118 void comdiag __P((void *)); 119 int comspeed __P((long)); 120 int comparam __P((struct tty *, struct termios *)); 121 void comstart __P((struct tty *)); 122 void comsoft __P((void *)); 123 124 /* XXX: These belong elsewhere */ 125 cdev_decl(com); 126 bdev_decl(com); 127 128 struct consdev; 129 void comcnprobe __P((struct consdev *)); 130 void comcninit __P((struct consdev *)); 131 int comcngetc __P((dev_t)); 132 void comcnputc __P((dev_t, int)); 133 void comcnpollc __P((dev_t, int)); 134 135 static u_char tiocm_xxx2mcr __P((int)); 136 137 /* 138 * XXX the following two cfattach structs should be different, and possibly 139 * XXX elsewhere. 140 */ 141 int comprobe __P((struct device *, void *, void *)); 142 void comattach __P((struct device *, struct device *, void *)); 143 144 #if NCOM_ISA 145 struct cfattach com_isa_ca = { 146 sizeof(struct com_softc), comprobe, comattach 147 }; 148 #endif 149 150 #if NCOM_COMMULTI 151 struct cfattach com_commulti_ca = { 152 sizeof(struct com_softc), comprobe, comattach 153 }; 154 #endif 155 156 struct cfdriver com_cd = { 157 NULL, "com", DV_TTY 158 }; 159 160 void cominit __P((bus_space_tag_t, bus_space_handle_t, int)); 161 162 #ifdef COMCONSOLE 163 int comdefaultrate = CONSPEED; /* XXX why set default? */ 164 #else 165 int comdefaultrate = TTYDEF_SPEED; 166 #endif 167 int comconsaddr; 168 int comconsinit; 169 int comconsattached; 170 bus_space_tag_t comconstag; 171 bus_space_handle_t comconsbah; 172 tcflag_t comconscflag = TTYDEF_CFLAG; 173 174 int commajor; 175 int comsopen = 0; 176 int comevents = 0; 177 178 #ifdef KGDB 179 #include <machine/remote-sl.h> 180 extern int kgdb_dev; 181 extern int kgdb_rate; 182 extern int kgdb_debug_init; 183 #endif 184 185 #define COMUNIT(x) (minor(x)) 186 187 /* Macros to clear/set/test flags. */ 188 #define SET(t, f) (t) |= (f) 189 #define CLR(t, f) (t) &= ~(f) 190 #define ISSET(t, f) ((t) & (f)) 191 192 int 193 comspeed(speed) 194 long speed; 195 { 196 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 197 198 int x, err; 199 200 if (speed == 0) 201 return 0; 202 if (speed < 0) 203 return -1; 204 x = divrnd((COM_FREQ / 16), speed); 205 if (x <= 0) 206 return -1; 207 err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000; 208 if (err < 0) 209 err = -err; 210 if (err > COM_TOLERANCE) 211 return -1; 212 return x; 213 214 #undef divrnd(n, q) 215 } 216 217 int 218 comprobe1(iot, ioh, iobase) 219 bus_space_tag_t iot; 220 bus_space_handle_t ioh; 221 int iobase; 222 { 223 224 /* force access to id reg */ 225 bus_space_write_1(iot, ioh, com_lcr, 0); 226 bus_space_write_1(iot, ioh, com_iir, 0); 227 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 228 return 0; 229 230 return 1; 231 } 232 233 #ifdef COM_HAYESP 234 int 235 comprobeHAYESP(hayespioh, sc) 236 bus_space_handle_t hayespioh; 237 struct com_softc *sc; 238 { 239 char val, dips; 240 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 241 bus_space_tag_t iot = sc->sc_iot; 242 243 /* 244 * Hayes ESP cards have two iobases. One is for compatibility with 245 * 16550 serial chips, and at the same ISA PC base addresses. The 246 * other is for ESP-specific enhanced features, and lies at a 247 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 248 */ 249 250 /* Test for ESP signature */ 251 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 252 return 0; 253 254 /* 255 * ESP is present at ESP enhanced base address; unknown com port 256 */ 257 258 /* Get the dip-switch configurations */ 259 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 260 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 261 262 /* Determine which com port this ESP card services: bits 0,1 of */ 263 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 264 if (sc->sc_iobase != combaselist[dips & 0x03]) 265 return 0; 266 267 printf(": ESP"); 268 269 /* Check ESP Self Test bits. */ 270 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 271 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 272 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */ 273 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 274 if ((val & 0x70) < 0x20) { 275 printf("-old (%o)", val & 0x70); 276 /* we do not support the necessary features */ 277 return 0; 278 } 279 280 /* Check for ability to emulate 16550: bit 8 == 1 */ 281 if ((dips & 0x80) == 0) { 282 printf(" slave"); 283 /* XXX Does slave really mean no 16550 support?? */ 284 return 0; 285 } 286 287 /* 288 * If we made it this far, we are a full-featured ESP v2.0 (or 289 * better), at the correct com port address. 290 */ 291 292 SET(sc->sc_hwflags, COM_HW_HAYESP); 293 printf(", 1024 byte fifo\n"); 294 return 1; 295 } 296 #endif 297 298 int 299 comprobe(parent, match, aux) 300 struct device *parent; 301 void *match, *aux; 302 { 303 bus_space_tag_t iot; 304 bus_space_handle_t ioh; 305 int iobase, needioh; 306 int rv = 1; 307 308 /* 309 * XXX should be broken out into functions for isa probe and 310 * XXX for commulti probe, with a helper function that contains 311 * XXX most of the interesting stuff. 312 */ 313 #if NCOM_ISA 314 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 315 struct isa_attach_args *ia = aux; 316 317 iot = ia->ia_iot; 318 iobase = ia->ia_iobase; 319 needioh = 1; 320 } else 321 #endif 322 #if NCOM_COMMULTI 323 if (1) { 324 struct cfdata *cf = match; 325 struct commulti_attach_args *ca = aux; 326 327 if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != ca->ca_slave) 328 return (0); 329 330 iot = ca->ca_iot; 331 iobase = ca->ca_iobase; 332 ioh = ca->ca_ioh; 333 needioh = 0; 334 } else 335 #endif 336 return(0); /* This cannot happen */ 337 338 /* if it's in use as console, it's there. */ 339 if (iobase == comconsaddr && !comconsattached) 340 goto out; 341 342 if (needioh && bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) { 343 rv = 0; 344 goto out; 345 } 346 rv = comprobe1(iot, ioh, iobase); 347 if (needioh) 348 bus_space_unmap(iot, ioh, COM_NPORTS); 349 350 out: 351 #if NCOM_ISA 352 if (rv && !strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 353 struct isa_attach_args *ia = aux; 354 355 ia->ia_iosize = COM_NPORTS; 356 ia->ia_msize = 0; 357 } 358 #endif 359 return (rv); 360 } 361 362 void 363 comattach(parent, self, aux) 364 struct device *parent, *self; 365 void *aux; 366 { 367 struct com_softc *sc = (void *)self; 368 int iobase, irq; 369 bus_space_tag_t iot; 370 bus_space_handle_t ioh; 371 #ifdef COM_HAYESP 372 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 373 int *hayespp; 374 #endif 375 376 /* 377 * XXX should be broken out into functions for isa attach and 378 * XXX for commulti attach, with a helper function that contains 379 * XXX most of the interesting stuff. 380 */ 381 sc->sc_hwflags = 0; 382 sc->sc_swflags = 0; 383 #if NCOM_ISA 384 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 385 struct isa_attach_args *ia = aux; 386 387 /* 388 * We're living on an isa. 389 */ 390 iobase = ia->ia_iobase; 391 iot = ia->ia_iot; 392 if (iobase != comconsaddr) { 393 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 394 panic("comattach: io mapping failed"); 395 } else 396 ioh = comconsbah; 397 irq = ia->ia_irq; 398 } else 399 #endif 400 #if NCOM_COMMULTI 401 if (1) { 402 struct commulti_attach_args *ca = aux; 403 404 /* 405 * We're living on a commulti. 406 */ 407 iobase = ca->ca_iobase; 408 iot = ca->ca_iot; 409 ioh = ca->ca_ioh; 410 irq = IRQUNK; 411 412 if (ca->ca_noien) 413 sc->sc_hwflags |= COM_HW_NOIEN; 414 } else 415 #endif 416 panic("comattach: impossible"); 417 418 sc->sc_iot = iot; 419 sc->sc_ioh = ioh; 420 sc->sc_iobase = iobase; 421 422 if (iobase == comconsaddr) { 423 comconsattached = 1; 424 425 /* 426 * Need to reset baud rate, etc. of next print so reset 427 * comconsinit. Also make sure console is always "hardwired". 428 */ 429 delay(1000); /* wait for output to finish */ 430 comconsinit = 0; 431 SET(sc->sc_hwflags, COM_HW_CONSOLE); 432 SET(sc->sc_swflags, COM_SW_SOFTCAR); 433 } 434 435 #ifdef COM_HAYESP 436 /* Look for a Hayes ESP board. */ 437 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 438 bus_space_handle_t hayespioh; 439 440 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 441 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 442 continue; 443 if (comprobeHAYESP(hayespioh, sc)) { 444 sc->sc_hayespbase = *hayespp; 445 sc->sc_hayespioh = hayespioh; 446 break; 447 } 448 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 449 } 450 /* No ESP; look for other things. */ 451 if (*hayespp == 0) { 452 #endif 453 454 /* look for a NS 16550AF UART with FIFOs */ 455 bus_space_write_1(iot, ioh, com_fifo, 456 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 457 delay(100); 458 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK) 459 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) { 460 SET(sc->sc_hwflags, COM_HW_FIFO); 461 printf(": ns16550a, working fifo\n"); 462 } else 463 printf(": ns16550, broken fifo\n"); 464 else 465 printf(": ns8250 or ns16450, no fifo\n"); 466 bus_space_write_1(iot, ioh, com_fifo, 0); 467 #ifdef COM_HAYESP 468 } 469 #endif 470 471 /* disable interrupts */ 472 bus_space_write_1(iot, ioh, com_ier, 0); 473 bus_space_write_1(iot, ioh, com_mcr, 0); 474 475 if (irq != IRQUNK) { 476 #if NCOM_ISA 477 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 478 struct isa_attach_args *ia = aux; 479 480 sc->sc_ih = isa_intr_establish(ia->ia_ic, irq, 481 IST_EDGE, IPL_TTY, comintr, sc); 482 } else 483 #endif 484 panic("comattach: IRQ but can't have one"); 485 } 486 487 #ifdef KGDB 488 if (kgdb_dev == makedev(commajor, unit)) { 489 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 490 kgdb_dev = -1; /* can't debug over console port */ 491 else { 492 cominit(iot, ioh, kgdb_rate); 493 if (kgdb_debug_init) { 494 /* 495 * Print prefix of device name, 496 * let kgdb_connect print the rest. 497 */ 498 printf("%s: ", sc->sc_dev.dv_xname); 499 kgdb_connect(1); 500 } else 501 printf("%s: kgdb enabled\n", 502 sc->sc_dev.dv_xname); 503 } 504 } 505 #endif 506 507 /* XXX maybe move up some? */ 508 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 509 printf("%s: console\n", sc->sc_dev.dv_xname); 510 } 511 512 int 513 comopen(dev, flag, mode, p) 514 dev_t dev; 515 int flag, mode; 516 struct proc *p; 517 { 518 int unit = COMUNIT(dev); 519 struct com_softc *sc; 520 bus_space_tag_t iot; 521 bus_space_handle_t ioh; 522 struct tty *tp; 523 int s; 524 int error = 0; 525 526 if (unit >= com_cd.cd_ndevs) 527 return ENXIO; 528 sc = com_cd.cd_devs[unit]; 529 if (!sc) 530 return ENXIO; 531 532 if (!sc->sc_tty) { 533 tp = sc->sc_tty = ttymalloc(); 534 tty_attach(tp); 535 } else 536 tp = sc->sc_tty; 537 538 tp->t_oproc = comstart; 539 tp->t_param = comparam; 540 tp->t_dev = dev; 541 if (!ISSET(tp->t_state, TS_ISOPEN)) { 542 SET(tp->t_state, TS_WOPEN); 543 ttychars(tp); 544 tp->t_iflag = TTYDEF_IFLAG; 545 tp->t_oflag = TTYDEF_OFLAG; 546 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 547 tp->t_cflag = comconscflag; 548 else 549 tp->t_cflag = TTYDEF_CFLAG; 550 if (ISSET(sc->sc_swflags, COM_SW_CLOCAL)) 551 SET(tp->t_cflag, CLOCAL); 552 if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS)) 553 SET(tp->t_cflag, CRTSCTS); 554 if (ISSET(sc->sc_swflags, COM_SW_MDMBUF)) 555 SET(tp->t_cflag, MDMBUF); 556 tp->t_lflag = TTYDEF_LFLAG; 557 tp->t_ispeed = tp->t_ospeed = comdefaultrate; 558 559 s = spltty(); 560 561 comparam(tp, &tp->t_termios); 562 ttsetwater(tp); 563 564 if (comsopen++ == 0) 565 timeout(comsoft, NULL, 1); 566 567 sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0]; 568 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 569 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 570 571 iot = sc->sc_iot; 572 ioh = sc->sc_ioh; 573 #ifdef COM_HAYESP 574 /* Setup the ESP board */ 575 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 576 bus_space_handle_t hayespioh = sc->sc_hayespioh; 577 578 bus_space_write_1(iot, ioh, com_fifo, 579 FIFO_DMA_MODE|FIFO_ENABLE| 580 FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8); 581 582 /* Set 16550 compatibility mode */ 583 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 584 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 585 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 586 HAYESP_MODE_SCALE); 587 588 /* Set RTS/CTS flow control */ 589 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 590 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 591 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 592 593 /* Set flow control levels */ 594 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 595 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 596 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 597 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 598 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 599 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 600 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 601 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 602 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 603 } else 604 #endif 605 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 606 /* Set the FIFO threshold based on the receive speed. */ 607 bus_space_write_1(iot, ioh, com_fifo, 608 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | 609 (tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 610 /* flush any pending I/O */ 611 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 612 (void) bus_space_read_1(iot, ioh, com_data); 613 /* you turn me on, baby */ 614 sc->sc_mcr = MCR_DTR | MCR_RTS; 615 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 616 SET(sc->sc_mcr, MCR_IENABLE); 617 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 618 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 619 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 620 621 sc->sc_msr = bus_space_read_1(iot, ioh, com_msr); 622 if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || 623 ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF)) 624 SET(tp->t_state, TS_CARR_ON); 625 else 626 CLR(tp->t_state, TS_CARR_ON); 627 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) 628 return EBUSY; 629 else 630 s = spltty(); 631 632 /* wait for carrier if necessary */ 633 if (!ISSET(flag, O_NONBLOCK)) 634 while (!ISSET(tp->t_cflag, CLOCAL) && 635 !ISSET(tp->t_state, TS_CARR_ON)) { 636 SET(tp->t_state, TS_WOPEN); 637 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 638 ttopen, 0); 639 if (error) { 640 /* XXX should turn off chip if we're the 641 only waiter */ 642 splx(s); 643 return error; 644 } 645 } 646 splx(s); 647 648 return (*linesw[tp->t_line].l_open)(dev, tp); 649 } 650 651 int 652 comclose(dev, flag, mode, p) 653 dev_t dev; 654 int flag, mode; 655 struct proc *p; 656 { 657 int unit = COMUNIT(dev); 658 struct com_softc *sc = com_cd.cd_devs[unit]; 659 struct tty *tp = sc->sc_tty; 660 bus_space_tag_t iot = sc->sc_iot; 661 bus_space_handle_t ioh = sc->sc_ioh; 662 int s; 663 664 /* XXX This is for cons.c. */ 665 if (!ISSET(tp->t_state, TS_ISOPEN)) 666 return 0; 667 668 (*linesw[tp->t_line].l_close)(tp, flag); 669 s = spltty(); 670 CLR(sc->sc_lcr, LCR_SBREAK); 671 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 672 bus_space_write_1(iot, ioh, com_ier, 0); 673 if (ISSET(tp->t_cflag, HUPCL) && 674 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) { 675 /* XXX perhaps only clear DTR */ 676 bus_space_write_1(iot, ioh, com_mcr, 0); 677 bus_space_write_1(iot, ioh, com_fifo, 678 FIFO_RCV_RST | FIFO_XMT_RST); 679 } 680 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 681 if (--comsopen == 0) 682 untimeout(comsoft, NULL); 683 splx(s); 684 ttyclose(tp); 685 #ifdef notyet /* XXXX */ 686 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 687 ttyfree(tp); 688 sc->sc_tty = 0; 689 } 690 #endif 691 return 0; 692 } 693 694 int 695 comread(dev, uio, flag) 696 dev_t dev; 697 struct uio *uio; 698 int flag; 699 { 700 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 701 struct tty *tp = sc->sc_tty; 702 703 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 704 } 705 706 int 707 comwrite(dev, uio, flag) 708 dev_t dev; 709 struct uio *uio; 710 int flag; 711 { 712 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 713 struct tty *tp = sc->sc_tty; 714 715 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 716 } 717 718 struct tty * 719 comtty(dev) 720 dev_t dev; 721 { 722 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 723 struct tty *tp = sc->sc_tty; 724 725 return (tp); 726 } 727 728 static u_char 729 tiocm_xxx2mcr(data) 730 int data; 731 { 732 u_char m = 0; 733 734 if (ISSET(data, TIOCM_DTR)) 735 SET(m, MCR_DTR); 736 if (ISSET(data, TIOCM_RTS)) 737 SET(m, MCR_RTS); 738 return m; 739 } 740 741 int 742 comioctl(dev, cmd, data, flag, p) 743 dev_t dev; 744 u_long cmd; 745 caddr_t data; 746 int flag; 747 struct proc *p; 748 { 749 int unit = COMUNIT(dev); 750 struct com_softc *sc = com_cd.cd_devs[unit]; 751 struct tty *tp = sc->sc_tty; 752 bus_space_tag_t iot = sc->sc_iot; 753 bus_space_handle_t ioh = sc->sc_ioh; 754 int error; 755 756 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 757 if (error >= 0) 758 return error; 759 error = ttioctl(tp, cmd, data, flag, p); 760 if (error >= 0) 761 return error; 762 763 switch (cmd) { 764 case TIOCSBRK: 765 SET(sc->sc_lcr, LCR_SBREAK); 766 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 767 break; 768 case TIOCCBRK: 769 CLR(sc->sc_lcr, LCR_SBREAK); 770 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 771 break; 772 case TIOCSDTR: 773 SET(sc->sc_mcr, sc->sc_dtr); 774 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 775 break; 776 case TIOCCDTR: 777 CLR(sc->sc_mcr, sc->sc_dtr); 778 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 779 break; 780 case TIOCMSET: 781 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 782 case TIOCMBIS: 783 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 784 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 785 break; 786 case TIOCMBIC: 787 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 788 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 789 break; 790 case TIOCMGET: { 791 u_char m; 792 int bits = 0; 793 794 m = sc->sc_mcr; 795 if (ISSET(m, MCR_DTR)) 796 SET(bits, TIOCM_DTR); 797 if (ISSET(m, MCR_RTS)) 798 SET(bits, TIOCM_RTS); 799 m = sc->sc_msr; 800 if (ISSET(m, MSR_DCD)) 801 SET(bits, TIOCM_CD); 802 if (ISSET(m, MSR_CTS)) 803 SET(bits, TIOCM_CTS); 804 if (ISSET(m, MSR_DSR)) 805 SET(bits, TIOCM_DSR); 806 if (ISSET(m, MSR_RI | MSR_TERI)) 807 SET(bits, TIOCM_RI); 808 if (bus_space_read_1(iot, ioh, com_ier)) 809 SET(bits, TIOCM_LE); 810 *(int *)data = bits; 811 break; 812 } 813 case TIOCGFLAGS: { 814 int driverbits, userbits = 0; 815 816 driverbits = sc->sc_swflags; 817 if (ISSET(driverbits, COM_SW_SOFTCAR)) 818 SET(userbits, TIOCFLAG_SOFTCAR); 819 if (ISSET(driverbits, COM_SW_CLOCAL)) 820 SET(userbits, TIOCFLAG_CLOCAL); 821 if (ISSET(driverbits, COM_SW_CRTSCTS)) 822 SET(userbits, TIOCFLAG_CRTSCTS); 823 if (ISSET(driverbits, COM_SW_MDMBUF)) 824 SET(userbits, TIOCFLAG_MDMBUF); 825 826 *(int *)data = userbits; 827 break; 828 } 829 case TIOCSFLAGS: { 830 int userbits, driverbits = 0; 831 832 error = suser(p->p_ucred, &p->p_acflag); 833 if (error != 0) 834 return(EPERM); 835 836 userbits = *(int *)data; 837 if (ISSET(userbits, TIOCFLAG_SOFTCAR) || 838 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 839 SET(driverbits, COM_SW_SOFTCAR); 840 if (ISSET(userbits, TIOCFLAG_CLOCAL)) 841 SET(driverbits, COM_SW_CLOCAL); 842 if (ISSET(userbits, TIOCFLAG_CRTSCTS)) 843 SET(driverbits, COM_SW_CRTSCTS); 844 if (ISSET(userbits, TIOCFLAG_MDMBUF)) 845 SET(driverbits, COM_SW_MDMBUF); 846 847 sc->sc_swflags = driverbits; 848 break; 849 } 850 default: 851 return ENOTTY; 852 } 853 854 return 0; 855 } 856 857 int 858 comparam(tp, t) 859 struct tty *tp; 860 struct termios *t; 861 { 862 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 863 bus_space_tag_t iot = sc->sc_iot; 864 bus_space_handle_t ioh = sc->sc_ioh; 865 int ospeed = comspeed(t->c_ospeed); 866 u_char lcr; 867 tcflag_t oldcflag; 868 int s; 869 870 /* check requested parameters */ 871 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed)) 872 return EINVAL; 873 874 lcr = ISSET(sc->sc_lcr, LCR_SBREAK); 875 876 switch (ISSET(t->c_cflag, CSIZE)) { 877 case CS5: 878 SET(lcr, LCR_5BITS); 879 break; 880 case CS6: 881 SET(lcr, LCR_6BITS); 882 break; 883 case CS7: 884 SET(lcr, LCR_7BITS); 885 break; 886 case CS8: 887 SET(lcr, LCR_8BITS); 888 break; 889 } 890 if (ISSET(t->c_cflag, PARENB)) { 891 SET(lcr, LCR_PENAB); 892 if (!ISSET(t->c_cflag, PARODD)) 893 SET(lcr, LCR_PEVEN); 894 } 895 if (ISSET(t->c_cflag, CSTOPB)) 896 SET(lcr, LCR_STOPB); 897 898 sc->sc_lcr = lcr; 899 900 s = spltty(); 901 902 if (ospeed == 0) { 903 CLR(sc->sc_mcr, MCR_DTR); 904 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 905 } 906 907 /* 908 * Set the FIFO threshold based on the receive speed, if we are 909 * changing it. 910 */ 911 #if 1 912 if (tp->t_ispeed != t->c_ispeed) { 913 #else 914 if (1) { 915 #endif 916 if (ospeed != 0) { 917 /* 918 * Make sure the transmit FIFO is empty before 919 * proceeding. If we don't do this, some revisions 920 * of the UART will hang. Interestingly enough, 921 * even if we do this will the last character is 922 * still being pushed out, they don't hang. This 923 * seems good enough. 924 */ 925 while (ISSET(tp->t_state, TS_BUSY)) { 926 int error; 927 928 ++sc->sc_halt; 929 error = ttysleep(tp, &tp->t_outq, 930 TTOPRI | PCATCH, "comprm", 0); 931 --sc->sc_halt; 932 if (error) { 933 splx(s); 934 comstart(tp); 935 return (error); 936 } 937 } 938 939 bus_space_write_1(iot, ioh, com_lcr, lcr | LCR_DLAB); 940 bus_space_write_1(iot, ioh, com_dlbl, ospeed); 941 bus_space_write_1(iot, ioh, com_dlbh, ospeed >> 8); 942 bus_space_write_1(iot, ioh, com_lcr, lcr); 943 SET(sc->sc_mcr, MCR_DTR); 944 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 945 } else 946 bus_space_write_1(iot, ioh, com_lcr, lcr); 947 948 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP) && 949 ISSET(sc->sc_hwflags, COM_HW_FIFO)) 950 bus_space_write_1(iot, ioh, com_fifo, 951 FIFO_ENABLE | 952 (t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 953 } else 954 bus_space_write_1(iot, ioh, com_lcr, lcr); 955 956 /* When not using CRTSCTS, RTS follows DTR. */ 957 if (!ISSET(t->c_cflag, CRTSCTS)) { 958 if (ISSET(sc->sc_mcr, MCR_DTR)) { 959 if (!ISSET(sc->sc_mcr, MCR_RTS)) { 960 SET(sc->sc_mcr, MCR_RTS); 961 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 962 } 963 } else { 964 if (ISSET(sc->sc_mcr, MCR_RTS)) { 965 CLR(sc->sc_mcr, MCR_RTS); 966 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 967 } 968 } 969 sc->sc_dtr = MCR_DTR | MCR_RTS; 970 } else 971 sc->sc_dtr = MCR_DTR; 972 973 /* and copy to tty */ 974 tp->t_ispeed = t->c_ispeed; 975 tp->t_ospeed = t->c_ospeed; 976 oldcflag = tp->t_cflag; 977 tp->t_cflag = t->c_cflag; 978 979 /* 980 * If DCD is off and MDMBUF is changed, ask the tty layer if we should 981 * stop the device. 982 */ 983 if (!ISSET(sc->sc_msr, MSR_DCD) && 984 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 985 ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) && 986 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) { 987 CLR(sc->sc_mcr, sc->sc_dtr); 988 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 989 } 990 991 /* Just to be sure... */ 992 splx(s); 993 comstart(tp); 994 return 0; 995 } 996 997 void 998 comstart(tp) 999 struct tty *tp; 1000 { 1001 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1002 bus_space_tag_t iot = sc->sc_iot; 1003 bus_space_handle_t ioh = sc->sc_ioh; 1004 int s; 1005 1006 s = spltty(); 1007 if (ISSET(tp->t_state, TS_BUSY)) 1008 goto out; 1009 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP) || 1010 sc->sc_halt > 0) 1011 goto stopped; 1012 if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS)) 1013 goto stopped; 1014 if (tp->t_outq.c_cc <= tp->t_lowat) { 1015 if (ISSET(tp->t_state, TS_ASLEEP)) { 1016 CLR(tp->t_state, TS_ASLEEP); 1017 wakeup(&tp->t_outq); 1018 } 1019 if (tp->t_outq.c_cc == 0) 1020 goto stopped; 1021 selwakeup(&tp->t_wsel); 1022 } 1023 SET(tp->t_state, TS_BUSY); 1024 1025 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1026 SET(sc->sc_ier, IER_ETXRDY); 1027 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1028 } 1029 #ifdef COM_HAYESP 1030 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1031 u_char buffer[1024], *cp = buffer; 1032 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1033 do 1034 bus_space_write_1(iot, ioh, com_data, *cp++); 1035 while (--n); 1036 } 1037 else 1038 #endif 1039 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) { 1040 u_char buffer[16], *cp = buffer; 1041 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1042 do { 1043 bus_space_write_1(iot, ioh, com_data, *cp++); 1044 } while (--n); 1045 } else 1046 bus_space_write_1(iot, ioh, com_data, getc(&tp->t_outq)); 1047 out: 1048 splx(s); 1049 return; 1050 stopped: 1051 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1052 CLR(sc->sc_ier, IER_ETXRDY); 1053 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1054 } 1055 splx(s); 1056 } 1057 1058 /* 1059 * Stop output on a line. 1060 */ 1061 void 1062 comstop(tp, flag) 1063 struct tty *tp; 1064 int flag; 1065 { 1066 int s; 1067 1068 s = spltty(); 1069 if (ISSET(tp->t_state, TS_BUSY)) 1070 if (!ISSET(tp->t_state, TS_TTSTOP)) 1071 SET(tp->t_state, TS_FLUSH); 1072 splx(s); 1073 } 1074 1075 void 1076 comdiag(arg) 1077 void *arg; 1078 { 1079 struct com_softc *sc = arg; 1080 int overflows, floods, failures; 1081 int s; 1082 1083 s = spltty(); 1084 sc->sc_errors = 0; 1085 overflows = sc->sc_overflows; 1086 sc->sc_overflows = 0; 1087 floods = sc->sc_floods; 1088 sc->sc_floods = 0; 1089 failures = sc->sc_failures; 1090 sc->sc_failures = 0; 1091 splx(s); 1092 1093 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf overflow%s, %d uart failure%s\n", 1094 sc->sc_dev.dv_xname, 1095 overflows, overflows == 1 ? "" : "s", 1096 floods, floods == 1 ? "" : "s", 1097 failures, failures == 1 ? "" : "s"); 1098 } 1099 1100 void 1101 comsoft(arg) 1102 void *arg; 1103 { 1104 int unit; 1105 struct com_softc *sc; 1106 struct tty *tp; 1107 register u_char *ibufp; 1108 u_char *ibufend; 1109 register int c; 1110 int s; 1111 static int lsrmap[8] = { 1112 0, TTY_PE, 1113 TTY_FE, TTY_PE|TTY_FE, 1114 TTY_FE, TTY_PE|TTY_FE, 1115 TTY_FE, TTY_PE|TTY_FE 1116 }; 1117 1118 s = spltty(); 1119 if (comevents == 0) { 1120 splx(s); 1121 goto out; 1122 } 1123 comevents = 0; 1124 splx(s); 1125 1126 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1127 sc = com_cd.cd_devs[unit]; 1128 if (sc == 0 || sc->sc_ibufp == sc->sc_ibuf) 1129 continue; 1130 1131 tp = sc->sc_tty; 1132 1133 s = spltty(); 1134 1135 ibufp = sc->sc_ibuf; 1136 ibufend = sc->sc_ibufp; 1137 1138 if (ibufp == ibufend) { 1139 splx(s); 1140 continue; 1141 } 1142 1143 sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ? 1144 sc->sc_ibufs[1] : sc->sc_ibufs[0]; 1145 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 1146 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 1147 1148 if (tp == 0 || !ISSET(tp->t_state, TS_ISOPEN)) { 1149 splx(s); 1150 continue; 1151 } 1152 1153 if (ISSET(tp->t_cflag, CRTSCTS) && 1154 !ISSET(sc->sc_mcr, MCR_RTS)) { 1155 /* XXX */ 1156 SET(sc->sc_mcr, MCR_RTS); 1157 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, 1158 sc->sc_mcr); 1159 } 1160 1161 splx(s); 1162 1163 while (ibufp < ibufend) { 1164 c = *ibufp++; 1165 if (*ibufp & LSR_OE) { 1166 sc->sc_overflows++; 1167 if (sc->sc_errors++ == 0) 1168 timeout(comdiag, sc, 60 * hz); 1169 } 1170 /* This is ugly, but fast. */ 1171 c |= lsrmap[(*ibufp++ & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1172 (*linesw[tp->t_line].l_rint)(c, tp); 1173 } 1174 } 1175 1176 out: 1177 timeout(comsoft, NULL, 1); 1178 } 1179 1180 int 1181 comintr(arg) 1182 void *arg; 1183 { 1184 struct com_softc *sc = arg; 1185 bus_space_tag_t iot = sc->sc_iot; 1186 bus_space_handle_t ioh = sc->sc_ioh; 1187 struct tty *tp; 1188 u_char iir, lsr, data, msr, delta; 1189 #ifdef COM_DEBUG 1190 int n; 1191 struct { 1192 u_char iir, lsr, msr; 1193 } iter[32]; 1194 #endif 1195 1196 #ifdef COM_DEBUG 1197 n = 0; 1198 iter[n].iir = 1199 #endif 1200 iir = bus_space_read_1(iot, ioh, com_iir); 1201 if (ISSET(iir, IIR_NOPEND)) 1202 return (0); 1203 1204 tp = sc->sc_tty; 1205 1206 for (;;) { 1207 #ifdef COM_DEBUG 1208 iter[n].lsr = 1209 #endif 1210 lsr = bus_space_read_1(iot, ioh, com_lsr); 1211 1212 if (ISSET(lsr, LSR_RXRDY)) { 1213 register u_char *p = sc->sc_ibufp; 1214 1215 comevents = 1; 1216 do { 1217 data = bus_space_read_1(iot, ioh, com_data); 1218 if (ISSET(lsr, LSR_BI)) { 1219 #ifdef notdef 1220 printf("break %02x %02x %02x %02x\n", 1221 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, 1222 sc->sc_dtr); 1223 #endif 1224 #ifdef DDB 1225 if (ISSET(sc->sc_hwflags, 1226 COM_HW_CONSOLE)) { 1227 Debugger(); 1228 goto next; 1229 } 1230 #endif 1231 } 1232 if (p >= sc->sc_ibufend) { 1233 sc->sc_floods++; 1234 if (sc->sc_errors++ == 0) 1235 timeout(comdiag, sc, 60 * hz); 1236 } else { 1237 *p++ = data; 1238 *p++ = lsr; 1239 if (p == sc->sc_ibufhigh && 1240 ISSET(tp->t_cflag, CRTSCTS)) { 1241 /* XXX */ 1242 CLR(sc->sc_mcr, MCR_RTS); 1243 bus_space_write_1(iot, ioh, 1244 com_mcr, sc->sc_mcr); 1245 } 1246 } 1247 #ifdef DDB 1248 next: 1249 #endif 1250 #ifdef COM_DEBUG 1251 if (++n >= 32) 1252 goto ohfudge; 1253 iter[n].lsr = 1254 #endif 1255 lsr = bus_space_read_1(iot, ioh, com_lsr); 1256 } while (ISSET(lsr, LSR_RXRDY)); 1257 1258 sc->sc_ibufp = p; 1259 } else { 1260 #ifdef COM_DEBUG 1261 if (ISSET(lsr, LSR_BI|LSR_FE|LSR_PE|LSR_OE)) 1262 printf("weird lsr %02x\n", lsr); 1263 #endif 1264 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1265 sc->sc_failures++; 1266 if (sc->sc_errors++ == 0) 1267 timeout(comdiag, sc, 60 * hz); 1268 bus_space_write_1(iot, ioh, com_ier, 0); 1269 delay(10); 1270 bus_space_write_1(iot, ioh, com_ier, 1271 sc->sc_ier); 1272 iir = IIR_NOPEND; 1273 continue; 1274 } 1275 } 1276 1277 #ifdef COM_DEBUG 1278 iter[n].msr = 1279 #endif 1280 msr = bus_space_read_1(iot, ioh, com_msr); 1281 1282 if (msr != sc->sc_msr) { 1283 delta = msr ^ sc->sc_msr; 1284 sc->sc_msr = msr; 1285 if (ISSET(delta, MSR_DCD) && 1286 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 1287 (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) { 1288 CLR(sc->sc_mcr, sc->sc_dtr); 1289 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 1290 } 1291 if (ISSET(delta & msr, MSR_CTS) && 1292 ISSET(tp->t_cflag, CRTSCTS)) { 1293 /* the line is up and we want to do rts/cts flow control */ 1294 (*linesw[tp->t_line].l_start)(tp); 1295 } 1296 } 1297 1298 if (ISSET(lsr, LSR_TXRDY) && ISSET(tp->t_state, TS_BUSY)) { 1299 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 1300 if (sc->sc_halt > 0) 1301 wakeup(&tp->t_outq); 1302 (*linesw[tp->t_line].l_start)(tp); 1303 } 1304 1305 #ifdef COM_DEBUG 1306 if (++n >= 32) 1307 goto ohfudge; 1308 iter[n].iir = 1309 #endif 1310 iir = bus_space_read_1(iot, ioh, com_iir); 1311 if (ISSET(iir, IIR_NOPEND)) 1312 return (1); 1313 } 1314 1315 #ifdef COM_DEBUG 1316 ohfudge: 1317 printf("comintr: too many iterations"); 1318 for (n = 0; n < 32; n++) { 1319 if ((n % 4) == 0) 1320 printf("\ncomintr: iter[%02d]", n); 1321 printf(" %02x %02x %02x", iter[n].iir, iter[n].lsr, iter[n].msr); 1322 } 1323 printf("\n"); 1324 printf("comintr: msr %02x mcr %02x lcr %02x ier %02x\n", 1325 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, sc->sc_ier); 1326 printf("comintr: state %08x cc %d\n", sc->sc_tty->t_state, 1327 sc->sc_tty->t_outq.c_cc); 1328 return (1); 1329 #endif 1330 } 1331 1332 /* 1333 * Following are all routines needed for COM to act as console 1334 */ 1335 #include <dev/cons.h> 1336 1337 void 1338 comcnprobe(cp) 1339 struct consdev *cp; 1340 { 1341 /* XXX NEEDS TO BE FIXED XXX */ 1342 bus_space_tag_t iot = 0; 1343 bus_space_handle_t ioh; 1344 int found; 1345 1346 if (bus_space_map(iot, CONADDR, COM_NPORTS, 0, &ioh)) { 1347 cp->cn_pri = CN_DEAD; 1348 return; 1349 } 1350 found = comprobe1(iot, ioh, CONADDR); 1351 bus_space_unmap(iot, ioh, COM_NPORTS); 1352 if (!found) { 1353 cp->cn_pri = CN_DEAD; 1354 return; 1355 } 1356 1357 /* locate the major number */ 1358 for (commajor = 0; commajor < nchrdev; commajor++) 1359 if (cdevsw[commajor].d_open == comopen) 1360 break; 1361 1362 /* initialize required fields */ 1363 cp->cn_dev = makedev(commajor, CONUNIT); 1364 #ifdef COMCONSOLE 1365 cp->cn_pri = CN_REMOTE; /* Force a serial port console */ 1366 #else 1367 cp->cn_pri = CN_NORMAL; 1368 #endif 1369 } 1370 1371 void 1372 comcninit(cp) 1373 struct consdev *cp; 1374 { 1375 1376 #if 0 1377 XXX NEEDS TO BE FIXED XXX 1378 comconstag = ???; 1379 #endif 1380 if (bus_space_map(comconstag, CONADDR, COM_NPORTS, 0, &comconsbah)) 1381 panic("comcninit: mapping failed"); 1382 1383 cominit(comconstag, comconsbah, comdefaultrate); 1384 comconsaddr = CONADDR; 1385 comconsinit = 0; 1386 } 1387 1388 void 1389 cominit(iot, ioh, rate) 1390 bus_space_tag_t iot; 1391 bus_space_handle_t ioh; 1392 int rate; 1393 { 1394 int s = splhigh(); 1395 u_char stat; 1396 1397 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1398 rate = comspeed(comdefaultrate); 1399 bus_space_write_1(iot, ioh, com_dlbl, rate); 1400 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1401 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 1402 bus_space_write_1(iot, ioh, com_ier, IER_ERXRDY | IER_ETXRDY); 1403 bus_space_write_1(iot, ioh, com_fifo, 1404 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1405 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 1406 DELAY(100); 1407 stat = bus_space_read_1(iot, ioh, com_iir); 1408 splx(s); 1409 } 1410 1411 int 1412 comcngetc(dev) 1413 dev_t dev; 1414 { 1415 int s = splhigh(); 1416 bus_space_tag_t iot = comconstag; 1417 bus_space_handle_t ioh = comconsbah; 1418 u_char stat, c; 1419 1420 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1421 ; 1422 c = bus_space_read_1(iot, ioh, com_data); 1423 stat = bus_space_read_1(iot, ioh, com_iir); 1424 splx(s); 1425 return c; 1426 } 1427 1428 /* 1429 * Console kernel output character routine. 1430 */ 1431 void 1432 comcnputc(dev, c) 1433 dev_t dev; 1434 int c; 1435 { 1436 int s = splhigh(); 1437 bus_space_tag_t iot = comconstag; 1438 bus_space_handle_t ioh = comconsbah; 1439 u_char stat; 1440 register int timo; 1441 1442 #ifdef KGDB 1443 if (dev != kgdb_dev) 1444 #endif 1445 if (comconsinit == 0) { 1446 cominit(iot, ioh, comdefaultrate); 1447 comconsinit = 1; 1448 } 1449 /* wait for any pending transmission to finish */ 1450 timo = 50000; 1451 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 1452 ; 1453 bus_space_write_1(iot, ioh, com_data, c); 1454 /* wait for this transmission to complete */ 1455 timo = 1500000; 1456 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 1457 ; 1458 /* clear any interrupts generated by this transmission */ 1459 stat = bus_space_read_1(iot, ioh, com_iir); 1460 splx(s); 1461 } 1462 1463 void 1464 comcnpollc(dev, on) 1465 dev_t dev; 1466 int on; 1467 { 1468 1469 } 1470
Indexes created Mon Sep 22 13:09:51 GMT 2025