com.c revision 1.94
1 /* $NetBSD: com.c,v 1.94 1996/12/05 01:25:38 cgd Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996 5 * Charles M. Hannum. All rights reserved. 6 * Copyright (c) 1991 The Regents of the University of California. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)com.c 7.5 (Berkeley) 5/16/91 38 */ 39 40 /* 41 * COM driver, based on HP dca driver 42 * uses National Semiconductor NS16450/NS16550AF UART 43 */ 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/tty.h> 49 #include <sys/proc.h> 50 #include <sys/user.h> 51 #include <sys/conf.h> 52 #include <sys/file.h> 53 #include <sys/uio.h> 54 #include <sys/kernel.h> 55 #include <sys/syslog.h> 56 #include <sys/types.h> 57 #include <sys/device.h> 58 59 #include <machine/bus.h> 60 #include <machine/intr.h> 61 62 #include <dev/isa/isavar.h> 63 #include <dev/isa/comreg.h> 64 #include <dev/isa/comvar.h> 65 #include <dev/ic/ns16550reg.h> 66 #ifdef COM_HAYESP 67 #include <dev/ic/hayespreg.h> 68 #endif 69 #define com_lcr com_cfcr 70 71 #include "com.h" 72 73 74 #define COM_IBUFSIZE (2 * 512) 75 #define COM_IHIGHWATER ((3 * COM_IBUFSIZE) / 4) 76 77 struct com_softc { 78 struct device sc_dev; 79 void *sc_ih; 80 struct tty *sc_tty; 81 82 int sc_overflows; 83 int sc_floods; 84 int sc_failures; 85 int sc_errors; 86 87 int sc_halt; 88 89 int sc_iobase; 90 #ifdef COM_HAYESP 91 int sc_hayespbase; 92 #endif 93 94 bus_space_tag_t sc_iot; 95 bus_space_handle_t sc_ioh; 96 bus_space_handle_t sc_hayespioh; 97 98 u_char sc_hwflags; 99 #define COM_HW_NOIEN 0x01 100 #define COM_HW_FIFO 0x02 101 #define COM_HW_HAYESP 0x04 102 #define COM_HW_CONSOLE 0x40 103 u_char sc_swflags; 104 #define COM_SW_SOFTCAR 0x01 105 #define COM_SW_CLOCAL 0x02 106 #define COM_SW_CRTSCTS 0x04 107 #define COM_SW_MDMBUF 0x08 108 u_char sc_msr, sc_mcr, sc_lcr, sc_ier; 109 u_char sc_dtr; 110 111 u_char *sc_ibuf, *sc_ibufp, *sc_ibufhigh, *sc_ibufend; 112 u_char sc_ibufs[2][COM_IBUFSIZE]; 113 }; 114 115 #ifdef COM_HAYESP 116 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 117 #endif 118 void comdiag __P((void *)); 119 int comspeed __P((long)); 120 int comparam __P((struct tty *, struct termios *)); 121 void comstart __P((struct tty *)); 122 void comsoft __P((void *)); 123 124 /* XXX: These belong elsewhere */ 125 cdev_decl(com); 126 bdev_decl(com); 127 128 struct consdev; 129 void comcnprobe __P((struct consdev *)); 130 void comcninit __P((struct consdev *)); 131 int comcngetc __P((dev_t)); 132 void comcnputc __P((dev_t, int)); 133 void comcnpollc __P((dev_t, int)); 134 135 static u_char tiocm_xxx2mcr __P((int)); 136 137 /* 138 * XXX the following two cfattach structs should be different, and possibly 139 * XXX elsewhere. 140 */ 141 #ifdef __BROKEN_INDIRECT_CONFIG 142 int comprobe __P((struct device *, void *, void *)); 143 #else 144 int comprobe __P((struct device *, struct cfdata *, void *)); 145 #endif 146 void comattach __P((struct device *, struct device *, void *)); 147 148 #if NCOM_ISA 149 struct cfattach com_isa_ca = { 150 sizeof(struct com_softc), comprobe, comattach 151 }; 152 #endif 153 154 #if NCOM_COMMULTI 155 struct cfattach com_commulti_ca = { 156 sizeof(struct com_softc), comprobe, comattach 157 }; 158 #endif 159 160 struct cfdriver com_cd = { 161 NULL, "com", DV_TTY 162 }; 163 164 #ifdef COMCONSOLE 165 int comdefaultrate = CONSPEED; /* XXX why set default? */ 166 #else 167 int comdefaultrate = TTYDEF_SPEED; 168 #endif 169 int comconsaddr; 170 int comconsinit; 171 int comconsattached; 172 bus_space_tag_t comconstag; 173 bus_space_handle_t comconsbah; 174 tcflag_t comconscflag = TTYDEF_CFLAG; 175 176 int commajor; 177 int comsopen = 0; 178 int comevents = 0; 179 180 #ifdef KGDB 181 #include <machine/remote-sl.h> 182 extern int kgdb_dev; 183 extern int kgdb_rate; 184 extern int kgdb_debug_init; 185 #endif 186 187 #define COMUNIT(x) (minor(x)) 188 189 /* Macros to clear/set/test flags. */ 190 #define SET(t, f) (t) |= (f) 191 #define CLR(t, f) (t) &= ~(f) 192 #define ISSET(t, f) ((t) & (f)) 193 194 int 195 comspeed(speed) 196 long speed; 197 { 198 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 199 200 int x, err; 201 202 if (speed == 0) 203 return 0; 204 if (speed < 0) 205 return -1; 206 x = divrnd((COM_FREQ / 16), speed); 207 if (x <= 0) 208 return -1; 209 err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000; 210 if (err < 0) 211 err = -err; 212 if (err > COM_TOLERANCE) 213 return -1; 214 return x; 215 216 #undef divrnd(n, q) 217 } 218 219 int 220 comprobe1(iot, ioh, iobase) 221 bus_space_tag_t iot; 222 bus_space_handle_t ioh; 223 int iobase; 224 { 225 226 /* force access to id reg */ 227 bus_space_write_1(iot, ioh, com_lcr, 0); 228 bus_space_write_1(iot, ioh, com_iir, 0); 229 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 230 return 0; 231 232 return 1; 233 } 234 235 #ifdef COM_HAYESP 236 int 237 comprobeHAYESP(hayespioh, sc) 238 bus_space_handle_t hayespioh; 239 struct com_softc *sc; 240 { 241 char val, dips; 242 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 243 bus_space_tag_t iot = sc->sc_iot; 244 245 /* 246 * Hayes ESP cards have two iobases. One is for compatibility with 247 * 16550 serial chips, and at the same ISA PC base addresses. The 248 * other is for ESP-specific enhanced features, and lies at a 249 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 250 */ 251 252 /* Test for ESP signature */ 253 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 254 return 0; 255 256 /* 257 * ESP is present at ESP enhanced base address; unknown com port 258 */ 259 260 /* Get the dip-switch configurations */ 261 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 262 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 263 264 /* Determine which com port this ESP card services: bits 0,1 of */ 265 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 266 if (sc->sc_iobase != combaselist[dips & 0x03]) 267 return 0; 268 269 printf(": ESP"); 270 271 /* Check ESP Self Test bits. */ 272 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 273 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 274 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */ 275 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 276 if ((val & 0x70) < 0x20) { 277 printf("-old (%o)", val & 0x70); 278 /* we do not support the necessary features */ 279 return 0; 280 } 281 282 /* Check for ability to emulate 16550: bit 8 == 1 */ 283 if ((dips & 0x80) == 0) { 284 printf(" slave"); 285 /* XXX Does slave really mean no 16550 support?? */ 286 return 0; 287 } 288 289 /* 290 * If we made it this far, we are a full-featured ESP v2.0 (or 291 * better), at the correct com port address. 292 */ 293 294 SET(sc->sc_hwflags, COM_HW_HAYESP); 295 printf(", 1024 byte fifo\n"); 296 return 1; 297 } 298 #endif 299 300 int 301 comprobe(parent, match, aux) 302 struct device *parent; 303 #ifdef __BROKEN_INDIRECT_CONFIG 304 void *match; 305 #else 306 struct cfdata *match; 307 #endif 308 void *aux; 309 { 310 bus_space_tag_t iot; 311 bus_space_handle_t ioh; 312 int iobase, needioh; 313 int rv = 1; 314 315 /* 316 * XXX should be broken out into functions for isa probe and 317 * XXX for commulti probe, with a helper function that contains 318 * XXX most of the interesting stuff. 319 */ 320 #if NCOM_ISA 321 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 322 struct isa_attach_args *ia = aux; 323 324 iot = ia->ia_iot; 325 iobase = ia->ia_iobase; 326 needioh = 1; 327 } else 328 #endif 329 #if NCOM_COMMULTI 330 if (1) { 331 struct cfdata *cf = match; 332 struct commulti_attach_args *ca = aux; 333 334 if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != ca->ca_slave) 335 return (0); 336 337 iot = ca->ca_iot; 338 iobase = ca->ca_iobase; 339 ioh = ca->ca_ioh; 340 needioh = 0; 341 } else 342 #endif 343 return(0); /* This cannot happen */ 344 345 /* if it's in use as console, it's there. */ 346 if (iobase == comconsaddr && !comconsattached) 347 goto out; 348 349 if (needioh && bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) { 350 rv = 0; 351 goto out; 352 } 353 rv = comprobe1(iot, ioh, iobase); 354 if (needioh) 355 bus_space_unmap(iot, ioh, COM_NPORTS); 356 357 out: 358 #if NCOM_ISA 359 if (rv && !strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 360 struct isa_attach_args *ia = aux; 361 362 ia->ia_iosize = COM_NPORTS; 363 ia->ia_msize = 0; 364 } 365 #endif 366 return (rv); 367 } 368 369 void 370 comattach(parent, self, aux) 371 struct device *parent, *self; 372 void *aux; 373 { 374 struct com_softc *sc = (void *)self; 375 int iobase, irq; 376 bus_space_tag_t iot; 377 bus_space_handle_t ioh; 378 #ifdef COM_HAYESP 379 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 380 int *hayespp; 381 #endif 382 383 /* 384 * XXX should be broken out into functions for isa attach and 385 * XXX for commulti attach, with a helper function that contains 386 * XXX most of the interesting stuff. 387 */ 388 sc->sc_hwflags = 0; 389 sc->sc_swflags = 0; 390 #if NCOM_ISA 391 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 392 struct isa_attach_args *ia = aux; 393 394 /* 395 * We're living on an isa. 396 */ 397 iobase = ia->ia_iobase; 398 iot = ia->ia_iot; 399 if (iobase != comconsaddr) { 400 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 401 panic("comattach: io mapping failed"); 402 } else 403 ioh = comconsbah; 404 irq = ia->ia_irq; 405 } else 406 #endif 407 #if NCOM_COMMULTI 408 if (1) { 409 struct commulti_attach_args *ca = aux; 410 411 /* 412 * We're living on a commulti. 413 */ 414 iobase = ca->ca_iobase; 415 iot = ca->ca_iot; 416 ioh = ca->ca_ioh; 417 irq = IRQUNK; 418 419 if (ca->ca_noien) 420 sc->sc_hwflags |= COM_HW_NOIEN; 421 } else 422 #endif 423 panic("comattach: impossible"); 424 425 sc->sc_iot = iot; 426 sc->sc_ioh = ioh; 427 sc->sc_iobase = iobase; 428 429 if (iobase == comconsaddr) { 430 comconsattached = 1; 431 432 /* 433 * Need to reset baud rate, etc. of next print so reset 434 * comconsinit. Also make sure console is always "hardwired". 435 */ 436 delay(1000); /* wait for output to finish */ 437 comconsinit = 0; 438 SET(sc->sc_hwflags, COM_HW_CONSOLE); 439 SET(sc->sc_swflags, COM_SW_SOFTCAR); 440 } 441 442 #ifdef COM_HAYESP 443 /* Look for a Hayes ESP board. */ 444 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 445 bus_space_handle_t hayespioh; 446 447 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 448 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 449 continue; 450 if (comprobeHAYESP(hayespioh, sc)) { 451 sc->sc_hayespbase = *hayespp; 452 sc->sc_hayespioh = hayespioh; 453 break; 454 } 455 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 456 } 457 /* No ESP; look for other things. */ 458 if (*hayespp == 0) { 459 #endif 460 461 /* look for a NS 16550AF UART with FIFOs */ 462 bus_space_write_1(iot, ioh, com_fifo, 463 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 464 delay(100); 465 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK) 466 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) { 467 SET(sc->sc_hwflags, COM_HW_FIFO); 468 printf(": ns16550a, working fifo\n"); 469 } else 470 printf(": ns16550, broken fifo\n"); 471 else 472 printf(": ns8250 or ns16450, no fifo\n"); 473 bus_space_write_1(iot, ioh, com_fifo, 0); 474 #ifdef COM_HAYESP 475 } 476 #endif 477 478 /* disable interrupts */ 479 bus_space_write_1(iot, ioh, com_ier, 0); 480 bus_space_write_1(iot, ioh, com_mcr, 0); 481 482 if (irq != IRQUNK) { 483 #if NCOM_ISA 484 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 485 struct isa_attach_args *ia = aux; 486 487 sc->sc_ih = isa_intr_establish(ia->ia_ic, irq, 488 IST_EDGE, IPL_TTY, comintr, sc); 489 } else 490 #endif 491 panic("comattach: IRQ but can't have one"); 492 } 493 494 #ifdef KGDB 495 if (kgdb_dev == makedev(commajor, unit)) { 496 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 497 kgdb_dev = -1; /* can't debug over console port */ 498 else { 499 cominit(iot, ioh, kgdb_rate); 500 if (kgdb_debug_init) { 501 /* 502 * Print prefix of device name, 503 * let kgdb_connect print the rest. 504 */ 505 printf("%s: ", sc->sc_dev.dv_xname); 506 kgdb_connect(1); 507 } else 508 printf("%s: kgdb enabled\n", 509 sc->sc_dev.dv_xname); 510 } 511 } 512 #endif 513 514 /* XXX maybe move up some? */ 515 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 516 printf("%s: console\n", sc->sc_dev.dv_xname); 517 } 518 519 int 520 comopen(dev, flag, mode, p) 521 dev_t dev; 522 int flag, mode; 523 struct proc *p; 524 { 525 int unit = COMUNIT(dev); 526 struct com_softc *sc; 527 bus_space_tag_t iot; 528 bus_space_handle_t ioh; 529 struct tty *tp; 530 int s; 531 int error = 0; 532 533 if (unit >= com_cd.cd_ndevs) 534 return ENXIO; 535 sc = com_cd.cd_devs[unit]; 536 if (!sc) 537 return ENXIO; 538 539 if (!sc->sc_tty) { 540 tp = sc->sc_tty = ttymalloc(); 541 tty_attach(tp); 542 } else 543 tp = sc->sc_tty; 544 545 tp->t_oproc = comstart; 546 tp->t_param = comparam; 547 tp->t_dev = dev; 548 if (!ISSET(tp->t_state, TS_ISOPEN)) { 549 SET(tp->t_state, TS_WOPEN); 550 ttychars(tp); 551 tp->t_iflag = TTYDEF_IFLAG; 552 tp->t_oflag = TTYDEF_OFLAG; 553 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 554 tp->t_cflag = comconscflag; 555 else 556 tp->t_cflag = TTYDEF_CFLAG; 557 if (ISSET(sc->sc_swflags, COM_SW_CLOCAL)) 558 SET(tp->t_cflag, CLOCAL); 559 if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS)) 560 SET(tp->t_cflag, CRTSCTS); 561 if (ISSET(sc->sc_swflags, COM_SW_MDMBUF)) 562 SET(tp->t_cflag, MDMBUF); 563 tp->t_lflag = TTYDEF_LFLAG; 564 tp->t_ispeed = tp->t_ospeed = comdefaultrate; 565 566 s = spltty(); 567 568 comparam(tp, &tp->t_termios); 569 ttsetwater(tp); 570 571 if (comsopen++ == 0) 572 timeout(comsoft, NULL, 1); 573 574 sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0]; 575 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 576 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 577 578 iot = sc->sc_iot; 579 ioh = sc->sc_ioh; 580 #ifdef COM_HAYESP 581 /* Setup the ESP board */ 582 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 583 bus_space_handle_t hayespioh = sc->sc_hayespioh; 584 585 bus_space_write_1(iot, ioh, com_fifo, 586 FIFO_DMA_MODE|FIFO_ENABLE| 587 FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8); 588 589 /* Set 16550 compatibility mode */ 590 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 591 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 592 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 593 HAYESP_MODE_SCALE); 594 595 /* Set RTS/CTS flow control */ 596 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 597 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 598 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 599 600 /* Set flow control levels */ 601 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 602 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 603 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 604 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 605 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 606 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 607 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 608 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 609 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 610 } else 611 #endif 612 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 613 /* Set the FIFO threshold based on the receive speed. */ 614 bus_space_write_1(iot, ioh, com_fifo, 615 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | 616 (tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 617 /* flush any pending I/O */ 618 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 619 (void) bus_space_read_1(iot, ioh, com_data); 620 /* you turn me on, baby */ 621 sc->sc_mcr = MCR_DTR | MCR_RTS; 622 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 623 SET(sc->sc_mcr, MCR_IENABLE); 624 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 625 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 626 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 627 628 sc->sc_msr = bus_space_read_1(iot, ioh, com_msr); 629 if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || 630 ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF)) 631 SET(tp->t_state, TS_CARR_ON); 632 else 633 CLR(tp->t_state, TS_CARR_ON); 634 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) 635 return EBUSY; 636 else 637 s = spltty(); 638 639 /* wait for carrier if necessary */ 640 if (!ISSET(flag, O_NONBLOCK)) 641 while (!ISSET(tp->t_cflag, CLOCAL) && 642 !ISSET(tp->t_state, TS_CARR_ON)) { 643 SET(tp->t_state, TS_WOPEN); 644 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 645 ttopen, 0); 646 if (error) { 647 /* XXX should turn off chip if we're the 648 only waiter */ 649 splx(s); 650 return error; 651 } 652 } 653 splx(s); 654 655 return (*linesw[tp->t_line].l_open)(dev, tp); 656 } 657 658 int 659 comclose(dev, flag, mode, p) 660 dev_t dev; 661 int flag, mode; 662 struct proc *p; 663 { 664 int unit = COMUNIT(dev); 665 struct com_softc *sc = com_cd.cd_devs[unit]; 666 struct tty *tp = sc->sc_tty; 667 bus_space_tag_t iot = sc->sc_iot; 668 bus_space_handle_t ioh = sc->sc_ioh; 669 int s; 670 671 /* XXX This is for cons.c. */ 672 if (!ISSET(tp->t_state, TS_ISOPEN)) 673 return 0; 674 675 (*linesw[tp->t_line].l_close)(tp, flag); 676 s = spltty(); 677 CLR(sc->sc_lcr, LCR_SBREAK); 678 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 679 bus_space_write_1(iot, ioh, com_ier, 0); 680 if (ISSET(tp->t_cflag, HUPCL) && 681 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) { 682 /* XXX perhaps only clear DTR */ 683 bus_space_write_1(iot, ioh, com_mcr, 0); 684 bus_space_write_1(iot, ioh, com_fifo, 685 FIFO_RCV_RST | FIFO_XMT_RST); 686 } 687 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 688 if (--comsopen == 0) 689 untimeout(comsoft, NULL); 690 splx(s); 691 ttyclose(tp); 692 #ifdef notyet /* XXXX */ 693 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 694 ttyfree(tp); 695 sc->sc_tty = 0; 696 } 697 #endif 698 return 0; 699 } 700 701 int 702 comread(dev, uio, flag) 703 dev_t dev; 704 struct uio *uio; 705 int flag; 706 { 707 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 708 struct tty *tp = sc->sc_tty; 709 710 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 711 } 712 713 int 714 comwrite(dev, uio, flag) 715 dev_t dev; 716 struct uio *uio; 717 int flag; 718 { 719 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 720 struct tty *tp = sc->sc_tty; 721 722 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 723 } 724 725 struct tty * 726 comtty(dev) 727 dev_t dev; 728 { 729 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 730 struct tty *tp = sc->sc_tty; 731 732 return (tp); 733 } 734 735 static u_char 736 tiocm_xxx2mcr(data) 737 int data; 738 { 739 u_char m = 0; 740 741 if (ISSET(data, TIOCM_DTR)) 742 SET(m, MCR_DTR); 743 if (ISSET(data, TIOCM_RTS)) 744 SET(m, MCR_RTS); 745 return m; 746 } 747 748 int 749 comioctl(dev, cmd, data, flag, p) 750 dev_t dev; 751 u_long cmd; 752 caddr_t data; 753 int flag; 754 struct proc *p; 755 { 756 int unit = COMUNIT(dev); 757 struct com_softc *sc = com_cd.cd_devs[unit]; 758 struct tty *tp = sc->sc_tty; 759 bus_space_tag_t iot = sc->sc_iot; 760 bus_space_handle_t ioh = sc->sc_ioh; 761 int error; 762 763 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 764 if (error >= 0) 765 return error; 766 error = ttioctl(tp, cmd, data, flag, p); 767 if (error >= 0) 768 return error; 769 770 switch (cmd) { 771 case TIOCSBRK: 772 SET(sc->sc_lcr, LCR_SBREAK); 773 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 774 break; 775 case TIOCCBRK: 776 CLR(sc->sc_lcr, LCR_SBREAK); 777 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 778 break; 779 case TIOCSDTR: 780 SET(sc->sc_mcr, sc->sc_dtr); 781 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 782 break; 783 case TIOCCDTR: 784 CLR(sc->sc_mcr, sc->sc_dtr); 785 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 786 break; 787 case TIOCMSET: 788 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 789 case TIOCMBIS: 790 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 791 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 792 break; 793 case TIOCMBIC: 794 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 795 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 796 break; 797 case TIOCMGET: { 798 u_char m; 799 int bits = 0; 800 801 m = sc->sc_mcr; 802 if (ISSET(m, MCR_DTR)) 803 SET(bits, TIOCM_DTR); 804 if (ISSET(m, MCR_RTS)) 805 SET(bits, TIOCM_RTS); 806 m = sc->sc_msr; 807 if (ISSET(m, MSR_DCD)) 808 SET(bits, TIOCM_CD); 809 if (ISSET(m, MSR_CTS)) 810 SET(bits, TIOCM_CTS); 811 if (ISSET(m, MSR_DSR)) 812 SET(bits, TIOCM_DSR); 813 if (ISSET(m, MSR_RI | MSR_TERI)) 814 SET(bits, TIOCM_RI); 815 if (bus_space_read_1(iot, ioh, com_ier)) 816 SET(bits, TIOCM_LE); 817 *(int *)data = bits; 818 break; 819 } 820 case TIOCGFLAGS: { 821 int driverbits, userbits = 0; 822 823 driverbits = sc->sc_swflags; 824 if (ISSET(driverbits, COM_SW_SOFTCAR)) 825 SET(userbits, TIOCFLAG_SOFTCAR); 826 if (ISSET(driverbits, COM_SW_CLOCAL)) 827 SET(userbits, TIOCFLAG_CLOCAL); 828 if (ISSET(driverbits, COM_SW_CRTSCTS)) 829 SET(userbits, TIOCFLAG_CRTSCTS); 830 if (ISSET(driverbits, COM_SW_MDMBUF)) 831 SET(userbits, TIOCFLAG_MDMBUF); 832 833 *(int *)data = userbits; 834 break; 835 } 836 case TIOCSFLAGS: { 837 int userbits, driverbits = 0; 838 839 error = suser(p->p_ucred, &p->p_acflag); 840 if (error != 0) 841 return(EPERM); 842 843 userbits = *(int *)data; 844 if (ISSET(userbits, TIOCFLAG_SOFTCAR) || 845 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 846 SET(driverbits, COM_SW_SOFTCAR); 847 if (ISSET(userbits, TIOCFLAG_CLOCAL)) 848 SET(driverbits, COM_SW_CLOCAL); 849 if (ISSET(userbits, TIOCFLAG_CRTSCTS)) 850 SET(driverbits, COM_SW_CRTSCTS); 851 if (ISSET(userbits, TIOCFLAG_MDMBUF)) 852 SET(driverbits, COM_SW_MDMBUF); 853 854 sc->sc_swflags = driverbits; 855 break; 856 } 857 default: 858 return ENOTTY; 859 } 860 861 return 0; 862 } 863 864 int 865 comparam(tp, t) 866 struct tty *tp; 867 struct termios *t; 868 { 869 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 870 bus_space_tag_t iot = sc->sc_iot; 871 bus_space_handle_t ioh = sc->sc_ioh; 872 int ospeed = comspeed(t->c_ospeed); 873 u_char lcr; 874 tcflag_t oldcflag; 875 int s; 876 877 /* check requested parameters */ 878 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed)) 879 return EINVAL; 880 881 lcr = ISSET(sc->sc_lcr, LCR_SBREAK); 882 883 switch (ISSET(t->c_cflag, CSIZE)) { 884 case CS5: 885 SET(lcr, LCR_5BITS); 886 break; 887 case CS6: 888 SET(lcr, LCR_6BITS); 889 break; 890 case CS7: 891 SET(lcr, LCR_7BITS); 892 break; 893 case CS8: 894 SET(lcr, LCR_8BITS); 895 break; 896 } 897 if (ISSET(t->c_cflag, PARENB)) { 898 SET(lcr, LCR_PENAB); 899 if (!ISSET(t->c_cflag, PARODD)) 900 SET(lcr, LCR_PEVEN); 901 } 902 if (ISSET(t->c_cflag, CSTOPB)) 903 SET(lcr, LCR_STOPB); 904 905 sc->sc_lcr = lcr; 906 907 s = spltty(); 908 909 if (ospeed == 0) { 910 CLR(sc->sc_mcr, MCR_DTR); 911 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 912 } 913 914 /* 915 * Set the FIFO threshold based on the receive speed, if we are 916 * changing it. 917 */ 918 #if 1 919 if (tp->t_ispeed != t->c_ispeed) { 920 #else 921 if (1) { 922 #endif 923 if (ospeed != 0) { 924 /* 925 * Make sure the transmit FIFO is empty before 926 * proceeding. If we don't do this, some revisions 927 * of the UART will hang. Interestingly enough, 928 * even if we do this will the last character is 929 * still being pushed out, they don't hang. This 930 * seems good enough. 931 */ 932 while (ISSET(tp->t_state, TS_BUSY)) { 933 int error; 934 935 ++sc->sc_halt; 936 error = ttysleep(tp, &tp->t_outq, 937 TTOPRI | PCATCH, "comprm", 0); 938 --sc->sc_halt; 939 if (error) { 940 splx(s); 941 comstart(tp); 942 return (error); 943 } 944 } 945 946 bus_space_write_1(iot, ioh, com_lcr, lcr | LCR_DLAB); 947 bus_space_write_1(iot, ioh, com_dlbl, ospeed); 948 bus_space_write_1(iot, ioh, com_dlbh, ospeed >> 8); 949 bus_space_write_1(iot, ioh, com_lcr, lcr); 950 SET(sc->sc_mcr, MCR_DTR); 951 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 952 } else 953 bus_space_write_1(iot, ioh, com_lcr, lcr); 954 955 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP) && 956 ISSET(sc->sc_hwflags, COM_HW_FIFO)) 957 bus_space_write_1(iot, ioh, com_fifo, 958 FIFO_ENABLE | 959 (t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 960 } else 961 bus_space_write_1(iot, ioh, com_lcr, lcr); 962 963 /* When not using CRTSCTS, RTS follows DTR. */ 964 if (!ISSET(t->c_cflag, CRTSCTS)) { 965 if (ISSET(sc->sc_mcr, MCR_DTR)) { 966 if (!ISSET(sc->sc_mcr, MCR_RTS)) { 967 SET(sc->sc_mcr, MCR_RTS); 968 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 969 } 970 } else { 971 if (ISSET(sc->sc_mcr, MCR_RTS)) { 972 CLR(sc->sc_mcr, MCR_RTS); 973 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 974 } 975 } 976 sc->sc_dtr = MCR_DTR | MCR_RTS; 977 } else 978 sc->sc_dtr = MCR_DTR; 979 980 /* and copy to tty */ 981 tp->t_ispeed = t->c_ispeed; 982 tp->t_ospeed = t->c_ospeed; 983 oldcflag = tp->t_cflag; 984 tp->t_cflag = t->c_cflag; 985 986 /* 987 * If DCD is off and MDMBUF is changed, ask the tty layer if we should 988 * stop the device. 989 */ 990 if (!ISSET(sc->sc_msr, MSR_DCD) && 991 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 992 ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) && 993 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) { 994 CLR(sc->sc_mcr, sc->sc_dtr); 995 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 996 } 997 998 /* Just to be sure... */ 999 splx(s); 1000 comstart(tp); 1001 return 0; 1002 } 1003 1004 void 1005 comstart(tp) 1006 struct tty *tp; 1007 { 1008 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1009 bus_space_tag_t iot = sc->sc_iot; 1010 bus_space_handle_t ioh = sc->sc_ioh; 1011 int s; 1012 1013 s = spltty(); 1014 if (ISSET(tp->t_state, TS_BUSY)) 1015 goto out; 1016 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP) || 1017 sc->sc_halt > 0) 1018 goto stopped; 1019 if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS)) 1020 goto stopped; 1021 if (tp->t_outq.c_cc <= tp->t_lowat) { 1022 if (ISSET(tp->t_state, TS_ASLEEP)) { 1023 CLR(tp->t_state, TS_ASLEEP); 1024 wakeup(&tp->t_outq); 1025 } 1026 if (tp->t_outq.c_cc == 0) 1027 goto stopped; 1028 selwakeup(&tp->t_wsel); 1029 } 1030 SET(tp->t_state, TS_BUSY); 1031 1032 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1033 SET(sc->sc_ier, IER_ETXRDY); 1034 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1035 } 1036 #ifdef COM_HAYESP 1037 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1038 u_char buffer[1024], *cp = buffer; 1039 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1040 do 1041 bus_space_write_1(iot, ioh, com_data, *cp++); 1042 while (--n); 1043 } 1044 else 1045 #endif 1046 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) { 1047 u_char buffer[16], *cp = buffer; 1048 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1049 do { 1050 bus_space_write_1(iot, ioh, com_data, *cp++); 1051 } while (--n); 1052 } else 1053 bus_space_write_1(iot, ioh, com_data, getc(&tp->t_outq)); 1054 out: 1055 splx(s); 1056 return; 1057 stopped: 1058 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1059 CLR(sc->sc_ier, IER_ETXRDY); 1060 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1061 } 1062 splx(s); 1063 } 1064 1065 /* 1066 * Stop output on a line. 1067 */ 1068 void 1069 comstop(tp, flag) 1070 struct tty *tp; 1071 int flag; 1072 { 1073 int s; 1074 1075 s = spltty(); 1076 if (ISSET(tp->t_state, TS_BUSY)) 1077 if (!ISSET(tp->t_state, TS_TTSTOP)) 1078 SET(tp->t_state, TS_FLUSH); 1079 splx(s); 1080 } 1081 1082 void 1083 comdiag(arg) 1084 void *arg; 1085 { 1086 struct com_softc *sc = arg; 1087 int overflows, floods, failures; 1088 int s; 1089 1090 s = spltty(); 1091 sc->sc_errors = 0; 1092 overflows = sc->sc_overflows; 1093 sc->sc_overflows = 0; 1094 floods = sc->sc_floods; 1095 sc->sc_floods = 0; 1096 failures = sc->sc_failures; 1097 sc->sc_failures = 0; 1098 splx(s); 1099 1100 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf overflow%s, %d uart failure%s\n", 1101 sc->sc_dev.dv_xname, 1102 overflows, overflows == 1 ? "" : "s", 1103 floods, floods == 1 ? "" : "s", 1104 failures, failures == 1 ? "" : "s"); 1105 } 1106 1107 void 1108 comsoft(arg) 1109 void *arg; 1110 { 1111 int unit; 1112 struct com_softc *sc; 1113 struct tty *tp; 1114 register u_char *ibufp; 1115 u_char *ibufend; 1116 register int c; 1117 int s; 1118 static int lsrmap[8] = { 1119 0, TTY_PE, 1120 TTY_FE, TTY_PE|TTY_FE, 1121 TTY_FE, TTY_PE|TTY_FE, 1122 TTY_FE, TTY_PE|TTY_FE 1123 }; 1124 1125 s = spltty(); 1126 if (comevents == 0) { 1127 splx(s); 1128 goto out; 1129 } 1130 comevents = 0; 1131 splx(s); 1132 1133 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1134 sc = com_cd.cd_devs[unit]; 1135 if (sc == 0 || sc->sc_ibufp == sc->sc_ibuf) 1136 continue; 1137 1138 tp = sc->sc_tty; 1139 1140 s = spltty(); 1141 1142 ibufp = sc->sc_ibuf; 1143 ibufend = sc->sc_ibufp; 1144 1145 if (ibufp == ibufend) { 1146 splx(s); 1147 continue; 1148 } 1149 1150 sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ? 1151 sc->sc_ibufs[1] : sc->sc_ibufs[0]; 1152 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 1153 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 1154 1155 if (tp == 0 || !ISSET(tp->t_state, TS_ISOPEN)) { 1156 splx(s); 1157 continue; 1158 } 1159 1160 if (ISSET(tp->t_cflag, CRTSCTS) && 1161 !ISSET(sc->sc_mcr, MCR_RTS)) { 1162 /* XXX */ 1163 SET(sc->sc_mcr, MCR_RTS); 1164 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, 1165 sc->sc_mcr); 1166 } 1167 1168 splx(s); 1169 1170 while (ibufp < ibufend) { 1171 c = *ibufp++; 1172 if (*ibufp & LSR_OE) { 1173 sc->sc_overflows++; 1174 if (sc->sc_errors++ == 0) 1175 timeout(comdiag, sc, 60 * hz); 1176 } 1177 /* This is ugly, but fast. */ 1178 c |= lsrmap[(*ibufp++ & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1179 (*linesw[tp->t_line].l_rint)(c, tp); 1180 } 1181 } 1182 1183 out: 1184 timeout(comsoft, NULL, 1); 1185 } 1186 1187 int 1188 comintr(arg) 1189 void *arg; 1190 { 1191 struct com_softc *sc = arg; 1192 bus_space_tag_t iot = sc->sc_iot; 1193 bus_space_handle_t ioh = sc->sc_ioh; 1194 struct tty *tp; 1195 u_char iir, lsr, data, msr, delta; 1196 #ifdef COM_DEBUG 1197 int n; 1198 struct { 1199 u_char iir, lsr, msr; 1200 } iter[32]; 1201 #endif 1202 1203 #ifdef COM_DEBUG 1204 n = 0; 1205 iter[n].iir = 1206 #endif 1207 iir = bus_space_read_1(iot, ioh, com_iir); 1208 if (ISSET(iir, IIR_NOPEND)) 1209 return (0); 1210 1211 tp = sc->sc_tty; 1212 1213 for (;;) { 1214 #ifdef COM_DEBUG 1215 iter[n].lsr = 1216 #endif 1217 lsr = bus_space_read_1(iot, ioh, com_lsr); 1218 1219 if (ISSET(lsr, LSR_RXRDY)) { 1220 register u_char *p = sc->sc_ibufp; 1221 1222 comevents = 1; 1223 do { 1224 data = bus_space_read_1(iot, ioh, com_data); 1225 if (ISSET(lsr, LSR_BI)) { 1226 #ifdef notdef 1227 printf("break %02x %02x %02x %02x\n", 1228 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, 1229 sc->sc_dtr); 1230 #endif 1231 #ifdef DDB 1232 if (ISSET(sc->sc_hwflags, 1233 COM_HW_CONSOLE)) { 1234 Debugger(); 1235 goto next; 1236 } 1237 #endif 1238 } 1239 if (p >= sc->sc_ibufend) { 1240 sc->sc_floods++; 1241 if (sc->sc_errors++ == 0) 1242 timeout(comdiag, sc, 60 * hz); 1243 } else { 1244 *p++ = data; 1245 *p++ = lsr; 1246 if (p == sc->sc_ibufhigh && 1247 ISSET(tp->t_cflag, CRTSCTS)) { 1248 /* XXX */ 1249 CLR(sc->sc_mcr, MCR_RTS); 1250 bus_space_write_1(iot, ioh, 1251 com_mcr, sc->sc_mcr); 1252 } 1253 } 1254 #ifdef DDB 1255 next: 1256 #endif 1257 #ifdef COM_DEBUG 1258 if (++n >= 32) 1259 goto ohfudge; 1260 iter[n].lsr = 1261 #endif 1262 lsr = bus_space_read_1(iot, ioh, com_lsr); 1263 } while (ISSET(lsr, LSR_RXRDY)); 1264 1265 sc->sc_ibufp = p; 1266 } else { 1267 #ifdef COM_DEBUG 1268 if (ISSET(lsr, LSR_BI|LSR_FE|LSR_PE|LSR_OE)) 1269 printf("weird lsr %02x\n", lsr); 1270 #endif 1271 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1272 sc->sc_failures++; 1273 if (sc->sc_errors++ == 0) 1274 timeout(comdiag, sc, 60 * hz); 1275 bus_space_write_1(iot, ioh, com_ier, 0); 1276 delay(10); 1277 bus_space_write_1(iot, ioh, com_ier, 1278 sc->sc_ier); 1279 iir = IIR_NOPEND; 1280 continue; 1281 } 1282 } 1283 1284 #ifdef COM_DEBUG 1285 iter[n].msr = 1286 #endif 1287 msr = bus_space_read_1(iot, ioh, com_msr); 1288 1289 if (msr != sc->sc_msr) { 1290 delta = msr ^ sc->sc_msr; 1291 sc->sc_msr = msr; 1292 if (ISSET(delta, MSR_DCD) && 1293 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 1294 (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) { 1295 CLR(sc->sc_mcr, sc->sc_dtr); 1296 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 1297 } 1298 if (ISSET(delta & msr, MSR_CTS) && 1299 ISSET(tp->t_cflag, CRTSCTS)) { 1300 /* the line is up and we want to do rts/cts flow control */ 1301 (*linesw[tp->t_line].l_start)(tp); 1302 } 1303 } 1304 1305 if (ISSET(lsr, LSR_TXRDY) && ISSET(tp->t_state, TS_BUSY)) { 1306 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 1307 if (sc->sc_halt > 0) 1308 wakeup(&tp->t_outq); 1309 (*linesw[tp->t_line].l_start)(tp); 1310 } 1311 1312 #ifdef COM_DEBUG 1313 if (++n >= 32) 1314 goto ohfudge; 1315 iter[n].iir = 1316 #endif 1317 iir = bus_space_read_1(iot, ioh, com_iir); 1318 if (ISSET(iir, IIR_NOPEND)) 1319 return (1); 1320 } 1321 1322 #ifdef COM_DEBUG 1323 ohfudge: 1324 printf("comintr: too many iterations"); 1325 for (n = 0; n < 32; n++) { 1326 if ((n % 4) == 0) 1327 printf("\ncomintr: iter[%02d]", n); 1328 printf(" %02x %02x %02x", iter[n].iir, iter[n].lsr, iter[n].msr); 1329 } 1330 printf("\n"); 1331 printf("comintr: msr %02x mcr %02x lcr %02x ier %02x\n", 1332 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, sc->sc_ier); 1333 printf("comintr: state %08x cc %d\n", sc->sc_tty->t_state, 1334 sc->sc_tty->t_outq.c_cc); 1335 return (1); 1336 #endif 1337 } 1338 1339 /* 1340 * Following are all routines needed for COM to act as console 1341 */ 1342 #include <dev/cons.h> 1343 1344 void 1345 comcnprobe(cp) 1346 struct consdev *cp; 1347 { 1348 /* XXX NEEDS TO BE FIXED XXX */ 1349 bus_space_tag_t iot = 0; 1350 bus_space_handle_t ioh; 1351 int found; 1352 1353 if (bus_space_map(iot, CONADDR, COM_NPORTS, 0, &ioh)) { 1354 cp->cn_pri = CN_DEAD; 1355 return; 1356 } 1357 found = comprobe1(iot, ioh, CONADDR); 1358 bus_space_unmap(iot, ioh, COM_NPORTS); 1359 if (!found) { 1360 cp->cn_pri = CN_DEAD; 1361 return; 1362 } 1363 1364 /* locate the major number */ 1365 for (commajor = 0; commajor < nchrdev; commajor++) 1366 if (cdevsw[commajor].d_open == comopen) 1367 break; 1368 1369 /* initialize required fields */ 1370 cp->cn_dev = makedev(commajor, CONUNIT); 1371 #ifdef COMCONSOLE 1372 cp->cn_pri = CN_REMOTE; /* Force a serial port console */ 1373 #else 1374 cp->cn_pri = CN_NORMAL; 1375 #endif 1376 } 1377 1378 void 1379 comcninit(cp) 1380 struct consdev *cp; 1381 { 1382 1383 #if 0 1384 XXX NEEDS TO BE FIXED XXX 1385 comconstag = ???; 1386 #endif 1387 if (bus_space_map(comconstag, CONADDR, COM_NPORTS, 0, &comconsbah)) 1388 panic("comcninit: mapping failed"); 1389 1390 cominit(comconstag, comconsbah, comdefaultrate); 1391 comconsaddr = CONADDR; 1392 comconsinit = 0; 1393 } 1394 1395 void 1396 cominit(iot, ioh, rate) 1397 bus_space_tag_t iot; 1398 bus_space_handle_t ioh; 1399 int rate; 1400 { 1401 int s = splhigh(); 1402 u_char stat; 1403 1404 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1405 rate = comspeed(comdefaultrate); 1406 bus_space_write_1(iot, ioh, com_dlbl, rate); 1407 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1408 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 1409 bus_space_write_1(iot, ioh, com_ier, IER_ERXRDY | IER_ETXRDY); 1410 bus_space_write_1(iot, ioh, com_fifo, 1411 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1412 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 1413 DELAY(100); 1414 stat = bus_space_read_1(iot, ioh, com_iir); 1415 splx(s); 1416 } 1417 1418 int 1419 comcngetc(dev) 1420 dev_t dev; 1421 { 1422 int s = splhigh(); 1423 bus_space_tag_t iot = comconstag; 1424 bus_space_handle_t ioh = comconsbah; 1425 u_char stat, c; 1426 1427 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1428 ; 1429 c = bus_space_read_1(iot, ioh, com_data); 1430 stat = bus_space_read_1(iot, ioh, com_iir); 1431 splx(s); 1432 return c; 1433 } 1434 1435 /* 1436 * Console kernel output character routine. 1437 */ 1438 void 1439 comcnputc(dev, c) 1440 dev_t dev; 1441 int c; 1442 { 1443 int s = splhigh(); 1444 bus_space_tag_t iot = comconstag; 1445 bus_space_handle_t ioh = comconsbah; 1446 u_char stat; 1447 register int timo; 1448 1449 #ifdef KGDB 1450 if (dev != kgdb_dev) 1451 #endif 1452 if (comconsinit == 0) { 1453 cominit(iot, ioh, comdefaultrate); 1454 comconsinit = 1; 1455 } 1456 /* wait for any pending transmission to finish */ 1457 timo = 50000; 1458 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 1459 ; 1460 bus_space_write_1(iot, ioh, com_data, c); 1461 /* wait for this transmission to complete */ 1462 timo = 1500000; 1463 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 1464 ; 1465 /* clear any interrupts generated by this transmission */ 1466 stat = bus_space_read_1(iot, ioh, com_iir); 1467 splx(s); 1468 } 1469 1470 void 1471 comcnpollc(dev, on) 1472 dev_t dev; 1473 int on; 1474 { 1475 1476 } 1477
Indexes created Fri Sep 26 20:09:58 GMT 2025