com.c revision 1.96
1 /* $NetBSD: com.c,v 1.96 1996/12/14 10:46:38 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996 5 * Charles M. Hannum. All rights reserved. 6 * Copyright (c) 1991 The Regents of the University of California. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)com.c 7.5 (Berkeley) 5/16/91 38 */ 39 40 /* 41 * COM driver, based on HP dca driver 42 * uses National Semiconductor NS16450/NS16550AF UART 43 */ 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/tty.h> 49 #include <sys/proc.h> 50 #include <sys/user.h> 51 #include <sys/conf.h> 52 #include <sys/file.h> 53 #include <sys/uio.h> 54 #include <sys/kernel.h> 55 #include <sys/syslog.h> 56 #include <sys/types.h> 57 #include <sys/device.h> 58 59 #include <machine/bus.h> 60 #include <machine/intr.h> 61 62 #include <dev/isa/isavar.h> 63 #include <dev/isa/comreg.h> 64 #include <dev/isa/comvar.h> 65 #include <dev/ic/ns16550reg.h> 66 #ifdef COM_HAYESP 67 #include <dev/ic/hayespreg.h> 68 #endif 69 #define com_lcr com_cfcr 70 71 #include "com.h" 72 73 74 #define COM_IBUFSIZE (2 * 512) 75 #define COM_IHIGHWATER ((3 * COM_IBUFSIZE) / 4) 76 77 struct com_softc { 78 struct device sc_dev; 79 void *sc_ih; 80 struct tty *sc_tty; 81 82 int sc_overflows; 83 int sc_floods; 84 int sc_failures; 85 int sc_errors; 86 87 int sc_halt; 88 89 int sc_iobase; 90 #ifdef COM_HAYESP 91 int sc_hayespbase; 92 #endif 93 94 bus_space_tag_t sc_iot; 95 bus_space_handle_t sc_ioh; 96 bus_space_handle_t sc_hayespioh; 97 98 u_char sc_hwflags; 99 #define COM_HW_NOIEN 0x01 100 #define COM_HW_FIFO 0x02 101 #define COM_HW_HAYESP 0x04 102 #define COM_HW_CONSOLE 0x40 103 u_char sc_swflags; 104 #define COM_SW_SOFTCAR 0x01 105 #define COM_SW_CLOCAL 0x02 106 #define COM_SW_CRTSCTS 0x04 107 #define COM_SW_MDMBUF 0x08 108 u_char sc_msr, sc_mcr, sc_lcr, sc_ier; 109 u_char sc_dtr; 110 111 u_char *sc_ibuf, *sc_ibufp, *sc_ibufhigh, *sc_ibufend; 112 u_char sc_ibufs[2][COM_IBUFSIZE]; 113 }; 114 115 #ifdef COM_HAYESP 116 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 117 #endif 118 void comdiag __P((void *)); 119 int comspeed __P((long)); 120 int comparam __P((struct tty *, struct termios *)); 121 void comstart __P((struct tty *)); 122 void comsoft __P((void *)); 123 124 /* XXX: These belong elsewhere */ 125 cdev_decl(com); 126 bdev_decl(com); 127 128 struct consdev; 129 void comcnprobe __P((struct consdev *)); 130 void comcninit __P((struct consdev *)); 131 int comcngetc __P((dev_t)); 132 void comcnputc __P((dev_t, int)); 133 void comcnpollc __P((dev_t, int)); 134 135 static u_char tiocm_xxx2mcr __P((int)); 136 137 /* 138 * XXX the following two cfattach structs should be different, and possibly 139 * XXX elsewhere. 140 */ 141 #ifdef __BROKEN_INDIRECT_CONFIG 142 int comprobe __P((struct device *, void *, void *)); 143 #else 144 int comprobe __P((struct device *, struct cfdata *, void *)); 145 #endif 146 void comattach __P((struct device *, struct device *, void *)); 147 148 #if NCOM_ISA 149 struct cfattach com_isa_ca = { 150 sizeof(struct com_softc), comprobe, comattach 151 }; 152 #endif 153 154 #if NCOM_COMMULTI 155 struct cfattach com_commulti_ca = { 156 sizeof(struct com_softc), comprobe, comattach 157 }; 158 #endif 159 160 struct cfdriver com_cd = { 161 NULL, "com", DV_TTY 162 }; 163 164 #ifdef COMCONSOLE 165 int comdefaultrate = CONSPEED; /* XXX why set default? */ 166 #else 167 int comdefaultrate = TTYDEF_SPEED; 168 #endif 169 int comconsaddr; 170 int comconsattached; 171 bus_space_tag_t comconstag; 172 bus_space_handle_t comconsbah; 173 tcflag_t comconscflag = TTYDEF_CFLAG; 174 175 int commajor; 176 int comsopen = 0; 177 int comevents = 0; 178 179 #ifdef KGDB 180 #include <machine/remote-sl.h> 181 extern int kgdb_dev; 182 extern int kgdb_rate; 183 extern int kgdb_debug_init; 184 #endif 185 186 #define COMUNIT(x) (minor(x)) 187 188 /* Macros to clear/set/test flags. */ 189 #define SET(t, f) (t) |= (f) 190 #define CLR(t, f) (t) &= ~(f) 191 #define ISSET(t, f) ((t) & (f)) 192 193 int 194 comspeed(speed) 195 long speed; 196 { 197 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 198 199 int x, err; 200 201 if (speed == 0) 202 return 0; 203 if (speed < 0) 204 return -1; 205 x = divrnd((COM_FREQ / 16), speed); 206 if (x <= 0) 207 return -1; 208 err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000; 209 if (err < 0) 210 err = -err; 211 if (err > COM_TOLERANCE) 212 return -1; 213 return x; 214 215 #undef divrnd(n, q) 216 } 217 218 int 219 comprobe1(iot, ioh, iobase) 220 bus_space_tag_t iot; 221 bus_space_handle_t ioh; 222 int iobase; 223 { 224 225 /* force access to id reg */ 226 bus_space_write_1(iot, ioh, com_lcr, 0); 227 bus_space_write_1(iot, ioh, com_iir, 0); 228 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 229 return 0; 230 231 return 1; 232 } 233 234 #ifdef COM_HAYESP 235 int 236 comprobeHAYESP(hayespioh, sc) 237 bus_space_handle_t hayespioh; 238 struct com_softc *sc; 239 { 240 char val, dips; 241 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 242 bus_space_tag_t iot = sc->sc_iot; 243 244 /* 245 * Hayes ESP cards have two iobases. One is for compatibility with 246 * 16550 serial chips, and at the same ISA PC base addresses. The 247 * other is for ESP-specific enhanced features, and lies at a 248 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 249 */ 250 251 /* Test for ESP signature */ 252 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 253 return 0; 254 255 /* 256 * ESP is present at ESP enhanced base address; unknown com port 257 */ 258 259 /* Get the dip-switch configurations */ 260 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 261 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 262 263 /* Determine which com port this ESP card services: bits 0,1 of */ 264 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 265 if (sc->sc_iobase != combaselist[dips & 0x03]) 266 return 0; 267 268 printf(": ESP"); 269 270 /* Check ESP Self Test bits. */ 271 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 272 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 273 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */ 274 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 275 if ((val & 0x70) < 0x20) { 276 printf("-old (%o)", val & 0x70); 277 /* we do not support the necessary features */ 278 return 0; 279 } 280 281 /* Check for ability to emulate 16550: bit 8 == 1 */ 282 if ((dips & 0x80) == 0) { 283 printf(" slave"); 284 /* XXX Does slave really mean no 16550 support?? */ 285 return 0; 286 } 287 288 /* 289 * If we made it this far, we are a full-featured ESP v2.0 (or 290 * better), at the correct com port address. 291 */ 292 293 SET(sc->sc_hwflags, COM_HW_HAYESP); 294 printf(", 1024 byte fifo\n"); 295 return 1; 296 } 297 #endif 298 299 int 300 comprobe(parent, match, aux) 301 struct device *parent; 302 #ifdef __BROKEN_INDIRECT_CONFIG 303 void *match; 304 #else 305 struct cfdata *match; 306 #endif 307 void *aux; 308 { 309 bus_space_tag_t iot; 310 bus_space_handle_t ioh; 311 int iobase, needioh; 312 int rv = 1; 313 314 /* 315 * XXX should be broken out into functions for isa probe and 316 * XXX for commulti probe, with a helper function that contains 317 * XXX most of the interesting stuff. 318 */ 319 #if NCOM_ISA 320 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 321 struct isa_attach_args *ia = aux; 322 323 iot = ia->ia_iot; 324 iobase = ia->ia_iobase; 325 needioh = 1; 326 } else 327 #endif 328 #if NCOM_COMMULTI 329 if (1) { 330 struct cfdata *cf = match; 331 struct commulti_attach_args *ca = aux; 332 333 if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != ca->ca_slave) 334 return (0); 335 336 iot = ca->ca_iot; 337 iobase = ca->ca_iobase; 338 ioh = ca->ca_ioh; 339 needioh = 0; 340 } else 341 #endif 342 return(0); /* This cannot happen */ 343 344 /* if it's in use as console, it's there. */ 345 if (iobase == comconsaddr && !comconsattached) 346 goto out; 347 348 if (needioh && bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) { 349 rv = 0; 350 goto out; 351 } 352 rv = comprobe1(iot, ioh, iobase); 353 if (needioh) 354 bus_space_unmap(iot, ioh, COM_NPORTS); 355 356 out: 357 #if NCOM_ISA 358 if (rv && !strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 359 struct isa_attach_args *ia = aux; 360 361 ia->ia_iosize = COM_NPORTS; 362 ia->ia_msize = 0; 363 } 364 #endif 365 return (rv); 366 } 367 368 void 369 comattach(parent, self, aux) 370 struct device *parent, *self; 371 void *aux; 372 { 373 struct com_softc *sc = (void *)self; 374 int iobase, irq; 375 bus_space_tag_t iot; 376 bus_space_handle_t ioh; 377 #ifdef COM_HAYESP 378 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 379 int *hayespp; 380 #endif 381 382 /* 383 * XXX should be broken out into functions for isa attach and 384 * XXX for commulti attach, with a helper function that contains 385 * XXX most of the interesting stuff. 386 */ 387 sc->sc_hwflags = 0; 388 sc->sc_swflags = 0; 389 #if NCOM_ISA 390 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 391 struct isa_attach_args *ia = aux; 392 393 /* 394 * We're living on an isa. 395 */ 396 iobase = ia->ia_iobase; 397 iot = ia->ia_iot; 398 if (iobase != comconsaddr) { 399 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 400 panic("comattach: io mapping failed"); 401 } else 402 ioh = comconsbah; 403 irq = ia->ia_irq; 404 } else 405 #endif 406 #if NCOM_COMMULTI 407 if (1) { 408 struct commulti_attach_args *ca = aux; 409 410 /* 411 * We're living on a commulti. 412 */ 413 iobase = ca->ca_iobase; 414 iot = ca->ca_iot; 415 ioh = ca->ca_ioh; 416 irq = IRQUNK; 417 418 if (ca->ca_noien) 419 sc->sc_hwflags |= COM_HW_NOIEN; 420 } else 421 #endif 422 panic("comattach: impossible"); 423 424 sc->sc_iot = iot; 425 sc->sc_ioh = ioh; 426 sc->sc_iobase = iobase; 427 428 if (iobase == comconsaddr) { 429 comconsattached = 1; 430 431 /* Make sure the console is always "hardwired". */ 432 delay(1000); /* wait for output to finish */ 433 SET(sc->sc_hwflags, COM_HW_CONSOLE); 434 SET(sc->sc_swflags, COM_SW_SOFTCAR); 435 } 436 437 #ifdef COM_HAYESP 438 /* Look for a Hayes ESP board. */ 439 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 440 bus_space_handle_t hayespioh; 441 442 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 443 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 444 continue; 445 if (comprobeHAYESP(hayespioh, sc)) { 446 sc->sc_hayespbase = *hayespp; 447 sc->sc_hayespioh = hayespioh; 448 break; 449 } 450 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 451 } 452 /* No ESP; look for other things. */ 453 if (*hayespp == 0) { 454 #endif 455 456 /* look for a NS 16550AF UART with FIFOs */ 457 bus_space_write_1(iot, ioh, com_fifo, 458 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 459 delay(100); 460 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK) 461 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) { 462 SET(sc->sc_hwflags, COM_HW_FIFO); 463 printf(": ns16550a, working fifo\n"); 464 } else 465 printf(": ns16550, broken fifo\n"); 466 else 467 printf(": ns8250 or ns16450, no fifo\n"); 468 bus_space_write_1(iot, ioh, com_fifo, 0); 469 #ifdef COM_HAYESP 470 } 471 #endif 472 473 /* disable interrupts */ 474 bus_space_write_1(iot, ioh, com_ier, 0); 475 bus_space_write_1(iot, ioh, com_mcr, 0); 476 477 if (irq != IRQUNK) { 478 #if NCOM_ISA 479 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 480 struct isa_attach_args *ia = aux; 481 482 sc->sc_ih = isa_intr_establish(ia->ia_ic, irq, 483 IST_EDGE, IPL_TTY, comintr, sc); 484 } else 485 #endif 486 panic("comattach: IRQ but can't have one"); 487 } 488 489 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 490 cominit(iot, ioh, comdefaultrate); 491 printf("%s: console\n", sc->sc_dev.dv_xname); 492 } 493 494 #ifdef KGDB 495 if (kgdb_dev == makedev(commajor, unit)) { 496 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 497 kgdb_dev = -1; /* can't debug over console port */ 498 else { 499 cominit(iot, ioh, kgdb_rate); 500 if (kgdb_debug_init) { 501 /* 502 * Print prefix of device name, 503 * let kgdb_connect print the rest. 504 */ 505 printf("%s: ", sc->sc_dev.dv_xname); 506 kgdb_connect(1); 507 } else 508 printf("%s: kgdb enabled\n", 509 sc->sc_dev.dv_xname); 510 } 511 } 512 #endif 513 } 514 515 int 516 comopen(dev, flag, mode, p) 517 dev_t dev; 518 int flag, mode; 519 struct proc *p; 520 { 521 int unit = COMUNIT(dev); 522 struct com_softc *sc; 523 bus_space_tag_t iot; 524 bus_space_handle_t ioh; 525 struct tty *tp; 526 int s; 527 int error = 0; 528 529 if (unit >= com_cd.cd_ndevs) 530 return ENXIO; 531 sc = com_cd.cd_devs[unit]; 532 if (!sc) 533 return ENXIO; 534 535 if (!sc->sc_tty) { 536 tp = sc->sc_tty = ttymalloc(); 537 tty_attach(tp); 538 } else 539 tp = sc->sc_tty; 540 541 tp->t_oproc = comstart; 542 tp->t_param = comparam; 543 tp->t_dev = dev; 544 if (!ISSET(tp->t_state, TS_ISOPEN)) { 545 SET(tp->t_state, TS_WOPEN); 546 ttychars(tp); 547 tp->t_iflag = TTYDEF_IFLAG; 548 tp->t_oflag = TTYDEF_OFLAG; 549 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 550 tp->t_cflag = comconscflag; 551 else 552 tp->t_cflag = TTYDEF_CFLAG; 553 if (ISSET(sc->sc_swflags, COM_SW_CLOCAL)) 554 SET(tp->t_cflag, CLOCAL); 555 if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS)) 556 SET(tp->t_cflag, CRTSCTS); 557 if (ISSET(sc->sc_swflags, COM_SW_MDMBUF)) 558 SET(tp->t_cflag, MDMBUF); 559 tp->t_lflag = TTYDEF_LFLAG; 560 tp->t_ispeed = tp->t_ospeed = comdefaultrate; 561 562 s = spltty(); 563 564 comparam(tp, &tp->t_termios); 565 ttsetwater(tp); 566 567 if (comsopen++ == 0) 568 timeout(comsoft, NULL, 1); 569 570 sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0]; 571 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 572 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 573 574 iot = sc->sc_iot; 575 ioh = sc->sc_ioh; 576 #ifdef COM_HAYESP 577 /* Setup the ESP board */ 578 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 579 bus_space_handle_t hayespioh = sc->sc_hayespioh; 580 581 bus_space_write_1(iot, ioh, com_fifo, 582 FIFO_DMA_MODE|FIFO_ENABLE| 583 FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8); 584 585 /* Set 16550 compatibility mode */ 586 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 587 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 588 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 589 HAYESP_MODE_SCALE); 590 591 /* Set RTS/CTS flow control */ 592 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 593 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 594 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 595 596 /* Set flow control levels */ 597 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 598 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 599 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 600 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 601 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 602 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 603 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 604 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 605 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 606 } else 607 #endif 608 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 609 /* Set the FIFO threshold based on the receive speed. */ 610 bus_space_write_1(iot, ioh, com_fifo, 611 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | 612 (tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 613 /* flush any pending I/O */ 614 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 615 (void) bus_space_read_1(iot, ioh, com_data); 616 /* you turn me on, baby */ 617 sc->sc_mcr = MCR_DTR | MCR_RTS; 618 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 619 SET(sc->sc_mcr, MCR_IENABLE); 620 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 621 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 622 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 623 624 sc->sc_msr = bus_space_read_1(iot, ioh, com_msr); 625 if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || 626 ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF)) 627 SET(tp->t_state, TS_CARR_ON); 628 else 629 CLR(tp->t_state, TS_CARR_ON); 630 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) 631 return EBUSY; 632 else 633 s = spltty(); 634 635 /* wait for carrier if necessary */ 636 if (!ISSET(flag, O_NONBLOCK)) 637 while (!ISSET(tp->t_cflag, CLOCAL) && 638 !ISSET(tp->t_state, TS_CARR_ON)) { 639 SET(tp->t_state, TS_WOPEN); 640 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 641 ttopen, 0); 642 if (error) { 643 /* XXX should turn off chip if we're the 644 only waiter */ 645 splx(s); 646 return error; 647 } 648 } 649 splx(s); 650 651 return (*linesw[tp->t_line].l_open)(dev, tp); 652 } 653 654 int 655 comclose(dev, flag, mode, p) 656 dev_t dev; 657 int flag, mode; 658 struct proc *p; 659 { 660 int unit = COMUNIT(dev); 661 struct com_softc *sc = com_cd.cd_devs[unit]; 662 struct tty *tp = sc->sc_tty; 663 bus_space_tag_t iot = sc->sc_iot; 664 bus_space_handle_t ioh = sc->sc_ioh; 665 int s; 666 667 /* XXX This is for cons.c. */ 668 if (!ISSET(tp->t_state, TS_ISOPEN)) 669 return 0; 670 671 (*linesw[tp->t_line].l_close)(tp, flag); 672 s = spltty(); 673 CLR(sc->sc_lcr, LCR_SBREAK); 674 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 675 bus_space_write_1(iot, ioh, com_ier, 0); 676 if (ISSET(tp->t_cflag, HUPCL) && 677 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) { 678 /* XXX perhaps only clear DTR */ 679 bus_space_write_1(iot, ioh, com_mcr, 0); 680 bus_space_write_1(iot, ioh, com_fifo, 681 FIFO_RCV_RST | FIFO_XMT_RST); 682 } 683 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 684 if (--comsopen == 0) 685 untimeout(comsoft, NULL); 686 splx(s); 687 ttyclose(tp); 688 #ifdef notyet /* XXXX */ 689 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 690 ttyfree(tp); 691 sc->sc_tty = 0; 692 } 693 #endif 694 return 0; 695 } 696 697 int 698 comread(dev, uio, flag) 699 dev_t dev; 700 struct uio *uio; 701 int flag; 702 { 703 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 704 struct tty *tp = sc->sc_tty; 705 706 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 707 } 708 709 int 710 comwrite(dev, uio, flag) 711 dev_t dev; 712 struct uio *uio; 713 int flag; 714 { 715 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 716 struct tty *tp = sc->sc_tty; 717 718 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 719 } 720 721 struct tty * 722 comtty(dev) 723 dev_t dev; 724 { 725 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 726 struct tty *tp = sc->sc_tty; 727 728 return (tp); 729 } 730 731 static u_char 732 tiocm_xxx2mcr(data) 733 int data; 734 { 735 u_char m = 0; 736 737 if (ISSET(data, TIOCM_DTR)) 738 SET(m, MCR_DTR); 739 if (ISSET(data, TIOCM_RTS)) 740 SET(m, MCR_RTS); 741 return m; 742 } 743 744 int 745 comioctl(dev, cmd, data, flag, p) 746 dev_t dev; 747 u_long cmd; 748 caddr_t data; 749 int flag; 750 struct proc *p; 751 { 752 int unit = COMUNIT(dev); 753 struct com_softc *sc = com_cd.cd_devs[unit]; 754 struct tty *tp = sc->sc_tty; 755 bus_space_tag_t iot = sc->sc_iot; 756 bus_space_handle_t ioh = sc->sc_ioh; 757 int error; 758 759 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 760 if (error >= 0) 761 return error; 762 error = ttioctl(tp, cmd, data, flag, p); 763 if (error >= 0) 764 return error; 765 766 switch (cmd) { 767 case TIOCSBRK: 768 SET(sc->sc_lcr, LCR_SBREAK); 769 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 770 break; 771 case TIOCCBRK: 772 CLR(sc->sc_lcr, LCR_SBREAK); 773 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 774 break; 775 case TIOCSDTR: 776 SET(sc->sc_mcr, sc->sc_dtr); 777 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 778 break; 779 case TIOCCDTR: 780 CLR(sc->sc_mcr, sc->sc_dtr); 781 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 782 break; 783 case TIOCMSET: 784 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 785 case TIOCMBIS: 786 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 787 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 788 break; 789 case TIOCMBIC: 790 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 791 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 792 break; 793 case TIOCMGET: { 794 u_char m; 795 int bits = 0; 796 797 m = sc->sc_mcr; 798 if (ISSET(m, MCR_DTR)) 799 SET(bits, TIOCM_DTR); 800 if (ISSET(m, MCR_RTS)) 801 SET(bits, TIOCM_RTS); 802 m = sc->sc_msr; 803 if (ISSET(m, MSR_DCD)) 804 SET(bits, TIOCM_CD); 805 if (ISSET(m, MSR_CTS)) 806 SET(bits, TIOCM_CTS); 807 if (ISSET(m, MSR_DSR)) 808 SET(bits, TIOCM_DSR); 809 if (ISSET(m, MSR_RI | MSR_TERI)) 810 SET(bits, TIOCM_RI); 811 if (bus_space_read_1(iot, ioh, com_ier)) 812 SET(bits, TIOCM_LE); 813 *(int *)data = bits; 814 break; 815 } 816 case TIOCGFLAGS: { 817 int driverbits, userbits = 0; 818 819 driverbits = sc->sc_swflags; 820 if (ISSET(driverbits, COM_SW_SOFTCAR)) 821 SET(userbits, TIOCFLAG_SOFTCAR); 822 if (ISSET(driverbits, COM_SW_CLOCAL)) 823 SET(userbits, TIOCFLAG_CLOCAL); 824 if (ISSET(driverbits, COM_SW_CRTSCTS)) 825 SET(userbits, TIOCFLAG_CRTSCTS); 826 if (ISSET(driverbits, COM_SW_MDMBUF)) 827 SET(userbits, TIOCFLAG_MDMBUF); 828 829 *(int *)data = userbits; 830 break; 831 } 832 case TIOCSFLAGS: { 833 int userbits, driverbits = 0; 834 835 error = suser(p->p_ucred, &p->p_acflag); 836 if (error != 0) 837 return(EPERM); 838 839 userbits = *(int *)data; 840 if (ISSET(userbits, TIOCFLAG_SOFTCAR) || 841 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 842 SET(driverbits, COM_SW_SOFTCAR); 843 if (ISSET(userbits, TIOCFLAG_CLOCAL)) 844 SET(driverbits, COM_SW_CLOCAL); 845 if (ISSET(userbits, TIOCFLAG_CRTSCTS)) 846 SET(driverbits, COM_SW_CRTSCTS); 847 if (ISSET(userbits, TIOCFLAG_MDMBUF)) 848 SET(driverbits, COM_SW_MDMBUF); 849 850 sc->sc_swflags = driverbits; 851 break; 852 } 853 default: 854 return ENOTTY; 855 } 856 857 return 0; 858 } 859 860 int 861 comparam(tp, t) 862 struct tty *tp; 863 struct termios *t; 864 { 865 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 866 bus_space_tag_t iot = sc->sc_iot; 867 bus_space_handle_t ioh = sc->sc_ioh; 868 int ospeed = comspeed(t->c_ospeed); 869 u_char lcr; 870 tcflag_t oldcflag; 871 int s; 872 873 /* check requested parameters */ 874 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed)) 875 return EINVAL; 876 877 lcr = ISSET(sc->sc_lcr, LCR_SBREAK); 878 879 switch (ISSET(t->c_cflag, CSIZE)) { 880 case CS5: 881 SET(lcr, LCR_5BITS); 882 break; 883 case CS6: 884 SET(lcr, LCR_6BITS); 885 break; 886 case CS7: 887 SET(lcr, LCR_7BITS); 888 break; 889 case CS8: 890 SET(lcr, LCR_8BITS); 891 break; 892 } 893 if (ISSET(t->c_cflag, PARENB)) { 894 SET(lcr, LCR_PENAB); 895 if (!ISSET(t->c_cflag, PARODD)) 896 SET(lcr, LCR_PEVEN); 897 } 898 if (ISSET(t->c_cflag, CSTOPB)) 899 SET(lcr, LCR_STOPB); 900 901 sc->sc_lcr = lcr; 902 903 s = spltty(); 904 905 if (ospeed == 0) { 906 CLR(sc->sc_mcr, MCR_DTR); 907 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 908 } 909 910 /* 911 * Set the FIFO threshold based on the receive speed, if we are 912 * changing it. 913 */ 914 #if 0 915 if (tp->t_ispeed != t->c_ispeed) { 916 #else 917 if (1) { 918 #endif 919 if (ospeed != 0) { 920 /* 921 * Make sure the transmit FIFO is empty before 922 * proceeding. If we don't do this, some revisions 923 * of the UART will hang. Interestingly enough, 924 * even if we do this will the last character is 925 * still being pushed out, they don't hang. This 926 * seems good enough. 927 */ 928 while (ISSET(tp->t_state, TS_BUSY)) { 929 int error; 930 931 ++sc->sc_halt; 932 error = ttysleep(tp, &tp->t_outq, 933 TTOPRI | PCATCH, "comprm", 0); 934 --sc->sc_halt; 935 if (error) { 936 splx(s); 937 comstart(tp); 938 return (error); 939 } 940 } 941 942 bus_space_write_1(iot, ioh, com_lcr, lcr | LCR_DLAB); 943 bus_space_write_1(iot, ioh, com_dlbl, ospeed); 944 bus_space_write_1(iot, ioh, com_dlbh, ospeed >> 8); 945 bus_space_write_1(iot, ioh, com_lcr, lcr); 946 SET(sc->sc_mcr, MCR_DTR); 947 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 948 } else 949 bus_space_write_1(iot, ioh, com_lcr, lcr); 950 951 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP) && 952 ISSET(sc->sc_hwflags, COM_HW_FIFO)) 953 bus_space_write_1(iot, ioh, com_fifo, 954 FIFO_ENABLE | 955 (t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 956 } else 957 bus_space_write_1(iot, ioh, com_lcr, lcr); 958 959 /* When not using CRTSCTS, RTS follows DTR. */ 960 if (!ISSET(t->c_cflag, CRTSCTS)) { 961 if (ISSET(sc->sc_mcr, MCR_DTR)) { 962 if (!ISSET(sc->sc_mcr, MCR_RTS)) { 963 SET(sc->sc_mcr, MCR_RTS); 964 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 965 } 966 } else { 967 if (ISSET(sc->sc_mcr, MCR_RTS)) { 968 CLR(sc->sc_mcr, MCR_RTS); 969 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 970 } 971 } 972 sc->sc_dtr = MCR_DTR | MCR_RTS; 973 } else 974 sc->sc_dtr = MCR_DTR; 975 976 /* and copy to tty */ 977 tp->t_ispeed = t->c_ispeed; 978 tp->t_ospeed = t->c_ospeed; 979 oldcflag = tp->t_cflag; 980 tp->t_cflag = t->c_cflag; 981 982 /* 983 * If DCD is off and MDMBUF is changed, ask the tty layer if we should 984 * stop the device. 985 */ 986 if (!ISSET(sc->sc_msr, MSR_DCD) && 987 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 988 ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) && 989 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) { 990 CLR(sc->sc_mcr, sc->sc_dtr); 991 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 992 } 993 994 /* Just to be sure... */ 995 splx(s); 996 comstart(tp); 997 return 0; 998 } 999 1000 void 1001 comstart(tp) 1002 struct tty *tp; 1003 { 1004 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1005 bus_space_tag_t iot = sc->sc_iot; 1006 bus_space_handle_t ioh = sc->sc_ioh; 1007 int s; 1008 1009 s = spltty(); 1010 if (ISSET(tp->t_state, TS_BUSY)) 1011 goto out; 1012 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP) || 1013 sc->sc_halt > 0) 1014 goto stopped; 1015 if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS)) 1016 goto stopped; 1017 if (tp->t_outq.c_cc <= tp->t_lowat) { 1018 if (ISSET(tp->t_state, TS_ASLEEP)) { 1019 CLR(tp->t_state, TS_ASLEEP); 1020 wakeup(&tp->t_outq); 1021 } 1022 if (tp->t_outq.c_cc == 0) 1023 goto stopped; 1024 selwakeup(&tp->t_wsel); 1025 } 1026 SET(tp->t_state, TS_BUSY); 1027 1028 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1029 SET(sc->sc_ier, IER_ETXRDY); 1030 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1031 } 1032 #ifdef COM_HAYESP 1033 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1034 u_char buffer[1024], *cp = buffer; 1035 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1036 do 1037 bus_space_write_1(iot, ioh, com_data, *cp++); 1038 while (--n); 1039 } 1040 else 1041 #endif 1042 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) { 1043 u_char buffer[16], *cp = buffer; 1044 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1045 do { 1046 bus_space_write_1(iot, ioh, com_data, *cp++); 1047 } while (--n); 1048 } else 1049 bus_space_write_1(iot, ioh, com_data, getc(&tp->t_outq)); 1050 out: 1051 splx(s); 1052 return; 1053 stopped: 1054 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1055 CLR(sc->sc_ier, IER_ETXRDY); 1056 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1057 } 1058 splx(s); 1059 } 1060 1061 /* 1062 * Stop output on a line. 1063 */ 1064 void 1065 comstop(tp, flag) 1066 struct tty *tp; 1067 int flag; 1068 { 1069 int s; 1070 1071 s = spltty(); 1072 if (ISSET(tp->t_state, TS_BUSY)) 1073 if (!ISSET(tp->t_state, TS_TTSTOP)) 1074 SET(tp->t_state, TS_FLUSH); 1075 splx(s); 1076 } 1077 1078 void 1079 comdiag(arg) 1080 void *arg; 1081 { 1082 struct com_softc *sc = arg; 1083 int overflows, floods, failures; 1084 int s; 1085 1086 s = spltty(); 1087 sc->sc_errors = 0; 1088 overflows = sc->sc_overflows; 1089 sc->sc_overflows = 0; 1090 floods = sc->sc_floods; 1091 sc->sc_floods = 0; 1092 failures = sc->sc_failures; 1093 sc->sc_failures = 0; 1094 splx(s); 1095 1096 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf overflow%s, %d uart failure%s\n", 1097 sc->sc_dev.dv_xname, 1098 overflows, overflows == 1 ? "" : "s", 1099 floods, floods == 1 ? "" : "s", 1100 failures, failures == 1 ? "" : "s"); 1101 } 1102 1103 void 1104 comsoft(arg) 1105 void *arg; 1106 { 1107 int unit; 1108 struct com_softc *sc; 1109 struct tty *tp; 1110 register u_char *ibufp; 1111 u_char *ibufend; 1112 register int c; 1113 int s; 1114 static int lsrmap[8] = { 1115 0, TTY_PE, 1116 TTY_FE, TTY_PE|TTY_FE, 1117 TTY_FE, TTY_PE|TTY_FE, 1118 TTY_FE, TTY_PE|TTY_FE 1119 }; 1120 1121 s = spltty(); 1122 if (comevents == 0) { 1123 splx(s); 1124 goto out; 1125 } 1126 comevents = 0; 1127 splx(s); 1128 1129 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1130 sc = com_cd.cd_devs[unit]; 1131 if (sc == 0 || sc->sc_ibufp == sc->sc_ibuf) 1132 continue; 1133 1134 tp = sc->sc_tty; 1135 1136 s = spltty(); 1137 1138 ibufp = sc->sc_ibuf; 1139 ibufend = sc->sc_ibufp; 1140 1141 if (ibufp == ibufend) { 1142 splx(s); 1143 continue; 1144 } 1145 1146 sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ? 1147 sc->sc_ibufs[1] : sc->sc_ibufs[0]; 1148 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 1149 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 1150 1151 if (tp == 0 || !ISSET(tp->t_state, TS_ISOPEN)) { 1152 splx(s); 1153 continue; 1154 } 1155 1156 if (ISSET(tp->t_cflag, CRTSCTS) && 1157 !ISSET(sc->sc_mcr, MCR_RTS)) { 1158 /* XXX */ 1159 SET(sc->sc_mcr, MCR_RTS); 1160 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, 1161 sc->sc_mcr); 1162 } 1163 1164 splx(s); 1165 1166 while (ibufp < ibufend) { 1167 c = *ibufp++; 1168 if (*ibufp & LSR_OE) { 1169 sc->sc_overflows++; 1170 if (sc->sc_errors++ == 0) 1171 timeout(comdiag, sc, 60 * hz); 1172 } 1173 /* This is ugly, but fast. */ 1174 c |= lsrmap[(*ibufp++ & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1175 (*linesw[tp->t_line].l_rint)(c, tp); 1176 } 1177 } 1178 1179 out: 1180 timeout(comsoft, NULL, 1); 1181 } 1182 1183 int 1184 comintr(arg) 1185 void *arg; 1186 { 1187 struct com_softc *sc = arg; 1188 bus_space_tag_t iot = sc->sc_iot; 1189 bus_space_handle_t ioh = sc->sc_ioh; 1190 struct tty *tp; 1191 u_char iir, lsr, data, msr, delta; 1192 #ifdef COM_DEBUG 1193 int n; 1194 struct { 1195 u_char iir, lsr, msr; 1196 } iter[32]; 1197 #endif 1198 1199 #ifdef COM_DEBUG 1200 n = 0; 1201 iter[n].iir = 1202 #endif 1203 iir = bus_space_read_1(iot, ioh, com_iir); 1204 if (ISSET(iir, IIR_NOPEND)) 1205 return (0); 1206 1207 tp = sc->sc_tty; 1208 1209 for (;;) { 1210 #ifdef COM_DEBUG 1211 iter[n].lsr = 1212 #endif 1213 lsr = bus_space_read_1(iot, ioh, com_lsr); 1214 1215 if (ISSET(lsr, LSR_RXRDY)) { 1216 register u_char *p = sc->sc_ibufp; 1217 1218 comevents = 1; 1219 do { 1220 data = bus_space_read_1(iot, ioh, com_data); 1221 if (ISSET(lsr, LSR_BI)) { 1222 #ifdef notdef 1223 printf("break %02x %02x %02x %02x\n", 1224 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, 1225 sc->sc_dtr); 1226 #endif 1227 #ifdef DDB 1228 if (ISSET(sc->sc_hwflags, 1229 COM_HW_CONSOLE)) { 1230 Debugger(); 1231 goto next; 1232 } 1233 #endif 1234 } 1235 if (p >= sc->sc_ibufend) { 1236 sc->sc_floods++; 1237 if (sc->sc_errors++ == 0) 1238 timeout(comdiag, sc, 60 * hz); 1239 } else { 1240 *p++ = data; 1241 *p++ = lsr; 1242 if (p == sc->sc_ibufhigh && 1243 ISSET(tp->t_cflag, CRTSCTS)) { 1244 /* XXX */ 1245 CLR(sc->sc_mcr, MCR_RTS); 1246 bus_space_write_1(iot, ioh, 1247 com_mcr, sc->sc_mcr); 1248 } 1249 } 1250 #ifdef DDB 1251 next: 1252 #endif 1253 #ifdef COM_DEBUG 1254 if (++n >= 32) 1255 goto ohfudge; 1256 iter[n].lsr = 1257 #endif 1258 lsr = bus_space_read_1(iot, ioh, com_lsr); 1259 } while (ISSET(lsr, LSR_RXRDY)); 1260 1261 sc->sc_ibufp = p; 1262 } else { 1263 #ifdef COM_DEBUG 1264 if (ISSET(lsr, LSR_BI|LSR_FE|LSR_PE|LSR_OE)) 1265 printf("weird lsr %02x\n", lsr); 1266 #endif 1267 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1268 sc->sc_failures++; 1269 if (sc->sc_errors++ == 0) 1270 timeout(comdiag, sc, 60 * hz); 1271 bus_space_write_1(iot, ioh, com_ier, 0); 1272 delay(10); 1273 bus_space_write_1(iot, ioh, com_ier, 1274 sc->sc_ier); 1275 iir = IIR_NOPEND; 1276 continue; 1277 } 1278 } 1279 1280 #ifdef COM_DEBUG 1281 iter[n].msr = 1282 #endif 1283 msr = bus_space_read_1(iot, ioh, com_msr); 1284 1285 if (msr != sc->sc_msr) { 1286 delta = msr ^ sc->sc_msr; 1287 sc->sc_msr = msr; 1288 if (ISSET(delta, MSR_DCD) && 1289 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 1290 (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) { 1291 CLR(sc->sc_mcr, sc->sc_dtr); 1292 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 1293 } 1294 if (ISSET(delta & msr, MSR_CTS) && 1295 ISSET(tp->t_cflag, CRTSCTS)) { 1296 /* the line is up and we want to do rts/cts flow control */ 1297 (*linesw[tp->t_line].l_start)(tp); 1298 } 1299 } 1300 1301 if (ISSET(lsr, LSR_TXRDY) && ISSET(tp->t_state, TS_BUSY)) { 1302 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 1303 if (sc->sc_halt > 0) 1304 wakeup(&tp->t_outq); 1305 (*linesw[tp->t_line].l_start)(tp); 1306 } 1307 1308 #ifdef COM_DEBUG 1309 if (++n >= 32) 1310 goto ohfudge; 1311 iter[n].iir = 1312 #endif 1313 iir = bus_space_read_1(iot, ioh, com_iir); 1314 if (ISSET(iir, IIR_NOPEND)) 1315 return (1); 1316 } 1317 1318 #ifdef COM_DEBUG 1319 ohfudge: 1320 printf("comintr: too many iterations"); 1321 for (n = 0; n < 32; n++) { 1322 if ((n % 4) == 0) 1323 printf("\ncomintr: iter[%02d]", n); 1324 printf(" %02x %02x %02x", iter[n].iir, iter[n].lsr, iter[n].msr); 1325 } 1326 printf("\n"); 1327 printf("comintr: msr %02x mcr %02x lcr %02x ier %02x\n", 1328 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, sc->sc_ier); 1329 printf("comintr: state %08x cc %d\n", sc->sc_tty->t_state, 1330 sc->sc_tty->t_outq.c_cc); 1331 return (1); 1332 #endif 1333 } 1334 1335 /* 1336 * Following are all routines needed for COM to act as console 1337 */ 1338 #include <dev/cons.h> 1339 1340 void 1341 comcnprobe(cp) 1342 struct consdev *cp; 1343 { 1344 /* XXX NEEDS TO BE FIXED XXX */ 1345 bus_space_tag_t iot = 0; 1346 bus_space_handle_t ioh; 1347 int found; 1348 1349 if (bus_space_map(iot, CONADDR, COM_NPORTS, 0, &ioh)) { 1350 cp->cn_pri = CN_DEAD; 1351 return; 1352 } 1353 found = comprobe1(iot, ioh, CONADDR); 1354 bus_space_unmap(iot, ioh, COM_NPORTS); 1355 if (!found) { 1356 cp->cn_pri = CN_DEAD; 1357 return; 1358 } 1359 1360 /* locate the major number */ 1361 for (commajor = 0; commajor < nchrdev; commajor++) 1362 if (cdevsw[commajor].d_open == comopen) 1363 break; 1364 1365 /* initialize required fields */ 1366 cp->cn_dev = makedev(commajor, CONUNIT); 1367 #ifdef COMCONSOLE 1368 cp->cn_pri = CN_REMOTE; /* Force a serial port console */ 1369 #else 1370 cp->cn_pri = CN_NORMAL; 1371 #endif 1372 } 1373 1374 void 1375 comcninit(cp) 1376 struct consdev *cp; 1377 { 1378 1379 #if 0 1380 XXX NEEDS TO BE FIXED XXX 1381 comconstag = ???; 1382 #endif 1383 if (bus_space_map(comconstag, CONADDR, COM_NPORTS, 0, &comconsbah)) 1384 panic("comcninit: mapping failed"); 1385 1386 cominit(comconstag, comconsbah, comdefaultrate); 1387 comconsaddr = CONADDR; 1388 } 1389 1390 void 1391 cominit(iot, ioh, rate) 1392 bus_space_tag_t iot; 1393 bus_space_handle_t ioh; 1394 int rate; 1395 { 1396 int s = splhigh(); 1397 u_char stat; 1398 1399 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1400 rate = comspeed(comdefaultrate); 1401 bus_space_write_1(iot, ioh, com_dlbl, rate); 1402 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1403 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 1404 bus_space_write_1(iot, ioh, com_ier, IER_ERXRDY | IER_ETXRDY); 1405 bus_space_write_1(iot, ioh, com_fifo, 1406 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1407 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 1408 DELAY(100); 1409 stat = bus_space_read_1(iot, ioh, com_iir); 1410 splx(s); 1411 } 1412 1413 int 1414 comcngetc(dev) 1415 dev_t dev; 1416 { 1417 int s = splhigh(); 1418 bus_space_tag_t iot = comconstag; 1419 bus_space_handle_t ioh = comconsbah; 1420 u_char stat, c; 1421 1422 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1423 ; 1424 c = bus_space_read_1(iot, ioh, com_data); 1425 stat = bus_space_read_1(iot, ioh, com_iir); 1426 splx(s); 1427 return c; 1428 } 1429 1430 /* 1431 * Console kernel output character routine. 1432 */ 1433 void 1434 comcnputc(dev, c) 1435 dev_t dev; 1436 int c; 1437 { 1438 int s = splhigh(); 1439 bus_space_tag_t iot = comconstag; 1440 bus_space_handle_t ioh = comconsbah; 1441 u_char stat; 1442 register int timo; 1443 1444 /* wait for any pending transmission to finish */ 1445 timo = 50000; 1446 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 1447 ; 1448 bus_space_write_1(iot, ioh, com_data, c); 1449 /* wait for this transmission to complete */ 1450 timo = 1500000; 1451 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 1452 ; 1453 /* clear any interrupts generated by this transmission */ 1454 stat = bus_space_read_1(iot, ioh, com_iir); 1455 splx(s); 1456 } 1457 1458 void 1459 comcnpollc(dev, on) 1460 dev_t dev; 1461 int on; 1462 { 1463 1464 } 1465
Indexes created Wed Sep 24 05:09:52 GMT 2025