com.c revision 1.98
1 /* $NetBSD: com.c,v 1.98 1997/04/04 20:49:49 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996 5 * Charles M. Hannum. All rights reserved. 6 * Copyright (c) 1991 The Regents of the University of California. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)com.c 7.5 (Berkeley) 5/16/91 38 */ 39 40 /* 41 * COM driver, based on HP dca driver 42 * uses National Semiconductor NS16450/NS16550AF UART 43 */ 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/tty.h> 49 #include <sys/proc.h> 50 #include <sys/user.h> 51 #include <sys/conf.h> 52 #include <sys/file.h> 53 #include <sys/uio.h> 54 #include <sys/kernel.h> 55 #include <sys/syslog.h> 56 #include <sys/types.h> 57 #include <sys/device.h> 58 59 #include <machine/bus.h> 60 #include <machine/intr.h> 61 62 #include <dev/isa/isavar.h> 63 #include <dev/isa/comreg.h> 64 #include <dev/isa/comvar.h> 65 #include <dev/ic/ns16550reg.h> 66 #ifdef COM_HAYESP 67 #include <dev/ic/hayespreg.h> 68 #endif 69 #define com_lcr com_cfcr 70 71 #include "com.h" 72 73 74 #define COM_IBUFSIZE (2 * 512) 75 #define COM_IHIGHWATER ((3 * COM_IBUFSIZE) / 4) 76 77 struct com_softc { 78 struct device sc_dev; 79 void *sc_ih; 80 struct tty *sc_tty; 81 82 int sc_overflows; 83 int sc_floods; 84 int sc_failures; 85 int sc_errors; 86 87 int sc_halt; 88 89 int sc_iobase; 90 #ifdef COM_HAYESP 91 int sc_hayespbase; 92 #endif 93 94 bus_space_tag_t sc_iot; 95 bus_space_handle_t sc_ioh; 96 bus_space_handle_t sc_hayespioh; 97 98 u_char sc_hwflags; 99 #define COM_HW_NOIEN 0x01 100 #define COM_HW_FIFO 0x02 101 #define COM_HW_HAYESP 0x04 102 #define COM_HW_CONSOLE 0x40 103 u_char sc_swflags; 104 #define COM_SW_SOFTCAR 0x01 105 #define COM_SW_CLOCAL 0x02 106 #define COM_SW_CRTSCTS 0x04 107 #define COM_SW_MDMBUF 0x08 108 u_char sc_msr, sc_mcr, sc_lcr, sc_ier; 109 u_char sc_dtr; 110 111 u_char *sc_ibuf, *sc_ibufp, *sc_ibufhigh, *sc_ibufend; 112 u_char sc_ibufs[2][COM_IBUFSIZE]; 113 }; 114 115 #ifdef COM_HAYESP 116 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 117 #endif 118 void comdiag __P((void *)); 119 int comspeed __P((long)); 120 int comparam __P((struct tty *, struct termios *)); 121 void comstart __P((struct tty *)); 122 void comsoft __P((void *)); 123 124 /* XXX: These belong elsewhere */ 125 cdev_decl(com); 126 bdev_decl(com); 127 128 struct consdev; 129 void comcnprobe __P((struct consdev *)); 130 void comcninit __P((struct consdev *)); 131 int comcngetc __P((dev_t)); 132 void comcnputc __P((dev_t, int)); 133 void comcnpollc __P((dev_t, int)); 134 135 static u_char tiocm_xxx2mcr __P((int)); 136 137 /* 138 * XXX the following two cfattach structs should be different, and possibly 139 * XXX elsewhere. 140 */ 141 #ifdef __BROKEN_INDIRECT_CONFIG 142 int comprobe __P((struct device *, void *, void *)); 143 #else 144 int comprobe __P((struct device *, struct cfdata *, void *)); 145 #endif 146 void comattach __P((struct device *, struct device *, void *)); 147 148 #if NCOM_ISA 149 struct cfattach com_isa_ca = { 150 sizeof(struct com_softc), comprobe, comattach 151 }; 152 #endif 153 154 #if NCOM_COMMULTI 155 struct cfattach com_commulti_ca = { 156 sizeof(struct com_softc), comprobe, comattach 157 }; 158 #endif 159 160 struct cfdriver com_cd = { 161 NULL, "com", DV_TTY 162 }; 163 164 #ifdef COMCONSOLE 165 int comconsrate = CONSPEED; /* XXX why set default? */ 166 #else 167 int comconsrate = TTYDEF_SPEED; 168 #endif 169 int comconsaddr; 170 int comconsattached; 171 bus_space_tag_t comconstag; 172 bus_space_handle_t comconsioh; 173 tcflag_t comconscflag = TTYDEF_CFLAG; 174 175 int commajor; 176 int comsopen = 0; 177 int comevents = 0; 178 179 #ifdef KGDB 180 #include <machine/remote-sl.h> 181 extern int kgdb_dev; 182 extern int kgdb_rate; 183 extern int kgdb_debug_init; 184 #endif 185 186 #define COMUNIT(x) (minor(x)) 187 188 /* Macros to clear/set/test flags. */ 189 #define SET(t, f) (t) |= (f) 190 #define CLR(t, f) (t) &= ~(f) 191 #define ISSET(t, f) ((t) & (f)) 192 193 int 194 comspeed(speed) 195 long speed; 196 { 197 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 198 199 int x, err; 200 201 if (speed == 0) 202 return 0; 203 if (speed < 0) 204 return -1; 205 x = divrnd((COM_FREQ / 16), speed); 206 if (x <= 0) 207 return -1; 208 err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000; 209 if (err < 0) 210 err = -err; 211 if (err > COM_TOLERANCE) 212 return -1; 213 return x; 214 215 #undef divrnd(n, q) 216 } 217 218 int 219 comprobe1(iot, ioh, iobase) 220 bus_space_tag_t iot; 221 bus_space_handle_t ioh; 222 int iobase; 223 { 224 225 /* force access to id reg */ 226 bus_space_write_1(iot, ioh, com_lcr, 0); 227 bus_space_write_1(iot, ioh, com_iir, 0); 228 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 229 return 0; 230 231 return 1; 232 } 233 234 #ifdef COM_HAYESP 235 int 236 comprobeHAYESP(hayespioh, sc) 237 bus_space_handle_t hayespioh; 238 struct com_softc *sc; 239 { 240 char val, dips; 241 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 242 bus_space_tag_t iot = sc->sc_iot; 243 244 /* 245 * Hayes ESP cards have two iobases. One is for compatibility with 246 * 16550 serial chips, and at the same ISA PC base addresses. The 247 * other is for ESP-specific enhanced features, and lies at a 248 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 249 */ 250 251 /* Test for ESP signature */ 252 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 253 return 0; 254 255 /* 256 * ESP is present at ESP enhanced base address; unknown com port 257 */ 258 259 /* Get the dip-switch configurations */ 260 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 261 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 262 263 /* Determine which com port this ESP card services: bits 0,1 of */ 264 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 265 if (sc->sc_iobase != combaselist[dips & 0x03]) 266 return 0; 267 268 printf(": ESP"); 269 270 /* Check ESP Self Test bits. */ 271 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 272 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 273 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */ 274 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 275 if ((val & 0x70) < 0x20) { 276 printf("-old (%o)", val & 0x70); 277 /* we do not support the necessary features */ 278 return 0; 279 } 280 281 /* Check for ability to emulate 16550: bit 8 == 1 */ 282 if ((dips & 0x80) == 0) { 283 printf(" slave"); 284 /* XXX Does slave really mean no 16550 support?? */ 285 return 0; 286 } 287 288 /* 289 * If we made it this far, we are a full-featured ESP v2.0 (or 290 * better), at the correct com port address. 291 */ 292 293 SET(sc->sc_hwflags, COM_HW_HAYESP); 294 printf(", 1024 byte fifo\n"); 295 return 1; 296 } 297 #endif 298 299 int 300 comprobe(parent, match, aux) 301 struct device *parent; 302 #ifdef __BROKEN_INDIRECT_CONFIG 303 void *match; 304 #else 305 struct cfdata *match; 306 #endif 307 void *aux; 308 { 309 bus_space_tag_t iot; 310 bus_space_handle_t ioh; 311 int iobase, needioh; 312 int rv = 1; 313 314 /* 315 * XXX should be broken out into functions for isa probe and 316 * XXX for commulti probe, with a helper function that contains 317 * XXX most of the interesting stuff. 318 */ 319 #if NCOM_ISA 320 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 321 struct isa_attach_args *ia = aux; 322 323 iot = ia->ia_iot; 324 iobase = ia->ia_iobase; 325 needioh = 1; 326 } else 327 #endif 328 #if NCOM_COMMULTI 329 if (1) { 330 struct cfdata *cf = match; 331 struct commulti_attach_args *ca = aux; 332 333 if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != ca->ca_slave) 334 return (0); 335 336 iot = ca->ca_iot; 337 iobase = ca->ca_iobase; 338 ioh = ca->ca_ioh; 339 needioh = 0; 340 } else 341 #endif 342 return(0); /* This cannot happen */ 343 344 /* if it's in use as console, it's there. */ 345 if (iobase == comconsaddr && !comconsattached) 346 goto out; 347 348 if (needioh && bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) { 349 rv = 0; 350 goto out; 351 } 352 rv = comprobe1(iot, ioh, iobase); 353 if (needioh) 354 bus_space_unmap(iot, ioh, COM_NPORTS); 355 356 out: 357 #if NCOM_ISA 358 if (rv && !strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 359 struct isa_attach_args *ia = aux; 360 361 ia->ia_iosize = COM_NPORTS; 362 ia->ia_msize = 0; 363 } 364 #endif 365 return (rv); 366 } 367 368 void 369 comattach(parent, self, aux) 370 struct device *parent, *self; 371 void *aux; 372 { 373 struct com_softc *sc = (void *)self; 374 int iobase, irq; 375 bus_space_tag_t iot; 376 bus_space_handle_t ioh; 377 #ifdef COM_HAYESP 378 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 379 int *hayespp; 380 #endif 381 382 /* 383 * XXX should be broken out into functions for isa attach and 384 * XXX for commulti attach, with a helper function that contains 385 * XXX most of the interesting stuff. 386 */ 387 sc->sc_hwflags = 0; 388 sc->sc_swflags = 0; 389 #if NCOM_ISA 390 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 391 struct isa_attach_args *ia = aux; 392 393 /* 394 * We're living on an isa. 395 */ 396 iobase = ia->ia_iobase; 397 iot = ia->ia_iot; 398 if (iobase != comconsaddr) { 399 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 400 panic("comattach: io mapping failed"); 401 } else 402 ioh = comconsioh; 403 irq = ia->ia_irq; 404 } else 405 #endif 406 #if NCOM_COMMULTI 407 if (1) { 408 struct commulti_attach_args *ca = aux; 409 410 /* 411 * We're living on a commulti. 412 */ 413 iobase = ca->ca_iobase; 414 iot = ca->ca_iot; 415 ioh = ca->ca_ioh; 416 irq = IRQUNK; 417 418 if (ca->ca_noien) 419 sc->sc_hwflags |= COM_HW_NOIEN; 420 } else 421 #endif 422 panic("comattach: impossible"); 423 424 sc->sc_iot = iot; 425 sc->sc_ioh = ioh; 426 sc->sc_iobase = iobase; 427 428 if (iobase == comconsaddr) { 429 comconsattached = 1; 430 431 /* Make sure the console is always "hardwired". */ 432 delay(1000); /* wait for output to finish */ 433 SET(sc->sc_hwflags, COM_HW_CONSOLE); 434 SET(sc->sc_swflags, COM_SW_SOFTCAR); 435 } 436 437 #ifdef COM_HAYESP 438 /* Look for a Hayes ESP board. */ 439 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 440 bus_space_handle_t hayespioh; 441 442 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 443 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 444 continue; 445 if (comprobeHAYESP(hayespioh, sc)) { 446 sc->sc_hayespbase = *hayespp; 447 sc->sc_hayespioh = hayespioh; 448 break; 449 } 450 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 451 } 452 /* No ESP; look for other things. */ 453 if (*hayespp == 0) { 454 #endif 455 456 /* look for a NS 16550AF UART with FIFOs */ 457 bus_space_write_1(iot, ioh, com_fifo, 458 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 459 delay(100); 460 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK) 461 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) { 462 SET(sc->sc_hwflags, COM_HW_FIFO); 463 printf(": ns16550a, working fifo\n"); 464 } else 465 printf(": ns16550, broken fifo\n"); 466 else 467 printf(": ns8250 or ns16450, no fifo\n"); 468 bus_space_write_1(iot, ioh, com_fifo, 0); 469 #ifdef COM_HAYESP 470 } 471 #endif 472 473 /* disable interrupts */ 474 bus_space_write_1(iot, ioh, com_ier, 0); 475 bus_space_write_1(iot, ioh, com_mcr, 0); 476 477 if (irq != IRQUNK) { 478 #if NCOM_ISA 479 if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) { 480 struct isa_attach_args *ia = aux; 481 482 sc->sc_ih = isa_intr_establish(ia->ia_ic, irq, 483 IST_EDGE, IPL_TTY, comintr, sc); 484 } else 485 #endif 486 panic("comattach: IRQ but can't have one"); 487 } 488 489 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 490 cominit(iot, ioh, comconsrate); 491 printf("%s: console\n", sc->sc_dev.dv_xname); 492 } 493 494 #ifdef KGDB 495 if (kgdb_dev == makedev(commajor, unit)) { 496 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 497 kgdb_dev = -1; /* can't debug over console port */ 498 else { 499 cominit(iot, ioh, kgdb_rate); 500 if (kgdb_debug_init) { 501 /* 502 * Print prefix of device name, 503 * let kgdb_connect print the rest. 504 */ 505 printf("%s: ", sc->sc_dev.dv_xname); 506 kgdb_connect(1); 507 } else 508 printf("%s: kgdb enabled\n", 509 sc->sc_dev.dv_xname); 510 } 511 } 512 #endif 513 } 514 515 int 516 comopen(dev, flag, mode, p) 517 dev_t dev; 518 int flag, mode; 519 struct proc *p; 520 { 521 int unit = COMUNIT(dev); 522 struct com_softc *sc; 523 bus_space_tag_t iot; 524 bus_space_handle_t ioh; 525 struct tty *tp; 526 int s; 527 int error = 0; 528 529 if (unit >= com_cd.cd_ndevs) 530 return ENXIO; 531 sc = com_cd.cd_devs[unit]; 532 if (!sc) 533 return ENXIO; 534 535 if (!sc->sc_tty) { 536 tp = sc->sc_tty = ttymalloc(); 537 tty_attach(tp); 538 } else 539 tp = sc->sc_tty; 540 541 tp->t_oproc = comstart; 542 tp->t_param = comparam; 543 tp->t_dev = dev; 544 if (!ISSET(tp->t_state, TS_ISOPEN)) { 545 SET(tp->t_state, TS_WOPEN); 546 ttychars(tp); 547 tp->t_iflag = TTYDEF_IFLAG; 548 tp->t_oflag = TTYDEF_OFLAG; 549 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 550 tp->t_ispeed = tp->t_ospeed = comconsrate; 551 tp->t_cflag = comconscflag; 552 } else { 553 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 554 tp->t_cflag = TTYDEF_CFLAG; 555 } 556 if (ISSET(sc->sc_swflags, COM_SW_CLOCAL)) 557 SET(tp->t_cflag, CLOCAL); 558 if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS)) 559 SET(tp->t_cflag, CRTSCTS); 560 if (ISSET(sc->sc_swflags, COM_SW_MDMBUF)) 561 SET(tp->t_cflag, MDMBUF); 562 tp->t_lflag = TTYDEF_LFLAG; 563 564 s = spltty(); 565 566 comparam(tp, &tp->t_termios); 567 ttsetwater(tp); 568 569 if (comsopen++ == 0) 570 timeout(comsoft, NULL, 1); 571 572 sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0]; 573 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 574 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 575 576 iot = sc->sc_iot; 577 ioh = sc->sc_ioh; 578 #ifdef COM_HAYESP 579 /* Setup the ESP board */ 580 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 581 bus_space_handle_t hayespioh = sc->sc_hayespioh; 582 583 bus_space_write_1(iot, ioh, com_fifo, 584 FIFO_DMA_MODE|FIFO_ENABLE| 585 FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8); 586 587 /* Set 16550 compatibility mode */ 588 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 589 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 590 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 591 HAYESP_MODE_SCALE); 592 593 /* Set RTS/CTS flow control */ 594 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 595 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 596 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 597 598 /* Set flow control levels */ 599 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 600 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 601 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 602 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 603 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 604 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 605 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 606 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 607 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 608 } else 609 #endif 610 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 611 /* Set the FIFO threshold based on the receive speed. */ 612 bus_space_write_1(iot, ioh, com_fifo, 613 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | 614 (tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 615 /* flush any pending I/O */ 616 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 617 (void) bus_space_read_1(iot, ioh, com_data); 618 /* you turn me on, baby */ 619 sc->sc_mcr = MCR_DTR | MCR_RTS; 620 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 621 SET(sc->sc_mcr, MCR_IENABLE); 622 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 623 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 624 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 625 626 sc->sc_msr = bus_space_read_1(iot, ioh, com_msr); 627 if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || 628 ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF)) 629 SET(tp->t_state, TS_CARR_ON); 630 else 631 CLR(tp->t_state, TS_CARR_ON); 632 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) 633 return EBUSY; 634 else 635 s = spltty(); 636 637 /* wait for carrier if necessary */ 638 if (!ISSET(flag, O_NONBLOCK)) 639 while (!ISSET(tp->t_cflag, CLOCAL) && 640 !ISSET(tp->t_state, TS_CARR_ON)) { 641 SET(tp->t_state, TS_WOPEN); 642 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 643 ttopen, 0); 644 if (error) { 645 /* XXX should turn off chip if we're the 646 only waiter */ 647 splx(s); 648 return error; 649 } 650 } 651 splx(s); 652 653 return (*linesw[tp->t_line].l_open)(dev, tp); 654 } 655 656 int 657 comclose(dev, flag, mode, p) 658 dev_t dev; 659 int flag, mode; 660 struct proc *p; 661 { 662 int unit = COMUNIT(dev); 663 struct com_softc *sc = com_cd.cd_devs[unit]; 664 struct tty *tp = sc->sc_tty; 665 bus_space_tag_t iot = sc->sc_iot; 666 bus_space_handle_t ioh = sc->sc_ioh; 667 int s; 668 669 /* XXX This is for cons.c. */ 670 if (!ISSET(tp->t_state, TS_ISOPEN)) 671 return 0; 672 673 (*linesw[tp->t_line].l_close)(tp, flag); 674 s = spltty(); 675 CLR(sc->sc_lcr, LCR_SBREAK); 676 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 677 bus_space_write_1(iot, ioh, com_ier, 0); 678 if (ISSET(tp->t_cflag, HUPCL) && 679 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) { 680 /* XXX perhaps only clear DTR */ 681 bus_space_write_1(iot, ioh, com_mcr, 0); 682 bus_space_write_1(iot, ioh, com_fifo, 683 FIFO_RCV_RST | FIFO_XMT_RST); 684 } 685 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 686 if (--comsopen == 0) 687 untimeout(comsoft, NULL); 688 splx(s); 689 ttyclose(tp); 690 #ifdef notyet /* XXXX */ 691 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 692 ttyfree(tp); 693 sc->sc_tty = 0; 694 } 695 #endif 696 return 0; 697 } 698 699 int 700 comread(dev, uio, flag) 701 dev_t dev; 702 struct uio *uio; 703 int flag; 704 { 705 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 706 struct tty *tp = sc->sc_tty; 707 708 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 709 } 710 711 int 712 comwrite(dev, uio, flag) 713 dev_t dev; 714 struct uio *uio; 715 int flag; 716 { 717 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 718 struct tty *tp = sc->sc_tty; 719 720 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 721 } 722 723 struct tty * 724 comtty(dev) 725 dev_t dev; 726 { 727 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 728 struct tty *tp = sc->sc_tty; 729 730 return (tp); 731 } 732 733 static u_char 734 tiocm_xxx2mcr(data) 735 int data; 736 { 737 u_char m = 0; 738 739 if (ISSET(data, TIOCM_DTR)) 740 SET(m, MCR_DTR); 741 if (ISSET(data, TIOCM_RTS)) 742 SET(m, MCR_RTS); 743 return m; 744 } 745 746 int 747 comioctl(dev, cmd, data, flag, p) 748 dev_t dev; 749 u_long cmd; 750 caddr_t data; 751 int flag; 752 struct proc *p; 753 { 754 int unit = COMUNIT(dev); 755 struct com_softc *sc = com_cd.cd_devs[unit]; 756 struct tty *tp = sc->sc_tty; 757 bus_space_tag_t iot = sc->sc_iot; 758 bus_space_handle_t ioh = sc->sc_ioh; 759 int error; 760 761 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 762 if (error >= 0) 763 return error; 764 error = ttioctl(tp, cmd, data, flag, p); 765 if (error >= 0) 766 return error; 767 768 switch (cmd) { 769 case TIOCSBRK: 770 SET(sc->sc_lcr, LCR_SBREAK); 771 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 772 break; 773 case TIOCCBRK: 774 CLR(sc->sc_lcr, LCR_SBREAK); 775 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 776 break; 777 case TIOCSDTR: 778 SET(sc->sc_mcr, sc->sc_dtr); 779 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 780 break; 781 case TIOCCDTR: 782 CLR(sc->sc_mcr, sc->sc_dtr); 783 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 784 break; 785 case TIOCMSET: 786 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 787 case TIOCMBIS: 788 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 789 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 790 break; 791 case TIOCMBIC: 792 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 793 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 794 break; 795 case TIOCMGET: { 796 u_char m; 797 int bits = 0; 798 799 m = sc->sc_mcr; 800 if (ISSET(m, MCR_DTR)) 801 SET(bits, TIOCM_DTR); 802 if (ISSET(m, MCR_RTS)) 803 SET(bits, TIOCM_RTS); 804 m = sc->sc_msr; 805 if (ISSET(m, MSR_DCD)) 806 SET(bits, TIOCM_CD); 807 if (ISSET(m, MSR_CTS)) 808 SET(bits, TIOCM_CTS); 809 if (ISSET(m, MSR_DSR)) 810 SET(bits, TIOCM_DSR); 811 if (ISSET(m, MSR_RI | MSR_TERI)) 812 SET(bits, TIOCM_RI); 813 if (bus_space_read_1(iot, ioh, com_ier)) 814 SET(bits, TIOCM_LE); 815 *(int *)data = bits; 816 break; 817 } 818 case TIOCGFLAGS: { 819 int driverbits, userbits = 0; 820 821 driverbits = sc->sc_swflags; 822 if (ISSET(driverbits, COM_SW_SOFTCAR)) 823 SET(userbits, TIOCFLAG_SOFTCAR); 824 if (ISSET(driverbits, COM_SW_CLOCAL)) 825 SET(userbits, TIOCFLAG_CLOCAL); 826 if (ISSET(driverbits, COM_SW_CRTSCTS)) 827 SET(userbits, TIOCFLAG_CRTSCTS); 828 if (ISSET(driverbits, COM_SW_MDMBUF)) 829 SET(userbits, TIOCFLAG_MDMBUF); 830 831 *(int *)data = userbits; 832 break; 833 } 834 case TIOCSFLAGS: { 835 int userbits, driverbits = 0; 836 837 error = suser(p->p_ucred, &p->p_acflag); 838 if (error != 0) 839 return(EPERM); 840 841 userbits = *(int *)data; 842 if (ISSET(userbits, TIOCFLAG_SOFTCAR) || 843 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 844 SET(driverbits, COM_SW_SOFTCAR); 845 if (ISSET(userbits, TIOCFLAG_CLOCAL)) 846 SET(driverbits, COM_SW_CLOCAL); 847 if (ISSET(userbits, TIOCFLAG_CRTSCTS)) 848 SET(driverbits, COM_SW_CRTSCTS); 849 if (ISSET(userbits, TIOCFLAG_MDMBUF)) 850 SET(driverbits, COM_SW_MDMBUF); 851 852 sc->sc_swflags = driverbits; 853 break; 854 } 855 default: 856 return ENOTTY; 857 } 858 859 return 0; 860 } 861 862 int 863 comparam(tp, t) 864 struct tty *tp; 865 struct termios *t; 866 { 867 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 868 bus_space_tag_t iot = sc->sc_iot; 869 bus_space_handle_t ioh = sc->sc_ioh; 870 int ospeed = comspeed(t->c_ospeed); 871 u_char lcr; 872 tcflag_t oldcflag; 873 int s; 874 875 /* check requested parameters */ 876 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed)) 877 return EINVAL; 878 879 lcr = ISSET(sc->sc_lcr, LCR_SBREAK); 880 881 switch (ISSET(t->c_cflag, CSIZE)) { 882 case CS5: 883 SET(lcr, LCR_5BITS); 884 break; 885 case CS6: 886 SET(lcr, LCR_6BITS); 887 break; 888 case CS7: 889 SET(lcr, LCR_7BITS); 890 break; 891 case CS8: 892 SET(lcr, LCR_8BITS); 893 break; 894 } 895 if (ISSET(t->c_cflag, PARENB)) { 896 SET(lcr, LCR_PENAB); 897 if (!ISSET(t->c_cflag, PARODD)) 898 SET(lcr, LCR_PEVEN); 899 } 900 if (ISSET(t->c_cflag, CSTOPB)) 901 SET(lcr, LCR_STOPB); 902 903 sc->sc_lcr = lcr; 904 905 s = spltty(); 906 907 if (ospeed == 0) { 908 CLR(sc->sc_mcr, MCR_DTR); 909 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 910 } 911 912 /* 913 * Set the FIFO threshold based on the receive speed, if we are 914 * changing it. 915 */ 916 #if 0 917 if (tp->t_ispeed != t->c_ispeed) { 918 #else 919 if (1) { 920 #endif 921 if (ospeed != 0) { 922 /* 923 * Make sure the transmit FIFO is empty before 924 * proceeding. If we don't do this, some revisions 925 * of the UART will hang. Interestingly enough, 926 * even if we do this will the last character is 927 * still being pushed out, they don't hang. This 928 * seems good enough. 929 */ 930 while (ISSET(tp->t_state, TS_BUSY)) { 931 int error; 932 933 ++sc->sc_halt; 934 error = ttysleep(tp, &tp->t_outq, 935 TTOPRI | PCATCH, "comprm", 0); 936 --sc->sc_halt; 937 if (error) { 938 splx(s); 939 comstart(tp); 940 return (error); 941 } 942 } 943 944 bus_space_write_1(iot, ioh, com_lcr, lcr | LCR_DLAB); 945 bus_space_write_1(iot, ioh, com_dlbl, ospeed); 946 bus_space_write_1(iot, ioh, com_dlbh, ospeed >> 8); 947 bus_space_write_1(iot, ioh, com_lcr, lcr); 948 SET(sc->sc_mcr, MCR_DTR); 949 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 950 } else 951 bus_space_write_1(iot, ioh, com_lcr, lcr); 952 953 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP) && 954 ISSET(sc->sc_hwflags, COM_HW_FIFO)) 955 bus_space_write_1(iot, ioh, com_fifo, 956 FIFO_ENABLE | 957 (t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); 958 } else 959 bus_space_write_1(iot, ioh, com_lcr, lcr); 960 961 /* When not using CRTSCTS, RTS follows DTR. */ 962 if (!ISSET(t->c_cflag, CRTSCTS)) { 963 if (ISSET(sc->sc_mcr, MCR_DTR)) { 964 if (!ISSET(sc->sc_mcr, MCR_RTS)) { 965 SET(sc->sc_mcr, MCR_RTS); 966 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 967 } 968 } else { 969 if (ISSET(sc->sc_mcr, MCR_RTS)) { 970 CLR(sc->sc_mcr, MCR_RTS); 971 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 972 } 973 } 974 sc->sc_dtr = MCR_DTR | MCR_RTS; 975 } else 976 sc->sc_dtr = MCR_DTR; 977 978 /* and copy to tty */ 979 tp->t_ispeed = t->c_ispeed; 980 tp->t_ospeed = t->c_ospeed; 981 oldcflag = tp->t_cflag; 982 tp->t_cflag = t->c_cflag; 983 984 /* 985 * If DCD is off and MDMBUF is changed, ask the tty layer if we should 986 * stop the device. 987 */ 988 if (!ISSET(sc->sc_msr, MSR_DCD) && 989 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 990 ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) && 991 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) { 992 CLR(sc->sc_mcr, sc->sc_dtr); 993 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 994 } 995 996 /* Just to be sure... */ 997 splx(s); 998 comstart(tp); 999 return 0; 1000 } 1001 1002 void 1003 comstart(tp) 1004 struct tty *tp; 1005 { 1006 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1007 bus_space_tag_t iot = sc->sc_iot; 1008 bus_space_handle_t ioh = sc->sc_ioh; 1009 int s; 1010 1011 s = spltty(); 1012 if (ISSET(tp->t_state, TS_BUSY)) 1013 goto out; 1014 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP) || 1015 sc->sc_halt > 0) 1016 goto stopped; 1017 if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS)) 1018 goto stopped; 1019 if (tp->t_outq.c_cc <= tp->t_lowat) { 1020 if (ISSET(tp->t_state, TS_ASLEEP)) { 1021 CLR(tp->t_state, TS_ASLEEP); 1022 wakeup(&tp->t_outq); 1023 } 1024 if (tp->t_outq.c_cc == 0) 1025 goto stopped; 1026 selwakeup(&tp->t_wsel); 1027 } 1028 SET(tp->t_state, TS_BUSY); 1029 1030 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1031 SET(sc->sc_ier, IER_ETXRDY); 1032 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1033 } 1034 #ifdef COM_HAYESP 1035 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1036 u_char buffer[1024], *cp = buffer; 1037 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1038 do 1039 bus_space_write_1(iot, ioh, com_data, *cp++); 1040 while (--n); 1041 } 1042 else 1043 #endif 1044 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) { 1045 u_char buffer[16], *cp = buffer; 1046 int n = q_to_b(&tp->t_outq, cp, sizeof buffer); 1047 do { 1048 bus_space_write_1(iot, ioh, com_data, *cp++); 1049 } while (--n); 1050 } else 1051 bus_space_write_1(iot, ioh, com_data, getc(&tp->t_outq)); 1052 out: 1053 splx(s); 1054 return; 1055 stopped: 1056 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1057 CLR(sc->sc_ier, IER_ETXRDY); 1058 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1059 } 1060 splx(s); 1061 } 1062 1063 /* 1064 * Stop output on a line. 1065 */ 1066 void 1067 comstop(tp, flag) 1068 struct tty *tp; 1069 int flag; 1070 { 1071 int s; 1072 1073 s = spltty(); 1074 if (ISSET(tp->t_state, TS_BUSY)) 1075 if (!ISSET(tp->t_state, TS_TTSTOP)) 1076 SET(tp->t_state, TS_FLUSH); 1077 splx(s); 1078 } 1079 1080 void 1081 comdiag(arg) 1082 void *arg; 1083 { 1084 struct com_softc *sc = arg; 1085 int overflows, floods, failures; 1086 int s; 1087 1088 s = spltty(); 1089 sc->sc_errors = 0; 1090 overflows = sc->sc_overflows; 1091 sc->sc_overflows = 0; 1092 floods = sc->sc_floods; 1093 sc->sc_floods = 0; 1094 failures = sc->sc_failures; 1095 sc->sc_failures = 0; 1096 splx(s); 1097 1098 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf overflow%s, %d uart failure%s\n", 1099 sc->sc_dev.dv_xname, 1100 overflows, overflows == 1 ? "" : "s", 1101 floods, floods == 1 ? "" : "s", 1102 failures, failures == 1 ? "" : "s"); 1103 } 1104 1105 void 1106 comsoft(arg) 1107 void *arg; 1108 { 1109 int unit; 1110 struct com_softc *sc; 1111 struct tty *tp; 1112 register u_char *ibufp; 1113 u_char *ibufend; 1114 register int c; 1115 int s; 1116 static int lsrmap[8] = { 1117 0, TTY_PE, 1118 TTY_FE, TTY_PE|TTY_FE, 1119 TTY_FE, TTY_PE|TTY_FE, 1120 TTY_FE, TTY_PE|TTY_FE 1121 }; 1122 1123 s = spltty(); 1124 if (comevents == 0) { 1125 splx(s); 1126 goto out; 1127 } 1128 comevents = 0; 1129 splx(s); 1130 1131 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1132 sc = com_cd.cd_devs[unit]; 1133 if (sc == 0 || sc->sc_ibufp == sc->sc_ibuf) 1134 continue; 1135 1136 tp = sc->sc_tty; 1137 1138 s = spltty(); 1139 1140 ibufp = sc->sc_ibuf; 1141 ibufend = sc->sc_ibufp; 1142 1143 if (ibufp == ibufend) { 1144 splx(s); 1145 continue; 1146 } 1147 1148 sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ? 1149 sc->sc_ibufs[1] : sc->sc_ibufs[0]; 1150 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER; 1151 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE; 1152 1153 if (tp == 0 || !ISSET(tp->t_state, TS_ISOPEN)) { 1154 splx(s); 1155 continue; 1156 } 1157 1158 if (ISSET(tp->t_cflag, CRTSCTS) && 1159 !ISSET(sc->sc_mcr, MCR_RTS)) { 1160 /* XXX */ 1161 SET(sc->sc_mcr, MCR_RTS); 1162 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, 1163 sc->sc_mcr); 1164 } 1165 1166 splx(s); 1167 1168 while (ibufp < ibufend) { 1169 c = *ibufp++; 1170 if (*ibufp & LSR_OE) { 1171 sc->sc_overflows++; 1172 if (sc->sc_errors++ == 0) 1173 timeout(comdiag, sc, 60 * hz); 1174 } 1175 /* This is ugly, but fast. */ 1176 c |= lsrmap[(*ibufp++ & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1177 (*linesw[tp->t_line].l_rint)(c, tp); 1178 } 1179 } 1180 1181 out: 1182 timeout(comsoft, NULL, 1); 1183 } 1184 1185 int 1186 comintr(arg) 1187 void *arg; 1188 { 1189 struct com_softc *sc = arg; 1190 bus_space_tag_t iot = sc->sc_iot; 1191 bus_space_handle_t ioh = sc->sc_ioh; 1192 struct tty *tp; 1193 u_char iir, lsr, data, msr, delta; 1194 #ifdef COM_DEBUG 1195 int n; 1196 struct { 1197 u_char iir, lsr, msr; 1198 } iter[32]; 1199 #endif 1200 1201 #ifdef COM_DEBUG 1202 n = 0; 1203 iter[n].iir = 1204 #endif 1205 iir = bus_space_read_1(iot, ioh, com_iir); 1206 if (ISSET(iir, IIR_NOPEND)) 1207 return (0); 1208 1209 tp = sc->sc_tty; 1210 1211 for (;;) { 1212 #ifdef COM_DEBUG 1213 iter[n].lsr = 1214 #endif 1215 lsr = bus_space_read_1(iot, ioh, com_lsr); 1216 1217 if (ISSET(lsr, LSR_RXRDY)) { 1218 register u_char *p = sc->sc_ibufp; 1219 1220 comevents = 1; 1221 do { 1222 data = bus_space_read_1(iot, ioh, com_data); 1223 if (ISSET(lsr, LSR_BI)) { 1224 #ifdef notdef 1225 printf("break %02x %02x %02x %02x\n", 1226 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, 1227 sc->sc_dtr); 1228 #endif 1229 #ifdef DDB 1230 if (ISSET(sc->sc_hwflags, 1231 COM_HW_CONSOLE)) { 1232 Debugger(); 1233 goto next; 1234 } 1235 #endif 1236 } 1237 if (p >= sc->sc_ibufend) { 1238 sc->sc_floods++; 1239 if (sc->sc_errors++ == 0) 1240 timeout(comdiag, sc, 60 * hz); 1241 } else { 1242 *p++ = data; 1243 *p++ = lsr; 1244 if (p == sc->sc_ibufhigh && 1245 ISSET(tp->t_cflag, CRTSCTS)) { 1246 /* XXX */ 1247 CLR(sc->sc_mcr, MCR_RTS); 1248 bus_space_write_1(iot, ioh, 1249 com_mcr, sc->sc_mcr); 1250 } 1251 } 1252 #ifdef DDB 1253 next: 1254 #endif 1255 #ifdef COM_DEBUG 1256 if (++n >= 32) 1257 goto ohfudge; 1258 iter[n].lsr = 1259 #endif 1260 lsr = bus_space_read_1(iot, ioh, com_lsr); 1261 } while (ISSET(lsr, LSR_RXRDY)); 1262 1263 sc->sc_ibufp = p; 1264 } else { 1265 #ifdef COM_DEBUG 1266 if (ISSET(lsr, LSR_BI|LSR_FE|LSR_PE|LSR_OE)) 1267 printf("weird lsr %02x\n", lsr); 1268 #endif 1269 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1270 sc->sc_failures++; 1271 if (sc->sc_errors++ == 0) 1272 timeout(comdiag, sc, 60 * hz); 1273 bus_space_write_1(iot, ioh, com_ier, 0); 1274 delay(10); 1275 bus_space_write_1(iot, ioh, com_ier, 1276 sc->sc_ier); 1277 iir = IIR_NOPEND; 1278 continue; 1279 } 1280 } 1281 1282 #ifdef COM_DEBUG 1283 iter[n].msr = 1284 #endif 1285 msr = bus_space_read_1(iot, ioh, com_msr); 1286 1287 if (msr != sc->sc_msr) { 1288 delta = msr ^ sc->sc_msr; 1289 sc->sc_msr = msr; 1290 if (ISSET(delta, MSR_DCD) && 1291 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) && 1292 (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) { 1293 CLR(sc->sc_mcr, sc->sc_dtr); 1294 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); 1295 } 1296 if (ISSET(delta & msr, MSR_CTS) && 1297 ISSET(tp->t_cflag, CRTSCTS)) { 1298 /* the line is up and we want to do rts/cts flow control */ 1299 (*linesw[tp->t_line].l_start)(tp); 1300 } 1301 } 1302 1303 if (ISSET(lsr, LSR_TXRDY) && ISSET(tp->t_state, TS_BUSY)) { 1304 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 1305 if (sc->sc_halt > 0) 1306 wakeup(&tp->t_outq); 1307 (*linesw[tp->t_line].l_start)(tp); 1308 } 1309 1310 #ifdef COM_DEBUG 1311 if (++n >= 32) 1312 goto ohfudge; 1313 iter[n].iir = 1314 #endif 1315 iir = bus_space_read_1(iot, ioh, com_iir); 1316 if (ISSET(iir, IIR_NOPEND)) 1317 return (1); 1318 } 1319 1320 #ifdef COM_DEBUG 1321 ohfudge: 1322 printf("comintr: too many iterations"); 1323 for (n = 0; n < 32; n++) { 1324 if ((n % 4) == 0) 1325 printf("\ncomintr: iter[%02d]", n); 1326 printf(" %02x %02x %02x", iter[n].iir, iter[n].lsr, iter[n].msr); 1327 } 1328 printf("\n"); 1329 printf("comintr: msr %02x mcr %02x lcr %02x ier %02x\n", 1330 sc->sc_msr, sc->sc_mcr, sc->sc_lcr, sc->sc_ier); 1331 printf("comintr: state %08x cc %d\n", sc->sc_tty->t_state, 1332 sc->sc_tty->t_outq.c_cc); 1333 return (1); 1334 #endif 1335 } 1336 1337 /* 1338 * Following are all routines needed for COM to act as console 1339 */ 1340 #include <dev/cons.h> 1341 1342 void 1343 comcnprobe(cp) 1344 struct consdev *cp; 1345 { 1346 /* XXX NEEDS TO BE FIXED XXX */ 1347 bus_space_tag_t iot = 0; 1348 bus_space_handle_t ioh; 1349 int found; 1350 1351 if (bus_space_map(iot, CONADDR, COM_NPORTS, 0, &ioh)) { 1352 cp->cn_pri = CN_DEAD; 1353 return; 1354 } 1355 found = comprobe1(iot, ioh, CONADDR); 1356 bus_space_unmap(iot, ioh, COM_NPORTS); 1357 if (!found) { 1358 cp->cn_pri = CN_DEAD; 1359 return; 1360 } 1361 1362 /* locate the major number */ 1363 for (commajor = 0; commajor < nchrdev; commajor++) 1364 if (cdevsw[commajor].d_open == comopen) 1365 break; 1366 1367 /* initialize required fields */ 1368 cp->cn_dev = makedev(commajor, CONUNIT); 1369 #ifdef COMCONSOLE 1370 cp->cn_pri = CN_REMOTE; /* Force a serial port console */ 1371 #else 1372 cp->cn_pri = CN_NORMAL; 1373 #endif 1374 } 1375 1376 void 1377 comcninit(cp) 1378 struct consdev *cp; 1379 { 1380 1381 #if 0 1382 XXX NEEDS TO BE FIXED XXX 1383 comconstag = ???; 1384 #endif 1385 if (bus_space_map(comconstag, CONADDR, COM_NPORTS, 0, &comconsioh)) 1386 panic("comcninit: mapping failed"); 1387 1388 cominit(comconstag, comconsioh, comconsrate); 1389 comconsaddr = CONADDR; 1390 } 1391 1392 void 1393 cominit(iot, ioh, rate) 1394 bus_space_tag_t iot; 1395 bus_space_handle_t ioh; 1396 int rate; 1397 { 1398 int s = splhigh(); 1399 u_char stat; 1400 1401 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1402 rate = comspeed(comconsrate); 1403 bus_space_write_1(iot, ioh, com_dlbl, rate); 1404 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1405 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 1406 bus_space_write_1(iot, ioh, com_fifo, 1407 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1408 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 1409 DELAY(100); 1410 stat = bus_space_read_1(iot, ioh, com_iir); 1411 splx(s); 1412 } 1413 1414 int 1415 comcngetc(dev) 1416 dev_t dev; 1417 { 1418 int s = splhigh(); 1419 bus_space_tag_t iot = comconstag; 1420 bus_space_handle_t ioh = comconsioh; 1421 u_char stat, c; 1422 1423 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1424 ; 1425 c = bus_space_read_1(iot, ioh, com_data); 1426 stat = bus_space_read_1(iot, ioh, com_iir); 1427 splx(s); 1428 return c; 1429 } 1430 1431 /* 1432 * Console kernel output character routine. 1433 */ 1434 void 1435 comcnputc(dev, c) 1436 dev_t dev; 1437 int c; 1438 { 1439 int s = splhigh(); 1440 bus_space_tag_t iot = comconstag; 1441 bus_space_handle_t ioh = comconsioh; 1442 u_char stat; 1443 register int timo; 1444 1445 /* wait for any pending transmission to finish */ 1446 timo = 50000; 1447 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 1448 ; 1449 bus_space_write_1(iot, ioh, com_data, c); 1450 /* wait for this transmission to complete */ 1451 timo = 1500000; 1452 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 1453 ; 1454 /* clear any interrupts generated by this transmission */ 1455 stat = bus_space_read_1(iot, ioh, com_iir); 1456 splx(s); 1457 } 1458 1459 void 1460 comcnpollc(dev, on) 1461 dev_t dev; 1462 int on; 1463 { 1464 1465 } 1466
Indexes created Wed Sep 24 22:09:59 GMT 2025