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cs4231reg.h revision 1.11
      1 /* $NetBSD: cs4231reg.h,v 1.11 2008/04/28 18:49:27 garbled Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Ken Hornstein and John Kohl.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *	  Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 /*
     40  * Register defs for Crystal Semiconductor CS4231 Audio Codec/mixer
     41  * chip, used on Gravis UltraSound MAX cards.
     42  *
     43  * Block diagram:
     44  *             +----------------------------------------------------+
     45  *             |                                                    |
     46  *             |   +----------------------------------------------+ |
     47  *             |   |mixed in       +-+                            | |
     48  *             |   +------------>--| |                            | |
     49  *             | mic in            | |                            | |
     50  *   Mic --+-->| --------- GAIN ->-| |                            | |
     51  *         |   | AUX 1 in          |M|                            | |
     52  *   GF1 --)-->| -------------+-->-|U|                            | |
     53  *         |   | Line in      |    |X|---- GAIN ----------+       | |
     54  *  Line --)-->| ---------+---)-->-| |                    |       | |
     55  *         |   |          |   |    | |                    |       | |
     56  *         |   |          |   |    +-+                   ADC      | |
     57  *         |   |          |   |                           |       | |
     58  *         |   |          |   |                           |       | |
     59  *         |   |          |   +--- L/M --\                |       | | AMP-->
     60  *         |   |          |               \               |       | |  |
     61  *         |   |          |                \              |       | |  |
     62  *         |   |          +---- L/M -------O-->--+--------)-------+-|--+-> line
     63  *         |   |   mono in                /|     |        |         |
     64  *         +---|-->------------ L/M -----/ |     |        |         |
     65  *             |   AUX 2 in                |     |        |         |
     66  *  CD --------|-->------------ L/M -------+    L/M       |         |
     67  *             |                                 |        v         |
     68  *             |                                 |        |         |
     69  *             |                                DAC       |         |
     70  *             |                                 |        |         |
     71  *             +----------------------------------------------------+
     72  *                                               |        |
     73  *                                               |        |
     74  *                                               v        v
     75  *                                                Pc BUS (DISK) ???
     76  *
     77  */
     78 
     79 /* CS4231/AD1845 mode2 registers; added to AD1848 registers */
     80 #define CS_ALT_FEATURE1		16
     81 #define CS_ALT_FEATURE2		17
     82 #define CS_LEFT_LINE_CONTROL	18
     83 #define CS_RIGHT_LINE_CONTROL	19
     84 #define CS_TIMER_LOW		20
     85 #define CS_TIMER_HIGH		21
     86 #define CS_UPPER_FREQUENCY_SEL	22
     87 #define CS_LOWER_FREQUENCY_SEL	23
     88 #define CS_IRQ_STATUS		24
     89 #define CS_VERSION_ID		25
     90 #define CS_MONO_IO_CONTROL	26
     91 #define CS_POWERDOWN_CONTROL	27
     92 #define CS_LEFT_OUT		27 /* 4232 */
     93 #define CS_REC_FORMAT		28
     94 #define CS_RIGHT_OUT		29 /* 4232 */
     95 #define CS_XTAL_SELECT		29
     96 #define CS_UPPER_REC_CNT	30
     97 #define CS_LOWER_REC_CNT	31
     98 
     99 /* ALT_FEATURE1 - register I16 */
    100 #define ALT_F1_DACZ		0x01	/* 1: hold sample during underrun */
    101 #define ALT_F1_SPE		0x02	/* 1: Serial port enable */
    102 #define ALT_F1_SFORMAT		0x06	/* Serial port format */
    103 #define ALT_F1_PMCE		0x10	/* Playback mode change enable */
    104 #define ALT_F1_CMCE		0x20	/* Capture mode change enable */
    105 #define ALT_F1_TE		0x40	/* Timer enable */
    106 #define ALT_F1_OLB		0x80	/* Output level bit */
    107 
    108 /* ALT_FEATURE2 - register I17 */
    109 #define ALT_F2_HPF		0x01	/* High pass filter */
    110 #define ALT_F2_XTALE		0x02	/* Crytal enable */
    111 #define ALT_F2_APAR		0x04	/* ADPCM playback accumulator reset */
    112 #define ALT_F2_RES		0x08	/* reserved */
    113 #define ALT_F2_TEST		0xf0	/* Factory test bits */
    114 
    115 /* LINE_CONTROL (LEFT & RIGHT) - register I18,I19 */
    116 #define LINE_INPUT_ATTEN_BITS	0x1f
    117 #define LINE_INPUT_ATTEN_MASK	0xe0
    118 #define LINE_INPUT_MUTE		0x80
    119 #define LINE_INPUT_MUTE_MASK	(~LINE_INPUT_MUTE & 0xff)
    120 
    121 /* ALT_FEATURE3 - register I23 */
    122 #define ALT_F3_ACF		0x01	/* ADPCM capture freeze */
    123 
    124 /* ALT_FEATURE_STATUS (aka CS_IRQ_STATUS) - register I24 */
    125 #define CS_IRQ_PU		0x01	/* Playback Underrun */
    126 #define CS_IRQ_PO		0x02	/* Playback Overrun */
    127 #define CS_IRQ_CO		0x04	/* Capture Overrun */
    128 #define CS_IRQ_CU		0x08	/* Capture Underrun */
    129 #define CS_IRQ_PI		0x10	/* Playback Interrupt */
    130 #define CS_IRQ_CI		0x20	/* Capture Interrupt */
    131 #define CS_IRQ_TI		0x40	/* Timer Interrupt */
    132 #define CS_IRQ_RES		0x80	/* reserved */
    133 
    134 #define CS_I24_BITS		"\20\1PU\2PO\3CO\4CU\5PI\6CI\7TI"
    135 
    136 /* VERSION - register I25 */
    137 #define CS_VERSION_NUMBER	0xe0	/* Version number:
    138 					 *	0x101 - 4231 rev. A
    139 					 *	0x100 - 4231 previous revs
    140 					 *	0x100 - 4232 (unreleased?)
    141 					 *	0x101 - 4232 rev. C
    142 					 */
    143 #define CS_VERSION_CHIPID	0x07	/* Chip Identification.
    144 					 * Currently know values:
    145 					 *	0x000 - CS4231
    146 					 *	0x010 - CS4232
    147 					 */
    148 
    149 /* MONO_IO_CONTROL - register I26 */
    150 #define MONO_INPUT_ATTEN_BITS	0x0f
    151 #define MONO_INPUT_ATTEN_MASK	0xf0
    152 #define MONO_BYPASS		0x20
    153 #define MONO_OUTPUT_MUTE	0x40
    154 #define MONO_OUTPUT_MUTE_MASK	(~MONO_OUTPUT_MUTE & 0xff)
    155 #define MONO_INPUT_MUTE		0x80
    156 #define MONO_INPUT_MUTE_MASK	(~MONO_INPUT_MUTE & 0xff)
    157 
    158 /* CS_LEFT_OUT - register I27 */
    159 #define LEFT_OUT_ATTEN_BITS	0x0f
    160 #define LEFT_OUT_ATTEN_MASK	0xf0
    161 #define LEFT_OUT_MUTE		0x80
    162 #define LEFT_OUT_MUTE_MASK	(~LEFT_OUT_MUTE & 0xff)
    163 
    164 /* CS_REC_FORMAT - register I28 */
    165 #define REC_FMT_reserved	0x0f	/* reserved */
    166 #define REC_FMT_SM		0x10	/* 0: mono, 1: stereo */
    167 #define REC_FMT_CL		0x20	/* 0: linear, 1: companded */
    168 #define REC_FMT_FMT0		0x40	/* See register I8 for valid */
    169 #define REC_FMT_FMT1		0x80	/* combination of the FMT and CL bits */
    170 
    171 /* CS_RIGHT_OUT - register I27 */
    172 #define RIGHT_OUT_ATTEN_BITS	0x0f
    173 #define RIGHT_OUT_ATTEN_MASK	0xf0
    174 #define RIGHT_OUT_MUTE		0x80
    175 #define RIGHT_OUT_MUTE_MASK	(~RIGHT_OUT_MUTE & 0xff)
    176