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cs89x0var.h revision 1.7.4.1
      1 /*	$NetBSD: cs89x0var.h,v 1.7.4.1 2005/04/29 11:28:49 kent Exp $	*/
      2 
      3 /*
      4  * Copyright 1997
      5  * Digital Equipment Corporation. All rights reserved.
      6  *
      7  * This software is furnished under license and may be used and
      8  * copied only in accordance with the following terms and conditions.
      9  * Subject to these conditions, you may download, copy, install,
     10  * use, modify and distribute this software in source and/or binary
     11  * form. No title or ownership is transferred hereby.
     12  *
     13  * 1) Any source code used, modified or distributed must reproduce
     14  *    and retain this copyright notice and list of conditions as
     15  *    they appear in the source file.
     16  *
     17  * 2) No right is granted to use any trade name, trademark, or logo of
     18  *    Digital Equipment Corporation. Neither the "Digital Equipment
     19  *    Corporation" name nor any trademark or logo of Digital Equipment
     20  *    Corporation may be used to endorse or promote products derived
     21  *    from this software without the prior written permission of
     22  *    Digital Equipment Corporation.
     23  *
     24  * 3) This software is provided "AS-IS" and any express or implied
     25  *    warranties, including but not limited to, any implied warranties
     26  *    of merchantability, fitness for a particular purpose, or
     27  *    non-infringement are disclaimed. In no event shall DIGITAL be
     28  *    liable for any damages whatsoever, and in particular, DIGITAL
     29  *    shall not be liable for special, indirect, consequential, or
     30  *    incidental damages or damages for lost profits, loss of
     31  *    revenue or loss of use, whether such damages arise in contract,
     32  *    negligence, tort, under statute, in equity, at law or otherwise,
     33  *    even if advised of the possibility of such damage.
     34  */
     35 
     36 /*
     37 **++
     38 **  FACILITY  Crystal CS8900 Ethernet driver header file
     39 **
     40 **  ABSTRACT
     41 **
     42 **     This module provides CS8900 driver softc and related definitions
     43 **
     44 **  AUTHORS
     45 **
     46 **     Peter Dettori   SEA - Software Engineering.
     47 **
     48 **  CREATION DATE:
     49 **
     50 **       13-Feb-1997.
     51 **
     52 **  MODIFICATION HISTORY:
     53 **
     54 **--
     55 */
     56 
     57 #ifndef _DEV_IC_CS89X0VAR_H_
     58 #define	_DEV_IC_CS89X0VAR_H_
     59 
     60 /*
     61  * Ethernet software status per interface.
     62  *
     63  * Each interface is referenced by a network interface structure,
     64  * arpcom.ac_if, which the routing code uses to locate the interface.
     65  * This structure contains the output queue for the interface,
     66  * its address, ...
     67  */
     68 struct cs_softc {
     69 	struct device sc_dev;		/* base device glue */
     70 	struct ethercom sc_ethercom;	/* Ethernet common */
     71 	struct ifmedia sc_media;	/* media control structures */
     72 
     73 	void	*sc_ih;			/* interrupt handler */
     74 	void 	*sc_sh;			/* shutdown hook */
     75 
     76 	bus_space_tag_t sc_iot;		/* bus space tag for IO */
     77 	bus_space_tag_t sc_memt;	/* bus space tag for memory mode */
     78 	bus_space_handle_t sc_ioh;	/* bus space handles */
     79 	bus_space_handle_t sc_memh;
     80 
     81 #if 0
     82 	isa_chipset_tag_t sc_ic;	/* ISA chipset */
     83 #endif
     84 
     85 	int	sc_irq;			/* IRQ line */
     86 
     87 	int	sc_prodid;		/* saved product ID */
     88 	int	sc_prodrev;		/* saved product rev */
     89 
     90 	bus_addr_t sc_pktpgaddr;	/* PacketPage bus memory address */
     91 
     92 	int	sc_cfgflags;		/* software configuration flags */
     93 
     94 	int	sc_memorymode;		/* are we in memory mode? */
     95 	int	sc_txbusy;		/* transmit in progress */
     96 	int	sc_resetting;		/* reset in progress */
     97 
     98 	int	sc_xe_ent;		/* current early-xmit table entry */
     99 	int	sc_xe_togo;		/* # of packets to go at this ent */
    100 
    101 	int	sc_carrier;		/* has carrier */
    102 
    103 	u_int8_t sc_enaddr[ETHER_ADDR_LEN];	/* MAC address */
    104 
    105 	int	eeprom_size;		/* how large is the eeprom (in bytes) */
    106 	u_int16_t *eeprom_data;		/* copy of the eeprom data */
    107 
    108 #if NRND > 0
    109 	rndsource_element_t rnd_source; /* random source */
    110 #endif
    111 
    112 	/* power management */
    113 	int (*sc_enable)(struct cs_softc *);
    114 	void (*sc_disable)(struct cs_softc *);
    115 	void *sc_powerhook;
    116 
    117 	/* DMA hooks */
    118 	void (*sc_dma_process_rx)(struct cs_softc *);
    119 	void (*sc_dma_chipinit)(struct cs_softc *);
    120 	void (*sc_dma_attach)(struct cs_softc *);
    121 
    122 	/* register access hooks */
    123 	u_int8_t (*sc_io_read_1)(struct cs_softc *, bus_size_t);
    124 	u_int16_t (*sc_io_read_2)(struct cs_softc *, bus_size_t);
    125 	void (*sc_io_read_multi_2)(struct cs_softc *, bus_size_t, u_int16_t *,
    126 				bus_size_t);
    127 	void (*sc_io_write_2)(struct cs_softc *, bus_size_t, u_int16_t);
    128 	void (*sc_io_write_multi_2)(struct cs_softc *, bus_size_t,
    129 				 const u_int16_t *, bus_size_t);
    130 	u_int16_t (*sc_mem_read_2)(struct cs_softc *, bus_size_t);
    131 	void (*sc_mem_write_2)(struct cs_softc *, bus_size_t, u_int16_t);
    132 	void (*sc_mem_write_region_2)(struct cs_softc *, bus_size_t,
    133 				      const u_int16_t *, bus_size_t);
    134 };
    135 
    136 #define IO_READ_1(sc, a) \
    137 	(sc)->sc_io_read_1 ? \
    138 		(sc)->sc_io_read_1((sc), (a)) : \
    139 		bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (a))
    140 #define IO_READ_2(sc, a) \
    141 	(sc)->sc_io_read_2 ? \
    142 		(sc)->sc_io_read_2((sc), (a)) : \
    143 		bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (a))
    144 #define IO_READ_MULTI_2(sc, a, b, c) \
    145 	if ((sc)->sc_io_read_multi_2) \
    146 		(sc)->sc_io_read_multi_2((sc), (a), (b), (c)); else \
    147 		bus_space_read_multi_2((sc)->sc_iot, (sc)->sc_ioh, (a), (b), (c))
    148 #define IO_WRITE_2(sc, a, d) \
    149 	if ((sc)->sc_io_write_2) \
    150 		(sc)->sc_io_write_2((sc), (a), (d)); else \
    151 		bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (a), (d))
    152 #define IO_WRITE_MULTI_2(sc, a, d, c) \
    153 	if ((sc)->sc_io_write_multi_2) \
    154 		(sc)->sc_io_write_multi_2((sc), (a), (d), (c)); else \
    155 		bus_space_write_multi_2((sc)->sc_iot, (sc)->sc_ioh, (a), (d), (c))
    156 #define MEM_READ_2(sc, a) \
    157 	(sc)->sc_mem_read_2 ? \
    158 		(sc)->sc_mem_read_2((sc), (a)) : \
    159 		bus_space_read_2((sc)->sc_memt, (sc)->sc_memh, (a))
    160 #define MEM_WRITE_2(sc, a, d) \
    161 	if ((sc)->sc_mem_write_2) \
    162 		(sc)->sc_mem_write_2((sc), (a), (d)); else \
    163 		bus_space_write_2((sc)->sc_memt, (sc)->sc_memh, (a), (d))
    164 #define MEM_WRITE_REGION_2(sc, a, d, c) \
    165 	if ((sc)->sc_mem_write_region_2) \
    166 		(sc)->sc_mem_write_region_2((sc), (a), (d), (c)); else \
    167 		bus_space_write_region_2((sc)->sc_memt, (sc)->sc_memh, (a), (d), (c))
    168 
    169 
    170 /* Config Flags in cs_softc */
    171 
    172 #define CFGFLG_MEM_MODE     0x0001
    173 #define CFGFLG_USE_SA       0x0002
    174 #define CFGFLG_IOCHRDY      0x0004
    175 #define CFGFLG_DCDC_POL     0x0008
    176 #define CFGFLG_DMA_MODE	    0x0020
    177 #define CFGFLG_ATTACHED     0x0040 /* XXX should not be here? */
    178 #define CFGFLG_CARDBUS_HACK 0x0080
    179 #define CFGFLG_ENABLED      0x0100 /* XXX should not be here? */
    180 #define CFGFLG_PARSE_EEPROM 0x0200
    181 #define CFGFLG_NOT_EEPROM   0x8000
    182 
    183 
    184 /*
    185  * Inlines for reading/writing the packet page area.
    186  */
    187 
    188 static __inline__ u_int16_t _cs_read_port(struct cs_softc *, int);
    189 
    190 static __inline__ u_int16_t
    191 _cs_read_port(struct cs_softc *sc, int off)
    192 {
    193 	u_int16_t result;
    194 
    195 	if (sc->sc_cfgflags & CFGFLG_CARDBUS_HACK) {
    196 	    /*
    197 		 * hack for EtherJet PCMCIA and cardbus (obtained from freebsd)
    198 		 *
    199 	     * EtherJet PCMCIA don't work with cardbus bridges
    200 	     * (at least TI1250) without this hack.
    201 	     */
    202 	    result = (IO_READ_1(sc, off) & 0xff);
    203 	    result |= ((IO_READ_1(sc, off+1) & 0xff) << 8);
    204 	}
    205 	else {
    206 	    result = IO_READ_2(sc, off);
    207 	}
    208 
    209 	return result;
    210 }
    211 
    212 static __inline__ u_int16_t _CS_READ_PACKET_PAGE_IO(struct cs_softc *, int);
    213 
    214 static __inline__ u_int16_t
    215 _CS_READ_PACKET_PAGE_IO(struct cs_softc *sc, int offset)
    216 {
    217 
    218 	IO_WRITE_2(sc, PORT_PKTPG_PTR, offset);
    219 	return (_cs_read_port(sc, PORT_PKTPG_DATA));
    220 }
    221 
    222 static __inline__ u_int16_t CS_READ_PACKET_PAGE_IO(struct cs_softc *, int);
    223 
    224 static __inline__ u_int16_t
    225 CS_READ_PACKET_PAGE_IO(struct cs_softc *sc, int offset)
    226 {
    227 
    228 	IO_WRITE_2(sc, PORT_PKTPG_PTR, offset);
    229 	return (IO_READ_2(sc, PORT_PKTPG_DATA));
    230 }
    231 
    232 #define	CS_READ_PACKET_PAGE_MEM(sc, offset)				\
    233 	MEM_READ_2((sc), (offset))
    234 
    235 #define	CS_READ_PACKET_PAGE(sc, offset)					\
    236 	((sc)->sc_memorymode ? CS_READ_PACKET_PAGE_MEM((sc), (offset)) :\
    237 	 _CS_READ_PACKET_PAGE_IO((sc), (offset)))
    238 
    239 #define	CS_WRITE_PACKET_PAGE_IO(sc, offset, val)			\
    240 do {									\
    241 	IO_WRITE_2((sc), PORT_PKTPG_PTR, (offset));			\
    242 	IO_WRITE_2((sc), PORT_PKTPG_DATA, (val));			\
    243 } while (0)
    244 
    245 #define	CS_WRITE_PACKET_PAGE_MEM(sc, offset, val)		\
    246 	MEM_WRITE_2((sc), (offset), (val))
    247 
    248 #define	CS_WRITE_PACKET_PAGE(sc, offset, val)				\
    249 do {									\
    250 	if ((sc)->sc_memorymode)					\
    251 		CS_WRITE_PACKET_PAGE_MEM((sc), (offset), (val));	\
    252 	else								\
    253 		CS_WRITE_PACKET_PAGE_IO((sc), (offset), (val));		\
    254 } while (0)
    255 
    256 #define CS_READ_PORT(sc, off)\
    257 	IO_READ_2((sc), (off))
    258 
    259 #define CS_WRITE_PORT(sc, off, val)\
    260 	IO_WRITE_2((sc), (off), (val))
    261 
    262 
    263 /* Return Status */
    264 #define	CS_ERROR   -1
    265 #define CS_OK       1
    266 
    267 
    268 /* Media Type in cs_softc */
    269 
    270 #define MEDIA_AUI           0x0001
    271 #define MEDIA_10BASE2       0x0002
    272 #define MEDIA_10BASET       0x0003
    273 
    274 
    275 /* Miscellaneous definitions */
    276 
    277 #define MAXLOOP            0x8888
    278 
    279 int	cs_attach(struct cs_softc *, u_int8_t *, int *, int, int);
    280 int	cs_detach(struct cs_softc *);
    281 int	cs_verify_eeprom(struct cs_softc *);
    282 int	cs_read_eeprom(struct cs_softc *, int, u_int16_t *);
    283 int	cs_intr(void *);
    284 int	cs_activate(struct device *, enum devact);
    285 void	cs_ether_input(struct cs_softc *, struct mbuf *);
    286 void	cs_print_rx_errors(struct cs_softc *, u_int16_t);
    287 int	cs_init(struct ifnet *);
    288 
    289 #define CS_IS_ENABLED(sc)	((sc)->sc_cfgflags & CFGFLG_ENABLED)
    290 
    291 #endif /* _DEV_IC_CS89X0VAR_H_ */
    292