cy.c revision 1.54
1 /* $NetBSD: cy.c,v 1.54 2007/11/19 18:51:47 ad Exp $ */ 2 3 /* 4 * cy.c 5 * 6 * Driver for Cyclades Cyclom-8/16/32 multiport serial cards 7 * (currently not tested with Cyclom-32 cards) 8 * 9 * Timo Rossi, 1996 10 * 11 * Supports both ISA and PCI Cyclom cards 12 * 13 * Lots of debug output can be enabled by defining CY_DEBUG 14 * Some debugging counters (number of receive/transmit interrupts etc.) 15 * can be enabled by defining CY_DEBUG1 16 */ 17 18 #include <sys/cdefs.h> 19 __KERNEL_RCSID(0, "$NetBSD: cy.c,v 1.54 2007/11/19 18:51:47 ad Exp $"); 20 21 #include <sys/param.h> 22 #include <sys/ioctl.h> 23 #include <sys/syslog.h> 24 #include <sys/fcntl.h> 25 #include <sys/tty.h> 26 #include <sys/proc.h> 27 #include <sys/conf.h> 28 #include <sys/user.h> 29 #include <sys/select.h> 30 #include <sys/device.h> 31 #include <sys/malloc.h> 32 #include <sys/systm.h> 33 #include <sys/callout.h> 34 #include <sys/kauth.h> 35 36 #include <sys/bus.h> 37 38 #include <dev/ic/cd1400reg.h> 39 #include <dev/ic/cyreg.h> 40 #include <dev/ic/cyvar.h> 41 42 int cyparam(struct tty *, struct termios *); 43 void cystart(struct tty *); 44 void cy_poll(void *); 45 int cy_modem_control(struct cy_softc *, struct cy_port *, int, int); 46 void cy_enable_transmitter(struct cy_softc *, struct cy_port *); 47 void cd1400_channel_cmd(struct cy_softc *, struct cy_port *, int); 48 int cy_speed(speed_t, int *, int *, int); 49 50 extern struct cfdriver cy_cd; 51 52 dev_type_open(cyopen); 53 dev_type_close(cyclose); 54 dev_type_read(cyread); 55 dev_type_write(cywrite); 56 dev_type_ioctl(cyioctl); 57 dev_type_stop(cystop); 58 dev_type_tty(cytty); 59 dev_type_poll(cypoll); 60 61 const struct cdevsw cy_cdevsw = { 62 cyopen, cyclose, cyread, cywrite, cyioctl, 63 cystop, cytty, cypoll, nommap, ttykqfilter, D_TTY 64 }; 65 66 static int cy_open = 0; 67 static int cy_events = 0; 68 69 int cy_attached_ttys; 70 bool cy_callout_init; 71 callout_t cy_poll_callout; 72 73 /* 74 * Common probe routine 75 */ 76 int 77 cy_find(struct cy_softc *sc) 78 { 79 int cy_chip, chip; 80 u_char firmware_ver; 81 bus_space_tag_t tag = sc->sc_memt; 82 bus_space_handle_t bsh = sc->sc_bsh; 83 int bustype = sc->sc_bustype; 84 85 /* Cyclom card hardware reset */ 86 bus_space_write_1(tag, bsh, CY16_RESET << bustype, 0); 87 DELAY(500); /* wait for reset to complete */ 88 bus_space_write_1(tag, bsh, CY_CLEAR_INTR << bustype, 0); 89 90 #ifdef CY_DEBUG 91 printf("cy: card reset done\n"); 92 #endif 93 sc->sc_nchips = 0; 94 95 for (cy_chip = 0, chip = 0; cy_chip < CY_MAX_CD1400s; 96 cy_chip++, chip += (CY_CD1400_MEMSPACING << bustype)) { 97 int i; 98 99 /* 100 * the last 4 nchips are 'interleaved' with the first 4 on 101 * 32-port boards 102 */ 103 if (cy_chip == 4) 104 chip -= (CY32_ADDR_FIX << bustype); 105 106 #ifdef CY_DEBUG 107 printf("%s probe chip %d offset 0x%x ... ", 108 sc->sc_dev.dv_xname, cy_chip, chip); 109 #endif 110 111 /* wait until the chip is ready for command */ 112 DELAY(1000); 113 if (bus_space_read_1(tag, bsh, chip + 114 ((CD1400_CCR << 1) << bustype)) != 0) { 115 #ifdef CY_DEBUG 116 printf("not ready for command\n"); 117 #endif 118 break; 119 } 120 /* clear the firmware version reg. */ 121 bus_space_write_1(tag, bsh, chip + 122 ((CD1400_GFRCR << 1) << bustype), 0); 123 124 /* 125 * On Cyclom-16 references to non-existent chip 4 126 * actually access chip 0 (address line 9 not decoded). 127 * Here we check if the clearing of chip 4 GFRCR actually 128 * cleared chip 0 GFRCR. In that case we have a 16 port card. 129 */ 130 if (cy_chip == 4 && 131 bus_space_read_1(tag, bsh, /* off for chip 0 (0) + */ 132 ((CD1400_GFRCR << 1) << bustype)) == 0) 133 break; 134 135 /* reset the chip */ 136 bus_space_write_1(tag, bsh, chip + 137 ((CD1400_CCR << 1) << bustype), 138 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET); 139 140 /* wait for the chip to initialize itself */ 141 for (i = 0; i < 200; i++) { 142 DELAY(50); 143 firmware_ver = bus_space_read_1(tag, bsh, chip + 144 ((CD1400_GFRCR << 1) << bustype)); 145 if ((firmware_ver & 0xf0) == 0x40) /* found a CD1400 */ 146 break; 147 } 148 #ifdef CY_DEBUG 149 printf("firmware version 0x%x\n", firmware_ver); 150 #endif 151 152 if ((firmware_ver & 0xf0) != 0x40) 153 break; 154 155 /* firmware version OK, CD1400 found */ 156 sc->sc_nchips++; 157 } 158 159 if (sc->sc_nchips == 0) { 160 #ifdef CY_DEBUG 161 printf("no CD1400s found\n"); 162 #endif 163 return 0; 164 } 165 #ifdef CY_DEBUG 166 printf("found %d CD1400s\n", sc->sc_nchips); 167 #endif 168 169 return 1; 170 } 171 172 void 173 cy_attach(struct cy_softc *sc) 174 { 175 int port, cy_chip, num_chips, cdu, chip; 176 int cy_clock; 177 178 if (!cy_callout_init) { 179 cy_callout_init = true; 180 callout_init(&cy_poll_callout, 0); 181 } 182 183 num_chips = sc->sc_nchips; 184 if (num_chips == 0) 185 return; 186 187 memset(sc->sc_ports, 0, sizeof(sc->sc_ports)); 188 189 port = 0; 190 for (cy_chip = 0, chip = 0; cy_chip < num_chips; cy_chip++, 191 chip += (CY_CD1400_MEMSPACING << sc->sc_bustype)) { 192 193 if (cy_chip == 4) 194 chip -= (CY32_ADDR_FIX << sc->sc_bustype); 195 196 #ifdef CY_DEBUG 197 aprint_debug("attach CD1400 #%d offset 0x%x\n", cy_chip, chip); 198 #endif 199 sc->sc_cd1400_offs[cy_chip] = chip; 200 201 /* 202 * configure port 0 as serial port (should already be after 203 * reset) 204 */ 205 cd_write_reg(sc, cy_chip, CD1400_GCR, 0); 206 207 if (cd_read_reg(sc, cy_chip, CD1400_GFRCR) <= 0x46) 208 cy_clock = CY_CLOCK; 209 else 210 cy_clock = CY_CLOCK_60; 211 212 /* set up a receive timeout period (1ms) */ 213 cd_write_reg(sc, cy_chip, CD1400_PPR, 214 (cy_clock / CD1400_PPR_PRESCALER / 1000) + 1); 215 216 for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; cdu++) { 217 sc->sc_ports[port].cy_softc = sc; 218 sc->sc_ports[port].cy_port_num = port; 219 sc->sc_ports[port].cy_chip = cy_chip; 220 sc->sc_ports[port].cy_clock = cy_clock; 221 222 /* should we initialize anything else here? */ 223 port++; 224 } /* for(each port on one CD1400...) */ 225 226 } /* for(each CD1400 on a card... ) */ 227 228 sc->sc_nchannels = port; 229 230 aprint_normal("%s: %d channels (ttyCY%03d..ttyCY%03d)\n", 231 sc->sc_dev.dv_xname, sc->sc_nchannels, cy_attached_ttys, 232 cy_attached_ttys + (sc->sc_nchannels - 1)); 233 234 cy_attached_ttys += sc->sc_nchannels; 235 236 /* ensure an edge for the next interrupt */ 237 bus_space_write_1(sc->sc_memt, sc->sc_bsh, 238 CY_CLEAR_INTR << sc->sc_bustype, 0); 239 } 240 241 #define CYDIALOUT_MASK 0x80000 242 #define CY_DIALOUT(dev) (minor(dev) & CYDIALOUT_MASK) 243 244 #define CY_PORT(dev) cy_getport((dev)) 245 #define CY_BOARD(cy) ((cy)->cy_softc) 246 247 static struct cy_port * 248 cy_getport(dev_t dev) 249 { 250 int i, j, k, u = minor(dev) & ~CYDIALOUT_MASK; 251 struct cy_softc *sc; 252 253 for (i = 0, j = 0; i < cy_cd.cd_ndevs; i++) { 254 k = j; 255 sc = device_lookup(&cy_cd, i); 256 if (sc == NULL) 257 continue; 258 if (sc->sc_nchannels == 0) 259 continue; 260 j += sc->sc_nchannels; 261 if (j > u) 262 return (&sc->sc_ports[u - k]); 263 } 264 265 return (NULL); 266 } 267 268 /* 269 * open routine. returns zero if successful, else error code 270 */ 271 int 272 cyopen(dev_t dev, int flag, int mode, struct lwp *l) 273 { 274 struct cy_softc *sc; 275 struct cy_port *cy; 276 struct tty *tp; 277 int s, error; 278 279 cy = CY_PORT(dev); 280 if (cy == NULL) 281 return (ENXIO); 282 sc = CY_BOARD(cy); 283 284 s = spltty(); 285 if (cy->cy_tty == NULL) { 286 if ((cy->cy_tty = ttymalloc()) == NULL) { 287 splx(s); 288 printf("%s: port %d: can't allocate tty\n", 289 sc->sc_dev.dv_xname, cy->cy_port_num); 290 return (ENOMEM); 291 } 292 tty_attach(cy->cy_tty); 293 } 294 splx(s); 295 296 tp = cy->cy_tty; 297 tp->t_oproc = cystart; 298 tp->t_param = cyparam; 299 tp->t_dev = dev; 300 301 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 302 return (EBUSY); 303 304 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 305 ttychars(tp); 306 tp->t_iflag = TTYDEF_IFLAG; 307 tp->t_oflag = TTYDEF_OFLAG; 308 tp->t_cflag = TTYDEF_CFLAG; 309 if (ISSET(cy->cy_openflags, TIOCFLAG_CLOCAL)) 310 SET(tp->t_cflag, CLOCAL); 311 if (ISSET(cy->cy_openflags, TIOCFLAG_CRTSCTS)) 312 SET(tp->t_cflag, CRTSCTS); 313 if (ISSET(cy->cy_openflags, TIOCFLAG_MDMBUF)) 314 SET(tp->t_cflag, MDMBUF); 315 tp->t_lflag = TTYDEF_LFLAG; 316 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 317 318 s = spltty(); 319 320 /* 321 * Allocate input ring buffer if we don't already have one 322 */ 323 if (cy->cy_ibuf == NULL) { 324 cy->cy_ibuf = malloc(CY_IBUF_SIZE, M_DEVBUF, M_NOWAIT); 325 if (cy->cy_ibuf == NULL) { 326 printf("%s: port %d: can't allocate input buffer\n", 327 sc->sc_dev.dv_xname, cy->cy_port_num); 328 splx(s); 329 return ENOMEM; 330 } 331 cy->cy_ibuf_end = cy->cy_ibuf + CY_IBUF_SIZE; 332 } 333 /* mark the ring buffer as empty */ 334 cy->cy_ibuf_rd_ptr = cy->cy_ibuf_wr_ptr = cy->cy_ibuf; 335 336 /* select CD1400 channel */ 337 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 338 cy->cy_port_num & CD1400_CAR_CHAN); 339 /* reset the channel */ 340 cd1400_channel_cmd(sc, cy, CD1400_CCR_CMDRESET); 341 /* encode unit (port) number in LIVR */ 342 /* there is just enough space for 5 bits (32 ports) */ 343 cd_write_reg(sc, cy->cy_chip, CD1400_LIVR, 344 cy->cy_port_num << 3); 345 346 cy->cy_channel_control = 0; 347 348 /* hmm... need spltty() here? */ 349 if (cy_open == 0) { 350 cy_open = 1; 351 callout_reset(&cy_poll_callout, 1, cy_poll, NULL); 352 } 353 /* this sets parameters and raises DTR */ 354 cyparam(tp, &tp->t_termios); 355 356 ttsetwater(tp); 357 358 /* raise RTS too */ 359 cy_modem_control(sc, cy, TIOCM_RTS, DMBIS); 360 361 cy->cy_carrier_stat = 362 cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 363 364 /* enable receiver and modem change interrupts */ 365 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 366 CD1400_SRER_MDMCH | CD1400_SRER_RXDATA); 367 368 if (CY_DIALOUT(dev) || 369 ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR) || 370 ISSET(tp->t_cflag, MDMBUF) || 371 ISSET(cy->cy_carrier_stat, CD1400_MSVR2_CD)) 372 SET(tp->t_state, TS_CARR_ON); 373 else 374 CLR(tp->t_state, TS_CARR_ON); 375 splx(s); 376 } 377 378 /* wait for carrier if necessary */ 379 if (!ISSET(flag, O_NONBLOCK)) { 380 mutex_spin_enter(&tty_lock); 381 while (!ISSET(tp->t_cflag, CLOCAL) && 382 !ISSET(tp->t_state, TS_CARR_ON)) { 383 tp->t_wopen++; 384 error = ttysleep(tp, &tp->t_rawq.c_cv, true, 0); 385 tp->t_wopen--; 386 if (error != 0) { 387 mutex_spin_exit(&tty_lock); 388 return error; 389 } 390 } 391 mutex_spin_exit(&tty_lock); 392 } 393 394 return (*tp->t_linesw->l_open) (dev, tp); 395 } 396 397 /* 398 * close routine. returns zero if successful, else error code 399 */ 400 int 401 cyclose(dev_t dev, int flag, int mode, struct lwp *l) 402 { 403 struct cy_softc *sc; 404 struct cy_port *cy; 405 struct tty *tp; 406 int s; 407 408 cy = CY_PORT(dev); 409 sc = CY_BOARD(cy); 410 tp = cy->cy_tty; 411 412 (*tp->t_linesw->l_close) (tp, flag); 413 s = spltty(); 414 415 if (ISSET(tp->t_cflag, HUPCL) && 416 !ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR)) { 417 /* 418 * drop DTR and RTS (should we wait for output buffer to 419 * become empty first?) 420 */ 421 cy_modem_control(sc, cy, 0, DMSET); 422 } 423 /* 424 * XXX should we disable modem change and 425 * receive interrupts here or somewhere ? 426 */ 427 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 428 429 splx(s); 430 ttyclose(tp); 431 432 return 0; 433 } 434 435 /* 436 * Read routine 437 */ 438 int 439 cyread(dev_t dev, struct uio *uio, int flag) 440 { 441 struct cy_port *cy; 442 struct tty *tp; 443 444 cy = CY_PORT(dev); 445 tp = cy->cy_tty; 446 447 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 448 } 449 450 /* 451 * Write routine 452 */ 453 int 454 cywrite(dev_t dev, struct uio *uio, int flag) 455 { 456 struct cy_port *cy; 457 struct tty *tp; 458 459 cy = CY_PORT(dev); 460 tp = cy->cy_tty; 461 462 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 463 } 464 465 /* 466 * Poll routine 467 */ 468 int 469 cypoll(dev_t dev, int events, struct lwp *l) 470 { 471 struct cy_port *cy; 472 struct tty *tp; 473 474 cy = CY_PORT(dev); 475 tp = cy->cy_tty; 476 477 return ((*tp->t_linesw->l_poll)(tp, events, l)); 478 } 479 480 /* 481 * return tty pointer 482 */ 483 struct tty * 484 cytty(dev_t dev) 485 { 486 struct cy_port *cy; 487 488 cy = CY_PORT(dev); 489 490 return (cy->cy_tty); 491 } 492 493 /* 494 * ioctl routine 495 */ 496 int 497 cyioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 498 { 499 struct cy_softc *sc; 500 struct cy_port *cy; 501 struct tty *tp; 502 int error; 503 504 cy = CY_PORT(dev); 505 sc = CY_BOARD(cy); 506 tp = cy->cy_tty; 507 508 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 509 if (error != EPASSTHROUGH) 510 return error; 511 512 error = ttioctl(tp, cmd, data, flag, l); 513 if (error != EPASSTHROUGH) 514 return error; 515 516 /* XXX should not allow dropping DTR when dialin? */ 517 518 switch (cmd) { 519 case TIOCSBRK: /* start break */ 520 SET(cy->cy_flags, CY_F_START_BREAK); 521 cy_enable_transmitter(sc, cy); 522 break; 523 524 case TIOCCBRK: /* stop break */ 525 SET(cy->cy_flags, CY_F_END_BREAK); 526 cy_enable_transmitter(sc, cy); 527 break; 528 529 case TIOCSDTR: /* DTR on */ 530 cy_modem_control(sc, cy, TIOCM_DTR, DMBIS); 531 break; 532 533 case TIOCCDTR: /* DTR off */ 534 cy_modem_control(sc, cy, TIOCM_DTR, DMBIC); 535 break; 536 537 case TIOCMSET: /* set new modem control line values */ 538 cy_modem_control(sc, cy, *((int *) data), DMSET); 539 break; 540 541 case TIOCMBIS: /* turn modem control bits on */ 542 cy_modem_control(sc, cy, *((int *) data), DMBIS); 543 break; 544 545 case TIOCMBIC: /* turn modem control bits off */ 546 cy_modem_control(sc, cy, *((int *) data), DMBIC); 547 break; 548 549 case TIOCMGET: /* get modem control/status line state */ 550 *((int *) data) = cy_modem_control(sc, cy, 0, DMGET); 551 break; 552 553 case TIOCGFLAGS: 554 *((int *) data) = cy->cy_openflags | 555 (CY_DIALOUT(dev) ? TIOCFLAG_SOFTCAR : 0); 556 break; 557 558 case TIOCSFLAGS: 559 error = kauth_authorize_device_tty(l->l_cred, 560 KAUTH_DEVICE_TTY_PRIVSET, tp); 561 if (error != 0) 562 return EPERM; 563 564 cy->cy_openflags = *((int *) data) & 565 (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | 566 TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF); 567 break; 568 569 default: 570 return EPASSTHROUGH; 571 } 572 573 return 0; 574 } 575 576 /* 577 * start output 578 */ 579 void 580 cystart(struct tty *tp) 581 { 582 struct cy_softc *sc; 583 struct cy_port *cy; 584 int s; 585 586 cy = CY_PORT(tp->t_dev); 587 sc = cy->cy_softc; 588 589 s = spltty(); 590 591 #ifdef CY_DEBUG1 592 cy->cy_start_count++; 593 #endif 594 595 if (!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) { 596 if (!ttypull(tp)) 597 goto out; 598 SET(tp->t_state, TS_BUSY); 599 cy_enable_transmitter(sc, cy); 600 } 601 out: 602 603 splx(s); 604 } 605 606 /* 607 * stop output 608 */ 609 void 610 cystop(struct tty *tp, int flag) 611 { 612 struct cy_port *cy; 613 int s; 614 615 cy = CY_PORT(tp->t_dev); 616 617 s = spltty(); 618 if (ISSET(tp->t_state, TS_BUSY)) { 619 if (!ISSET(tp->t_state, TS_TTSTOP)) 620 SET(tp->t_state, TS_FLUSH); 621 622 /* 623 * the transmit interrupt routine will disable transmit when it 624 * notices that CY_F_STOP has been set. 625 */ 626 SET(cy->cy_flags, CY_F_STOP); 627 } 628 splx(s); 629 } 630 631 /* 632 * parameter setting routine. 633 * returns 0 if successful, else returns error code 634 */ 635 int 636 cyparam(struct tty *tp, struct termios *t) 637 { 638 struct cy_softc *sc; 639 struct cy_port *cy; 640 int ibpr = 0, obpr = 0, i_clk_opt = 0, o_clk_opt = 0; /* XXX: GCC */ 641 int s, opt; 642 643 cy = CY_PORT(tp->t_dev); 644 sc = CY_BOARD(cy); 645 646 if (t->c_ospeed != 0 && cy_speed(t->c_ospeed, &o_clk_opt, &obpr, cy->cy_clock) < 0) 647 return EINVAL; 648 649 if (t->c_ispeed != 0 && cy_speed(t->c_ispeed, &i_clk_opt, &ibpr, cy->cy_clock) < 0) 650 return EINVAL; 651 652 s = spltty(); 653 654 /* hang up the line is ospeed is zero, else turn DTR on */ 655 cy_modem_control(sc, cy, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS)); 656 657 /* channel was selected by the above call to cy_modem_control() */ 658 #if 0 659 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, port & CD1400_CAR_CHAN); 660 #endif 661 662 /* set transmit speed */ 663 if (t->c_ospeed != 0) { 664 cd_write_reg(sc, cy->cy_chip, CD1400_TCOR, o_clk_opt); 665 cd_write_reg(sc, cy->cy_chip, CD1400_TBPR, obpr); 666 } 667 /* set receive speed */ 668 if (t->c_ispeed != 0) { 669 cd_write_reg(sc, cy->cy_chip, CD1400_RCOR, i_clk_opt); 670 cd_write_reg(sc, cy->cy_chip, CD1400_RBPR, ibpr); 671 } 672 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN 673 | (ISSET(t->c_cflag, CREAD) ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS); 674 675 if (opt != cy->cy_channel_control) { 676 cy->cy_channel_control = opt; 677 cd1400_channel_cmd(sc, cy, opt); 678 } 679 /* compute COR1 contents */ 680 opt = 0; 681 if (ISSET(t->c_cflag, PARENB)) { 682 if (ISSET(t->c_cflag, PARODD)) 683 opt |= CD1400_COR1_PARODD; 684 opt |= CD1400_COR1_PARNORMAL; 685 } 686 if (!ISSET(t->c_iflag, INPCK)) 687 opt |= CD1400_COR1_NOINPCK; /* no parity checking */ 688 689 if (ISSET(t->c_cflag, CSTOPB)) 690 opt |= CD1400_COR1_STOP2; 691 692 switch (t->c_cflag & CSIZE) { 693 case CS5: 694 opt |= CD1400_COR1_CS5; 695 break; 696 697 case CS6: 698 opt |= CD1400_COR1_CS6; 699 break; 700 701 case CS7: 702 opt |= CD1400_COR1_CS7; 703 break; 704 705 default: 706 opt |= CD1400_COR1_CS8; 707 break; 708 } 709 710 cd_write_reg(sc, cy->cy_chip, CD1400_COR1, opt); 711 712 #ifdef CY_DEBUG 713 printf("cor1 = 0x%x...", opt); 714 #endif 715 716 /* 717 * use the CD1400 automatic CTS flow control if CRTSCTS is set 718 * 719 * CD1400_COR2_ETC is used because breaks are generated with 720 * embedded transmit commands 721 */ 722 cd_write_reg(sc, cy->cy_chip, CD1400_COR2, 723 CD1400_COR2_ETC | 724 (ISSET(t->c_cflag, CRTSCTS) ? CD1400_COR2_CCTS_OFLOW : 0)); 725 726 cd_write_reg(sc, cy->cy_chip, CD1400_COR3, CY_RX_FIFO_THRESHOLD); 727 728 cd1400_channel_cmd(sc, cy, CD1400_CCR_CMDCORCHG | 729 CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3); 730 731 cd_write_reg(sc, cy->cy_chip, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION); 732 cd_write_reg(sc, cy->cy_chip, CD1400_COR5, 0); 733 734 /* 735 * set modem change option registers to generate interrupts 736 * on carrier detect changes. 737 * 738 * if hardware RTS handshaking is used 739 * also set the handshaking threshold. 740 */ 741 if (cy->cy_clock == CY_CLOCK_60) { 742 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR1, CD1400_MCOR1_CDzd | 743 (ISSET(t->c_cflag, CRTSCTS) ? CY_RX_DTR_THRESHOLD : 0)); 744 } else { 745 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR1, CD1400_MCOR1_CDzd); 746 } 747 748 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR2, CD1400_MCOR2_CDod); 749 750 /* 751 * set receive timeout to approx. 2ms 752 * could use more complex logic here... 753 * (but is it actually needed or even useful?) 754 */ 755 cd_write_reg(sc, cy->cy_chip, CD1400_RTPR, 2); 756 757 /* 758 * should do anything else here? 759 * XXX check MDMBUF handshaking like in com.c? 760 */ 761 762 splx(s); 763 return 0; 764 } 765 766 /* 767 * set/get modem line status 768 * 769 * bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR 770 */ 771 int 772 cy_modem_control(struct cy_softc *sc, struct cy_port *cy, int bits, int howto) 773 { 774 struct tty *tp = cy->cy_tty; 775 int s, msvr; 776 777 s = spltty(); 778 779 /* select channel */ 780 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 781 cy->cy_port_num & CD1400_CAR_CHAN); 782 783 /* Does not manipulate RTS if it is used for flow control. */ 784 switch (howto) { 785 case DMGET: 786 bits = 0; 787 if (cy->cy_channel_control & CD1400_CCR_RCVEN) 788 bits |= TIOCM_LE; 789 msvr = cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 790 if (cy->cy_clock == CY_CLOCK_60) { 791 if (cd_read_reg(sc, cy->cy_chip, CD1400_MSVR1) & 792 CD1400_MSVR1_RTS) 793 bits |= TIOCM_DTR; 794 if (msvr & CD1400_MSVR2_DTR) 795 bits |= TIOCM_RTS; 796 } else { 797 if (cd_read_reg(sc, cy->cy_chip, CD1400_MSVR1) & 798 CD1400_MSVR1_RTS) 799 bits |= TIOCM_RTS; 800 if (msvr & CD1400_MSVR2_DTR) 801 bits |= TIOCM_DTR; 802 } 803 if (msvr & CD1400_MSVR2_CTS) 804 bits |= TIOCM_CTS; 805 if (msvr & CD1400_MSVR2_CD) 806 bits |= TIOCM_CD; 807 /* Not connected on some Cyclom-Y boards? */ 808 if (msvr & CD1400_MSVR2_DSR) 809 bits |= TIOCM_DSR; 810 /* Not connected on some Cyclom-8Y boards? */ 811 if (msvr & CD1400_MSVR2_RI) 812 bits |= TIOCM_RI; 813 break; 814 815 case DMSET: /* replace old values with new ones */ 816 if (cy->cy_clock == CY_CLOCK_60) { 817 if (!ISSET(tp->t_cflag, CRTSCTS)) 818 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 819 ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0)); 820 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 821 ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0)); 822 } else { 823 if (!ISSET(tp->t_cflag, CRTSCTS)) 824 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 825 ((bits & TIOCM_RTS) ? CD1400_MSVR1_RTS : 0)); 826 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 827 ((bits & TIOCM_DTR) ? CD1400_MSVR2_DTR : 0)); 828 } 829 break; 830 831 case DMBIS: /* set bits */ 832 if (cy->cy_clock == CY_CLOCK_60) { 833 if (!ISSET(tp->t_cflag, CRTSCTS) && 834 (bits & TIOCM_RTS) != 0) 835 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 836 CD1400_MSVR2_DTR); 837 if (bits & TIOCM_DTR) 838 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 839 CD1400_MSVR1_RTS); 840 } else { 841 if (!ISSET(tp->t_cflag, CRTSCTS) && 842 (bits & TIOCM_RTS) != 0) 843 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 844 CD1400_MSVR1_RTS); 845 if (bits & TIOCM_DTR) 846 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 847 CD1400_MSVR2_DTR); 848 } 849 break; 850 851 case DMBIC: /* clear bits */ 852 if (cy->cy_clock == CY_CLOCK_60) { 853 if (!ISSET(tp->t_cflag, CRTSCTS) && (bits & TIOCM_RTS)) 854 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 0); 855 if (bits & TIOCM_DTR) 856 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 0); 857 } else { 858 if (!ISSET(tp->t_cflag, CRTSCTS) && (bits & TIOCM_RTS)) 859 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 0); 860 if (bits & TIOCM_DTR) 861 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 0); 862 } 863 break; 864 } 865 splx(s); 866 return ((howto == DMGET) ? bits : 0); 867 } 868 869 /* 870 * Upper-level handler loop (called from timer interrupt?) 871 * This routine is common for multiple cards 872 */ 873 void 874 cy_poll(void *arg) 875 { 876 int card, port; 877 struct cy_softc *sc; 878 struct cy_port *cy; 879 struct tty *tp; 880 static int counter = 0; 881 #ifdef CY_DEBUG1 882 int did_something; 883 #endif 884 int s = spltty(); 885 886 if (cy_events == 0 && ++counter < 200) { 887 splx(s); 888 goto out; 889 } 890 cy_events = 0; 891 splx(s); 892 893 for (card = 0; card < cy_cd.cd_ndevs; card++) { 894 sc = device_lookup(&cy_cd, card); 895 if (sc == NULL) 896 continue; 897 898 #ifdef CY_DEBUG1 899 sc->sc_poll_count1++; 900 did_something = 0; 901 #endif 902 903 for (port = 0; port < sc->sc_nchannels; port++) { 904 cy = &sc->sc_ports[port]; 905 if ((tp = cy->cy_tty) == NULL || cy->cy_ibuf == NULL || 906 (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)) 907 continue; 908 909 /* 910 * handle received data 911 */ 912 while (cy->cy_ibuf_rd_ptr != cy->cy_ibuf_wr_ptr) { 913 u_char line_stat; 914 int chr; 915 916 line_stat = cy->cy_ibuf_rd_ptr[0]; 917 chr = cy->cy_ibuf_rd_ptr[1]; 918 919 if (line_stat & 920 (CD1400_RDSR_BREAK | CD1400_RDSR_FE)) 921 chr |= TTY_FE; 922 if (line_stat & CD1400_RDSR_PE) 923 chr |= TTY_PE; 924 925 /* 926 * on an overrun error the data is treated as 927 * good just as it should be. 928 */ 929 930 #ifdef CY_DEBUG 931 printf("%s: port %d ttyinput 0x%x\n", 932 sc->sc_dev.dv_xname, port, chr); 933 #endif 934 935 (*tp->t_linesw->l_rint) (chr, tp); 936 937 s = spltty(); /* really necessary? */ 938 if ((cy->cy_ibuf_rd_ptr += 2) == 939 cy->cy_ibuf_end) 940 cy->cy_ibuf_rd_ptr = cy->cy_ibuf; 941 splx(s); 942 943 #ifdef CY_DEBUG1 944 did_something = 1; 945 #endif 946 } 947 948 /* 949 * If we don't have any received data in ibuf and 950 * CRTSCTS is on and RTS is turned off, it is time to 951 * turn RTS back on 952 */ 953 if (ISSET(tp->t_cflag, CRTSCTS)) { 954 /* 955 * we can't use cy_modem_control() here as it 956 * doesn't change RTS if RTSCTS is on 957 */ 958 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 959 port & CD1400_CAR_CHAN); 960 961 if (cy->cy_clock == CY_CLOCK_60) { 962 if ((cd_read_reg(sc, cy->cy_chip, 963 CD1400_MSVR2) & CD1400_MSVR2_DTR) == 0) { 964 cd_write_reg(sc, cy->cy_chip, 965 CD1400_MSVR2,CD1400_MSVR2_DTR); 966 #ifdef CY_DEBUG1 967 did_something = 1; 968 #endif 969 } 970 } else { 971 if ((cd_read_reg(sc, cy->cy_chip, 972 CD1400_MSVR1) & CD1400_MSVR1_RTS) == 0) { 973 cd_write_reg(sc, cy->cy_chip, 974 CD1400_MSVR1,CD1400_MSVR1_RTS); 975 #ifdef CY_DEBUG1 976 did_something = 1; 977 #endif 978 } 979 } 980 } 981 982 /* 983 * handle carrier changes 984 */ 985 s = spltty(); 986 if (ISSET(cy->cy_flags, CY_F_CARRIER_CHANGED)) { 987 int carrier; 988 989 CLR(cy->cy_flags, CY_F_CARRIER_CHANGED); 990 splx(s); 991 992 carrier = ((cy->cy_carrier_stat & 993 CD1400_MSVR2_CD) != 0); 994 995 #ifdef CY_DEBUG 996 printf("cy_poll: carrier change " 997 "(card %d, port %d, carrier %d)\n", 998 card, port, carrier); 999 #endif 1000 if (CY_DIALOUT(tp->t_dev) == 0 && 1001 !(*tp->t_linesw->l_modem)(tp, carrier)) 1002 cy_modem_control(sc, cy, 1003 TIOCM_DTR, DMBIC); 1004 1005 #ifdef CY_DEBUG1 1006 did_something = 1; 1007 #endif 1008 } else 1009 splx(s); 1010 1011 s = spltty(); 1012 if (ISSET(cy->cy_flags, CY_F_START)) { 1013 CLR(cy->cy_flags, CY_F_START); 1014 splx(s); 1015 1016 (*tp->t_linesw->l_start) (tp); 1017 1018 #ifdef CY_DEBUG1 1019 did_something = 1; 1020 #endif 1021 } else 1022 splx(s); 1023 1024 /* could move this to even upper level... */ 1025 if (cy->cy_fifo_overruns) { 1026 cy->cy_fifo_overruns = 0; 1027 /* 1028 * doesn't report overrun count, but 1029 * shouldn't really matter 1030 */ 1031 log(LOG_WARNING, "%s: port %d fifo overrun\n", 1032 sc->sc_dev.dv_xname, port); 1033 } 1034 if (cy->cy_ibuf_overruns) { 1035 cy->cy_ibuf_overruns = 0; 1036 log(LOG_WARNING, "%s: port %d ibuf overrun\n", 1037 sc->sc_dev.dv_xname, port); 1038 } 1039 } /* for(port...) */ 1040 #ifdef CY_DEBUG1 1041 if (did_something && counter >= 200) 1042 sc->sc_poll_count2++; 1043 #endif 1044 } /* for(card...) */ 1045 1046 counter = 0; 1047 1048 out: 1049 callout_reset(&cy_poll_callout, 1, cy_poll, NULL); 1050 } 1051 1052 /* 1053 * hardware interrupt routine 1054 */ 1055 int 1056 cy_intr(void *arg) 1057 { 1058 struct cy_softc *sc = arg; 1059 struct cy_port *cy; 1060 int cy_chip, stat; 1061 int int_serviced = 0; 1062 1063 /* 1064 * Check interrupt status of each CD1400 chip on this card 1065 * (multiple cards cannot share the same interrupt) 1066 */ 1067 for (cy_chip = 0; cy_chip < sc->sc_nchips; cy_chip++) { 1068 1069 stat = cd_read_reg(sc, cy_chip, CD1400_SVRR); 1070 if (stat == 0) 1071 continue; 1072 1073 if (ISSET(stat, CD1400_SVRR_RXRDY)) { 1074 u_char save_car, save_rir, serv_type; 1075 u_char line_stat, recv_data, n_chars; 1076 u_char *buf_p; 1077 1078 save_rir = cd_read_reg(sc, cy_chip, CD1400_RIR); 1079 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1080 /* enter rx service */ 1081 cd_write_reg(sc, cy_chip, CD1400_CAR, save_rir); 1082 1083 serv_type = cd_read_reg(sc, cy_chip, CD1400_RIVR); 1084 cy = &sc->sc_ports[serv_type >> 3]; 1085 1086 #ifdef CY_DEBUG1 1087 cy->cy_rx_int_count++; 1088 #endif 1089 1090 buf_p = cy->cy_ibuf_wr_ptr; 1091 1092 if (ISSET(serv_type, CD1400_RIVR_EXCEPTION)) { 1093 line_stat = cd_read_reg(sc, cy->cy_chip, 1094 CD1400_RDSR); 1095 recv_data = cd_read_reg(sc, cy->cy_chip, 1096 CD1400_RDSR); 1097 1098 if (cy->cy_tty == NULL || 1099 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) 1100 goto end_rx_serv; 1101 1102 #ifdef CY_DEBUG 1103 printf("%s port %d recv exception, line_stat 0x%x, char 0x%x\n", 1104 sc->sc_dev.dv_xname, cy->cy_port_num, line_stat, recv_data); 1105 #endif 1106 if (ISSET(line_stat, CD1400_RDSR_OE)) 1107 cy->cy_fifo_overruns++; 1108 1109 *buf_p++ = line_stat; 1110 *buf_p++ = recv_data; 1111 if (buf_p == cy->cy_ibuf_end) 1112 buf_p = cy->cy_ibuf; 1113 1114 if (buf_p == cy->cy_ibuf_rd_ptr) { 1115 if (buf_p == cy->cy_ibuf) 1116 buf_p = cy->cy_ibuf_end; 1117 buf_p -= 2; 1118 cy->cy_ibuf_overruns++; 1119 } 1120 cy_events = 1; 1121 } else {/* no exception, received data OK */ 1122 n_chars = cd_read_reg(sc, cy->cy_chip, 1123 CD1400_RDCR); 1124 1125 /* If no tty or not open, discard data */ 1126 if (cy->cy_tty == NULL || 1127 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) { 1128 while (n_chars--) 1129 (void)cd_read_reg(sc, 1130 cy->cy_chip, CD1400_RDSR); 1131 goto end_rx_serv; 1132 } 1133 1134 #ifdef CY_DEBUG 1135 printf("%s port %d receive ok %d chars\n", 1136 sc->sc_dev.dv_xname, cy->cy_port_num, n_chars); 1137 #endif 1138 while (n_chars--) { 1139 *buf_p++ = 0; /* status: OK */ 1140 /* data byte */ 1141 *buf_p++ = cd_read_reg(sc, 1142 cy->cy_chip, CD1400_RDSR); 1143 if (buf_p == cy->cy_ibuf_end) 1144 buf_p = cy->cy_ibuf; 1145 if (buf_p == cy->cy_ibuf_rd_ptr) { 1146 if (buf_p == cy->cy_ibuf) 1147 buf_p = cy->cy_ibuf_end; 1148 buf_p -= 2; 1149 cy->cy_ibuf_overruns++; 1150 break; 1151 } 1152 } 1153 cy_events = 1; 1154 } 1155 1156 cy->cy_ibuf_wr_ptr = buf_p; 1157 1158 /* RTS handshaking for incoming data */ 1159 if (ISSET(cy->cy_tty->t_cflag, CRTSCTS)) { 1160 int bf, msvr; 1161 1162 bf = buf_p - cy->cy_ibuf_rd_ptr; 1163 if (bf < 0) 1164 bf += CY_IBUF_SIZE; 1165 1166 if (bf > (CY_IBUF_SIZE / 2)) { 1167 /* turn RTS off */ 1168 if (cy->cy_clock == CY_CLOCK_60) 1169 msvr = CD1400_MSVR2; 1170 else 1171 msvr = CD1400_MSVR1; 1172 cd_write_reg(sc, cy->cy_chip, msvr, 0); 1173 } 1174 } 1175 1176 end_rx_serv: 1177 /* terminate service context */ 1178 cd_write_reg(sc, cy->cy_chip, CD1400_RIR, 1179 save_rir & 0x3f); 1180 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1181 int_serviced = 1; 1182 } /* if (rx_service...) */ 1183 if (ISSET(stat, CD1400_SVRR_MDMCH)) { 1184 u_char save_car, save_mir, serv_type, modem_stat; 1185 1186 save_mir = cd_read_reg(sc, cy_chip, CD1400_MIR); 1187 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1188 /* enter modem service */ 1189 cd_write_reg(sc, cy_chip, CD1400_CAR, save_mir); 1190 1191 serv_type = cd_read_reg(sc, cy_chip, CD1400_MIVR); 1192 cy = &sc->sc_ports[serv_type >> 3]; 1193 1194 #ifdef CY_DEBUG1 1195 cy->cy_modem_int_count++; 1196 #endif 1197 1198 modem_stat = cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 1199 1200 #ifdef CY_DEBUG 1201 printf("%s port %d modem line change, new stat 0x%x\n", 1202 sc->sc_dev.dv_xname, cy->cy_port_num, modem_stat); 1203 #endif 1204 if (ISSET((cy->cy_carrier_stat ^ modem_stat), CD1400_MSVR2_CD)) { 1205 SET(cy->cy_flags, CY_F_CARRIER_CHANGED); 1206 cy_events = 1; 1207 } 1208 cy->cy_carrier_stat = modem_stat; 1209 1210 /* terminate service context */ 1211 cd_write_reg(sc, cy->cy_chip, CD1400_MIR, save_mir & 0x3f); 1212 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1213 int_serviced = 1; 1214 } /* if (modem_service...) */ 1215 if (ISSET(stat, CD1400_SVRR_TXRDY)) { 1216 u_char save_car, save_tir, serv_type, 1217 count, ch; 1218 struct tty *tp; 1219 1220 save_tir = cd_read_reg(sc, cy_chip, CD1400_TIR); 1221 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1222 /* enter tx service */ 1223 cd_write_reg(sc, cy_chip, CD1400_CAR, save_tir); 1224 1225 serv_type = cd_read_reg(sc, cy_chip, CD1400_TIVR); 1226 cy = &sc->sc_ports[serv_type >> 3]; 1227 1228 #ifdef CY_DEBUG1 1229 cy->cy_tx_int_count++; 1230 #endif 1231 #ifdef CY_DEBUG 1232 printf("%s port %d tx service\n", sc->sc_dev.dv_xname, 1233 cy->cy_port_num); 1234 #endif 1235 1236 /* stop transmitting if no tty or CY_F_STOP set */ 1237 tp = cy->cy_tty; 1238 if (tp == NULL || ISSET(cy->cy_flags, CY_F_STOP)) 1239 goto txdone; 1240 1241 count = 0; 1242 if (ISSET(cy->cy_flags, CY_F_SEND_NUL)) { 1243 cd_write_reg(sc, cy->cy_chip, CD1400_TDR, 0); 1244 cd_write_reg(sc, cy->cy_chip, CD1400_TDR, 0); 1245 count += 2; 1246 CLR(cy->cy_flags, CY_F_SEND_NUL); 1247 } 1248 if (tp->t_outq.c_cc > 0) { 1249 SET(tp->t_state, TS_BUSY); 1250 while (tp->t_outq.c_cc > 0 && 1251 count < CD1400_TX_FIFO_SIZE) { 1252 ch = getc(&tp->t_outq); 1253 /* 1254 * remember to double NUL characters 1255 * because embedded transmit commands 1256 * are enabled 1257 */ 1258 if (ch == 0) { 1259 if (count >= CD1400_TX_FIFO_SIZE - 2) { 1260 SET(cy->cy_flags, CY_F_SEND_NUL); 1261 break; 1262 } 1263 cd_write_reg(sc, cy->cy_chip, 1264 CD1400_TDR, ch); 1265 count++; 1266 } 1267 cd_write_reg(sc, cy->cy_chip, 1268 CD1400_TDR, ch); 1269 count++; 1270 } 1271 } else { 1272 /* 1273 * no data to send -- check if we should 1274 * start/stop a break 1275 */ 1276 /* 1277 * XXX does this cause too much delay before 1278 * breaks? 1279 */ 1280 if (ISSET(cy->cy_flags, CY_F_START_BREAK)) { 1281 cd_write_reg(sc, cy->cy_chip, 1282 CD1400_TDR, 0); 1283 cd_write_reg(sc, cy->cy_chip, 1284 CD1400_TDR, 0x81); 1285 CLR(cy->cy_flags, CY_F_START_BREAK); 1286 } 1287 if (ISSET(cy->cy_flags, CY_F_END_BREAK)) { 1288 cd_write_reg(sc, cy->cy_chip, 1289 CD1400_TDR, 0); 1290 cd_write_reg(sc, cy->cy_chip, 1291 CD1400_TDR, 0x83); 1292 CLR(cy->cy_flags, CY_F_END_BREAK); 1293 } 1294 } 1295 1296 if (tp->t_outq.c_cc == 0) { 1297 txdone: 1298 /* 1299 * No data to send or requested to stop. 1300 * Disable transmit interrupt 1301 */ 1302 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 1303 cd_read_reg(sc, cy->cy_chip, CD1400_SRER) 1304 & ~CD1400_SRER_TXRDY); 1305 CLR(cy->cy_flags, CY_F_STOP); 1306 CLR(tp->t_state, TS_BUSY); 1307 } 1308 if (tp->t_outq.c_cc <= tp->t_lowat) { 1309 SET(cy->cy_flags, CY_F_START); 1310 cy_events = 1; 1311 } 1312 /* terminate service context */ 1313 cd_write_reg(sc, cy->cy_chip, CD1400_TIR, save_tir & 0x3f); 1314 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1315 int_serviced = 1; 1316 } /* if (tx_service...) */ 1317 } /* for(...all CD1400s on a card) */ 1318 1319 /* ensure an edge for next interrupt */ 1320 bus_space_write_1(sc->sc_memt, sc->sc_bsh, 1321 CY_CLEAR_INTR << sc->sc_bustype, 0); 1322 return int_serviced; 1323 } 1324 1325 /* 1326 * subroutine to enable CD1400 transmitter 1327 */ 1328 void 1329 cy_enable_transmitter(struct cy_softc *sc, struct cy_port *cy) 1330 { 1331 int s = spltty(); 1332 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 1333 cy->cy_port_num & CD1400_CAR_CHAN); 1334 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 1335 cd_read_reg(sc, cy->cy_chip, CD1400_SRER) | CD1400_SRER_TXRDY); 1336 splx(s); 1337 } 1338 1339 /* 1340 * Execute a CD1400 channel command 1341 */ 1342 void 1343 cd1400_channel_cmd(struct cy_softc *sc, struct cy_port *cy, int cmd) 1344 { 1345 u_int waitcnt = 5 * 8 * 1024; /* approx 5 ms */ 1346 1347 #ifdef CY_DEBUG 1348 printf("c1400_channel_cmd cy %p command 0x%x\n", cy, cmd); 1349 #endif 1350 1351 /* wait until cd1400 is ready to process a new command */ 1352 while (cd_read_reg(sc, cy->cy_chip, CD1400_CCR) != 0 && waitcnt-- > 0); 1353 1354 if (waitcnt == 0) 1355 log(LOG_ERR, "%s: channel command timeout\n", 1356 sc->sc_dev.dv_xname); 1357 1358 cd_write_reg(sc, cy->cy_chip, CD1400_CCR, cmd); 1359 } 1360 1361 /* 1362 * Compute clock option register and baud rate register values 1363 * for a given speed. Return 0 on success, -1 on failure. 1364 * 1365 * The error between requested and actual speed seems 1366 * to be well within allowed limits (less than 3%) 1367 * with every speed value between 50 and 150000 bps. 1368 */ 1369 int 1370 cy_speed(speed_t speed, int *cor, int *bpr, int cy_clock) 1371 { 1372 int c, co, br; 1373 1374 if (speed < 50 || speed > 150000) 1375 return -1; 1376 1377 for (c = 0, co = 8; co <= 2048; co <<= 2, c++) { 1378 br = (cy_clock + (co * speed) / 2) / (co * speed); 1379 if (br < 0x100) { 1380 *bpr = br; 1381 *cor = c; 1382 return 0; 1383 } 1384 } 1385 1386 return -1; 1387 } 1388
Indexes created Tue Sep 23 07:09:52 GMT 2025