dc21040reg.h revision 1.1.1.2 1 1.1 cgd /*-
2 1.1 cgd * Copyright (c) 1994, 1995 Matt Thomas (thomas (at) lkg.dec.com)
3 1.1 cgd * All rights reserved.
4 1.1 cgd *
5 1.1 cgd * Redistribution and use in source and binary forms, with or without
6 1.1 cgd * modification, are permitted provided that the following conditions
7 1.1 cgd * are met:
8 1.1 cgd * 1. Redistributions of source code must retain the above copyright
9 1.1 cgd * notice, this list of conditions and the following disclaimer.
10 1.1 cgd * 2. The name of the author may not be used to endorse or promote products
11 1.1 cgd * derived from this software withough specific prior written permission
12 1.1 cgd *
13 1.1 cgd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 1.1 cgd * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 1.1 cgd * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 1.1 cgd * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 1.1 cgd * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 1.1 cgd * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 1.1 cgd * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 1.1 cgd * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 1.1 cgd * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 1.1 cgd * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 1.1 cgd *
24 1.1.1.2 cgd * $Id: dc21040reg.h,v 1.1.1.2 1995/07/24 05:24:35 cgd Exp $
25 1.1 cgd *
26 1.1 cgd * $Log: dc21040reg.h,v $
27 1.1.1.2 cgd * Revision 1.1.1.2 1995/07/24 05:24:35 cgd
28 1.1.1.2 cgd * latest from matt thomas; right name this time.
29 1.1.1.2 cgd *
30 1.1.1.2 cgd * Revision 1.7 1995/07/17 23:37:11 thomas
31 1.1.1.2 cgd * disable auto-negotiation for now on DC21041
32 1.1.1.2 cgd *
33 1.1.1.2 cgd * Revision 1.6 1995/07/15 19:22:17 thomas
34 1.1.1.2 cgd * dc21041 support
35 1.1.1.2 cgd *
36 1.1.1.2 cgd * Revision 1.5 1995/07/13 15:40:45 thomas
37 1.1.1.2 cgd * Minor fixes & prelim support for ZNYX ZX342
38 1.1.1.2 cgd *
39 1.1 cgd * Revision 1.4 1995/07/05 22:40:21 thomas
40 1.1 cgd * Add uint16_t
41 1.1 cgd *
42 1.1 cgd * Revision 1.3 1995/05/05 19:44:34 thomas
43 1.1 cgd * cogent em100 support
44 1.1 cgd *
45 1.1 cgd * Revision 1.1 1994/10/01 20:16:45 wollman
46 1.1 cgd * Add Matt Thomas's DC21040 PCI Ethernet driver. (This is turning out
47 1.1 cgd * to be quite a popular chip, so expect to see a number of products
48 1.1 cgd * based on it.)
49 1.1 cgd *
50 1.1 cgd * Revision 1.2 1994/08/15 20:42:25 thomas
51 1.1 cgd * misc additions
52 1.1 cgd *
53 1.1 cgd * Revision 1.1 1994/08/12 21:02:46 thomas
54 1.1 cgd * Initial revision
55 1.1 cgd *
56 1.1 cgd * Revision 1.8 1994/08/05 20:20:54 thomas
57 1.1 cgd * Enable change log
58 1.1 cgd *
59 1.1 cgd * Revision 1.7 1994/08/05 20:20:14 thomas
60 1.1 cgd * *** empty log message ***
61 1.1 cgd *
62 1.1 cgd */
63 1.1 cgd
64 1.1.1.2 cgd #if !defined(_DC21040_H)
65 1.1.1.2 cgd #define _DC21040_H
66 1.1 cgd
67 1.1 cgd typedef unsigned short tulip_uint16_t;
68 1.1 cgd typedef unsigned int tulip_uint32_t;
69 1.1 cgd
70 1.1 cgd #if defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN
71 1.1 cgd #define TULIP_BITFIELD2(a, b) b, a
72 1.1 cgd #define TULIP_BITFIELD3(a, b, c) c, b, a
73 1.1 cgd #define TULIP_BITFIELD4(a, b, c, d) d, c, b, a
74 1.1 cgd #else
75 1.1 cgd #define TULIP_BITFIELD2(a, b) a, b
76 1.1 cgd #define TULIP_BITFIELD3(a, b, c) a, b, c
77 1.1 cgd #define TULIP_BITFIELD4(a, b, c, d) a, b, c, d
78 1.1 cgd #endif
79 1.1 cgd
80 1.1 cgd typedef struct {
81 1.1 cgd tulip_uint32_t d_status;
82 1.1 cgd tulip_uint32_t TULIP_BITFIELD3(d_length1 : 11,
83 1.1 cgd d_length2 : 11,
84 1.1 cgd d_flag : 10);
85 1.1 cgd tulip_uint32_t d_addr1;
86 1.1 cgd tulip_uint32_t d_addr2;
87 1.1 cgd } tulip_desc_t;
88 1.1 cgd
89 1.1 cgd #define TULIP_DSTS_OWNER 0x80000000 /* Owner (1 = DC21040) */
90 1.1 cgd #define TULIP_DSTS_ERRSUM 0x00008000 /* Error Summary */
91 1.1 cgd /*
92 1.1 cgd * Transmit Status
93 1.1 cgd */
94 1.1 cgd #define TULIP_DSTS_TxBABBLE 0x00004000 /* Transmitter Babbled */
95 1.1 cgd #define TULIP_DSTS_TxCARRLOSS 0x00000800 /* Carrier Loss */
96 1.1 cgd #define TULIP_DSTS_TxNOCARR 0x00000400 /* No Carrier */
97 1.1 cgd #define TULIP_DSTS_TxLATECOLL 0x00000200 /* Late Collision */
98 1.1 cgd #define TULIP_DSTS_TxEXCCOLL 0x00000100 /* Excessive Collisions */
99 1.1 cgd #define TULIP_DSTS_TxNOHRTBT 0x00000080 /* No Heartbeat */
100 1.1 cgd #define TULIP_DSTS_TxCOLLMASK 0x00000078 /* Collision Count (mask) */
101 1.1 cgd #define TULIP_DSTS_V_TxCOLLCNT 0x00000003 /* Collision Count (bit) */
102 1.1 cgd #define TULIP_DSTS_TxLINKFAIL 0x00000004 /* Link Failure */
103 1.1 cgd #define TULIP_DSTS_TxUNDERFLOW 0x00000002 /* Underflow Error */
104 1.1 cgd #define TULIP_DSTS_TxDEFERRED 0x00000001 /* Initially Deferred */
105 1.1 cgd /*
106 1.1 cgd * Receive Status
107 1.1 cgd */
108 1.1 cgd #define TULIP_DSTS_RxBADLENGTH 0x00004000 /* Length Error */
109 1.1 cgd #define TULIP_DSTS_RxDATATYPE 0x00003000 /* Data Type */
110 1.1 cgd #define TULIP_DSTS_RxRUNT 0x00000800 /* Runt Frame */
111 1.1 cgd #define TULIP_DSTS_RxMULTICAST 0x00000400 /* Multicast Frame */
112 1.1 cgd #define TULIP_DSTS_RxFIRSTDESC 0x00000200 /* First Descriptor */
113 1.1 cgd #define TULIP_DSTS_RxLASTDESC 0x00000100 /* Last Descriptor */
114 1.1 cgd #define TULIP_DSTS_RxTOOLONG 0x00000080 /* Frame Too Long */
115 1.1 cgd #define TULIP_DSTS_RxCOLLSEEN 0x00000040 /* Collision Seen */
116 1.1 cgd #define TULIP_DSTS_RxFRAMETYPE 0x00000020 /* Frame Type */
117 1.1 cgd #define TULIP_DSTS_RxWATCHDOG 0x00000010 /* Receive Watchdog */
118 1.1 cgd #define TULIP_DSTS_RxDRBBLBIT 0x00000004 /* Dribble Bit */
119 1.1 cgd #define TULIP_DSTS_RxBADCRC 0x00000002 /* CRC Error */
120 1.1 cgd #define TULIP_DSTS_RxOVERFLOW 0x00000001 /* Overflow */
121 1.1 cgd
122 1.1 cgd
123 1.1 cgd #define TULIP_DFLAG_ENDRING 0x0008 /* End of Transmit Ring */
124 1.1 cgd #define TULIP_DFLAG_CHAIN 0x0004 /* Chain using d_addr2 */
125 1.1 cgd
126 1.1 cgd #define TULIP_DFLAG_TxWANTINTR 0x0200 /* Signal Interrupt on Completion */
127 1.1 cgd #define TULIP_DFLAG_TxLASTSEG 0x0100 /* Last Segment */
128 1.1 cgd #define TULIP_DFLAG_TxFIRSTSEG 0x0080 /* First Segment */
129 1.1 cgd #define TULIP_DFLAG_TxINVRSFILT 0x0040 /* Inverse Filtering */
130 1.1 cgd #define TULIP_DFLAG_TxSETUPPKT 0x0020 /* Setup Packet */
131 1.1 cgd #define TULIP_DFLAG_TxHASCRC 0x0010 /* Don't Append the CRC */
132 1.1 cgd #define TULIP_DFLAG_TxNOPADDING 0x0002 /* Don't AutoPad */
133 1.1 cgd #define TULIP_DFLAG_TxHASHFILT 0x0001 /* Hash/Perfect Filtering */
134 1.1 cgd
135 1.1 cgd /*
136 1.1 cgd * The DC21040 Registers (IO Space Addresses)
137 1.1 cgd */
138 1.1 cgd #define TULIP_REG_BUSMODE 0x00 /* CSR0 -- Bus Mode */
139 1.1 cgd #define TULIP_REG_TXPOLL 0x08 /* CSR1 -- Transmit Poll Demand */
140 1.1 cgd #define TULIP_REG_RXPOLL 0x10 /* CSR2 -- Receive Poll Demand */
141 1.1 cgd #define TULIP_REG_RXLIST 0x18 /* CSR3 -- Receive List Base Addr */
142 1.1 cgd #define TULIP_REG_TXLIST 0x20 /* CSR4 -- Transmit List Base Addr */
143 1.1 cgd #define TULIP_REG_STATUS 0x28 /* CSR5 -- Status */
144 1.1 cgd #define TULIP_REG_CMD 0x30 /* CSR6 -- Command */
145 1.1 cgd #define TULIP_REG_INTR 0x38 /* CSR7 -- Interrupt Control */
146 1.1 cgd #define TULIP_REG_MISSES 0x40 /* CSR8 -- Missed Frame Counter */
147 1.1 cgd #define TULIP_REG_ADDRROM 0x48 /* CSR9 -- ENET ROM Register */
148 1.1 cgd #define TULIP_REG_RSRVD 0x50 /* CSR10 -- Reserved */
149 1.1 cgd #define TULIP_REG_FULL_DUPLEX 0x58 /* CSR11 -- Full Duplex */
150 1.1 cgd #define TULIP_REG_SIA_STATUS 0x60 /* CSR12 -- SIA Status */
151 1.1 cgd #define TULIP_REG_SIA_CONN 0x68 /* CSR13 -- SIA Connectivity */
152 1.1 cgd #define TULIP_REG_SIA_TXRX 0x70 /* CSR14 -- SIA Tx Rx */
153 1.1 cgd #define TULIP_REG_SIA_GEN 0x78 /* CSR15 -- SIA General */
154 1.1 cgd
155 1.1 cgd /*
156 1.1 cgd * CSR5 -- Status Register
157 1.1 cgd * CSR7 -- Interrupt Control
158 1.1 cgd */
159 1.1 cgd #define TULIP_STS_ERRORMASK 0x03800000L /* ( R) Error Bits (Valid when SYSERROR is set) */
160 1.1 cgd #define TULIP_STS_ERR_PARITY 0x00000000L /* 000 - Parity Error (Perform Reset) */
161 1.1 cgd #define TULIP_STS_ERR_MASTER 0x00800000L /* 001 - Master Abort */
162 1.1 cgd #define TULIP_STS_ERR_TARGET 0x01000000L /* 010 - Target Abort */
163 1.1 cgd #define TULIP_STS_TXSTATEMASK 0x00700000L /* ( R) Transmission Process State */
164 1.1 cgd #define TULIP_STS_TXS_RESET 0x00000000L /* 000 - Rset or transmit jabber expired */
165 1.1 cgd #define TULIP_STS_TXS_FETCH 0x00100000L /* 001 - Fetching transmit descriptor */
166 1.1 cgd #define TULIP_STS_TXS_WAITEND 0x00200000L /* 010 - Wait for end of transmission */
167 1.1 cgd #define TULIP_STS_TXS_READING 0x00300000L /* 011 - Read buffer and enqueue data */
168 1.1 cgd #define TULIP_STS_TXS_RSRVD 0x00400000L /* 100 - Reserved */
169 1.1 cgd #define TULIP_STS_TXS_SETUP 0x00500000L /* 101 - Setup Packet */
170 1.1 cgd #define TULIP_STS_TXS_SUSPEND 0x00600000L /* 110 - Transmit FIFO underflow or an
171 1.1 cgd unavailable transmit descriptor */
172 1.1 cgd #define TULIP_STS_TXS_CLOSE 0x00700000L /* 111 - Close transmit descriptor */
173 1.1 cgd #define TULIP_STS_RXSTATEMASK 0x000E0000L /* ( R) Receive Process State*/
174 1.1 cgd #define TULIP_STS_RXS_STOPPED 0x00000000L /* 000 - Stopped */
175 1.1 cgd #define TULIP_STS_RXS_FETCH 0x00020000L /* 001 - Running -- Fetch receive descriptor */
176 1.1 cgd #define TULIP_STS_RXS_ENDCHECK 0x00040000L /* 010 - Running -- Check for end of receive
177 1.1 cgd packet before prefetch of next descriptor */
178 1.1 cgd #define TULIP_STS_RXS_WAIT 0x00060000L /* 011 - Running -- Wait for receive packet */
179 1.1 cgd #define TULIP_STS_RXS_SUSPEND 0x00080000L /* 100 - Suspended -- As a result of
180 1.1 cgd unavailable receive buffers */
181 1.1 cgd #define TULIP_STS_RXS_CLOSE 0x000A0000L /* 101 - Running -- Close receive descriptor */
182 1.1 cgd #define TULIP_STS_RXS_FLUSH 0x000C0000L /* 110 - Running -- Flush the current frame
183 1.1 cgd from the receive FIFO as a result of
184 1.1 cgd an unavailable receive buffer */
185 1.1 cgd #define TULIP_STS_RXS_DEQUEUE 0x000E0000L /* 111 - Running -- Dequeue the receive frame
186 1.1 cgd from the receive FIFO into the receive
187 1.1 cgd buffer. */
188 1.1 cgd #define TULIP_STS_NORMALINTR 0x00010000L /* (RW) Normal Interrupt */
189 1.1 cgd #define TULIP_STS_ABNRMLINTR 0x00008000L /* (RW) Abnormal Interrupt */
190 1.1 cgd #define TULIP_STS_SYSERROR 0x00002000L /* (RW) System Error */
191 1.1 cgd #define TULIP_STS_LINKFAIL 0x00001000L /* (RW) Link Failure (DC21040) */
192 1.1 cgd #define TULIP_STS_FULDPLXSHRT 0x00000800L /* (RW) Full Duplex Short Fram Rcvd (DC21040) */
193 1.1 cgd #define TULIP_STS_GPTIMEOUT 0x00000800L /* (RW) General Purpose Timeout (DC21140) */
194 1.1 cgd #define TULIP_STS_AUI 0x00000400L /* (RW) AUI/TP Switch (DC21040) */
195 1.1 cgd #define TULIP_STS_RXTIMEOUT 0x00000200L /* (RW) Receive Watchbog Timeout */
196 1.1 cgd #define TULIP_STS_RXSTOPPED 0x00000100L /* (RW) Receive Process Stopped */
197 1.1.1.2 cgd #define TULIP_STS_RXNOBUF 0x00000080L /* (RW) Receive Buffer Unavailable */
198 1.1 cgd #define TULIP_STS_RXINTR 0x00000040L /* (RW) Receive Interrupt */
199 1.1 cgd #define TULIP_STS_TXUNDERFLOW 0x00000020L /* (RW) Transmit Underflow */
200 1.1 cgd #define TULIP_STS_LINKPASS 0x00000010L /* (RW) LinkPass (DC21041) */
201 1.1 cgd #define TULIP_STS_TXBABBLE 0x00000008L /* (RW) Transmit Jabber Timeout */
202 1.1 cgd #define TULIP_STS_TXNOBUF 0x00000004L /* (RW) Transmit Buffer Unavailable */
203 1.1 cgd #define TULIP_STS_TXSTOPPED 0x00000002L /* (RW) Transmit Process Stopped */
204 1.1 cgd #define TULIP_STS_TXINTR 0x00000001L /* (RW) Transmit Interrupt */
205 1.1 cgd
206 1.1 cgd /*
207 1.1 cgd * CSR6 -- Command (Operation Mode) Register
208 1.1 cgd */
209 1.1 cgd #define TULIP_CMD_MUSTBEONE 0x02000000L /* (RW) Must Be One (DC21140) */
210 1.1 cgd #define TULIP_CMD_SCRAMBLER 0x01000000L /* (RW) Scrambler Mode (DC21140) */
211 1.1 cgd #define TULIP_CMD_PCSFUNCTION 0x00800000L /* (RW) PCS Function (DC21140) */
212 1.1 cgd #define TULIP_CMD_TXTHRSHLDCTL 0x00400000L /* (RW) Transmit Threshold Mode (DC21140) */
213 1.1.1.2 cgd #define TULIP_CMD_STOREFWD 0x00200000L /* (RW) Store and Foward (DC21140) */
214 1.1 cgd #define TULIP_CMD_NOHEARTBEAT 0x00080000L /* (RW) No Heartbeat (DC21140) */
215 1.1 cgd #define TULIP_CMD_PORTSELECT 0x00040000L /* (RW) Post Select (100Mb) (DC21140) */
216 1.1 cgd #define TULIP_CMD_ENHCAPTEFFCT 0x00040000L /* (RW) Enhanced Capture Effecty (DC21041) */
217 1.1 cgd #define TULIP_CMD_CAPTREFFCT 0x00020000L /* (RW) Capture Effect (!802.3) */
218 1.1 cgd #define TULIP_CMD_BACKPRESSURE 0x00010000L /* (RW) Back Pressure (!802.3) (DC21040) */
219 1.1 cgd #define TULIP_CMD_THRESHOLDCTL 0x0000C000L /* (RW) Threshold Control */
220 1.1 cgd #define TULIP_CMD_THRSHLD72 0x00000000L /* 00 - 72 Bytes */
221 1.1 cgd #define TULIP_CMD_THRSHLD96 0x00004000L /* 01 - 96 Bytes */
222 1.1 cgd #define TULIP_CMD_THRSHLD128 0x00008000L /* 10 - 128 bytes */
223 1.1 cgd #define TULIP_CMD_THRSHLD160 0x0000C000L /* 11 - 160 Bytes */
224 1.1.1.2 cgd #define TULIP_CMD_TXRUN 0x00002000L /* (RW) Start/Stop Transmitter */
225 1.1 cgd #define TULIP_CMD_FORCECOLL 0x00001000L /* (RW) Force Collisions */
226 1.1 cgd #define TULIP_CMD_OPERMODE 0x00000C00L /* (RW) Operating Mode */
227 1.1 cgd #define TULIP_CMD_FULLDUPLEX 0x00000200L /* (RW) Full Duplex Mode */
228 1.1 cgd #define TULIP_CMD_FLAKYOSCDIS 0x00000100L /* (RW) Flakey Oscillator Disable */
229 1.1 cgd #define TULIP_CMD_ALLMULTI 0x00000080L /* (RW) Pass All Multicasts */
230 1.1 cgd #define TULIP_CMD_PROMISCUOUS 0x00000040L /* (RW) Promiscuous Mode */
231 1.1 cgd #define TULIP_CMD_BACKOFFCTR 0x00000020L /* (RW) Start/Stop Backoff Counter (!802.3) */
232 1.1 cgd #define TULIP_CMD_INVFILTER 0x00000010L /* (R ) Inverse Filtering */
233 1.1 cgd #define TULIP_CMD_PASSBADPKT 0x00000008L /* (RW) Pass Bad Frames */
234 1.1 cgd #define TULIP_CMD_HASHONLYFLTR 0x00000004L /* (R ) Hash Only Filtering */
235 1.1 cgd #define TULIP_CMD_RXRUN 0x00000002L /* (RW) Start/Stop Receive Filtering */
236 1.1.1.2 cgd #define TULIP_CMD_HASHPRFCTFLTR 0x00000001L /* (R ) Hash/Perfect Receive Filtering */
237 1.1.1.2 cgd
238 1.1 cgd
239 1.1 cgd #define TULIP_SIASTS_OTHERRXACTIVITY 0x00000200L
240 1.1 cgd #define TULIP_SIASTS_RXACTIVITY 0x00000100L
241 1.1 cgd #define TULIP_SIASTS_LINKFAIL 0x00000004L
242 1.1 cgd #define TULIP_SIACONN_RESET 0x00000000L
243 1.1 cgd
244 1.1.1.2 cgd #define TULIP_SIACONN_AUI 0x0000000DL
245 1.1.1.2 cgd #define TULIP_SIACONN_10BASET 0x00000005L
246 1.1.1.2 cgd
247 1.1.1.2 cgd #define TULIP_DC21041_SIACONN_10BASET 0x0000EF01L
248 1.1.1.2 cgd #define TULIP_DC21041_SIATXRX_10BASET 0x0000FF3FL
249 1.1.1.2 cgd #define TULIP_DC21041_SIAGEN_10BASET 0x00000000L
250 1.1.1.2 cgd
251 1.1.1.2 cgd #define TULIP_DC21041_SIACONN_AUI 0x0000EF09L
252 1.1.1.2 cgd #define TULIP_DC21041_SIATXRX_AUI 0x0000F73DL
253 1.1.1.2 cgd #define TULIP_DC21041_SIAGEN_AUI 0x0000000EL
254 1.1.1.2 cgd
255 1.1.1.2 cgd #define TULIP_DC21041_SIACONN_BNC 0x0000EF09L
256 1.1 cgd #define TULIP_DC21041_SIATXRX_BNC 0x0000F73DL
257 1.1 cgd #define TULIP_DC21041_SIAGEN_BNC 0x00000006L
258 1.1 cgd
259 1.1 cgd #define TULIP_BUSMODE_SWRESET 0x00000001L
260 1.1 cgd #define TULIP_BUSMODE_DESCSKIPLEN_MASK 0x0000007CL
261 1.1 cgd #define TULIP_BUSMODE_BIGENDIAN 0x00000080L
262 1.1 cgd #define TULIP_BUSMODE_BURSTLEN_MASK 0x00003F00L
263 1.1 cgd #define TULIP_BUSMODE_BURSTLEN_DEFAULT 0x00000000L
264 1.1 cgd #define TULIP_BUSMODE_BURSTLEN_1LW 0x00000100L
265 1.1 cgd #define TULIP_BUSMODE_BURSTLEN_2LW 0x00000200L
266 1.1 cgd #define TULIP_BUSMODE_BURSTLEN_4LW 0x00000400L
267 1.1 cgd #define TULIP_BUSMODE_BURSTLEN_8LW 0x00000800L
268 1.1 cgd #define TULIP_BUSMODE_BURSTLEN_16LW 0x00001000L
269 1.1 cgd #define TULIP_BUSMODE_BURSTLEN_32LW 0x00002000L
270 1.1 cgd #define TULIP_BUSMODE_CACHE_NOALIGN 0x00000000L
271 1.1 cgd #define TULIP_BUSMODE_CACHE_ALIGN8 0x00004000L
272 1.1.1.2 cgd #define TULIP_BUSMODE_CACHE_ALIGN16 0x00008000L
273 1.1.1.2 cgd #define TULIP_BUSMODE_CACHE_ALIGN32 0x0000C000L
274 1.1.1.2 cgd #define TULIP_BUSMODE_TXPOLL_NEVER 0x00000000L
275 1.1.1.2 cgd #define TULIP_BUSMODE_TXPOLL_200000ns 0x00020000L
276 1.1.1.2 cgd #define TULIP_BUSMODE_TXPOLL_800000ns 0x00040000L
277 1.1.1.2 cgd #define TULIP_BUSMODE_TXPOLL_1600000ns 0x00060000L
278 1.1.1.2 cgd #define TULIP_BUSMODE_TXPOLL_12800ns 0x00080000L /* DC21041 only */
279 1.1.1.2 cgd #define TULIP_BUSMODE_TXPOLL_25600ns 0x000A0000L /* DC21041 only */
280 1.1 cgd #define TULIP_BUSMODE_TXPOLL_51200ns 0x000C0000L /* DC21041 only */
281 1.1 cgd #define TULIP_BUSMODE_TXPOLL_102400ns 0x000E0000L /* DC21041 only */
282 1.1 cgd #define TULIP_BUSMODE_DESC_BIGENDIAN 0x00100000L /* DC21041 only */
283 1.1 cgd
284 1.1 cgd /*
285 1.1.1.2 cgd * These are the defintitions used for the DEC DC21140
286 1.1.1.2 cgd * evaluation board.
287 1.1.1.2 cgd */
288 1.1.1.2 cgd #define TULIP_GP_EB_PINS 0x0000011F /* General Purpose Pin directions */
289 1.1 cgd #define TULIP_GP_EB_OK10 0x00000080 /* 10 Mb/sec Signal Detect gep<7> */
290 1.1 cgd #define TULIP_GP_EB_OK100 0x00000040 /* 100 Mb/sec Signal Detect gep<6> */
291 1.1 cgd #define TULIP_GP_EB_INIT 0x0000000B /* No loopback --- point-to-point */
292 1.1 cgd
293 1.1 cgd /*
294 1.1 cgd * There are the definitions used for the DEC DE500-XA
295 1.1 cgd * 10/100 board
296 1.1 cgd */
297 1.1 cgd #define TULIP_GP_DE500_PINS 0x0000010FL
298 1.1 cgd #define TULIP_GP_DE500_NOTOK_10 0x00000080L
299 1.1 cgd #define TULIP_GP_DE500_NOTOK_100 0x00000040L
300 1.1 cgd #define TULIP_GP_DE500_HALFDUPLEX 0x00000008L
301 1.1 cgd #define TULIP_GP_DE500_FORCE_100 0x00000001L
302 1.1 cgd
303 1.1 cgd /*
304 1.1.1.2 cgd * These are the defintitions used for the Cogent EM100
305 1.1.1.2 cgd * DC21140 board.
306 1.1.1.2 cgd */
307 1.1.1.2 cgd #define TULIP_GP_EM100_PINS 0x0000013F /* General Purpose Pin directions */
308 1.1.1.2 cgd #define TULIP_GP_EM100_INIT 0x00000009 /* No loopback --- point-to-point */
309 1.1.1.2 cgd #define TULIP_OUI_COGENT_0 0x00
310 1.1.1.2 cgd #define TULIP_OUI_COGENT_1 0x00
311 1.1.1.2 cgd #define TULIP_OUI_COGENT_2 0x94
312 1.1.1.2 cgd #define TULIP_COGENT_EM100_ID 0x12
313 1.1.1.2 cgd
314 1.1.1.2 cgd
315 1.1.1.2 cgd /*
316 1.1.1.2 cgd * These are the defintitions used for the Znyx ZX342
317 1.1.1.2 cgd * 10/100 board
318 1.1.1.2 cgd */
319 1.1.1.2 cgd #define TULIP_GP_ZX34X_PINS 0x0000011F /* General Purpose Pin directions */
320 1.1.1.2 cgd #define TULIP_GP_ZX34X_OK10 0x00000080 /* 10 Mb/sec Signal Detect gep<7> */
321 1.1.1.2 cgd #define TULIP_GP_ZX34X_OK100 0x00000040 /* 100 Mb/sec Signal Detect gep<6> */
322 1.1.1.2 cgd #define TULIP_GP_ZX34X_INIT 0x00000009
323 1.1.1.2 cgd #define TULIP_OUI_ZNYX_0 0x00
324 1.1.1.2 cgd #define TULIP_OUI_ZNYX_1 0xC0
325 1.1 cgd #define TULIP_OUI_ZNYX_2 0x95
326 1.1 cgd
327 1.1 cgd
328 1.1 cgd /*
329 1.1 cgd * SROM definitions for the DC21140 and DC21041.
330 1.1 cgd */
331 1.1 cgd #define SROMSEL 0x0800
332 1.1 cgd #define SROMRD 0x4000
333 1.1 cgd #define SROMWR 0x2000
334 1.1 cgd #define SROMDIN 0x0008
335 1.1 cgd #define SROMDOUT 0x0004
336 1.1 cgd #define SROMDOUTON 0x0004
337 1.1 cgd #define SROMDOUTOFF 0x0004
338 1.1 cgd #define SROMCLKON 0x0002
339 1.1 cgd #define SROMCLKOFF 0x0002
340 1.1 cgd #define SROMCSON 0x0001
341 1.1 cgd #define SROMCSOFF 0x0001
342 1.1 cgd #define SROMCS 0x0001
343 1.1 cgd
344 1.1 cgd #define SROMCMD_MODE 4
345 1.1 cgd #define SROMCMD_WR 5
346 1.1 cgd #define SROMCMD_RD 6
347
348 #define SROM_BITWIDTH 6
349 #endif /* !defined(_DC21040_H) */
350