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dp8390var.h revision 1.2.4.1 
      1 /*	$NetBSD: dp8390var.h,v 1.2.4.1 1997/10/14 00:59:13 thorpej Exp $	*/
      2 
      3 /*
      4  * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
      5  * adapters.
      6  *
      7  * Copyright (c) 1994, 1995 Charles M. Hannum.  All rights reserved.
      8  *
      9  * Copyright (C) 1993, David Greenman.  This software may be used, modified,
     10  * copied, distributed, and sold, in both source and binary form provided that
     11  * the above copyright and these terms are retained.  Under no circumstances is
     12  * the author responsible for the proper functioning of this software, nor does
     13  * the author assume any responsibility for damages incurred with its use.
     14  */
     15 
     16 #define INTERFACE_NAME_LEN	32
     17 
     18 /*
     19  * dp8390_softc: per line info and status
     20  */
     21 struct dp8390_softc {
     22 	struct device	sc_dev;
     23 	void	*sc_ih;
     24 	int	sc_flags;	/* interface flags, from config */
     25 
     26 	struct ethercom sc_ec;	/* ethernet common */
     27 
     28 	bus_space_tag_t	sc_regt;	/* NIC register space tag */
     29 	bus_space_handle_t sc_regh;	/* NIC register space handle */
     30 	bus_space_tag_t	sc_buft;	/* Buffer space tag */
     31 	bus_space_handle_t sc_bufh;	/* Buffer space handle */
     32 
     33 	bus_size_t sc_reg_map[16];	/* register map (offsets) */
     34 
     35 	u_char	is790;		/* NIC is a 790 */
     36 
     37 	u_int8_t cr_proto;	/* values always set in CR */
     38 	u_int8_t dcr_reg;	/* override DCR iff LS is set */
     39 
     40 	int	mem_start;	/* offset of NIC memory */
     41 	int	mem_end;	/* offset of NIC memory end */
     42 	int	mem_size;	/* total shared memory size */
     43 	int	mem_ring;	/* offset of start of RX ring-buffer */
     44 
     45 	u_short	txb_cnt;	/* Number of transmit buffers */
     46 	u_short	txb_inuse;	/* number of transmit buffers active */
     47 
     48 	u_short	txb_new;	/* pointer to where new buffer will be added */
     49 	u_short	txb_next_tx;	/* pointer to next buffer ready to xmit */
     50 	u_short	txb_len[8];	/* buffered xmit buffer lengths */
     51 	u_short	tx_page_start;	/* first page of TX buffer area */
     52 	u_short	rec_page_start; /* first page of RX ring-buffer */
     53 	u_short	rec_page_stop;	/* last page of RX ring-buffer */
     54 	u_short	next_packet;	/* pointer to next unread RX packet */
     55 
     56 	u_int8_t sc_enaddr[6];	/* storage for MAC address */
     57 
     58 	int	(*test_mem) __P((struct dp8390_softc *));
     59 	void	(*init_card) __P((struct dp8390_softc *));
     60 	void	(*read_hdr) __P((struct dp8390_softc *,
     61 		    int, struct dp8390_ring *));
     62 	void	(*recv_int) __P((struct dp8390_softc *));
     63 	int	(*ring_copy) __P((struct dp8390_softc *,
     64 		    int, caddr_t, u_short));
     65 	int	(*write_mbuf) __P((struct dp8390_softc *, struct mbuf *, int));
     66 };
     67 
     68 /*
     69  * Vendor types
     70  */
     71 #define DP8390_VENDOR_UNKNOWN	0xff	/* Unknown network card */
     72 #define DP8390_VENDOR_WD_SMC	0x00	/* Western Digital/SMC */
     73 #define DP8390_VENDOR_3COM	0x01	/* 3Com */
     74 #define DP8390_VENDOR_NOVELL	0x02	/* Novell */
     75 #define DP8390_VENDOR_APPLE	0x10	/* Apple Ethernet card */
     76 #define DP8390_VENDOR_INTERLAN	0x11	/* Interlan A310 card (GatorCard) */
     77 #define DP8390_VENDOR_DAYNA	0x12	/* DaynaPORT E/30s (and others?) */
     78 #define DP8390_VENDOR_ASANTE	0x13	/* Asante MacCon II/E */
     79 #define DP8390_VENDOR_FARALLON	0x14	/* Farallon EtherMac II-TP */
     80 #define DP8390_VENDOR_FOCUS	0x15	/* FOCUS Enhancements EtherLAN */
     81 #define DP8390_VENDOR_KINETICS	0x16	/* Kinetics EtherPort SE/30 */
     82 
     83 /*
     84  * Compile-time config flags
     85  */
     86 /*
     87  * This sets the default for enabling/disablng the tranceiver.
     88  */
     89 #define DP8390_DISABLE_TRANCEIVER	0x0001
     90 
     91 /*
     92  * This forces the board to be used in 8/16-bit mode even if it autoconfigs
     93  * differently.
     94  */
     95 #define DP8390_FORCE_8BIT_MODE		0x0002
     96 #define DP8390_FORCE_16BIT_MODE		0x0004
     97 
     98 /*
     99  * This disables the use of multiple transmit buffers.
    100  */
    101 #define DP8390_NO_MULTI_BUFFERING	0x0008
    102 
    103 /*
    104  * This forces all operations with the NIC memory to use Programmed I/O (i.e.
    105  * not via shared memory).
    106  */
    107 #define DP8390_FORCE_PIO		0x0010
    108 
    109 /*
    110  * NIC register access macros
    111  */
    112 #define NIC_GET(t, h, reg)	bus_space_read_1(t, h,			\
    113 				    ((sc)->sc_reg_map[reg]))
    114 #define NIC_PUT(t, h, reg, val)	bus_space_write_1(t, h,			\
    115 				    ((sc)->sc_reg_map[reg]), (val))
    116 
    117 int	dp8390_config __P((struct dp8390_softc *));
    118 int	dp8390_intr __P((void *));
    119 int	dp8390_ioctl __P((struct ifnet *, u_long, caddr_t));
    120 void	dp8390_start __P((struct ifnet *));
    121 void	dp8390_watchdog __P((struct ifnet *));
    122 void	dp8390_reset __P((struct dp8390_softc *));
    123 void	dp8390_init __P((struct dp8390_softc *));
    124 void	dp8390_stop __P((struct dp8390_softc *));
    125 
    126 void	dp8390_rint __P((struct dp8390_softc *));
    127 
    128 void	dp8390_getmcaf __P((struct ethercom *, u_int8_t *));
    129 struct mbuf *dp8390_get __P((struct dp8390_softc *, int, u_short));
    130 void	dp8390_read __P((struct dp8390_softc *, int, u_short));
    131