dp8390var.h revision 1.3 1 /* $NetBSD: dp8390var.h,v 1.3 1997/10/15 05:48:56 explorer Exp $ */
2
3 /*
4 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
5 * adapters.
6 *
7 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
8 *
9 * Copyright (C) 1993, David Greenman. This software may be used, modified,
10 * copied, distributed, and sold, in both source and binary form provided that
11 * the above copyright and these terms are retained. Under no circumstances is
12 * the author responsible for the proper functioning of this software, nor does
13 * the author assume any responsibility for damages incurred with its use.
14 */
15
16 #include "rnd.h"
17
18 #if NRND > 0
19 #include <sys/rnd.h>
20 #endif
21
22 #define INTERFACE_NAME_LEN 32
23
24 /*
25 * dp8390_softc: per line info and status
26 */
27 struct dp8390_softc {
28 struct device sc_dev;
29 void *sc_ih;
30 int sc_flags; /* interface flags, from config */
31
32 struct ethercom sc_ec; /* ethernet common */
33
34 char *type_str; /* type string */
35 u_int type; /* interface type code */
36 u_int vendor; /* interface vendor */
37
38 bus_space_tag_t sc_regt; /* NIC register space tag */
39 bus_space_handle_t sc_regh; /* NIC register space handle */
40 bus_space_tag_t sc_buft; /* Buffer space tag */
41 bus_space_handle_t sc_bufh; /* Buffer space handle */
42
43 bus_size_t sc_reg_map[16]; /* register map (offsets) */
44
45 u_char is790; /* NIC is a 790 */
46
47 u_int8_t cr_proto; /* values always set in CR */
48 u_int8_t dcr_reg; /* override DCR iff LS is set */
49
50 int mem_start; /* offset of NIC memory */
51 int mem_end; /* offset of NIC memory end */
52 int mem_size; /* total shared memory size */
53 int mem_ring; /* offset of start of RX ring-buffer */
54
55 u_short txb_cnt; /* Number of transmit buffers */
56 u_short txb_inuse; /* number of transmit buffers active */
57
58 u_short txb_new; /* pointer to where new buffer will be added */
59 u_short txb_next_tx; /* pointer to next buffer ready to xmit */
60 u_short txb_len[8]; /* buffered xmit buffer lengths */
61 u_short tx_page_start; /* first page of TX buffer area */
62 u_short rec_page_start; /* first page of RX ring-buffer */
63 u_short rec_page_stop; /* last page of RX ring-buffer */
64 u_short next_packet; /* pointer to next unread RX packet */
65
66 u_int8_t sc_enaddr[6]; /* storage for MAC address */
67
68 int (*test_mem) __P((struct dp8390_softc *));
69 void (*init_card) __P((struct dp8390_softc *));
70 void (*read_hdr) __P((struct dp8390_softc *,
71 int, struct dp8390_ring *));
72 void (*recv_int) __P((struct dp8390_softc *));
73 int (*ring_copy) __P((struct dp8390_softc *,
74 int, caddr_t, u_short));
75 int (*write_mbuf) __P((struct dp8390_softc *, struct mbuf *, int));
76
77 #if NRND > 0
78 rndsource_element_t rnd_source;
79 #endif
80 };
81
82 /*
83 * Vendor types
84 */
85 #define DP8390_VENDOR_UNKNOWN 0xff /* Unknown network card */
86 #define DP8390_VENDOR_WD_SMC 0x00 /* Western Digital/SMC */
87 #define DP8390_VENDOR_3COM 0x01 /* 3Com */
88 #define DP8390_VENDOR_NOVELL 0x02 /* Novell */
89 #define DP8390_VENDOR_APPLE 0x10 /* Apple Ethernet card */
90 #define DP8390_VENDOR_INTERLAN 0x11 /* Interlan A310 card (GatorCard) */
91 #define DP8390_VENDOR_DAYNA 0x12 /* DaynaPORT E/30s (and others?) */
92 #define DP8390_VENDOR_ASANTE 0x13 /* Asante MacCon II/E */
93 #define DP8390_VENDOR_FARALLON 0x14 /* Farallon EtherMac II-TP */
94 #define DP8390_VENDOR_FOCUS 0x15 /* FOCUS Enhancements EtherLAN */
95 #define DP8390_VENDOR_KINETICS 0x16 /* Kinetics EtherPort SE/30 */
96
97 /*
98 * Compile-time config flags
99 */
100 /*
101 * This sets the default for enabling/disablng the tranceiver.
102 */
103 #define DP8390_DISABLE_TRANCEIVER 0x0001
104
105 /*
106 * This forces the board to be used in 8/16-bit mode even if it autoconfigs
107 * differently.
108 */
109 #define DP8390_FORCE_8BIT_MODE 0x0002
110 #define DP8390_FORCE_16BIT_MODE 0x0004
111
112 /*
113 * This disables the use of multiple transmit buffers.
114 */
115 #define DP8390_NO_MULTI_BUFFERING 0x0008
116
117 /*
118 * This forces all operations with the NIC memory to use Programmed I/O (i.e.
119 * not via shared memory).
120 */
121 #define DP8390_FORCE_PIO 0x0010
122
123 /*
124 * NIC register access macros
125 */
126 #define NIC_GET(t, h, reg) bus_space_read_1(t, h, \
127 ((sc)->sc_reg_map[reg]))
128 #define NIC_PUT(t, h, reg, val) bus_space_write_1(t, h, \
129 ((sc)->sc_reg_map[reg]), (val))
130
131 int dp8390_config __P((struct dp8390_softc *));
132 void dp8390_intr __P((void *, int));
133 int dp8390_ioctl __P((struct ifnet *, u_long, caddr_t));
134 void dp8390_start __P((struct ifnet *));
135 void dp8390_watchdog __P((struct ifnet *));
136 void dp8390_reset __P((struct dp8390_softc *));
137 void dp8390_init __P((struct dp8390_softc *));
138 void dp8390_stop __P((struct dp8390_softc *));
139
140 void dp8390_rint __P((struct dp8390_softc *));
141
142 void dp8390_getmcaf __P((struct ethercom *, u_int8_t *));
143 struct mbuf *dp8390_get __P((struct dp8390_softc *, int, u_short));
144 void dp8390_read __P((struct dp8390_softc *, int, u_short));
145