dp8390var.h revision 1.8 1 /* $NetBSD: dp8390var.h,v 1.8 1998/08/12 07:19:09 scottr Exp $ */
2
3 /*
4 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
5 * adapters.
6 *
7 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
8 *
9 * Copyright (C) 1993, David Greenman. This software may be used, modified,
10 * copied, distributed, and sold, in both source and binary form provided that
11 * the above copyright and these terms are retained. Under no circumstances is
12 * the author responsible for the proper functioning of this software, nor does
13 * the author assume any responsibility for damages incurred with its use.
14 */
15
16 #define INTERFACE_NAME_LEN 32
17
18 /*
19 * dp8390_softc: per line info and status
20 */
21 struct dp8390_softc {
22 struct device sc_dev;
23 void *sc_ih;
24 int sc_flags; /* interface flags, from config */
25
26 struct ethercom sc_ec; /* ethernet common */
27 struct ifmedia sc_media; /* supported media information */
28
29 bus_space_tag_t sc_regt; /* NIC register space tag */
30 bus_space_handle_t sc_regh; /* NIC register space handle */
31 bus_space_tag_t sc_buft; /* Buffer space tag */
32 bus_space_handle_t sc_bufh; /* Buffer space handle */
33
34 bus_size_t sc_reg_map[16]; /* register map (offsets) */
35
36 int is790; /* NIC is a 790 */
37
38 u_int8_t cr_proto; /* values always set in CR */
39 u_int8_t dcr_reg; /* override DCR iff LS is set */
40
41 int mem_start; /* offset of NIC memory */
42 int mem_end; /* offset of NIC memory end */
43 int mem_size; /* total shared memory size */
44 int mem_ring; /* offset of start of RX ring-buffer */
45
46 u_short txb_cnt; /* Number of transmit buffers */
47 u_short txb_inuse; /* number of transmit buffers active */
48
49 u_short txb_new; /* pointer to where new buffer will be added */
50 u_short txb_next_tx; /* pointer to next buffer ready to xmit */
51 u_short txb_len[8]; /* buffered xmit buffer lengths */
52 u_short tx_page_start; /* first page of TX buffer area */
53 u_short rec_page_start; /* first page of RX ring-buffer */
54 u_short rec_page_stop; /* last page of RX ring-buffer */
55 u_short next_packet; /* pointer to next unread RX packet */
56
57 u_int8_t sc_enaddr[6]; /* storage for MAC address */
58
59 int sc_enabled; /* boolean; power enabled on interface */
60
61 int (*test_mem) __P((struct dp8390_softc *));
62 void (*init_card) __P((struct dp8390_softc *));
63 void (*read_hdr) __P((struct dp8390_softc *,
64 int, struct dp8390_ring *));
65 void (*recv_int) __P((struct dp8390_softc *));
66 int (*ring_copy) __P((struct dp8390_softc *,
67 int, caddr_t, u_short));
68 int (*write_mbuf) __P((struct dp8390_softc *, struct mbuf *, int));
69
70 int (*sc_enable) __P((struct dp8390_softc *));
71 void (*sc_disable) __P((struct dp8390_softc *));
72
73 int (*sc_mediachange) __P((struct dp8390_softc *));
74 void (*sc_mediastatus) __P((struct dp8390_softc *,
75 struct ifmediareq *));
76 };
77
78 /*
79 * Vendor types
80 */
81 #define DP8390_VENDOR_UNKNOWN 0xff /* Unknown network card */
82 #define DP8390_VENDOR_WD_SMC 0x00 /* Western Digital/SMC */
83 #define DP8390_VENDOR_3COM 0x01 /* 3Com */
84 #define DP8390_VENDOR_NOVELL 0x02 /* Novell */
85 #define DP8390_VENDOR_APPLE 0x10 /* Apple Ethernet card */
86 #define DP8390_VENDOR_INTERLAN 0x11 /* Interlan A310 card (GatorCard) */
87 #define DP8390_VENDOR_DAYNA 0x12 /* DaynaPORT E/30s (and others?) */
88 #define DP8390_VENDOR_ASANTE 0x13 /* Asante MacCon II/E */
89 #define DP8390_VENDOR_FARALLON 0x14 /* Farallon EtherMac II-TP */
90 #define DP8390_VENDOR_FOCUS 0x15 /* FOCUS Enhancements EtherLAN */
91 #define DP8390_VENDOR_KINETICS 0x16 /* Kinetics EtherPort SE/30 */
92 #define DP8390_VENDOR_CABLETRON 0x17 /* Cabletron Ethernet */
93
94 /*
95 * Compile-time config flags
96 */
97 /*
98 * This sets the default for enabling/disablng the tranceiver.
99 */
100 #define DP8390_DISABLE_TRANCEIVER 0x0001
101
102 /*
103 * This forces the board to be used in 8/16-bit mode even if it autoconfigs
104 * differently.
105 */
106 #define DP8390_FORCE_8BIT_MODE 0x0002
107 #define DP8390_FORCE_16BIT_MODE 0x0004
108
109 /*
110 * This disables the use of multiple transmit buffers.
111 */
112 #define DP8390_NO_MULTI_BUFFERING 0x0008
113
114 /*
115 * This forces all operations with the NIC memory to use Programmed I/O (i.e.
116 * not via shared memory).
117 */
118 #define DP8390_FORCE_PIO 0x0010
119
120 /*
121 * NIC register access macros
122 */
123 #define NIC_GET(t, h, reg) bus_space_read_1(t, h, \
124 ((sc)->sc_reg_map[reg]))
125 #define NIC_PUT(t, h, reg, val) bus_space_write_1(t, h, \
126 ((sc)->sc_reg_map[reg]), (val))
127
128 int dp8390_config __P((struct dp8390_softc *, int *, int, int));
129 int dp8390_intr __P((void *));
130 int dp8390_ioctl __P((struct ifnet *, u_long, caddr_t));
131 void dp8390_start __P((struct ifnet *));
132 void dp8390_watchdog __P((struct ifnet *));
133 void dp8390_reset __P((struct dp8390_softc *));
134 void dp8390_init __P((struct dp8390_softc *));
135 void dp8390_stop __P((struct dp8390_softc *));
136
137 void dp8390_rint __P((struct dp8390_softc *));
138
139 void dp8390_getmcaf __P((struct ethercom *, u_int8_t *));
140 struct mbuf *dp8390_get __P((struct dp8390_softc *, int, u_short));
141 void dp8390_read __P((struct dp8390_softc *, int, u_short));
142