dp83932.c revision 1.36.6.3 1 1.36.6.3 skrll /* $NetBSD: dp83932.c,v 1.36.6.3 2017/02/05 13:40:27 skrll Exp $ */
2 1.1 thorpej
3 1.1 thorpej /*-
4 1.1 thorpej * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1 thorpej * All rights reserved.
6 1.1 thorpej *
7 1.1 thorpej * This code is derived from software contributed to The NetBSD Foundation
8 1.1 thorpej * by Jason R. Thorpe.
9 1.1 thorpej *
10 1.1 thorpej * Redistribution and use in source and binary forms, with or without
11 1.1 thorpej * modification, are permitted provided that the following conditions
12 1.1 thorpej * are met:
13 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
14 1.1 thorpej * notice, this list of conditions and the following disclaimer.
15 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
17 1.1 thorpej * documentation and/or other materials provided with the distribution.
18 1.1 thorpej *
19 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 thorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 thorpej * POSSIBILITY OF SUCH DAMAGE.
30 1.1 thorpej */
31 1.1 thorpej
32 1.1 thorpej /*
33 1.1 thorpej * Device driver for the National Semiconductor DP83932
34 1.1 thorpej * Systems-Oriented Network Interface Controller (SONIC).
35 1.1 thorpej */
36 1.5 lukem
37 1.5 lukem #include <sys/cdefs.h>
38 1.36.6.3 skrll __KERNEL_RCSID(0, "$NetBSD: dp83932.c,v 1.36.6.3 2017/02/05 13:40:27 skrll Exp $");
39 1.1 thorpej
40 1.1 thorpej #include <sys/param.h>
41 1.1 thorpej #include <sys/systm.h>
42 1.1 thorpej #include <sys/mbuf.h>
43 1.1 thorpej #include <sys/malloc.h>
44 1.1 thorpej #include <sys/kernel.h>
45 1.1 thorpej #include <sys/socket.h>
46 1.1 thorpej #include <sys/ioctl.h>
47 1.1 thorpej #include <sys/errno.h>
48 1.1 thorpej #include <sys/device.h>
49 1.1 thorpej
50 1.1 thorpej #include <net/if.h>
51 1.1 thorpej #include <net/if_dl.h>
52 1.1 thorpej #include <net/if_ether.h>
53 1.1 thorpej
54 1.1 thorpej #include <net/bpf.h>
55 1.1 thorpej
56 1.19 ad #include <sys/bus.h>
57 1.19 ad #include <sys/intr.h>
58 1.1 thorpej
59 1.1 thorpej #include <dev/ic/dp83932reg.h>
60 1.1 thorpej #include <dev/ic/dp83932var.h>
61 1.1 thorpej
62 1.31 tsutsui static void sonic_start(struct ifnet *);
63 1.31 tsutsui static void sonic_watchdog(struct ifnet *);
64 1.31 tsutsui static int sonic_ioctl(struct ifnet *, u_long, void *);
65 1.31 tsutsui static int sonic_init(struct ifnet *);
66 1.31 tsutsui static void sonic_stop(struct ifnet *, int);
67 1.31 tsutsui
68 1.31 tsutsui static bool sonic_shutdown(device_t, int);
69 1.31 tsutsui
70 1.31 tsutsui static void sonic_reset(struct sonic_softc *);
71 1.31 tsutsui static void sonic_rxdrain(struct sonic_softc *);
72 1.31 tsutsui static int sonic_add_rxbuf(struct sonic_softc *, int);
73 1.31 tsutsui static void sonic_set_filter(struct sonic_softc *);
74 1.1 thorpej
75 1.31 tsutsui static uint16_t sonic_txintr(struct sonic_softc *);
76 1.31 tsutsui static void sonic_rxintr(struct sonic_softc *);
77 1.1 thorpej
78 1.1 thorpej int sonic_copy_small = 0;
79 1.1 thorpej
80 1.6 bouyer #define ETHER_PAD_LEN (ETHER_MIN_LEN - ETHER_CRC_LEN)
81 1.6 bouyer
82 1.1 thorpej /*
83 1.1 thorpej * sonic_attach:
84 1.1 thorpej *
85 1.1 thorpej * Attach a SONIC interface to the system.
86 1.1 thorpej */
87 1.1 thorpej void
88 1.1 thorpej sonic_attach(struct sonic_softc *sc, const uint8_t *enaddr)
89 1.1 thorpej {
90 1.1 thorpej struct ifnet *ifp = &sc->sc_ethercom.ec_if;
91 1.1 thorpej int i, rseg, error;
92 1.1 thorpej bus_dma_segment_t seg;
93 1.1 thorpej size_t cdatasize;
94 1.25 tsutsui uint8_t *nullbuf;
95 1.1 thorpej
96 1.1 thorpej /*
97 1.1 thorpej * Allocate the control data structures, and create and load the
98 1.1 thorpej * DMA map for it.
99 1.1 thorpej */
100 1.1 thorpej if (sc->sc_32bit)
101 1.1 thorpej cdatasize = sizeof(struct sonic_control_data32);
102 1.1 thorpej else
103 1.1 thorpej cdatasize = sizeof(struct sonic_control_data16);
104 1.1 thorpej
105 1.6 bouyer if ((error = bus_dmamem_alloc(sc->sc_dmat, cdatasize + ETHER_PAD_LEN,
106 1.1 thorpej PAGE_SIZE, (64 * 1024), &seg, 1, &rseg,
107 1.1 thorpej BUS_DMA_NOWAIT)) != 0) {
108 1.25 tsutsui aprint_error_dev(sc->sc_dev,
109 1.25 tsutsui "unable to allocate control data, error = %d\n", error);
110 1.1 thorpej goto fail_0;
111 1.1 thorpej }
112 1.1 thorpej
113 1.1 thorpej if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
114 1.14 christos cdatasize + ETHER_PAD_LEN, (void **) &sc->sc_cdata16,
115 1.1 thorpej BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
116 1.25 tsutsui aprint_error_dev(sc->sc_dev,
117 1.25 tsutsui "unable to map control data, error = %d\n", error);
118 1.1 thorpej goto fail_1;
119 1.1 thorpej }
120 1.25 tsutsui nullbuf = (uint8_t *)sc->sc_cdata16 + cdatasize;
121 1.6 bouyer memset(nullbuf, 0, ETHER_PAD_LEN);
122 1.1 thorpej
123 1.1 thorpej if ((error = bus_dmamap_create(sc->sc_dmat,
124 1.1 thorpej cdatasize, 1, cdatasize, 0, BUS_DMA_NOWAIT,
125 1.1 thorpej &sc->sc_cddmamap)) != 0) {
126 1.25 tsutsui aprint_error_dev(sc->sc_dev,
127 1.25 tsutsui "unable to create control data DMA map, error = %d\n",
128 1.25 tsutsui error);
129 1.1 thorpej goto fail_2;
130 1.1 thorpej }
131 1.1 thorpej
132 1.1 thorpej if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
133 1.1 thorpej sc->sc_cdata16, cdatasize, NULL, BUS_DMA_NOWAIT)) != 0) {
134 1.25 tsutsui aprint_error_dev(sc->sc_dev,
135 1.25 tsutsui "unable to load control data DMA map, error = %d\n", error);
136 1.1 thorpej goto fail_3;
137 1.1 thorpej }
138 1.1 thorpej
139 1.1 thorpej /*
140 1.1 thorpej * Create the transmit buffer DMA maps.
141 1.1 thorpej */
142 1.1 thorpej for (i = 0; i < SONIC_NTXDESC; i++) {
143 1.1 thorpej if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
144 1.1 thorpej SONIC_NTXFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT,
145 1.1 thorpej &sc->sc_txsoft[i].ds_dmamap)) != 0) {
146 1.25 tsutsui aprint_error_dev(sc->sc_dev,
147 1.25 tsutsui "unable to create tx DMA map %d, error = %d\n",
148 1.25 tsutsui i, error);
149 1.1 thorpej goto fail_4;
150 1.1 thorpej }
151 1.1 thorpej }
152 1.1 thorpej
153 1.1 thorpej /*
154 1.1 thorpej * Create the receive buffer DMA maps.
155 1.1 thorpej */
156 1.1 thorpej for (i = 0; i < SONIC_NRXDESC; i++) {
157 1.1 thorpej if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
158 1.1 thorpej MCLBYTES, 0, BUS_DMA_NOWAIT,
159 1.1 thorpej &sc->sc_rxsoft[i].ds_dmamap)) != 0) {
160 1.25 tsutsui aprint_error_dev(sc->sc_dev,
161 1.25 tsutsui "unable to create rx DMA map %d, error = %d\n",
162 1.25 tsutsui i, error);
163 1.1 thorpej goto fail_5;
164 1.1 thorpej }
165 1.1 thorpej sc->sc_rxsoft[i].ds_mbuf = NULL;
166 1.1 thorpej }
167 1.1 thorpej
168 1.1 thorpej /*
169 1.6 bouyer * create and map the pad buffer
170 1.6 bouyer */
171 1.6 bouyer if ((error = bus_dmamap_create(sc->sc_dmat, ETHER_PAD_LEN, 1,
172 1.8 tsutsui ETHER_PAD_LEN, 0, BUS_DMA_NOWAIT, &sc->sc_nulldmamap)) != 0) {
173 1.25 tsutsui aprint_error_dev(sc->sc_dev,
174 1.25 tsutsui "unable to create pad buffer DMA map, error = %d\n", error);
175 1.6 bouyer goto fail_5;
176 1.6 bouyer }
177 1.6 bouyer
178 1.6 bouyer if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_nulldmamap,
179 1.6 bouyer nullbuf, ETHER_PAD_LEN, NULL, BUS_DMA_NOWAIT)) != 0) {
180 1.25 tsutsui aprint_error_dev(sc->sc_dev,
181 1.25 tsutsui "unable to load pad buffer DMA map, error = %d\n", error);
182 1.6 bouyer goto fail_6;
183 1.6 bouyer }
184 1.6 bouyer bus_dmamap_sync(sc->sc_dmat, sc->sc_nulldmamap, 0, ETHER_PAD_LEN,
185 1.6 bouyer BUS_DMASYNC_PREWRITE);
186 1.6 bouyer
187 1.6 bouyer /*
188 1.1 thorpej * Reset the chip to a known state.
189 1.1 thorpej */
190 1.1 thorpej sonic_reset(sc);
191 1.1 thorpej
192 1.25 tsutsui aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n",
193 1.1 thorpej ether_sprintf(enaddr));
194 1.1 thorpej
195 1.25 tsutsui strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
196 1.1 thorpej ifp->if_softc = sc;
197 1.1 thorpej ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
198 1.1 thorpej ifp->if_ioctl = sonic_ioctl;
199 1.1 thorpej ifp->if_start = sonic_start;
200 1.1 thorpej ifp->if_watchdog = sonic_watchdog;
201 1.1 thorpej ifp->if_init = sonic_init;
202 1.1 thorpej ifp->if_stop = sonic_stop;
203 1.1 thorpej IFQ_SET_READY(&ifp->if_snd);
204 1.1 thorpej
205 1.1 thorpej /*
206 1.27 tsutsui * We can support 802.1Q VLAN-sized frames.
207 1.22 tsutsui */
208 1.22 tsutsui sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
209 1.22 tsutsui
210 1.22 tsutsui /*
211 1.1 thorpej * Attach the interface.
212 1.1 thorpej */
213 1.1 thorpej if_attach(ifp);
214 1.1 thorpej ether_ifattach(ifp, enaddr);
215 1.1 thorpej
216 1.1 thorpej /*
217 1.1 thorpej * Make sure the interface is shutdown during reboot.
218 1.1 thorpej */
219 1.30 tsutsui if (pmf_device_register1(sc->sc_dev, NULL, NULL, sonic_shutdown))
220 1.32 tsutsui pmf_class_network_register(sc->sc_dev, ifp);
221 1.30 tsutsui else
222 1.25 tsutsui aprint_error_dev(sc->sc_dev,
223 1.29 tsutsui "couldn't establish power handler\n");
224 1.29 tsutsui
225 1.1 thorpej return;
226 1.1 thorpej
227 1.1 thorpej /*
228 1.1 thorpej * Free any resources we've allocated during the failed attach
229 1.1 thorpej * attempt. Do this in reverse order and fall through.
230 1.1 thorpej */
231 1.6 bouyer fail_6:
232 1.6 bouyer bus_dmamap_destroy(sc->sc_dmat, sc->sc_nulldmamap);
233 1.1 thorpej fail_5:
234 1.1 thorpej for (i = 0; i < SONIC_NRXDESC; i++) {
235 1.1 thorpej if (sc->sc_rxsoft[i].ds_dmamap != NULL)
236 1.1 thorpej bus_dmamap_destroy(sc->sc_dmat,
237 1.1 thorpej sc->sc_rxsoft[i].ds_dmamap);
238 1.1 thorpej }
239 1.1 thorpej fail_4:
240 1.1 thorpej for (i = 0; i < SONIC_NTXDESC; i++) {
241 1.1 thorpej if (sc->sc_txsoft[i].ds_dmamap != NULL)
242 1.1 thorpej bus_dmamap_destroy(sc->sc_dmat,
243 1.1 thorpej sc->sc_txsoft[i].ds_dmamap);
244 1.1 thorpej }
245 1.1 thorpej bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
246 1.1 thorpej fail_3:
247 1.1 thorpej bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
248 1.1 thorpej fail_2:
249 1.25 tsutsui bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_cdata16, cdatasize);
250 1.1 thorpej fail_1:
251 1.1 thorpej bus_dmamem_free(sc->sc_dmat, &seg, rseg);
252 1.1 thorpej fail_0:
253 1.1 thorpej return;
254 1.1 thorpej }
255 1.1 thorpej
256 1.1 thorpej /*
257 1.1 thorpej * sonic_shutdown:
258 1.1 thorpej *
259 1.1 thorpej * Make sure the interface is stopped at reboot.
260 1.1 thorpej */
261 1.28 tsutsui bool
262 1.28 tsutsui sonic_shutdown(device_t self, int howto)
263 1.1 thorpej {
264 1.28 tsutsui struct sonic_softc *sc = device_private(self);
265 1.1 thorpej
266 1.1 thorpej sonic_stop(&sc->sc_ethercom.ec_if, 1);
267 1.28 tsutsui
268 1.28 tsutsui return true;
269 1.1 thorpej }
270 1.1 thorpej
271 1.1 thorpej /*
272 1.1 thorpej * sonic_start: [ifnet interface function]
273 1.1 thorpej *
274 1.1 thorpej * Start packet transmission on the interface.
275 1.1 thorpej */
276 1.1 thorpej void
277 1.1 thorpej sonic_start(struct ifnet *ifp)
278 1.1 thorpej {
279 1.1 thorpej struct sonic_softc *sc = ifp->if_softc;
280 1.1 thorpej struct mbuf *m0, *m;
281 1.1 thorpej struct sonic_tda16 *tda16;
282 1.1 thorpej struct sonic_tda32 *tda32;
283 1.1 thorpej struct sonic_descsoft *ds;
284 1.1 thorpej bus_dmamap_t dmamap;
285 1.9 tsutsui int error, olasttx, nexttx, opending, totlen, olseg;
286 1.9 tsutsui int seg = 0; /* XXX: gcc */
287 1.1 thorpej
288 1.1 thorpej if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
289 1.1 thorpej return;
290 1.1 thorpej
291 1.1 thorpej /*
292 1.1 thorpej * Remember the previous txpending and the current "last txdesc
293 1.1 thorpej * used" index.
294 1.1 thorpej */
295 1.1 thorpej opending = sc->sc_txpending;
296 1.1 thorpej olasttx = sc->sc_txlast;
297 1.1 thorpej
298 1.1 thorpej /*
299 1.1 thorpej * Loop through the send queue, setting up transmit descriptors
300 1.1 thorpej * until we drain the queue, or use up all available transmit
301 1.1 thorpej * descriptors. Leave one at the end for sanity's sake.
302 1.1 thorpej */
303 1.1 thorpej while (sc->sc_txpending < (SONIC_NTXDESC - 1)) {
304 1.1 thorpej /*
305 1.1 thorpej * Grab a packet off the queue.
306 1.1 thorpej */
307 1.1 thorpej IFQ_POLL(&ifp->if_snd, m0);
308 1.1 thorpej if (m0 == NULL)
309 1.1 thorpej break;
310 1.1 thorpej m = NULL;
311 1.1 thorpej
312 1.1 thorpej /*
313 1.1 thorpej * Get the next available transmit descriptor.
314 1.1 thorpej */
315 1.1 thorpej nexttx = SONIC_NEXTTX(sc->sc_txlast);
316 1.1 thorpej ds = &sc->sc_txsoft[nexttx];
317 1.1 thorpej dmamap = ds->ds_dmamap;
318 1.1 thorpej
319 1.1 thorpej /*
320 1.1 thorpej * Load the DMA map. If this fails, the packet either
321 1.1 thorpej * didn't fit in the allotted number of frags, or we were
322 1.1 thorpej * short on resources. In this case, we'll copy and try
323 1.1 thorpej * again.
324 1.1 thorpej */
325 1.6 bouyer if ((error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
326 1.6 bouyer BUS_DMA_WRITE|BUS_DMA_NOWAIT)) != 0 ||
327 1.6 bouyer (m0->m_pkthdr.len < ETHER_PAD_LEN &&
328 1.7 tsutsui dmamap->dm_nsegs == SONIC_NTXFRAGS)) {
329 1.6 bouyer if (error == 0)
330 1.6 bouyer bus_dmamap_unload(sc->sc_dmat, dmamap);
331 1.1 thorpej MGETHDR(m, M_DONTWAIT, MT_DATA);
332 1.1 thorpej if (m == NULL) {
333 1.25 tsutsui printf("%s: unable to allocate Tx mbuf\n",
334 1.25 tsutsui device_xname(sc->sc_dev));
335 1.1 thorpej break;
336 1.1 thorpej }
337 1.1 thorpej if (m0->m_pkthdr.len > MHLEN) {
338 1.1 thorpej MCLGET(m, M_DONTWAIT);
339 1.1 thorpej if ((m->m_flags & M_EXT) == 0) {
340 1.25 tsutsui printf("%s: unable to allocate Tx "
341 1.25 tsutsui "cluster\n",
342 1.25 tsutsui device_xname(sc->sc_dev));
343 1.1 thorpej m_freem(m);
344 1.1 thorpej break;
345 1.1 thorpej }
346 1.1 thorpej }
347 1.14 christos m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, void *));
348 1.1 thorpej m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len;
349 1.1 thorpej error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
350 1.3 thorpej m, BUS_DMA_WRITE|BUS_DMA_NOWAIT);
351 1.1 thorpej if (error) {
352 1.25 tsutsui printf("%s: unable to load Tx buffer, "
353 1.25 tsutsui "error = %d\n", device_xname(sc->sc_dev),
354 1.25 tsutsui error);
355 1.1 thorpej m_freem(m);
356 1.1 thorpej break;
357 1.1 thorpej }
358 1.1 thorpej }
359 1.1 thorpej IFQ_DEQUEUE(&ifp->if_snd, m0);
360 1.1 thorpej if (m != NULL) {
361 1.1 thorpej m_freem(m0);
362 1.1 thorpej m0 = m;
363 1.1 thorpej }
364 1.1 thorpej
365 1.1 thorpej /*
366 1.1 thorpej * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET.
367 1.1 thorpej */
368 1.1 thorpej
369 1.1 thorpej /* Sync the DMA map. */
370 1.1 thorpej bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
371 1.1 thorpej BUS_DMASYNC_PREWRITE);
372 1.1 thorpej
373 1.1 thorpej /*
374 1.1 thorpej * Store a pointer to the packet so we can free it later.
375 1.1 thorpej */
376 1.1 thorpej ds->ds_mbuf = m0;
377 1.1 thorpej
378 1.1 thorpej /*
379 1.1 thorpej * Initialize the transmit descriptor.
380 1.1 thorpej */
381 1.1 thorpej totlen = 0;
382 1.1 thorpej if (sc->sc_32bit) {
383 1.1 thorpej tda32 = &sc->sc_tda32[nexttx];
384 1.1 thorpej for (seg = 0; seg < dmamap->dm_nsegs; seg++) {
385 1.1 thorpej tda32->tda_frags[seg].frag_ptr1 =
386 1.1 thorpej htosonic32(sc,
387 1.1 thorpej (dmamap->dm_segs[seg].ds_addr >> 16) &
388 1.1 thorpej 0xffff);
389 1.1 thorpej tda32->tda_frags[seg].frag_ptr0 =
390 1.1 thorpej htosonic32(sc,
391 1.1 thorpej dmamap->dm_segs[seg].ds_addr & 0xffff);
392 1.1 thorpej tda32->tda_frags[seg].frag_size =
393 1.1 thorpej htosonic32(sc, dmamap->dm_segs[seg].ds_len);
394 1.1 thorpej totlen += dmamap->dm_segs[seg].ds_len;
395 1.1 thorpej }
396 1.6 bouyer if (totlen < ETHER_PAD_LEN) {
397 1.6 bouyer tda32->tda_frags[seg].frag_ptr1 =
398 1.6 bouyer htosonic32(sc,
399 1.7 tsutsui (sc->sc_nulldma >> 16) & 0xffff);
400 1.6 bouyer tda32->tda_frags[seg].frag_ptr0 =
401 1.8 tsutsui htosonic32(sc, sc->sc_nulldma & 0xffff);
402 1.6 bouyer tda32->tda_frags[seg].frag_size =
403 1.6 bouyer htosonic32(sc, ETHER_PAD_LEN - totlen);
404 1.6 bouyer totlen = ETHER_PAD_LEN;
405 1.8 tsutsui seg++;
406 1.1 thorpej }
407 1.12 perry
408 1.1 thorpej tda32->tda_status = 0;
409 1.1 thorpej tda32->tda_pktconfig = 0;
410 1.1 thorpej tda32->tda_pktsize = htosonic32(sc, totlen);
411 1.1 thorpej tda32->tda_fragcnt = htosonic32(sc, seg);
412 1.1 thorpej
413 1.1 thorpej /* Link it up. */
414 1.1 thorpej tda32->tda_frags[seg].frag_ptr0 =
415 1.2 thorpej htosonic32(sc, SONIC_CDTXADDR32(sc,
416 1.1 thorpej SONIC_NEXTTX(nexttx)) & 0xffff);
417 1.2 thorpej
418 1.2 thorpej /* Sync the Tx descriptor. */
419 1.2 thorpej SONIC_CDTXSYNC32(sc, nexttx,
420 1.2 thorpej BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
421 1.1 thorpej } else {
422 1.1 thorpej tda16 = &sc->sc_tda16[nexttx];
423 1.1 thorpej for (seg = 0; seg < dmamap->dm_nsegs; seg++) {
424 1.1 thorpej tda16->tda_frags[seg].frag_ptr1 =
425 1.1 thorpej htosonic16(sc,
426 1.1 thorpej (dmamap->dm_segs[seg].ds_addr >> 16) &
427 1.1 thorpej 0xffff);
428 1.1 thorpej tda16->tda_frags[seg].frag_ptr0 =
429 1.1 thorpej htosonic16(sc,
430 1.1 thorpej dmamap->dm_segs[seg].ds_addr & 0xffff);
431 1.1 thorpej tda16->tda_frags[seg].frag_size =
432 1.1 thorpej htosonic16(sc, dmamap->dm_segs[seg].ds_len);
433 1.1 thorpej totlen += dmamap->dm_segs[seg].ds_len;
434 1.1 thorpej }
435 1.6 bouyer if (totlen < ETHER_PAD_LEN) {
436 1.6 bouyer tda16->tda_frags[seg].frag_ptr1 =
437 1.6 bouyer htosonic16(sc,
438 1.6 bouyer (sc->sc_nulldma >> 16) & 0xffff);
439 1.6 bouyer tda16->tda_frags[seg].frag_ptr0 =
440 1.8 tsutsui htosonic16(sc, sc->sc_nulldma & 0xffff);
441 1.6 bouyer tda16->tda_frags[seg].frag_size =
442 1.6 bouyer htosonic16(sc, ETHER_PAD_LEN - totlen);
443 1.6 bouyer totlen = ETHER_PAD_LEN;
444 1.8 tsutsui seg++;
445 1.1 thorpej }
446 1.1 thorpej
447 1.1 thorpej tda16->tda_status = 0;
448 1.1 thorpej tda16->tda_pktconfig = 0;
449 1.1 thorpej tda16->tda_pktsize = htosonic16(sc, totlen);
450 1.1 thorpej tda16->tda_fragcnt = htosonic16(sc, seg);
451 1.1 thorpej
452 1.1 thorpej /* Link it up. */
453 1.1 thorpej tda16->tda_frags[seg].frag_ptr0 =
454 1.2 thorpej htosonic16(sc, SONIC_CDTXADDR16(sc,
455 1.1 thorpej SONIC_NEXTTX(nexttx)) & 0xffff);
456 1.2 thorpej
457 1.2 thorpej /* Sync the Tx descriptor. */
458 1.2 thorpej SONIC_CDTXSYNC16(sc, nexttx,
459 1.2 thorpej BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
460 1.1 thorpej }
461 1.1 thorpej
462 1.1 thorpej /* Advance the Tx pointer. */
463 1.1 thorpej sc->sc_txpending++;
464 1.1 thorpej sc->sc_txlast = nexttx;
465 1.1 thorpej
466 1.1 thorpej /*
467 1.1 thorpej * Pass the packet to any BPF listeners.
468 1.1 thorpej */
469 1.34 joerg bpf_mtap(ifp, m0);
470 1.1 thorpej }
471 1.1 thorpej
472 1.1 thorpej if (sc->sc_txpending == (SONIC_NTXDESC - 1)) {
473 1.1 thorpej /* No more slots left; notify upper layer. */
474 1.1 thorpej ifp->if_flags |= IFF_OACTIVE;
475 1.1 thorpej }
476 1.1 thorpej
477 1.1 thorpej if (sc->sc_txpending != opending) {
478 1.1 thorpej /*
479 1.1 thorpej * We enqueued packets. If the transmitter was idle,
480 1.1 thorpej * reset the txdirty pointer.
481 1.1 thorpej */
482 1.1 thorpej if (opending == 0)
483 1.1 thorpej sc->sc_txdirty = SONIC_NEXTTX(olasttx);
484 1.1 thorpej
485 1.1 thorpej /*
486 1.1 thorpej * Stop the SONIC on the last packet we've set up,
487 1.1 thorpej * and clear end-of-list on the descriptor previous
488 1.1 thorpej * to our new chain.
489 1.1 thorpej *
490 1.1 thorpej * NOTE: our `seg' variable should still be valid!
491 1.1 thorpej */
492 1.1 thorpej if (sc->sc_32bit) {
493 1.1 thorpej olseg =
494 1.1 thorpej sonic32toh(sc, sc->sc_tda32[olasttx].tda_fragcnt);
495 1.1 thorpej sc->sc_tda32[sc->sc_txlast].tda_frags[seg].frag_ptr0 |=
496 1.1 thorpej htosonic32(sc, TDA_LINK_EOL);
497 1.2 thorpej SONIC_CDTXSYNC32(sc, sc->sc_txlast,
498 1.1 thorpej BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
499 1.1 thorpej sc->sc_tda32[olasttx].tda_frags[olseg].frag_ptr0 &=
500 1.1 thorpej htosonic32(sc, ~TDA_LINK_EOL);
501 1.2 thorpej SONIC_CDTXSYNC32(sc, olasttx,
502 1.1 thorpej BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
503 1.1 thorpej } else {
504 1.1 thorpej olseg =
505 1.1 thorpej sonic16toh(sc, sc->sc_tda16[olasttx].tda_fragcnt);
506 1.1 thorpej sc->sc_tda16[sc->sc_txlast].tda_frags[seg].frag_ptr0 |=
507 1.1 thorpej htosonic16(sc, TDA_LINK_EOL);
508 1.2 thorpej SONIC_CDTXSYNC16(sc, sc->sc_txlast,
509 1.1 thorpej BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
510 1.1 thorpej sc->sc_tda16[olasttx].tda_frags[olseg].frag_ptr0 &=
511 1.1 thorpej htosonic16(sc, ~TDA_LINK_EOL);
512 1.2 thorpej SONIC_CDTXSYNC16(sc, olasttx,
513 1.1 thorpej BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
514 1.1 thorpej }
515 1.1 thorpej
516 1.1 thorpej /* Start the transmitter. */
517 1.1 thorpej CSR_WRITE(sc, SONIC_CR, CR_TXP);
518 1.1 thorpej
519 1.1 thorpej /* Set a watchdog timer in case the chip flakes out. */
520 1.1 thorpej ifp->if_timer = 5;
521 1.1 thorpej }
522 1.1 thorpej }
523 1.1 thorpej
524 1.1 thorpej /*
525 1.1 thorpej * sonic_watchdog: [ifnet interface function]
526 1.1 thorpej *
527 1.1 thorpej * Watchdog timer handler.
528 1.1 thorpej */
529 1.1 thorpej void
530 1.1 thorpej sonic_watchdog(struct ifnet *ifp)
531 1.1 thorpej {
532 1.1 thorpej struct sonic_softc *sc = ifp->if_softc;
533 1.1 thorpej
534 1.25 tsutsui printf("%s: device timeout\n", device_xname(sc->sc_dev));
535 1.1 thorpej ifp->if_oerrors++;
536 1.1 thorpej
537 1.25 tsutsui (void)sonic_init(ifp);
538 1.1 thorpej }
539 1.1 thorpej
540 1.1 thorpej /*
541 1.1 thorpej * sonic_ioctl: [ifnet interface function]
542 1.1 thorpej *
543 1.1 thorpej * Handle control requests from the operator.
544 1.1 thorpej */
545 1.1 thorpej int
546 1.14 christos sonic_ioctl(struct ifnet *ifp, u_long cmd, void *data)
547 1.1 thorpej {
548 1.1 thorpej int s, error;
549 1.1 thorpej
550 1.1 thorpej s = splnet();
551 1.1 thorpej
552 1.20 dyoung error = ether_ioctl(ifp, cmd, data);
553 1.20 dyoung if (error == ENETRESET) {
554 1.20 dyoung /*
555 1.20 dyoung * Multicast list has changed; set the hardware
556 1.20 dyoung * filter accordingly.
557 1.20 dyoung */
558 1.20 dyoung if (ifp->if_flags & IFF_RUNNING)
559 1.25 tsutsui (void)sonic_init(ifp);
560 1.20 dyoung error = 0;
561 1.1 thorpej }
562 1.1 thorpej
563 1.1 thorpej splx(s);
564 1.25 tsutsui return error;
565 1.1 thorpej }
566 1.1 thorpej
567 1.1 thorpej /*
568 1.1 thorpej * sonic_intr:
569 1.1 thorpej *
570 1.1 thorpej * Interrupt service routine.
571 1.1 thorpej */
572 1.1 thorpej int
573 1.1 thorpej sonic_intr(void *arg)
574 1.1 thorpej {
575 1.1 thorpej struct sonic_softc *sc = arg;
576 1.1 thorpej struct ifnet *ifp = &sc->sc_ethercom.ec_if;
577 1.1 thorpej uint16_t isr;
578 1.1 thorpej int handled = 0, wantinit;
579 1.1 thorpej
580 1.1 thorpej for (wantinit = 0; wantinit == 0;) {
581 1.1 thorpej isr = CSR_READ(sc, SONIC_ISR) & sc->sc_imr;
582 1.1 thorpej if (isr == 0)
583 1.1 thorpej break;
584 1.1 thorpej CSR_WRITE(sc, SONIC_ISR, isr); /* ACK */
585 1.1 thorpej
586 1.1 thorpej handled = 1;
587 1.1 thorpej
588 1.1 thorpej if (isr & IMR_PRX)
589 1.1 thorpej sonic_rxintr(sc);
590 1.1 thorpej
591 1.1 thorpej if (isr & (IMR_PTX|IMR_TXER)) {
592 1.1 thorpej if (sonic_txintr(sc) & TCR_FU) {
593 1.1 thorpej printf("%s: transmit FIFO underrun\n",
594 1.25 tsutsui device_xname(sc->sc_dev));
595 1.1 thorpej wantinit = 1;
596 1.1 thorpej }
597 1.1 thorpej }
598 1.1 thorpej
599 1.1 thorpej if (isr & (IMR_RFO|IMR_RBA|IMR_RBE|IMR_RDE)) {
600 1.1 thorpej #define PRINTERR(bit, str) \
601 1.1 thorpej if (isr & (bit)) \
602 1.25 tsutsui printf("%s: %s\n",device_xname(sc->sc_dev), str)
603 1.1 thorpej PRINTERR(IMR_RFO, "receive FIFO overrun");
604 1.1 thorpej PRINTERR(IMR_RBA, "receive buffer exceeded");
605 1.1 thorpej PRINTERR(IMR_RBE, "receive buffers exhausted");
606 1.1 thorpej PRINTERR(IMR_RDE, "receive descriptors exhausted");
607 1.1 thorpej wantinit = 1;
608 1.1 thorpej }
609 1.1 thorpej }
610 1.1 thorpej
611 1.1 thorpej if (handled) {
612 1.1 thorpej if (wantinit)
613 1.25 tsutsui (void)sonic_init(ifp);
614 1.1 thorpej sonic_start(ifp);
615 1.1 thorpej }
616 1.1 thorpej
617 1.25 tsutsui return handled;
618 1.1 thorpej }
619 1.1 thorpej
620 1.1 thorpej /*
621 1.1 thorpej * sonic_txintr:
622 1.1 thorpej *
623 1.1 thorpej * Helper; handle transmit complete interrupts.
624 1.1 thorpej */
625 1.1 thorpej uint16_t
626 1.1 thorpej sonic_txintr(struct sonic_softc *sc)
627 1.1 thorpej {
628 1.1 thorpej struct ifnet *ifp = &sc->sc_ethercom.ec_if;
629 1.1 thorpej struct sonic_descsoft *ds;
630 1.1 thorpej struct sonic_tda32 *tda32;
631 1.1 thorpej struct sonic_tda16 *tda16;
632 1.1 thorpej uint16_t status, totstat = 0;
633 1.1 thorpej int i;
634 1.1 thorpej
635 1.1 thorpej ifp->if_flags &= ~IFF_OACTIVE;
636 1.1 thorpej
637 1.1 thorpej for (i = sc->sc_txdirty; sc->sc_txpending != 0;
638 1.1 thorpej i = SONIC_NEXTTX(i), sc->sc_txpending--) {
639 1.1 thorpej ds = &sc->sc_txsoft[i];
640 1.1 thorpej
641 1.1 thorpej if (sc->sc_32bit) {
642 1.2 thorpej SONIC_CDTXSYNC32(sc, i,
643 1.2 thorpej BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
644 1.1 thorpej tda32 = &sc->sc_tda32[i];
645 1.1 thorpej status = sonic32toh(sc, tda32->tda_status);
646 1.15 tsutsui SONIC_CDTXSYNC32(sc, i, BUS_DMASYNC_PREREAD);
647 1.1 thorpej } else {
648 1.2 thorpej SONIC_CDTXSYNC16(sc, i,
649 1.2 thorpej BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
650 1.1 thorpej tda16 = &sc->sc_tda16[i];
651 1.1 thorpej status = sonic16toh(sc, tda16->tda_status);
652 1.15 tsutsui SONIC_CDTXSYNC16(sc, i, BUS_DMASYNC_PREREAD);
653 1.1 thorpej }
654 1.1 thorpej
655 1.1 thorpej if ((status & ~(TCR_EXDIS|TCR_CRCI|TCR_POWC|TCR_PINT)) == 0)
656 1.1 thorpej break;
657 1.1 thorpej
658 1.1 thorpej totstat |= status;
659 1.1 thorpej
660 1.1 thorpej bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
661 1.1 thorpej ds->ds_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
662 1.1 thorpej bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
663 1.1 thorpej m_freem(ds->ds_mbuf);
664 1.1 thorpej ds->ds_mbuf = NULL;
665 1.1 thorpej
666 1.1 thorpej /*
667 1.1 thorpej * Check for errors and collisions.
668 1.1 thorpej */
669 1.1 thorpej if (status & TCR_PTX)
670 1.1 thorpej ifp->if_opackets++;
671 1.1 thorpej else
672 1.1 thorpej ifp->if_oerrors++;
673 1.1 thorpej ifp->if_collisions += TDA_STATUS_NCOL(status);
674 1.1 thorpej }
675 1.1 thorpej
676 1.1 thorpej /* Update the dirty transmit buffer pointer. */
677 1.1 thorpej sc->sc_txdirty = i;
678 1.1 thorpej
679 1.1 thorpej /*
680 1.1 thorpej * Cancel the watchdog timer if there are no pending
681 1.1 thorpej * transmissions.
682 1.1 thorpej */
683 1.1 thorpej if (sc->sc_txpending == 0)
684 1.1 thorpej ifp->if_timer = 0;
685 1.1 thorpej
686 1.25 tsutsui return totstat;
687 1.1 thorpej }
688 1.1 thorpej
689 1.1 thorpej /*
690 1.1 thorpej * sonic_rxintr:
691 1.1 thorpej *
692 1.1 thorpej * Helper; handle receive interrupts.
693 1.1 thorpej */
694 1.1 thorpej void
695 1.1 thorpej sonic_rxintr(struct sonic_softc *sc)
696 1.1 thorpej {
697 1.1 thorpej struct ifnet *ifp = &sc->sc_ethercom.ec_if;
698 1.1 thorpej struct sonic_descsoft *ds;
699 1.1 thorpej struct sonic_rda32 *rda32;
700 1.1 thorpej struct sonic_rda16 *rda16;
701 1.1 thorpej struct mbuf *m;
702 1.1 thorpej int i, len;
703 1.36 martin uint16_t status, bytecount /*, ptr0, ptr1, seqno */;
704 1.1 thorpej
705 1.1 thorpej for (i = sc->sc_rxptr;; i = SONIC_NEXTRX(i)) {
706 1.1 thorpej ds = &sc->sc_rxsoft[i];
707 1.1 thorpej
708 1.1 thorpej if (sc->sc_32bit) {
709 1.2 thorpej SONIC_CDRXSYNC32(sc, i,
710 1.2 thorpej BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
711 1.1 thorpej rda32 = &sc->sc_rda32[i];
712 1.15 tsutsui SONIC_CDRXSYNC32(sc, i, BUS_DMASYNC_PREREAD);
713 1.1 thorpej if (rda32->rda_inuse != 0)
714 1.1 thorpej break;
715 1.1 thorpej status = sonic32toh(sc, rda32->rda_status);
716 1.1 thorpej bytecount = sonic32toh(sc, rda32->rda_bytecount);
717 1.36 martin /* ptr0 = sonic32toh(sc, rda32->rda_pkt_ptr0); */
718 1.36 martin /* ptr1 = sonic32toh(sc, rda32->rda_pkt_ptr1); */
719 1.36 martin /* seqno = sonic32toh(sc, rda32->rda_seqno); */
720 1.1 thorpej } else {
721 1.2 thorpej SONIC_CDRXSYNC16(sc, i,
722 1.2 thorpej BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
723 1.1 thorpej rda16 = &sc->sc_rda16[i];
724 1.15 tsutsui SONIC_CDRXSYNC16(sc, i, BUS_DMASYNC_PREREAD);
725 1.1 thorpej if (rda16->rda_inuse != 0)
726 1.1 thorpej break;
727 1.1 thorpej status = sonic16toh(sc, rda16->rda_status);
728 1.1 thorpej bytecount = sonic16toh(sc, rda16->rda_bytecount);
729 1.36 martin /* ptr0 = sonic16toh(sc, rda16->rda_pkt_ptr0); */
730 1.36 martin /* ptr1 = sonic16toh(sc, rda16->rda_pkt_ptr1); */
731 1.36 martin /* seqno = sonic16toh(sc, rda16->rda_seqno); */
732 1.1 thorpej }
733 1.1 thorpej
734 1.1 thorpej /*
735 1.1 thorpej * Make absolutely sure this is the only packet
736 1.1 thorpej * in this receive buffer. Our entire Rx buffer
737 1.1 thorpej * management scheme depends on this, and if the
738 1.1 thorpej * SONIC didn't follow our rule, it means we've
739 1.1 thorpej * misconfigured it.
740 1.1 thorpej */
741 1.1 thorpej KASSERT(status & RCR_LPKT);
742 1.1 thorpej
743 1.1 thorpej /*
744 1.1 thorpej * Make sure the packet arrived OK. If an error occurred,
745 1.1 thorpej * update stats and reset the descriptor. The buffer will
746 1.1 thorpej * be reused the next time the descriptor comes up in the
747 1.1 thorpej * ring.
748 1.1 thorpej */
749 1.1 thorpej if ((status & RCR_PRX) == 0) {
750 1.1 thorpej if (status & RCR_FAER)
751 1.25 tsutsui printf("%s: Rx frame alignment error\n",
752 1.25 tsutsui device_xname(sc->sc_dev));
753 1.1 thorpej else if (status & RCR_CRCR)
754 1.25 tsutsui printf("%s: Rx CRC error\n",
755 1.25 tsutsui device_xname(sc->sc_dev));
756 1.1 thorpej ifp->if_ierrors++;
757 1.1 thorpej SONIC_INIT_RXDESC(sc, i);
758 1.1 thorpej continue;
759 1.1 thorpej }
760 1.1 thorpej
761 1.1 thorpej bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
762 1.1 thorpej ds->ds_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
763 1.1 thorpej
764 1.1 thorpej /*
765 1.1 thorpej * The SONIC includes the CRC with every packet.
766 1.1 thorpej */
767 1.11 thorpej len = bytecount - ETHER_CRC_LEN;
768 1.1 thorpej
769 1.1 thorpej /*
770 1.1 thorpej * Ok, if the chip is in 32-bit mode, then receive
771 1.1 thorpej * buffers must be aligned to 32-bit boundaries,
772 1.1 thorpej * which means the payload is misaligned. In this
773 1.1 thorpej * case, we must allocate a new mbuf, and copy the
774 1.1 thorpej * packet into it, scooted forward 2 bytes to ensure
775 1.1 thorpej * proper alignment.
776 1.1 thorpej *
777 1.1 thorpej * Note, in 16-bit mode, we can configure the SONIC
778 1.1 thorpej * to do what we want, and we have.
779 1.1 thorpej */
780 1.1 thorpej #ifndef __NO_STRICT_ALIGNMENT
781 1.1 thorpej if (sc->sc_32bit) {
782 1.1 thorpej MGETHDR(m, M_DONTWAIT, MT_DATA);
783 1.1 thorpej if (m == NULL)
784 1.1 thorpej goto dropit;
785 1.1 thorpej if (len > (MHLEN - 2)) {
786 1.1 thorpej MCLGET(m, M_DONTWAIT);
787 1.1 thorpej if ((m->m_flags & M_EXT) == 0)
788 1.1 thorpej goto dropit;
789 1.1 thorpej }
790 1.1 thorpej m->m_data += 2;
791 1.1 thorpej /*
792 1.1 thorpej * Note that we use a cluster for incoming frames,
793 1.1 thorpej * so the buffer is virtually contiguous.
794 1.1 thorpej */
795 1.14 christos memcpy(mtod(m, void *), mtod(ds->ds_mbuf, void *),
796 1.1 thorpej len);
797 1.1 thorpej SONIC_INIT_RXDESC(sc, i);
798 1.1 thorpej bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
799 1.1 thorpej ds->ds_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
800 1.1 thorpej } else
801 1.1 thorpej #endif /* ! __NO_STRICT_ALIGNMENT */
802 1.1 thorpej /*
803 1.1 thorpej * If the packet is small enough to fit in a single
804 1.1 thorpej * header mbuf, allocate one and copy the data into
805 1.1 thorpej * it. This greatly reduces memory consumption when
806 1.1 thorpej * we receive lots of small packets.
807 1.1 thorpej */
808 1.1 thorpej if (sonic_copy_small != 0 && len <= (MHLEN - 2)) {
809 1.1 thorpej MGETHDR(m, M_DONTWAIT, MT_DATA);
810 1.1 thorpej if (m == NULL)
811 1.1 thorpej goto dropit;
812 1.1 thorpej m->m_data += 2;
813 1.1 thorpej /*
814 1.1 thorpej * Note that we use a cluster for incoming frames,
815 1.1 thorpej * so the buffer is virtually contiguous.
816 1.1 thorpej */
817 1.14 christos memcpy(mtod(m, void *), mtod(ds->ds_mbuf, void *),
818 1.1 thorpej len);
819 1.1 thorpej SONIC_INIT_RXDESC(sc, i);
820 1.1 thorpej bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
821 1.1 thorpej ds->ds_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
822 1.1 thorpej } else {
823 1.1 thorpej m = ds->ds_mbuf;
824 1.1 thorpej if (sonic_add_rxbuf(sc, i) != 0) {
825 1.1 thorpej dropit:
826 1.1 thorpej ifp->if_ierrors++;
827 1.1 thorpej SONIC_INIT_RXDESC(sc, i);
828 1.1 thorpej bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
829 1.1 thorpej ds->ds_dmamap->dm_mapsize,
830 1.1 thorpej BUS_DMASYNC_PREREAD);
831 1.1 thorpej continue;
832 1.1 thorpej }
833 1.1 thorpej }
834 1.1 thorpej
835 1.36.6.2 skrll m_set_rcvif(m, ifp);
836 1.1 thorpej m->m_pkthdr.len = m->m_len = len;
837 1.1 thorpej
838 1.1 thorpej /* Pass it on. */
839 1.36.6.1 skrll if_percpuq_enqueue(ifp->if_percpuq, m);
840 1.1 thorpej }
841 1.1 thorpej
842 1.1 thorpej /* Update the receive pointer. */
843 1.1 thorpej sc->sc_rxptr = i;
844 1.1 thorpej CSR_WRITE(sc, SONIC_RWR, SONIC_CDRRADDR(sc, SONIC_PREVRX(i)));
845 1.1 thorpej }
846 1.1 thorpej
847 1.1 thorpej /*
848 1.1 thorpej * sonic_reset:
849 1.1 thorpej *
850 1.1 thorpej * Perform a soft reset on the SONIC.
851 1.1 thorpej */
852 1.1 thorpej void
853 1.1 thorpej sonic_reset(struct sonic_softc *sc)
854 1.1 thorpej {
855 1.1 thorpej
856 1.16 tsutsui /* stop TX, RX and timer, and ensure RST is clear */
857 1.16 tsutsui CSR_WRITE(sc, SONIC_CR, CR_STP | CR_RXDIS | CR_HTX);
858 1.16 tsutsui delay(1000);
859 1.16 tsutsui
860 1.1 thorpej CSR_WRITE(sc, SONIC_CR, CR_RST);
861 1.1 thorpej delay(1000);
862 1.16 tsutsui
863 1.16 tsutsui /* clear all interrupts */
864 1.16 tsutsui CSR_WRITE(sc, SONIC_IMR, 0);
865 1.16 tsutsui CSR_WRITE(sc, SONIC_ISR, IMR_ALL);
866 1.16 tsutsui
867 1.1 thorpej CSR_WRITE(sc, SONIC_CR, 0);
868 1.1 thorpej delay(1000);
869 1.1 thorpej }
870 1.1 thorpej
871 1.1 thorpej /*
872 1.1 thorpej * sonic_init: [ifnet interface function]
873 1.1 thorpej *
874 1.1 thorpej * Initialize the interface. Must be called at splnet().
875 1.1 thorpej */
876 1.1 thorpej int
877 1.1 thorpej sonic_init(struct ifnet *ifp)
878 1.1 thorpej {
879 1.1 thorpej struct sonic_softc *sc = ifp->if_softc;
880 1.1 thorpej struct sonic_descsoft *ds;
881 1.1 thorpej int i, error = 0;
882 1.1 thorpej uint16_t reg;
883 1.1 thorpej
884 1.1 thorpej /*
885 1.1 thorpej * Cancel any pending I/O.
886 1.1 thorpej */
887 1.1 thorpej sonic_stop(ifp, 0);
888 1.1 thorpej
889 1.1 thorpej /*
890 1.1 thorpej * Reset the SONIC to a known state.
891 1.1 thorpej */
892 1.1 thorpej sonic_reset(sc);
893 1.1 thorpej
894 1.1 thorpej /*
895 1.1 thorpej * Bring the SONIC into reset state, and program the DCR.
896 1.1 thorpej *
897 1.1 thorpej * Note: We don't bother optimizing the transmit and receive
898 1.17 tsutsui * thresholds, here. TFT/RFT values should be set in MD attachments.
899 1.1 thorpej */
900 1.17 tsutsui reg = sc->sc_dcr;
901 1.1 thorpej if (sc->sc_32bit)
902 1.1 thorpej reg |= DCR_DW;
903 1.1 thorpej CSR_WRITE(sc, SONIC_CR, CR_RST);
904 1.1 thorpej CSR_WRITE(sc, SONIC_DCR, reg);
905 1.1 thorpej CSR_WRITE(sc, SONIC_DCR2, sc->sc_dcr2);
906 1.1 thorpej CSR_WRITE(sc, SONIC_CR, 0);
907 1.1 thorpej
908 1.1 thorpej /*
909 1.1 thorpej * Initialize the transmit descriptors.
910 1.1 thorpej */
911 1.1 thorpej if (sc->sc_32bit) {
912 1.1 thorpej for (i = 0; i < SONIC_NTXDESC; i++) {
913 1.1 thorpej memset(&sc->sc_tda32[i], 0, sizeof(struct sonic_tda32));
914 1.2 thorpej SONIC_CDTXSYNC32(sc, i,
915 1.1 thorpej BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
916 1.1 thorpej }
917 1.1 thorpej } else {
918 1.1 thorpej for (i = 0; i < SONIC_NTXDESC; i++) {
919 1.1 thorpej memset(&sc->sc_tda16[i], 0, sizeof(struct sonic_tda16));
920 1.2 thorpej SONIC_CDTXSYNC16(sc, i,
921 1.1 thorpej BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
922 1.1 thorpej }
923 1.1 thorpej }
924 1.1 thorpej sc->sc_txpending = 0;
925 1.1 thorpej sc->sc_txdirty = 0;
926 1.1 thorpej sc->sc_txlast = SONIC_NTXDESC - 1;
927 1.1 thorpej
928 1.1 thorpej /*
929 1.1 thorpej * Initialize the receive descriptor ring.
930 1.1 thorpej */
931 1.1 thorpej for (i = 0; i < SONIC_NRXDESC; i++) {
932 1.1 thorpej ds = &sc->sc_rxsoft[i];
933 1.1 thorpej if (ds->ds_mbuf == NULL) {
934 1.1 thorpej if ((error = sonic_add_rxbuf(sc, i)) != 0) {
935 1.25 tsutsui printf("%s: unable to allocate or map Rx "
936 1.1 thorpej "buffer %d, error = %d\n",
937 1.25 tsutsui device_xname(sc->sc_dev), i, error);
938 1.1 thorpej /*
939 1.1 thorpej * XXX Should attempt to run with fewer receive
940 1.1 thorpej * XXX buffers instead of just failing.
941 1.1 thorpej */
942 1.1 thorpej sonic_rxdrain(sc);
943 1.1 thorpej goto out;
944 1.1 thorpej }
945 1.4 tsutsui } else
946 1.4 tsutsui SONIC_INIT_RXDESC(sc, i);
947 1.1 thorpej }
948 1.1 thorpej sc->sc_rxptr = 0;
949 1.1 thorpej
950 1.1 thorpej /* Give the transmit ring to the SONIC. */
951 1.1 thorpej CSR_WRITE(sc, SONIC_UTDAR, (SONIC_CDTXADDR(sc, 0) >> 16) & 0xffff);
952 1.1 thorpej CSR_WRITE(sc, SONIC_CTDAR, SONIC_CDTXADDR(sc, 0) & 0xffff);
953 1.1 thorpej
954 1.1 thorpej /* Give the receive descriptor ring to the SONIC. */
955 1.1 thorpej CSR_WRITE(sc, SONIC_URDAR, (SONIC_CDRXADDR(sc, 0) >> 16) & 0xffff);
956 1.1 thorpej CSR_WRITE(sc, SONIC_CRDAR, SONIC_CDRXADDR(sc, 0) & 0xffff);
957 1.1 thorpej
958 1.1 thorpej /* Give the receive buffer ring to the SONIC. */
959 1.1 thorpej CSR_WRITE(sc, SONIC_URRAR, (SONIC_CDRRADDR(sc, 0) >> 16) & 0xffff);
960 1.1 thorpej CSR_WRITE(sc, SONIC_RSAR, SONIC_CDRRADDR(sc, 0) & 0xffff);
961 1.1 thorpej if (sc->sc_32bit)
962 1.1 thorpej CSR_WRITE(sc, SONIC_REAR,
963 1.1 thorpej (SONIC_CDRRADDR(sc, SONIC_NRXDESC - 1) +
964 1.1 thorpej sizeof(struct sonic_rra32)) & 0xffff);
965 1.1 thorpej else
966 1.1 thorpej CSR_WRITE(sc, SONIC_REAR,
967 1.1 thorpej (SONIC_CDRRADDR(sc, SONIC_NRXDESC - 1) +
968 1.1 thorpej sizeof(struct sonic_rra16)) & 0xffff);
969 1.1 thorpej CSR_WRITE(sc, SONIC_RRR, SONIC_CDRRADDR(sc, 0) & 0xffff);
970 1.1 thorpej CSR_WRITE(sc, SONIC_RWR, SONIC_CDRRADDR(sc, SONIC_NRXDESC - 1));
971 1.1 thorpej
972 1.1 thorpej /*
973 1.1 thorpej * Set the End-Of-Buffer counter such that only one packet
974 1.1 thorpej * will be placed into each buffer we provide. Note we are
975 1.1 thorpej * following the recommendation of section 3.4.4 of the manual
976 1.1 thorpej * here, and have "lengthened" the receive buffers accordingly.
977 1.1 thorpej */
978 1.1 thorpej if (sc->sc_32bit)
979 1.1 thorpej CSR_WRITE(sc, SONIC_EOBC, (ETHER_MAX_LEN + 2) / 2);
980 1.1 thorpej else
981 1.1 thorpej CSR_WRITE(sc, SONIC_EOBC, (ETHER_MAX_LEN / 2));
982 1.1 thorpej
983 1.1 thorpej /* Reset the receive sequence counter. */
984 1.1 thorpej CSR_WRITE(sc, SONIC_RSC, 0);
985 1.1 thorpej
986 1.1 thorpej /* Clear the tally registers. */
987 1.1 thorpej CSR_WRITE(sc, SONIC_CRCETC, 0xffff);
988 1.1 thorpej CSR_WRITE(sc, SONIC_FAET, 0xffff);
989 1.1 thorpej CSR_WRITE(sc, SONIC_MPT, 0xffff);
990 1.1 thorpej
991 1.1 thorpej /* Set the receive filter. */
992 1.1 thorpej sonic_set_filter(sc);
993 1.1 thorpej
994 1.1 thorpej /*
995 1.1 thorpej * Set the interrupt mask register.
996 1.1 thorpej */
997 1.1 thorpej sc->sc_imr = IMR_RFO | IMR_RBA | IMR_RBE | IMR_RDE |
998 1.1 thorpej IMR_TXER | IMR_PTX | IMR_PRX;
999 1.1 thorpej CSR_WRITE(sc, SONIC_IMR, sc->sc_imr);
1000 1.1 thorpej
1001 1.1 thorpej /*
1002 1.1 thorpej * Start the receive process in motion. Note, we don't
1003 1.1 thorpej * start the transmit process until we actually try to
1004 1.1 thorpej * transmit packets.
1005 1.1 thorpej */
1006 1.1 thorpej CSR_WRITE(sc, SONIC_CR, CR_RXEN | CR_RRRA);
1007 1.1 thorpej
1008 1.1 thorpej /*
1009 1.1 thorpej * ...all done!
1010 1.1 thorpej */
1011 1.1 thorpej ifp->if_flags |= IFF_RUNNING;
1012 1.1 thorpej ifp->if_flags &= ~IFF_OACTIVE;
1013 1.1 thorpej
1014 1.1 thorpej out:
1015 1.1 thorpej if (error)
1016 1.25 tsutsui printf("%s: interface not running\n", device_xname(sc->sc_dev));
1017 1.25 tsutsui return error;
1018 1.1 thorpej }
1019 1.1 thorpej
1020 1.1 thorpej /*
1021 1.1 thorpej * sonic_rxdrain:
1022 1.1 thorpej *
1023 1.1 thorpej * Drain the receive queue.
1024 1.1 thorpej */
1025 1.1 thorpej void
1026 1.1 thorpej sonic_rxdrain(struct sonic_softc *sc)
1027 1.1 thorpej {
1028 1.1 thorpej struct sonic_descsoft *ds;
1029 1.1 thorpej int i;
1030 1.1 thorpej
1031 1.1 thorpej for (i = 0; i < SONIC_NRXDESC; i++) {
1032 1.1 thorpej ds = &sc->sc_rxsoft[i];
1033 1.1 thorpej if (ds->ds_mbuf != NULL) {
1034 1.1 thorpej bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
1035 1.1 thorpej m_freem(ds->ds_mbuf);
1036 1.1 thorpej ds->ds_mbuf = NULL;
1037 1.1 thorpej }
1038 1.1 thorpej }
1039 1.1 thorpej }
1040 1.1 thorpej
1041 1.1 thorpej /*
1042 1.1 thorpej * sonic_stop: [ifnet interface function]
1043 1.1 thorpej *
1044 1.1 thorpej * Stop transmission on the interface.
1045 1.1 thorpej */
1046 1.1 thorpej void
1047 1.1 thorpej sonic_stop(struct ifnet *ifp, int disable)
1048 1.1 thorpej {
1049 1.1 thorpej struct sonic_softc *sc = ifp->if_softc;
1050 1.1 thorpej struct sonic_descsoft *ds;
1051 1.1 thorpej int i;
1052 1.1 thorpej
1053 1.1 thorpej /*
1054 1.1 thorpej * Disable interrupts.
1055 1.1 thorpej */
1056 1.1 thorpej CSR_WRITE(sc, SONIC_IMR, 0);
1057 1.1 thorpej
1058 1.1 thorpej /*
1059 1.1 thorpej * Stop the transmitter, receiver, and timer.
1060 1.1 thorpej */
1061 1.1 thorpej CSR_WRITE(sc, SONIC_CR, CR_HTX|CR_RXDIS|CR_STP);
1062 1.1 thorpej for (i = 0; i < 1000; i++) {
1063 1.1 thorpej if ((CSR_READ(sc, SONIC_CR) & (CR_TXP|CR_RXEN|CR_ST)) == 0)
1064 1.1 thorpej break;
1065 1.1 thorpej delay(2);
1066 1.1 thorpej }
1067 1.1 thorpej if ((CSR_READ(sc, SONIC_CR) & (CR_TXP|CR_RXEN|CR_ST)) != 0)
1068 1.25 tsutsui printf("%s: SONIC failed to stop\n", device_xname(sc->sc_dev));
1069 1.1 thorpej
1070 1.1 thorpej /*
1071 1.1 thorpej * Release any queued transmit buffers.
1072 1.1 thorpej */
1073 1.1 thorpej for (i = 0; i < SONIC_NTXDESC; i++) {
1074 1.1 thorpej ds = &sc->sc_txsoft[i];
1075 1.1 thorpej if (ds->ds_mbuf != NULL) {
1076 1.1 thorpej bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
1077 1.1 thorpej m_freem(ds->ds_mbuf);
1078 1.1 thorpej ds->ds_mbuf = NULL;
1079 1.1 thorpej }
1080 1.1 thorpej }
1081 1.1 thorpej
1082 1.1 thorpej /*
1083 1.1 thorpej * Mark the interface down and cancel the watchdog timer.
1084 1.1 thorpej */
1085 1.1 thorpej ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1086 1.1 thorpej ifp->if_timer = 0;
1087 1.21 dyoung
1088 1.21 dyoung if (disable)
1089 1.21 dyoung sonic_rxdrain(sc);
1090 1.1 thorpej }
1091 1.1 thorpej
1092 1.1 thorpej /*
1093 1.1 thorpej * sonic_add_rxbuf:
1094 1.1 thorpej *
1095 1.1 thorpej * Add a receive buffer to the indicated descriptor.
1096 1.1 thorpej */
1097 1.1 thorpej int
1098 1.1 thorpej sonic_add_rxbuf(struct sonic_softc *sc, int idx)
1099 1.1 thorpej {
1100 1.1 thorpej struct sonic_descsoft *ds = &sc->sc_rxsoft[idx];
1101 1.1 thorpej struct mbuf *m;
1102 1.1 thorpej int error;
1103 1.1 thorpej
1104 1.1 thorpej MGETHDR(m, M_DONTWAIT, MT_DATA);
1105 1.1 thorpej if (m == NULL)
1106 1.25 tsutsui return ENOBUFS;
1107 1.1 thorpej
1108 1.1 thorpej MCLGET(m, M_DONTWAIT);
1109 1.1 thorpej if ((m->m_flags & M_EXT) == 0) {
1110 1.1 thorpej m_freem(m);
1111 1.25 tsutsui return ENOBUFS;
1112 1.1 thorpej }
1113 1.1 thorpej
1114 1.1 thorpej if (ds->ds_mbuf != NULL)
1115 1.1 thorpej bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
1116 1.1 thorpej
1117 1.1 thorpej ds->ds_mbuf = m;
1118 1.1 thorpej
1119 1.1 thorpej error = bus_dmamap_load(sc->sc_dmat, ds->ds_dmamap,
1120 1.3 thorpej m->m_ext.ext_buf, m->m_ext.ext_size, NULL,
1121 1.3 thorpej BUS_DMA_READ|BUS_DMA_NOWAIT);
1122 1.12 perry if (error) {
1123 1.25 tsutsui printf("%s: can't load rx DMA map %d, error = %d\n",
1124 1.25 tsutsui device_xname(sc->sc_dev), idx, error);
1125 1.1 thorpej panic("sonic_add_rxbuf"); /* XXX */
1126 1.1 thorpej }
1127 1.1 thorpej
1128 1.1 thorpej bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
1129 1.1 thorpej ds->ds_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1130 1.1 thorpej
1131 1.1 thorpej SONIC_INIT_RXDESC(sc, idx);
1132 1.1 thorpej
1133 1.25 tsutsui return 0;
1134 1.1 thorpej }
1135 1.1 thorpej
1136 1.1 thorpej static void
1137 1.1 thorpej sonic_set_camentry(struct sonic_softc *sc, int entry, const uint8_t *enaddr)
1138 1.1 thorpej {
1139 1.1 thorpej
1140 1.1 thorpej if (sc->sc_32bit) {
1141 1.1 thorpej struct sonic_cda32 *cda = &sc->sc_cda32[entry];
1142 1.1 thorpej
1143 1.1 thorpej cda->cda_entry = htosonic32(sc, entry);
1144 1.1 thorpej cda->cda_addr0 = htosonic32(sc, enaddr[0] | (enaddr[1] << 8));
1145 1.1 thorpej cda->cda_addr1 = htosonic32(sc, enaddr[2] | (enaddr[3] << 8));
1146 1.1 thorpej cda->cda_addr2 = htosonic32(sc, enaddr[4] | (enaddr[5] << 8));
1147 1.1 thorpej } else {
1148 1.1 thorpej struct sonic_cda16 *cda = &sc->sc_cda16[entry];
1149 1.1 thorpej
1150 1.1 thorpej cda->cda_entry = htosonic16(sc, entry);
1151 1.1 thorpej cda->cda_addr0 = htosonic16(sc, enaddr[0] | (enaddr[1] << 8));
1152 1.1 thorpej cda->cda_addr1 = htosonic16(sc, enaddr[2] | (enaddr[3] << 8));
1153 1.1 thorpej cda->cda_addr2 = htosonic16(sc, enaddr[4] | (enaddr[5] << 8));
1154 1.1 thorpej }
1155 1.1 thorpej }
1156 1.1 thorpej
1157 1.1 thorpej /*
1158 1.1 thorpej * sonic_set_filter:
1159 1.1 thorpej *
1160 1.1 thorpej * Set the SONIC receive filter.
1161 1.1 thorpej */
1162 1.1 thorpej void
1163 1.1 thorpej sonic_set_filter(struct sonic_softc *sc)
1164 1.1 thorpej {
1165 1.1 thorpej struct ethercom *ec = &sc->sc_ethercom;
1166 1.1 thorpej struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1167 1.1 thorpej struct ether_multi *enm;
1168 1.1 thorpej struct ether_multistep step;
1169 1.1 thorpej int i, entry = 0;
1170 1.1 thorpej uint16_t camvalid = 0;
1171 1.1 thorpej uint16_t rcr = 0;
1172 1.1 thorpej
1173 1.1 thorpej if (ifp->if_flags & IFF_BROADCAST)
1174 1.1 thorpej rcr |= RCR_BRD;
1175 1.1 thorpej
1176 1.1 thorpej if (ifp->if_flags & IFF_PROMISC) {
1177 1.1 thorpej rcr |= RCR_PRO;
1178 1.1 thorpej goto allmulti;
1179 1.1 thorpej }
1180 1.1 thorpej
1181 1.1 thorpej /* Put our station address in the first CAM slot. */
1182 1.18 dyoung sonic_set_camentry(sc, entry, CLLADDR(ifp->if_sadl));
1183 1.1 thorpej camvalid |= (1U << entry);
1184 1.1 thorpej entry++;
1185 1.1 thorpej
1186 1.1 thorpej /* Add the multicast addresses to the CAM. */
1187 1.1 thorpej ETHER_FIRST_MULTI(step, ec, enm);
1188 1.1 thorpej while (enm != NULL) {
1189 1.1 thorpej if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
1190 1.1 thorpej /*
1191 1.1 thorpej * We must listen to a range of multicast addresses.
1192 1.1 thorpej * The only way to do this on the SONIC is to enable
1193 1.1 thorpej * reception of all multicast packets.
1194 1.1 thorpej */
1195 1.1 thorpej goto allmulti;
1196 1.1 thorpej }
1197 1.1 thorpej
1198 1.24 tsutsui if (entry == SONIC_NCAMENT) {
1199 1.1 thorpej /*
1200 1.1 thorpej * Out of CAM slots. Have to enable reception
1201 1.1 thorpej * of all multicast addresses.
1202 1.1 thorpej */
1203 1.1 thorpej goto allmulti;
1204 1.1 thorpej }
1205 1.1 thorpej
1206 1.1 thorpej sonic_set_camentry(sc, entry, enm->enm_addrlo);
1207 1.1 thorpej camvalid |= (1U << entry);
1208 1.1 thorpej entry++;
1209 1.1 thorpej
1210 1.1 thorpej ETHER_NEXT_MULTI(step, enm);
1211 1.1 thorpej }
1212 1.1 thorpej
1213 1.1 thorpej ifp->if_flags &= ~IFF_ALLMULTI;
1214 1.1 thorpej goto setit;
1215 1.1 thorpej
1216 1.1 thorpej allmulti:
1217 1.1 thorpej /* Use only the first CAM slot (station address). */
1218 1.1 thorpej camvalid = 0x0001;
1219 1.1 thorpej entry = 1;
1220 1.1 thorpej rcr |= RCR_AMC;
1221 1.1 thorpej
1222 1.1 thorpej setit:
1223 1.24 tsutsui /* set mask for the CAM Enable register */
1224 1.24 tsutsui if (sc->sc_32bit) {
1225 1.24 tsutsui if (entry == SONIC_NCAMENT)
1226 1.24 tsutsui sc->sc_cdaenable32 = htosonic32(sc, camvalid);
1227 1.24 tsutsui else
1228 1.24 tsutsui sc->sc_cda32[entry].cda_entry =
1229 1.24 tsutsui htosonic32(sc, camvalid);
1230 1.24 tsutsui } else {
1231 1.24 tsutsui if (entry == SONIC_NCAMENT)
1232 1.24 tsutsui sc->sc_cdaenable16 = htosonic16(sc, camvalid);
1233 1.24 tsutsui else
1234 1.24 tsutsui sc->sc_cda16[entry].cda_entry =
1235 1.24 tsutsui htosonic16(sc, camvalid);
1236 1.24 tsutsui }
1237 1.24 tsutsui
1238 1.1 thorpej /* Load the CAM. */
1239 1.1 thorpej SONIC_CDCAMSYNC(sc, BUS_DMASYNC_PREWRITE);
1240 1.1 thorpej CSR_WRITE(sc, SONIC_CDP, SONIC_CDCAMADDR(sc) & 0xffff);
1241 1.1 thorpej CSR_WRITE(sc, SONIC_CDC, entry);
1242 1.1 thorpej CSR_WRITE(sc, SONIC_CR, CR_LCAM);
1243 1.1 thorpej for (i = 0; i < 10000; i++) {
1244 1.1 thorpej if ((CSR_READ(sc, SONIC_CR) & CR_LCAM) == 0)
1245 1.1 thorpej break;
1246 1.1 thorpej delay(2);
1247 1.1 thorpej }
1248 1.1 thorpej if (CSR_READ(sc, SONIC_CR) & CR_LCAM)
1249 1.25 tsutsui printf("%s: CAM load failed\n", device_xname(sc->sc_dev));
1250 1.1 thorpej SONIC_CDCAMSYNC(sc, BUS_DMASYNC_POSTWRITE);
1251 1.1 thorpej
1252 1.1 thorpej /* Set the receive control register. */
1253 1.1 thorpej CSR_WRITE(sc, SONIC_RCR, rcr);
1254 1.1 thorpej }
1255