dp83932var.h revision 1.1
1 /* $NetBSD: dp83932var.h,v 1.1 2001/07/05 14:37:41 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _DEV_IC_DP83932VAR_H_ 40 #define _DEV_IC_DP83932VAR_H_ 41 42 /* 43 * Data structure definitions for the National Semiconductor DP83932 44 * Systems-Oriented Network Interface Controller (SONIC). 45 */ 46 47 /* 48 * NOTE: The control data for the SONIC must not cross a 64k boundary, 49 * so we have to be careful about how we size things. 50 * 51 * Also, since the SONIC is only a 10Mb/s chip, and systems on which 52 * it is present tend to be low on memory, we try to keep the data 53 * structure sizes small. 54 */ 55 56 /* 57 * Transmit descriptor list size. 58 */ 59 #define SONIC_NTXDESC 32 60 #define SONIC_NTXDESC_MASK (SONIC_NTXDESC - 1) 61 #define SONIC_NEXTTX(x) (((x) + 1) & SONIC_NTXDESC_MASK) 62 63 /* 64 * Receive descriptor list size. 65 */ 66 #define SONIC_NRXDESC 32 67 #define SONIC_NRXDESC_MASK (SONIC_NRXDESC - 1) 68 #define SONIC_NEXTRX(x) (((x) + 1) & SONIC_NRXDESC_MASK) 69 #define SONIC_PREVRX(x) (((x) - 1) & SONIC_NRXDESC_MASK) 70 #define SONIC_RXSEQ_TO_DESC(x) ((x) & SONIC_NRXDESC_MASK) 71 72 /* 73 * Control structures are DMA'd to the SONIC chip. We allocate them in 74 * a single clump that maps to a single DMA segment to make several things 75 * easier. 76 */ 77 struct sonic_control_data16 { 78 /* 79 * The transmit descriptors. 80 */ 81 struct sonic_tda16 scd_txdescs[SONIC_NTXDESC]; 82 83 /* 84 * The receive descriptors. 85 */ 86 struct sonic_rda16 scd_rxdescs[SONIC_NRXDESC]; 87 88 /* 89 * The receive resource descriptors. 90 */ 91 struct sonic_rra16 scd_rxbufs[SONIC_NRXDESC]; 92 93 /* 94 * The CAM descriptors. 95 */ 96 struct sonic_cda16 scd_cam[16]; 97 }; 98 99 #define SONIC_CDOFF16(x) offsetof(struct sonic_control_data16, x) 100 #define SONIC_CDTXOFF16(x) SONIC_CDOFF16(scd_txdescs[(x)]) 101 #define SONIC_CDRXOFF16(x) SONIC_CDOFF16(scd_rxdescs[(x)]) 102 #define SONIC_CDRROFF16(x) SONIC_CDOFF16(scd_rxbufs[(x)]) 103 #define SONIC_CDCAMOFF16 SONIC_CDOFF16(scd_cam) 104 105 struct sonic_control_data32 { 106 /* 107 * The transmit descriptors. 108 */ 109 struct sonic_tda32 scd_txdescs[SONIC_NTXDESC]; 110 111 /* 112 * The receive descriptors. 113 */ 114 struct sonic_rda32 scd_rxdescs[SONIC_NRXDESC]; 115 116 /* 117 * The receive resource descriptors. 118 */ 119 struct sonic_rra32 scd_rxbufs[SONIC_NRXDESC]; 120 121 /* 122 * The CAM descriptors. 123 */ 124 struct sonic_cda32 scd_cam[16]; 125 }; 126 127 #define SONIC_CDOFF32(x) offsetof(struct sonic_control_data32, x) 128 #define SONIC_CDTXOFF32(x) SONIC_CDOFF32(scd_txdescs[(x)]) 129 #define SONIC_CDRXOFF32(x) SONIC_CDOFF32(scd_rxdescs[(x)]) 130 #define SONIC_CDRROFF32(x) SONIC_CDOFF32(scd_rxbufs[(x)]) 131 #define SONIC_CDCAMOFF32 SONIC_CDOFF32(scd_cam) 132 133 /* 134 * Software state for transmit and receive descriptors. 135 */ 136 struct sonic_descsoft { 137 struct mbuf *ds_mbuf; /* head of mbuf chain */ 138 bus_dmamap_t ds_dmamap; /* our DMA map */ 139 }; 140 141 /* 142 * Software state per device. 143 */ 144 struct sonic_softc { 145 struct device sc_dev; /* generic device information */ 146 bus_space_tag_t sc_st; /* bus space tag */ 147 bus_space_handle_t sc_sh; /* bus space handle */ 148 bus_dma_tag_t sc_dmat; /* bus DMA tag */ 149 struct ethercom sc_ethercom; /* ethernet common data */ 150 void *sc_sdhook; /* shutdown hook */ 151 152 int sc_32bit; /* use 32-bit mode */ 153 int sc_bigendian; /* BMODE -> Vcc */ 154 155 /* Our register map. */ 156 bus_addr_t sc_regmap[SONIC_NREGS]; 157 158 bus_dmamap_t sc_cddmamap; /* control data DMA map */ 159 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 160 161 /* 162 * Software state for transmit and receive descriptors. 163 */ 164 struct sonic_descsoft sc_txsoft[SONIC_NTXDESC]; 165 struct sonic_descsoft sc_rxsoft[SONIC_NRXDESC]; 166 167 /* 168 * Control data structures. 169 */ 170 union { 171 struct sonic_control_data16 *cdun_16; 172 struct sonic_control_data32 *cdun_32; 173 } sc_cdun; 174 #define sc_cdata16 sc_cdun.cdun_16 175 #define sc_cdata32 sc_cdun.cdun_32 176 177 #define sc_tda16 sc_cdun.cdun_16->scd_txdescs 178 #define sc_rda16 sc_cdun.cdun_16->scd_rxdescs 179 #define sc_rra16 sc_cdun.cdun_16->scd_rxbufs 180 #define sc_cda16 sc_cdun.cdun_16->scd_cam 181 182 #define sc_tda32 sc_cdun.cdun_32->scd_txdescs 183 #define sc_rda32 sc_cdun.cdun_32->scd_rxdescs 184 #define sc_rra32 sc_cdun.cdun_32->scd_rxbufs 185 #define sc_cda32 sc_cdun.cdun_32->scd_cam 186 187 int sc_txpending; /* number of Tx requests pending */ 188 int sc_txdirty; /* first dirty Tx descriptor */ 189 int sc_txlast; /* last used Tx descriptor */ 190 191 int sc_rxptr; /* next ready Rx descriptor */ 192 193 uint16_t sc_imr; /* prototype IMR */ 194 uint16_t sc_dcr; /* prototype DCR */ 195 uint16_t sc_dcr2; /* prototype DCR2 */ 196 }; 197 198 #define CSR_READ(sc, reg) \ 199 bus_space_read_2((sc)->sc_st, (sc)->sc_sh, \ 200 (sc)->sc_regmap[(reg)]) 201 202 #define CSR_WRITE(sc, reg, val) \ 203 bus_space_write_2((sc)->sc_st, (sc)->sc_sh, \ 204 (sc)->sc_regmap[(reg)], (val)) 205 206 #define SONIC_CDTXADDR(sc, x) \ 207 ((sc)->sc_cddma + \ 208 ((sc)->sc_32bit ? SONIC_CDTXOFF32((x)) : SONIC_CDTXOFF16((x)))) 209 210 #define SONIC_CDRXADDR(sc, x) \ 211 ((sc)->sc_cddma + \ 212 ((sc)->sc_32bit ? SONIC_CDRXOFF32((x)) : SONIC_CDRXOFF16((x)))) 213 214 #define SONIC_CDRRADDR(sc, x) \ 215 ((sc)->sc_cddma + \ 216 ((sc)->sc_32bit ? SONIC_CDRROFF32((x)) : SONIC_CDRROFF16((x)))) 217 218 #define SONIC_CDCAMADDR(sc) \ 219 ((sc)->sc_cddma + \ 220 ((sc)->sc_32bit ? SONIC_CDCAMOFF32 : SONIC_CDCAMOFF32)) 221 222 #define SONIC_CDTXSYNC(sc, x, ops) \ 223 do { \ 224 if ((sc)->sc_32bit) \ 225 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 226 SONIC_CDTXOFF32((x)), sizeof(struct sonic_tda32), \ 227 (ops)); \ 228 else \ 229 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 230 SONIC_CDTXOFF16((x)), sizeof(struct sonic_tda16), \ 231 (ops)); \ 232 } while (/*CONSTCOND*/0) 233 234 #define SONIC_CDRXSYNC(sc, x, ops) \ 235 do { \ 236 if ((sc)->sc_32bit) \ 237 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 238 SONIC_CDRXOFF32((x)), sizeof(struct sonic_rda32), \ 239 (ops)); \ 240 else \ 241 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 242 SONIC_CDRXOFF16((x)), sizeof(struct sonic_rda16), \ 243 (ops)); \ 244 } while (/*CONSTCOND*/0) 245 246 #define SONIC_CDRRSYNC(sc, x, ops) \ 247 do { \ 248 if ((sc)->sc_32bit) \ 249 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 250 SONIC_CDRROFF32((x)), sizeof(struct sonic_rra32), \ 251 (ops)); \ 252 else \ 253 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 254 SONIC_CDRROFF16((x)), sizeof(struct sonic_rra16), \ 255 (ops)); \ 256 } while (/*CONSTCOND*/0) 257 258 #define SONIC_CDCAMSYNC(sc, ops) \ 259 do { \ 260 if ((sc)->sc_32bit) \ 261 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 262 SONIC_CDCAMOFF32, sizeof(struct sonic_cda32) * 16, \ 263 (ops)); \ 264 else \ 265 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 266 SONIC_CDCAMOFF16, sizeof(struct sonic_cda16) * 16, \ 267 (ops)); \ 268 } while (/*CONSTCOND*/0) 269 270 #define SONIC_INIT_RXDESC(sc, x) \ 271 do { \ 272 struct sonic_descsoft *__ds = &(sc)->sc_rxsoft[(x)]; \ 273 struct mbuf *__m = __ds->ds_mbuf; \ 274 \ 275 if ((sc)->sc_32bit) { \ 276 /* \ 277 * Unfortuantely, in 32-bit mode, the Rx buffer must \ 278 * be 32-bit aligned. \ 279 */ \ 280 struct sonic_rda32 *__rda = &(sc)->sc_rda32[(x)]; \ 281 struct sonic_rda32 *__prda = \ 282 &(sc)->sc_rda32[SONIC_PREVRX((x))]; \ 283 struct sonic_rra32 *__rra = &(sc)->sc_rra32[(x)]; \ 284 \ 285 __m->m_data = __m->m_ext.ext_buf; \ 286 \ 287 __rra->rra_ptr1 = \ 288 __ds->ds_dmamap->dm_segs[0].ds_addr >> 16; \ 289 __rra->rra_ptr0 = \ 290 __ds->ds_dmamap->dm_segs[0].ds_addr & 0xffff; \ 291 __rra->rra_wc1 = 0; \ 292 __rra->rra_wc0 = (ETHER_MAX_LEN + 6) / 2; \ 293 \ 294 __rda->rda_link = \ 295 (SONIC_CDRXADDR((sc), SONIC_NEXTRX((x))) & 0xffff) |\ 296 RDA_LINK_EOL; \ 297 __rda->rda_inuse = 1; \ 298 \ 299 __prda->rda_link = SONIC_CDRXADDR((sc), (x)); \ 300 } else { \ 301 /* \ 302 * In 16-bit mode, we scoot the packet forward 2 bytes \ 303 * so that the payload after the Ethernet header is \ 304 * suitably aligned. \ 305 */ \ 306 struct sonic_rda16 *__rda = &(sc)->sc_rda16[(x)]; \ 307 struct sonic_rda16 *__prda = \ 308 &(sc)->sc_rda16[SONIC_PREVRX((x))]; \ 309 struct sonic_rra16 *__rra = &(sc)->sc_rra16[(x)]; \ 310 \ 311 __m->m_data = __m->m_ext.ext_buf + 2; \ 312 \ 313 __rra->rra_ptr1 = \ 314 __ds->ds_dmamap->dm_segs[0].ds_addr >> 16; \ 315 __rra->rra_ptr0 = \ 316 (__ds->ds_dmamap->dm_segs[0].ds_addr + 2) & 0xffff; \ 317 __rra->rra_wc1 = 0; \ 318 __rra->rra_wc0 = (ETHER_MAX_LEN + 2) / 2; \ 319 \ 320 __rda->rda_link = \ 321 (SONIC_CDRXADDR((sc), SONIC_NEXTRX((x))) & 0xffff) |\ 322 RDA_LINK_EOL; \ 323 __rda->rda_inuse = 1; \ 324 \ 325 __prda->rda_link = SONIC_CDRXADDR((sc), (x)); \ 326 } \ 327 \ 328 SONIC_CDRRSYNC((sc), (x), BUS_DMASYNC_PREWRITE); \ 329 SONIC_CDRXSYNC((sc), (x), \ 330 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \ 331 SONIC_CDRXSYNC((sc), SONIC_PREVRX(x), \ 332 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \ 333 } while (/*CONSTCOND*/0) 334 335 static __inline uint16_t __attribute__((__unused__)) 336 htosonic16(struct sonic_softc *sc, uint16_t val) 337 { 338 339 if (sc->sc_bigendian) 340 return (htobe16(val)); 341 return (htole16(val)); 342 } 343 344 static __inline uint16_t __attribute__((__unused__)) 345 sonic16toh(struct sonic_softc *sc, uint16_t val) 346 { 347 348 if (sc->sc_bigendian) 349 return (be16toh(val)); 350 return (le16toh(val)); 351 } 352 353 static __inline uint32_t __attribute__((__unused__)) 354 htosonic32(struct sonic_softc *sc, uint32_t val) 355 { 356 357 if (sc->sc_bigendian) 358 return (htobe32(val)); 359 return (htole16(val)); 360 } 361 362 static __inline uint32_t __attribute__((__unused__)) 363 sonic32toh(struct sonic_softc *sc, uint32_t val) 364 { 365 366 if (sc->sc_bigendian) 367 return (be32toh(val)); 368 return (le32toh(val)); 369 } 370 371 #ifdef _KERNEL 372 void sonic_attach(struct sonic_softc *, const uint8_t *); 373 int sonic_intr(void *); 374 #endif /* _KERNEL */ 375 376 #endif /* _DEV_IC_DP83932VAR_H_ */ 377
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