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dp83932var.h revision 1.10
      1 /*	$NetBSD: dp83932var.h,v 1.10 2008/04/23 13:29:45 tsutsui Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by the NetBSD
     21  *	Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #ifndef _DEV_IC_DP83932VAR_H_
     40 #define	_DEV_IC_DP83932VAR_H_
     41 
     42 /*
     43  * Data structure definitions for the National Semiconductor DP83932
     44  * Systems-Oriented Network Interface Controller (SONIC).
     45  */
     46 
     47 /*
     48  * NOTE: The control data for the SONIC must not cross a 64k boundary,
     49  * so we have to be careful about how we size things.
     50  *
     51  * Also, since the SONIC is only a 10Mb/s chip, and systems on which
     52  * it is present tend to be low on memory, we try to keep the data
     53  * structure sizes small.
     54  */
     55 
     56 /*
     57  * Transmit descriptor list size.
     58  */
     59 #define	SONIC_NTXDESC		32
     60 #define	SONIC_NTXDESC_MASK	(SONIC_NTXDESC - 1)
     61 #define	SONIC_NEXTTX(x)		(((x) + 1) & SONIC_NTXDESC_MASK)
     62 
     63 /*
     64  * Receive descriptor list size.
     65  */
     66 #define	SONIC_NRXDESC		32
     67 #define	SONIC_NRXDESC_MASK	(SONIC_NRXDESC - 1)
     68 #define	SONIC_NEXTRX(x)		(((x) + 1) & SONIC_NRXDESC_MASK)
     69 #define	SONIC_PREVRX(x)		(((x) - 1) & SONIC_NRXDESC_MASK)
     70 #define	SONIC_RXSEQ_TO_DESC(x)	((x) & SONIC_NRXDESC_MASK)
     71 
     72 /*
     73  * Number of CAM entries.
     74  */
     75 #define	SONIC_NCAMENT		16
     76 
     77 /*
     78  * Control structures are DMA'd to the SONIC chip.  We allocate them in
     79  * a single clump that maps to a single DMA segment to make several things
     80  * easier.
     81  */
     82 struct sonic_control_data16 {
     83 	/*
     84 	 * The transmit descriptors.
     85 	 */
     86 	struct sonic_tda16 scd_txdescs[SONIC_NTXDESC];
     87 
     88 	/*
     89 	 * The receive descriptors.
     90 	 */
     91 	struct sonic_rda16 scd_rxdescs[SONIC_NRXDESC];
     92 
     93 	/*
     94 	 * The receive resource descriptors.
     95 	 */
     96 	struct sonic_rra16 scd_rxbufs[SONIC_NRXDESC];
     97 
     98 	/*
     99 	 * The CAM descriptors.
    100 	 */
    101 	struct sonic_cda16 scd_cam[SONIC_NCAMENT];
    102 	uint16_t scd_camenable;
    103 };
    104 
    105 #define	SONIC_CDOFF16(x)	offsetof(struct sonic_control_data16, x)
    106 #define	SONIC_CDTXOFF16(x)	SONIC_CDOFF16(scd_txdescs[(x)])
    107 #define	SONIC_CDRXOFF16(x)	SONIC_CDOFF16(scd_rxdescs[(x)])
    108 #define	SONIC_CDRROFF16(x)	SONIC_CDOFF16(scd_rxbufs[(x)])
    109 #define	SONIC_CDCAMOFF16	SONIC_CDOFF16(scd_cam)
    110 #define	SONIC_CDCAMSIZE16	\
    111 	(sizeof(struct sonic_cda16) * SONIC_NCAMENT + sizeof(uint16_t))
    112 
    113 struct sonic_control_data32 {
    114 	/*
    115 	 * The transmit descriptors.
    116 	 */
    117 	struct sonic_tda32 scd_txdescs[SONIC_NTXDESC];
    118 
    119 	/*
    120 	 * The receive descriptors.
    121 	 */
    122 	struct sonic_rda32 scd_rxdescs[SONIC_NRXDESC];
    123 
    124 	/*
    125 	 * The receive resource descriptors.
    126 	 */
    127 	struct sonic_rra32 scd_rxbufs[SONIC_NRXDESC];
    128 
    129 	/*
    130 	 * The CAM descriptors.
    131 	 */
    132 	struct sonic_cda32 scd_cam[SONIC_NCAMENT];
    133 	uint32_t scd_camenable;
    134 };
    135 
    136 #define	SONIC_CDOFF32(x)	offsetof(struct sonic_control_data32, x)
    137 #define	SONIC_CDTXOFF32(x)	SONIC_CDOFF32(scd_txdescs[(x)])
    138 #define	SONIC_CDRXOFF32(x)	SONIC_CDOFF32(scd_rxdescs[(x)])
    139 #define	SONIC_CDRROFF32(x)	SONIC_CDOFF32(scd_rxbufs[(x)])
    140 #define	SONIC_CDCAMOFF32	SONIC_CDOFF32(scd_cam)
    141 #define	SONIC_CDCAMSIZE32	\
    142 	(sizeof(struct sonic_cda32) * SONIC_NCAMENT + sizeof(uint32_t))
    143 
    144 /*
    145  * Software state for transmit and receive descriptors.
    146  */
    147 struct sonic_descsoft {
    148 	struct mbuf *ds_mbuf;		/* head of mbuf chain */
    149 	bus_dmamap_t ds_dmamap;		/* our DMA map */
    150 };
    151 
    152 /*
    153  * Software state per device.
    154  */
    155 struct sonic_softc {
    156 	device_t sc_dev;		/* generic device information */
    157 	bus_space_tag_t sc_st;		/* bus space tag */
    158 	bus_space_handle_t sc_sh;	/* bus space handle */
    159 	bus_dma_tag_t sc_dmat;		/* bus DMA tag */
    160 	struct ethercom sc_ethercom;	/* ethernet common data */
    161 	void *sc_sdhook;		/* shutdown hook */
    162 
    163 	int sc_32bit;			/* use 32-bit mode */
    164 	int sc_bigendian;		/* BMODE -> Vcc */
    165 
    166 	/* Our register map. */
    167 	bus_addr_t sc_regmap[SONIC_NREGS];
    168 
    169 	bus_dmamap_t sc_cddmamap;	/* control data DMA map */
    170 #define	sc_cddma	sc_cddmamap->dm_segs[0].ds_addr
    171 	bus_dmamap_t sc_nulldmamap;	/* DMA map for the pad buffer */
    172 #define sc_nulldma     sc_nulldmamap->dm_segs[0].ds_addr
    173 
    174 	/*
    175 	 * Software state for transmit and receive descriptors.
    176 	 */
    177 	struct sonic_descsoft sc_txsoft[SONIC_NTXDESC];
    178 	struct sonic_descsoft sc_rxsoft[SONIC_NRXDESC];
    179 
    180 	/*
    181 	 * Control data structures.
    182 	 */
    183 	union {
    184 		struct sonic_control_data16 *cdun_16;
    185 		struct sonic_control_data32 *cdun_32;
    186 	} sc_cdun;
    187 #define	sc_cdata16	sc_cdun.cdun_16
    188 #define	sc_cdata32	sc_cdun.cdun_32
    189 
    190 #define	sc_tda16	sc_cdun.cdun_16->scd_txdescs
    191 #define	sc_rda16	sc_cdun.cdun_16->scd_rxdescs
    192 #define	sc_rra16	sc_cdun.cdun_16->scd_rxbufs
    193 #define	sc_cda16	sc_cdun.cdun_16->scd_cam
    194 #define	sc_cdaenable16	sc_cdun.cdun_16->scd_camenable
    195 
    196 #define	sc_tda32	sc_cdun.cdun_32->scd_txdescs
    197 #define	sc_rda32	sc_cdun.cdun_32->scd_rxdescs
    198 #define	sc_rra32	sc_cdun.cdun_32->scd_rxbufs
    199 #define	sc_cda32	sc_cdun.cdun_32->scd_cam
    200 #define	sc_cdaenable32	sc_cdun.cdun_32->scd_camenable
    201 
    202 	int	sc_txpending;		/* number of Tx requests pending */
    203 	int	sc_txdirty;		/* first dirty Tx descriptor */
    204 	int	sc_txlast;		/* last used Tx descriptor */
    205 
    206 	int	sc_rxptr;		/* next ready Rx descriptor */
    207 
    208 	uint16_t sc_imr;		/* prototype IMR */
    209 	uint16_t sc_dcr;		/* prototype DCR */
    210 	uint16_t sc_dcr2;		/* prototype DCR2 */
    211 };
    212 
    213 #define	CSR_READ(sc, reg)						\
    214 	bus_space_read_2((sc)->sc_st, (sc)->sc_sh,			\
    215 	    (sc)->sc_regmap[(reg)])
    216 
    217 #define	CSR_WRITE(sc, reg, val)						\
    218 	bus_space_write_2((sc)->sc_st, (sc)->sc_sh,			\
    219 	    (sc)->sc_regmap[(reg)], (val))
    220 
    221 #define	SONIC_CDTXADDR16(sc, x)						\
    222 	((sc)->sc_cddma + SONIC_CDTXOFF16((x)))
    223 
    224 #define	SONIC_CDTXADDR32(sc, x)						\
    225 	((sc)->sc_cddma + SONIC_CDTXOFF32((x)))
    226 
    227 #define	SONIC_CDTXADDR(sc, x)						\
    228 	((sc)->sc_32bit ? SONIC_CDTXADDR32((sc), (x)) :			\
    229 	    SONIC_CDTXADDR16((sc), (x)))
    230 
    231 #define	SONIC_CDRXADDR16(sc, x)						\
    232 	((sc)->sc_cddma + SONIC_CDRXOFF16((x)))
    233 
    234 #define	SONIC_CDRXADDR32(sc, x)						\
    235 	((sc)->sc_cddma + SONIC_CDRXOFF32((x)))
    236 
    237 #define	SONIC_CDRXADDR(sc, x)						\
    238 	((sc)->sc_32bit ? SONIC_CDRXADDR32((sc), (x)) :			\
    239 	    SONIC_CDRXADDR16((sc), (x)))
    240 
    241 #define	SONIC_CDRRADDR(sc, x)						\
    242 	((sc)->sc_cddma +						\
    243 	 ((sc)->sc_32bit ? SONIC_CDRROFF32((x)) : SONIC_CDRROFF16((x))))
    244 
    245 #define	SONIC_CDCAMADDR(sc)						\
    246 	((sc)->sc_cddma +						\
    247 	 ((sc)->sc_32bit ? SONIC_CDCAMOFF32 : SONIC_CDCAMOFF16))
    248 
    249 #define	SONIC_CDTXSYNC16(sc, x, ops)					\
    250 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
    251 	    SONIC_CDTXOFF16((x)), sizeof(struct sonic_tda16), (ops))
    252 
    253 #define	SONIC_CDTXSYNC32(sc, x, ops)					\
    254 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
    255 	    SONIC_CDTXOFF32((x)), sizeof(struct sonic_tda32), (ops))
    256 
    257 #define	SONIC_CDRXSYNC16(sc, x, ops)					\
    258 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
    259 	    SONIC_CDRXOFF16((x)), sizeof(struct sonic_rda16), (ops))
    260 
    261 #define	SONIC_CDRXSYNC32(sc, x, ops)					\
    262 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
    263 	    SONIC_CDRXOFF32((x)), sizeof(struct sonic_rda32), (ops))
    264 
    265 #define	SONIC_CDRRSYNC16(sc, x, ops)					\
    266 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
    267 	    SONIC_CDRROFF16((x)), sizeof(struct sonic_rra16), (ops))
    268 
    269 #define	SONIC_CDRRSYNC32(sc, x, ops)					\
    270 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
    271 	    SONIC_CDRROFF32((x)), sizeof(struct sonic_rra32), (ops))
    272 
    273 #define	SONIC_CDCAMSYNC(sc, ops)					\
    274 do {									\
    275 	if ((sc)->sc_32bit)						\
    276 		bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,	\
    277 		    SONIC_CDCAMOFF32, SONIC_CDCAMSIZE32,		\
    278 		    (ops));						\
    279 	else								\
    280 		bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,	\
    281 		    SONIC_CDCAMOFF16, SONIC_CDCAMSIZE16,		\
    282 		    (ops));						\
    283 } while (/*CONSTCOND*/0)
    284 
    285 #define	SONIC_INIT_RXDESC(sc, x)					\
    286 do {									\
    287 	struct sonic_descsoft *__ds = &(sc)->sc_rxsoft[(x)];		\
    288 	struct mbuf *__m = __ds->ds_mbuf;				\
    289 									\
    290 	if ((sc)->sc_32bit) {						\
    291 		/*							\
    292 		 * Unfortuantely, in 32-bit mode, the Rx buffer must	\
    293 		 * be 32-bit aligned.					\
    294 		 */							\
    295 		struct sonic_rda32 *__rda = &(sc)->sc_rda32[(x)];	\
    296 		struct sonic_rda32 *__prda =				\
    297 		    &(sc)->sc_rda32[SONIC_PREVRX((x))];			\
    298 		struct sonic_rra32 *__rra = &(sc)->sc_rra32[(x)];	\
    299 									\
    300 		__m->m_data = __m->m_ext.ext_buf;			\
    301 									\
    302 		__rra->rra_ptr1 =					\
    303 		    __ds->ds_dmamap->dm_segs[0].ds_addr >> 16;		\
    304 		__rra->rra_ptr0 =					\
    305 		    __ds->ds_dmamap->dm_segs[0].ds_addr & 0xffff;	\
    306 		__rra->rra_wc1 = 0;					\
    307 		__rra->rra_wc0 = (ETHER_MAX_LEN + 6) / 2;		\
    308 									\
    309 		__rda->rda_link =					\
    310 		    (SONIC_CDRXADDR32((sc), SONIC_NEXTRX((x))) & 0xffff) |\
    311 		    RDA_LINK_EOL;					\
    312 		__rda->rda_inuse = 1;					\
    313 									\
    314 		__prda->rda_link = SONIC_CDRXADDR32((sc), (x));		\
    315 									\
    316 		SONIC_CDRRSYNC32((sc), (x), BUS_DMASYNC_PREWRITE);	\
    317 		SONIC_CDRXSYNC32((sc), (x),				\
    318 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);		\
    319 		SONIC_CDRXSYNC32((sc), SONIC_PREVRX(x),			\
    320 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);		\
    321 	} else {							\
    322 		/*							\
    323 		 * In 16-bit mode, we scoot the packet forward 2 bytes	\
    324 		 * so that the payload after the Ethernet header is	\
    325 		 * suitably aligned.					\
    326 		 */							\
    327 		struct sonic_rda16 *__rda = &(sc)->sc_rda16[(x)];	\
    328 		struct sonic_rda16 *__prda =				\
    329 		    &(sc)->sc_rda16[SONIC_PREVRX((x))];			\
    330 		struct sonic_rra16 *__rra = &(sc)->sc_rra16[(x)];	\
    331 									\
    332 		__m->m_data = __m->m_ext.ext_buf + 2;			\
    333 									\
    334 		__rra->rra_ptr1 =					\
    335 		    __ds->ds_dmamap->dm_segs[0].ds_addr >> 16;		\
    336 		__rra->rra_ptr0 =					\
    337 		    (__ds->ds_dmamap->dm_segs[0].ds_addr + 2) & 0xffff;	\
    338 		__rra->rra_wc1 = 0;					\
    339 		__rra->rra_wc0 = (ETHER_MAX_LEN + 2) / 2;		\
    340 									\
    341 		__rda->rda_link =					\
    342 		    (SONIC_CDRXADDR16((sc), SONIC_NEXTRX((x))) & 0xffff) |\
    343 		    RDA_LINK_EOL;					\
    344 		__rda->rda_inuse = 1;					\
    345 									\
    346 		__prda->rda_link = SONIC_CDRXADDR16((sc), (x));		\
    347 									\
    348 		SONIC_CDRRSYNC16((sc), (x), BUS_DMASYNC_PREWRITE);	\
    349 		SONIC_CDRXSYNC16((sc), (x),				\
    350 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);		\
    351 		SONIC_CDRXSYNC16((sc), SONIC_PREVRX(x),			\
    352 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);		\
    353 	}								\
    354 } while (/*CONSTCOND*/0)
    355 
    356 static __inline uint16_t __unused
    357 htosonic16(struct sonic_softc *sc, uint16_t val)
    358 {
    359 
    360 	if (sc->sc_bigendian)
    361 		return (htobe16(val));
    362 	return (htole16(val));
    363 }
    364 
    365 static __inline uint16_t __unused
    366 sonic16toh(struct sonic_softc *sc, uint16_t val)
    367 {
    368 
    369 	if (sc->sc_bigendian)
    370 		return (be16toh(val));
    371 	return (le16toh(val));
    372 }
    373 
    374 static __inline uint32_t __unused
    375 htosonic32(struct sonic_softc *sc, uint32_t val)
    376 {
    377 
    378 	if (sc->sc_bigendian)
    379 		return (htobe32(val));
    380 	return (htole32(val));
    381 }
    382 
    383 static __inline uint32_t __unused
    384 sonic32toh(struct sonic_softc *sc, uint32_t val)
    385 {
    386 
    387 	if (sc->sc_bigendian)
    388 		return (be32toh(val));
    389 	return (le32toh(val));
    390 }
    391 
    392 #ifdef _KERNEL
    393 void	sonic_attach(struct sonic_softc *, const uint8_t *);
    394 int	sonic_intr(void *);
    395 #endif /* _KERNEL */
    396 
    397 #endif /* _DEV_IC_DP83932VAR_H_ */
    398