dptvar.h revision 1.2 1 1.2 ad /* $NetBSD: dptvar.h,v 1.2 1999/09/28 23:35:29 ad Exp $ */
2 1.1 ad
3 1.1 ad /*
4 1.1 ad * Copyright (c) 1999 Andy Doran <ad (at) NetBSD.org>
5 1.1 ad * All rights reserved.
6 1.1 ad *
7 1.1 ad * Redistribution and use in source and binary forms, with or without
8 1.1 ad * modification, are permitted provided that the following conditions
9 1.1 ad * are met:
10 1.1 ad * 1. Redistributions of source code must retain the above copyright
11 1.1 ad * notice, this list of conditions and the following disclaimer.
12 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 ad * notice, this list of conditions and the following disclaimer in the
14 1.1 ad * documentation and/or other materials provided with the distribution.
15 1.1 ad *
16 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 1.1 ad * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.1 ad * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.1 ad * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 1.1 ad * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.1 ad * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.1 ad * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.1 ad * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.1 ad * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 ad * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 ad * SUCH DAMAGE.
27 1.1 ad *
28 1.1 ad */
29 1.1 ad
30 1.1 ad #ifndef _IC_DPTVAR_H_
31 1.1 ad #define _IC_DPTVAR_H_ 1
32 1.1 ad
33 1.1 ad #define DPT_CCB_OFF(sc,m) ((u_long)(m) - (u_long)((sc)->sc_ccbs))
34 1.1 ad
35 1.1 ad #define CCB_ALLOC 0x01 /* CCB allocated */
36 1.1 ad #define CCB_ABORT 0x02 /* abort has been issued on this CCB */
37 1.1 ad #define CCB_INTR 0x04 /* HBA interrupted for this CCB */
38 1.1 ad #define CCB_PRIVATE 0x08 /* ours; don't talk to scsipi when done */
39 1.2 ad #define CCB_SYNC 0x10 /* write data synchronously */
40 1.1 ad
41 1.1 ad struct dpt_ccb {
42 1.1 ad struct eata_cp ccb_eata_cp; /* EATA command packet */
43 1.1 ad struct eata_sg ccb_sg[DPT_SG_SIZE]; /* SG element list */
44 1.1 ad volatile int ccb_flg; /* CCB flags */
45 1.1 ad int ccb_timeout; /* timeout in ms */
46 1.1 ad u_int32_t ccb_ccbpa; /* physical addr of this CCB */
47 1.1 ad bus_dmamap_t ccb_dmamap_xfer; /* dmamap for data xfers */
48 1.1 ad int ccb_hba_status; /* from status packet */
49 1.1 ad int ccb_scsi_status; /* from status packet */
50 1.1 ad int ccb_id; /* unique ID of this CCB */
51 1.1 ad TAILQ_ENTRY(dpt_ccb) ccb_chain; /* link to next CCB */
52 1.1 ad struct scsipi_sense_data ccb_sense; /* SCSI sense data on error */
53 1.1 ad struct scsipi_xfer *ccb_xs; /* initiating SCSI command */
54 1.1 ad };
55 1.1 ad
56 1.2 ad #ifdef DPT_PROFILE
57 1.2 ad struct dpt_profile {
58 1.2 ad int dp_nsync; /* synchronous writes */
59 1.2 ad int dp_nasync; /* asynchronous writes */
60 1.2 ad int dp_nread; /* reads */
61 1.2 ad int dp_maxchargeccb; /* maximum CCB queue charge */
62 1.2 ad int dp_maxchargexs; /* maximum SCSI queue charge */
63 1.2 ad int dp_curchargeccb; /* current CCB queue charge */
64 1.2 ad int dp_curchargexs; /* current SCSI queue charge */
65 1.2 ad int dp_ncmds; /* total commands recieved */
66 1.2 ad int dp_nsleepccb; /* times sleeping on a CCB */
67 1.2 ad int dp_nintr; /* interrupts */
68 1.2 ad int dp_nintrloop; /* intrs handled with one h/w intr */
69 1.2 ad };
70 1.2 ad #endif /* DPT_PROFILE */
71 1.2 ad
72 1.2 ad #ifdef _KERNEL
73 1.2 ad
74 1.1 ad struct dpt_softc {
75 1.1 ad struct device sc_dv; /* generic device data */
76 1.1 ad bus_space_handle_t sc_ioh; /* bus space handle */
77 1.1 ad struct scsipi_adapter sc_adapter;/* scsipi adapter */
78 1.1 ad struct scsipi_link sc_link[3]; /* prototype link for each channel */
79 1.1 ad bus_space_tag_t sc_iot; /* bus space tag */
80 1.1 ad bus_dma_tag_t sc_dmat; /* bus DMA tag */
81 1.1 ad bus_dmamap_t sc_dmamap_ccb; /* maps the CCBs */
82 1.1 ad void *sc_ih; /* interrupt handler cookie */
83 1.1 ad void *sc_sdh; /* shutdown hook */
84 1.1 ad struct dpt_ccb *sc_ccbs; /* all our CCBs */
85 1.1 ad struct eata_sp *sc_sp; /* EATA status packet */
86 1.1 ad int sc_spoff; /* status packet offset in dmamap */
87 1.1 ad u_int32_t sc_sppa; /* status packet physical address */
88 1.1 ad caddr_t sc_scr; /* scratch area */
89 1.1 ad int sc_scrlen; /* scratch area length */
90 1.1 ad int sc_scroff; /* scratch area offset in dmamap */
91 1.1 ad u_int32_t sc_scrpa; /* scratch area physical address */
92 1.1 ad int sc_hbaid[3]; /* ID of HBA on each channel */
93 1.1 ad int sc_nccbs; /* number of CCBs available */
94 1.1 ad #ifdef notdef
95 1.1 ad int sc_pending; /* cmds on sc_queue + HBA queue */
96 1.1 ad #endif
97 1.1 ad TAILQ_HEAD(, dpt_ccb) sc_free_ccb;/* free ccb list */
98 1.1 ad TAILQ_HEAD(, scsipi_xfer) sc_queue;/* pending commands */
99 1.1 ad };
100 1.1 ad
101 1.1 ad int dpt_intr __P((void *));
102 1.1 ad void dpt_init __P((struct dpt_softc *, const char *));
103 1.2 ad
104 1.2 ad #endif /* _KERNEL */
105 1.1 ad
106 1.1 ad #endif /* !defined _IC_DPTVAR_H_ */
107