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ds1687reg.h revision 1.8.30.1
      1  1.8.30.1     ad /*	$NetBSD: ds1687reg.h,v 1.8.30.1 2007/10/09 13:41:23 ad Exp $ 	*/
      2       1.1  rafal 
      3       1.1  rafal /*
      4       1.1  rafal  * Copyright (c) 2003 The NetBSD Foundation, Inc.
      5       1.1  rafal  * All rights reserved.
      6       1.1  rafal  *
      7       1.1  rafal  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1  rafal  * by Rafal K. Boni.
      9       1.7  perry  *
     10       1.1  rafal  * Redistribution and use in source and binary forms, with or without
     11       1.1  rafal  * modification, are permitted provided that the following conditions
     12       1.1  rafal  * are met:
     13       1.1  rafal  * 1. Redistributions of source code must retain the above copyright
     14       1.1  rafal  *    notice, this list of conditions and the following disclaimer.
     15       1.1  rafal  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1  rafal  *    notice, this list of conditions and the following disclaimer in the
     17       1.1  rafal  *    documentation and/or other materials provided with the distribution.
     18       1.1  rafal  * 3. All advertising materials mentioning features or use of this software
     19       1.1  rafal  *    must display the following acknowledgement:
     20       1.1  rafal  *	This product includes software developed by the NetBSD
     21       1.1  rafal  *	Foundation, Inc. and its contributors.
     22       1.1  rafal  * 4. The name of the author may not be used to endorse or promote products
     23       1.1  rafal  *    derived from this software without specific prior written permission.
     24       1.7  perry  *
     25       1.1  rafal  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     26       1.1  rafal  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     27       1.1  rafal  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     28       1.1  rafal  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     29       1.1  rafal  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     30       1.1  rafal  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     31       1.1  rafal  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     32       1.1  rafal  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     33       1.1  rafal  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     34       1.1  rafal  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     35       1.2  rafal  */
     36       1.2  rafal 
     37       1.2  rafal /*
     38       1.2  rafal  * Originally based on mc146818reg.h, with the following license:
     39       1.2  rafal  *
     40       1.2  rafal  * Copyright (c) 1995 Carnegie-Mellon University.
     41       1.2  rafal  * All rights reserved.
     42       1.7  perry  *
     43       1.2  rafal  * Permission to use, copy, modify and distribute this software and
     44       1.2  rafal  * its documentation is hereby granted, provided that both the copyright
     45       1.2  rafal  * notice and this permission notice appear in all copies of the
     46       1.2  rafal  * software, derivative works or modified versions, and any portions
     47       1.2  rafal  * thereof, and that both notices appear in supporting documentation.
     48       1.7  perry  *
     49       1.7  perry  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     50       1.7  perry  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     51       1.2  rafal  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     52       1.7  perry  *
     53       1.2  rafal  * Carnegie Mellon requests users of this software to return to
     54       1.2  rafal  *
     55       1.2  rafal  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     56       1.2  rafal  *  School of Computer Science
     57       1.2  rafal  *  Carnegie Mellon University
     58       1.2  rafal  *  Pittsburgh PA 15213-3890
     59       1.2  rafal  *
     60       1.2  rafal  * any improvements or extensions that they make and grant Carnegie the
     61       1.2  rafal  * rights to redistribute these changes.
     62       1.1  rafal  */
     63       1.1  rafal 
     64       1.1  rafal /*
     65       1.1  rafal  * Definitions for the Dallas Semiconductor DS1687 Real Time Clock.
     66       1.1  rafal  *
     67       1.1  rafal  * The DS1687 and follow-on RTC chips are Y2k-compliant successors to the
     68       1.1  rafal  * DS1287, which in turn is register-compatible with the MC146818 and/or
     69       1.1  rafal  * MC146818A RTCs.
     70       1.1  rafal  *
     71       1.1  rafal  * Plucked right from the Dallas Semicomductor specs available at:
     72       1.1  rafal  *	http://pdfserv.maxim-ic.com/arpdf/DS1685-DS1687.pdf
     73       1.1  rafal  *
     74       1.1  rafal  * The DS1686 contains 14 basic clock-related registers and 50 bytes of
     75       1.1  rafal  * user RAM laid out for compatibility with the register layout of the
     76       1.1  rafal  * DS1287/MC14818 chips.  It also includes an extended mode which allows
     77       1.1  rafal  * access to these same basic registers as well an an extended register
     78       1.1  rafal  * set and NVRAM area; this extended register set includes a century
     79       1.1  rafal  * register for Y2k compliant date storage.
     80       1.1  rafal  *
     81       1.1  rafal  * Since the locations of these ports and the method used to access them
     82       1.1  rafal  * can be machine-dependent, the low-level details of reading and writing
     83       1.1  rafal  * writing the RTC's registers are handled by machine-specific functions.
     84       1.1  rafal  *
     85       1.1  rafal  * The Dallas chip can store time-of-day and alarm data in BCD or binary;
     86       1.1  rafal  * this setting applies to *all* values stored in the clock chip and a
     87       1.1  rafal  * change from one mode to the other requires *all* of the clock data to
     88       1.1  rafal  * be re-written.   The "hours" time-of-year and alarm registers can be
     89       1.1  rafal  * stored either in an AM/PM or a 24-hour format; the format is set
     90       1.1  rafal  * globally and changing it requires re-writing both the hours time-of-
     91       1.1  rafal  * year and alarm registers.  In AM/PM mode, the hour must be in the
     92       1.1  rafal  * range of 1-12 (and stored as either BCD or binary), with the high-
     93       1.1  rafal  * bit cleared to indicate AM and set to indicate PM.  In 24-hour mode,
     94       1.1  rafal  * hours must be in the range 0-23.
     95       1.1  rafal  *
     96       1.7  perry  * In order to support extended features like the century register and
     97       1.1  rafal  * an embedded silicon serial number while keeping backwards compatibility
     98       1.1  rafal  * with the DS1287/MC146818, the DS1687 provides a bank-switching method
     99       1.1  rafal  * which allows the user to switch the RTC between a "compatible" mode in
    100       1.1  rafal  * bank 0 and an extended mode in bank 1.
    101       1.1  rafal  *
    102       1.1  rafal  * Both banks provide access to the 14 timekeeping/alarm registers and
    103       1.1  rafal  * to 50 bytes of user RAM.  In addition, bank 0 provides access to an
    104       1.1  rafal  * additional 64 bytes of user RAM in the upper half of the RTC address
    105       1.1  rafal  * space.
    106       1.7  perry  *
    107       1.1  rafal  * Bank 1, on the other hand, provides access to an extended register set,
    108       1.1  rafal  * including a silicon serial number -- including a model ID byte, century
    109       1.1  rafal  * register for Y2k compatibility and memory address/data registers which
    110       1.1  rafal  * allow indirect access to a larger extended user RAM address space.  It
    111       1.1  rafal  * is worth noting that the extended user RAM is distinct from the "basic"
    112       1.1  rafal  * 114 bytes of user RAM which are accesible in bank 0.
    113       1.1  rafal  */
    114       1.1  rafal 
    115       1.1  rafal /*
    116       1.1  rafal  * The registers, and the bits within each register.
    117       1.1  rafal  */
    118       1.1  rafal 
    119       1.1  rafal #define	DS1687_SEC	0x00	/* Time of year: seconds (0-59) */
    120       1.1  rafal #define DS1687_ASEC	0x01	/* Alarm: seconds */
    121       1.1  rafal #define	DS1687_MIN	0x02	/* Time of year: minutes (0-59) */
    122       1.1  rafal #define	DS1687_AMIN	0x03	/* Alarm: minutes */
    123       1.1  rafal #define	DS1687_HOUR	0x04	/* Time of year: hour (see above) */
    124       1.1  rafal #define	DS1687_AHOUR	0x05	/* Alarm: hour (see above) */
    125       1.1  rafal #define	DS1687_DOW	0x06	/* Time of year: day of week (1-7, 1 = Sun) */
    126       1.1  rafal #define	DS1687_DOM	0x07	/* Time of year: day of month (1-31) */
    127       1.1  rafal #define	DS1687_MONTH	0x08	/* Time of year: month (1-12) */
    128       1.1  rafal #define	DS1687_YEAR	0x09	/* Time of year: year in century (0-99) */
    129       1.1  rafal 
    130       1.1  rafal #define DS1687_CONTROLA	0x0a	/* Control Register A */
    131       1.1  rafal 
    132       1.1  rafal #define DS1687_UIP	0x80	/* Update in progress: RO */
    133       1.1  rafal #define DS1687_DV2	0x40	/* Countdown chain: 0 = on,  1 = reset if DV1 */
    134       1.1  rafal #define DS1687_DV1	0x20	/* Oscillator enable */
    135       1.1  rafal #define DS1687_BANK1	0x10	/* Bank select: 0 = bank0, 1 = bank1 */
    136       1.1  rafal #define DS1687_RATEMASK 0x0f	/* Rate select bits for sq. wave and PIE */
    137       1.1  rafal 
    138       1.1  rafal #define DS1687_CONTROLB	0x0b	/* Control Register B */
    139       1.1  rafal 
    140       1.1  rafal #define DS1687_SET	0x80	/* Clock update control: 1 = disable update */
    141       1.1  rafal #define DS1687_PIE	0x40	/* Periodic interrupt enable */
    142       1.1  rafal #define DS1687_AIE	0x20	/* Alarm interrupt enable */
    143       1.1  rafal #define DS1687_UIE	0x10	/* Update-ended interrupt enable */
    144       1.1  rafal #define DS1687_SQWE	0x08	/* Enable sq. wave output on SQW pin */
    145       1.1  rafal #define DS1687_BINARY	0x04	/* Data mode: 0 = BCD, 1 = binary data */
    146       1.1  rafal #define DS1687_24HRS	0x02	/* Hour format: 1 = 24hrs, 0 = 12hrs */
    147       1.1  rafal #define DS1687_DSE	0x01	/* Daylight savings enable */
    148       1.1  rafal 
    149       1.1  rafal #define DS1687_CONTROLC	0x0c	/* Control register C: Read-only */
    150       1.1  rafal 				/* Note: PF, AF, UF cleared on read */
    151       1.1  rafal 
    152       1.1  rafal #define DS1687_IRQF	0x80	/* IRQ present: set when any IRQ is active */
    153       1.1  rafal #define DS1687_PF	0x40	/* Periodic interrupt: independent of PIE */
    154       1.1  rafal #define DS1687_AF	0x20	/* Alarm reached: independent of AIE */
    155       1.1  rafal #define DS1687_UF	0x10	/* Update ended: independent of UIE */
    156       1.1  rafal 
    157       1.1  rafal #define DS1687_CONTROLD	0x0d	/* Control register D: Read-only */
    158       1.1  rafal 
    159       1.1  rafal #define DS1687_VRT	0x80	/* Valid RAM and time: battery bad if 0 */
    160       1.1  rafal 
    161       1.1  rafal #define DS1687_NVRAM_START	0x0e	/* Start of user ram: offset 14 */
    162       1.1  rafal #define DS1687_NVRAM_SIZE	0x72	/* 114 bytes of user RAM */
    163       1.1  rafal 
    164       1.1  rafal #define DS1687_BANK1_START	0x40	/* BANK1: Start of BANK1 registers */
    165       1.1  rafal #define	DS1687_BANK1_CENTURY	0x48 	/* BANK1: Time of yr: Century (0-99) */
    166       1.1  rafal #define	DS1687_BANK1_ADATE	0x49	/* BANK1: Alarm: Date (1-31) */
    167  1.8.30.1     ad #define DS1687_BANK1_XCTRL4A	0x4a
    168  1.8.30.1     ad 	#define DS1687_X4A_VRT	0x80	/* valid RAM / time */
    169  1.8.30.1     ad 	#define DS1687_X4A_INCR	0x40	/* increment status */
    170  1.8.30.1     ad 	#define DS1687_X4A_BME	0x20	/* burst mode enable */
    171  1.8.30.1     ad 	#define DS1687_X4A_PAB	0x08	/* power active bar */
    172  1.8.30.1     ad 	#define DS1687_X4A_RCF	0x04	/* read clear flag */
    173  1.8.30.1     ad 	#define DS1687_X4A_WAF	0x02	/* wakeup alarm flag */
    174  1.8.30.1     ad 	#define DS1687_X4A_KF	0x01	/* kickstart flag */
    175  1.8.30.1     ad #define DS1687_BANK1_XCTRL4B	0x4b
    176  1.8.30.1     ad 	#define DS1687_X4B_ABE	0x80	/* auxillary battery enable */
    177  1.8.30.1     ad 	#define DS1687_X4B_E32K	0x40	/* enable 32.768kHz output */
    178  1.8.30.1     ad 	#define DS1687_X4B_CS	0x20	/* chrystal select */
    179  1.8.30.1     ad 	#define DS1687_X4B_RCE	0x10	/* RAM clear enable */
    180  1.8.30.1     ad 	#define DS1687_X4B_PRS	0x08	/* PAB reset select */
    181  1.8.30.1     ad 	#define DS1687_X4B_RCIE	0x04	/* RAM clear interrupt enable */
    182  1.8.30.1     ad 	#define DS1687_X4B_WIE	0x02	/* wakeup interrupt enable */
    183  1.8.30.1     ad 	#define DS1687_X4B_KIE	0x01	/* kickstart interrupt enable */
    184       1.1  rafal 
    185       1.1  rafal #define	DS1687_NBASEREGS	0x0d	/* 14 registers; CMOS follows */
    186       1.1  rafal 
    187       1.1  rafal /* Layout of software shadow copy of TOD registers */
    188       1.1  rafal #define DS1687_NHDW_TODREGS	0x0a	/* 10 basic TOD registers */
    189       1.1  rafal #define DS1687_NSOFT_TODREGS	0x0c	/* ...plus shadow CENTURY, ADATE */
    190       1.1  rafal 
    191       1.1  rafal #define	DS1687_SOFT_SEC		0x00
    192       1.1  rafal #define DS1687_SOFT_ASEC	0x01
    193       1.1  rafal #define	DS1687_SOFT_MIN		0x02
    194       1.1  rafal #define	DS1687_SOFT_AMIN	0x03
    195       1.1  rafal #define	DS1687_SOFT_HOUR	0x04
    196       1.1  rafal #define	DS1687_SOFT_AHOUR	0x05
    197       1.1  rafal #define	DS1687_SOFT_DOW		0x06
    198       1.1  rafal #define	DS1687_SOFT_DOM		0x07
    199       1.1  rafal #define	DS1687_SOFT_MONTH	0x08
    200       1.1  rafal #define	DS1687_SOFT_YEAR	0x09
    201       1.1  rafal #define DS1687_SOFT_CENTURY	0x0a
    202       1.1  rafal #define DS1687_SOFT_ADATE	0x0b
    203       1.1  rafal 
    204       1.1  rafal /*
    205       1.1  rafal  * RTC register/NVRAM read and write functions -- machine-dependent.
    206       1.1  rafal  * Appropriately manipulate RTC registers to get/put data values.
    207       1.1  rafal  */
    208       1.6  perry u_int ds1687_read(void *, u_int);
    209       1.6  perry void ds1687_write(void *, u_int, u_int);
    210       1.1  rafal 
    211       1.1  rafal /*
    212       1.1  rafal  * A collection of TOD/Alarm registers.
    213       1.1  rafal  */
    214       1.1  rafal typedef u_int ds1687_todregs[DS1687_NSOFT_TODREGS];
    215       1.1  rafal 
    216       1.1  rafal /*
    217       1.1  rafal  * Get all of the TOD/Alarm registers
    218       1.1  rafal  * Must be called at splhigh(), and with the RTC properly set up.
    219       1.1  rafal  */
    220       1.1  rafal #define DS1687_GETTOD(sc, regs)						\
    221       1.1  rafal 	do {								\
    222       1.1  rafal 		int i;							\
    223       1.1  rafal 		u_int ctl;						\
    224       1.1  rafal 									\
    225       1.1  rafal 		/* turn off update for now */				\
    226       1.1  rafal 		ctl = ds1687_read(sc, DS1687_CONTROLB);			\
    227       1.1  rafal 		ds1687_write(sc, DS1687_CONTROLB, ctl | DS1687_SET);	\
    228       1.1  rafal 									\
    229       1.1  rafal 		/* read all of the tod/alarm regs */			\
    230       1.1  rafal 		for (i = 0; i < DS1687_NHDW_TODREGS; i++) 		\
    231       1.1  rafal 			(*regs)[i] = ds1687_read(sc, i);		\
    232       1.1  rafal 									\
    233       1.1  rafal 		(*regs)[DS1687_SOFT_CENTURY] = 				\
    234       1.1  rafal 				ds1687_read(sc, DS1687_BANK1_CENTURY);	\
    235       1.1  rafal 		(*regs)[DS1687_SOFT_ADATE] = 				\
    236       1.1  rafal 				ds1687_read(sc, DS1687_BANK1_ADATE);	\
    237       1.1  rafal 									\
    238       1.1  rafal 		/* turn update back on */				\
    239       1.1  rafal 		ds1687_write(sc, DS1687_CONTROLB, ctl);			\
    240       1.1  rafal 	} while (0);
    241       1.1  rafal 
    242       1.1  rafal /*
    243       1.1  rafal  * Set all of the TOD/Alarm registers
    244       1.1  rafal  * Must be called at splhigh(), and with the RTC properly set up.
    245       1.1  rafal  */
    246       1.1  rafal #define DS1687_PUTTOD(sc, regs)						\
    247       1.1  rafal 	do {								\
    248       1.1  rafal 		int i;							\
    249       1.1  rafal 		u_int ctl;						\
    250       1.1  rafal 									\
    251       1.1  rafal 		/* turn off update for now */				\
    252       1.1  rafal 		ctl = ds1687_read(sc, DS1687_CONTROLB);			\
    253       1.1  rafal 		ds1687_write(sc, DS1687_CONTROLB, ctl | DS1687_SET);	\
    254       1.1  rafal 									\
    255       1.1  rafal 		/* write all of the tod/alarm regs */			\
    256       1.1  rafal 		for (i = 0; i < DS1687_NHDW_TODREGS; i++) 		\
    257       1.1  rafal 			ds1687_write(sc, i, (*regs)[i]);		\
    258       1.1  rafal 									\
    259       1.1  rafal 		ds1687_write(sc, DS1687_BANK1_CENTURY,			\
    260       1.1  rafal 					(*regs)[DS1687_SOFT_CENTURY]);	\
    261       1.1  rafal 		ds1687_write(sc, DS1687_BANK1_ADATE,			\
    262       1.1  rafal 					(*regs)[DS1687_SOFT_ADATE]);	\
    263       1.1  rafal 									\
    264       1.1  rafal 		/* turn update back on */				\
    265       1.1  rafal 		ds1687_write(sc, DS1687_CONTROLB, ctl);			\
    266       1.1  rafal 	} while (0);
    267