dwc_gmac_var.h revision 1.5.2.2
1 1.5.2.2 snj /* $NetBSD: dwc_gmac_var.h,v 1.5.2.2 2014/11/09 19:06:57 snj Exp $ */ 2 1.5.2.2 snj 3 1.5.2.2 snj /*- 4 1.5.2.2 snj * Copyright (c) 2013, 2014 The NetBSD Foundation, Inc. 5 1.5.2.2 snj * All rights reserved. 6 1.5.2.2 snj * 7 1.5.2.2 snj * This code is derived from software contributed to The NetBSD Foundation 8 1.5.2.2 snj * by Matt Thomas of 3am Software Foundry and Martin Husemann. 9 1.5.2.2 snj * 10 1.5.2.2 snj * Redistribution and use in source and binary forms, with or without 11 1.5.2.2 snj * modification, are permitted provided that the following conditions 12 1.5.2.2 snj * are met: 13 1.5.2.2 snj * 1. Redistributions of source code must retain the above copyright 14 1.5.2.2 snj * notice, this list of conditions and the following disclaimer. 15 1.5.2.2 snj * 2. Redistributions in binary form must reproduce the above copyright 16 1.5.2.2 snj * notice, this list of conditions and the following disclaimer in the 17 1.5.2.2 snj * documentation and/or other materials provided with the distribution. 18 1.5.2.2 snj * 19 1.5.2.2 snj * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.5.2.2 snj * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.5.2.2 snj * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.5.2.2 snj * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.5.2.2 snj * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.5.2.2 snj * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.5.2.2 snj * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.5.2.2 snj * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.5.2.2 snj * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.5.2.2 snj * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.5.2.2 snj * POSSIBILITY OF SUCH DAMAGE. 30 1.5.2.2 snj */ 31 1.5.2.2 snj 32 1.5.2.2 snj 33 1.5.2.2 snj /* 34 1.5.2.2 snj * We could use 1024 DMA descriptors to fill up an 8k page (each is 16 byte). 35 1.5.2.2 snj * However, on TX we probably will not need that many, and on RX we allocate 36 1.5.2.2 snj * a full mbuf cluster for each, so secondary memory consumption will grow 37 1.5.2.2 snj * rapidly. 38 1.5.2.2 snj * So currently we waste half a page of dma memory and consume 512k Byte of 39 1.5.2.2 snj * RAM for mbuf clusters. 40 1.5.2.2 snj * XXX Maybe fine-tune later, or reconsider unsharing of RX/TX dmamap. 41 1.5.2.2 snj */ 42 1.5.2.2 snj #define AWGE_RX_RING_COUNT 256 43 1.5.2.2 snj #define AWGE_TX_RING_COUNT 256 44 1.5.2.2 snj #define AWGE_TOTAL_RING_COUNT \ 45 1.5.2.2 snj (AWGE_RX_RING_COUNT + AWGE_TX_RING_COUNT) 46 1.5.2.2 snj 47 1.5.2.2 snj #define AWGE_MAX_PACKET (ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN) 48 1.5.2.2 snj 49 1.5.2.2 snj 50 1.5.2.2 snj 51 1.5.2.2 snj struct dwc_gmac_rx_data { 52 1.5.2.2 snj bus_dmamap_t rd_map; 53 1.5.2.2 snj struct mbuf *rd_m; 54 1.5.2.2 snj }; 55 1.5.2.2 snj 56 1.5.2.2 snj struct dwc_gmac_tx_data { 57 1.5.2.2 snj bus_dmamap_t td_map; 58 1.5.2.2 snj bus_dmamap_t td_active; 59 1.5.2.2 snj struct mbuf *td_m; 60 1.5.2.2 snj }; 61 1.5.2.2 snj 62 1.5.2.2 snj struct dwc_gmac_tx_ring { 63 1.5.2.2 snj bus_addr_t t_physaddr; /* PA of TX ring start */ 64 1.5.2.2 snj struct dwc_gmac_dev_dmadesc *t_desc; /* VA of TX ring start */ 65 1.5.2.2 snj struct dwc_gmac_tx_data t_data[AWGE_TX_RING_COUNT]; 66 1.5.2.2 snj int t_cur, t_next, t_queued; 67 1.5.2.2 snj }; 68 1.5.2.2 snj 69 1.5.2.2 snj struct dwc_gmac_rx_ring { 70 1.5.2.2 snj bus_addr_t r_physaddr; /* PA of RX ring start */ 71 1.5.2.2 snj struct dwc_gmac_dev_dmadesc *r_desc; /* VA of RX ring start */ 72 1.5.2.2 snj struct dwc_gmac_rx_data r_data[AWGE_RX_RING_COUNT]; 73 1.5.2.2 snj int r_cur, r_next; 74 1.5.2.2 snj kmutex_t r_mtx; 75 1.5.2.2 snj }; 76 1.5.2.2 snj 77 1.5.2.2 snj struct dwc_gmac_softc { 78 1.5.2.2 snj device_t sc_dev; 79 1.5.2.2 snj bus_space_tag_t sc_bst; 80 1.5.2.2 snj bus_space_handle_t sc_bsh; 81 1.5.2.2 snj bus_dma_tag_t sc_dmat; 82 1.5.2.2 snj struct ethercom sc_ec; 83 1.5.2.2 snj struct mii_data sc_mii; 84 1.5.2.2 snj kmutex_t sc_mdio_lock; 85 1.5.2.2 snj bus_dmamap_t sc_dma_ring_map; /* common dma memory for RX */ 86 1.5.2.2 snj bus_dma_segment_t sc_dma_ring_seg; /* and TX ring */ 87 1.5.2.2 snj struct dwc_gmac_rx_ring sc_rxq; 88 1.5.2.2 snj struct dwc_gmac_tx_ring sc_txq; 89 1.5.2.2 snj short sc_if_flags; /* shadow of ether flags */ 90 1.5.2.2 snj uint16_t sc_mii_clk; 91 1.5.2.2 snj }; 92 1.5.2.2 snj 93 1.5.2.2 snj void dwc_gmac_attach(struct dwc_gmac_softc*, uint32_t /*mii_clk*/); 94 1.5.2.2 snj int dwc_gmac_intr(struct dwc_gmac_softc*); 95
Indexes created Fri Oct 03 02:09:57 GMT 2025