dwc_mmc_var.h revision 1.2 1 1.2 jmcneill /* $NetBSD: dwc_mmc_var.h,v 1.2 2014/12/27 19:18:04 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2014 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #ifndef _DWC_MMC_VAR_H
30 1.1 jmcneill #define _DWC_MMC_VAR_H
31 1.1 jmcneill
32 1.1 jmcneill struct dwc_mmc_softc {
33 1.1 jmcneill device_t sc_dev;
34 1.1 jmcneill bus_space_tag_t sc_bst;
35 1.1 jmcneill bus_space_handle_t sc_bsh;
36 1.1 jmcneill bus_dma_tag_t sc_dmat;
37 1.1 jmcneill void *sc_ih;
38 1.1 jmcneill unsigned int sc_clock_freq;
39 1.1 jmcneill unsigned int sc_fifo_depth;
40 1.1 jmcneill uint32_t sc_flags;
41 1.2 jmcneill #define DWC_MMC_F_USE_HOLD_REG 0x0001 /* set USE_HOLD_REG with every cmd */
42 1.2 jmcneill #define DWC_MMC_F_PWREN_CLEAR 0x0002 /* clear POWER_ENABLE bit to enable */
43 1.2 jmcneill int (*sc_set_clkdiv)(struct dwc_mmc_softc *, int);
44 1.1 jmcneill
45 1.1 jmcneill device_t sc_sdmmc_dev;
46 1.1 jmcneill kmutex_t sc_intr_lock;
47 1.1 jmcneill kcondvar_t sc_intr_cv;
48 1.1 jmcneill
49 1.1 jmcneill uint32_t sc_intr_rint;
50 1.1 jmcneill };
51 1.1 jmcneill
52 1.1 jmcneill void dwc_mmc_init(struct dwc_mmc_softc *);
53 1.1 jmcneill int dwc_mmc_intr(void *);
54 1.1 jmcneill
55 1.1 jmcneill #endif /* !_DWC_MMC_VAR_H */
56