elink3.c revision 1.100
1 /* $NetBSD: elink3.c,v 1.100 2001/11/13 13:14:37 lukem Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include <sys/cdefs.h> 72 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.100 2001/11/13 13:14:37 lukem Exp $"); 73 74 #include "opt_inet.h" 75 #include "opt_ns.h" 76 #include "bpfilter.h" 77 #include "rnd.h" 78 79 #include <sys/param.h> 80 #include <sys/systm.h> 81 #include <sys/callout.h> 82 #include <sys/kernel.h> 83 #include <sys/mbuf.h> 84 #include <sys/socket.h> 85 #include <sys/ioctl.h> 86 #include <sys/errno.h> 87 #include <sys/syslog.h> 88 #include <sys/select.h> 89 #include <sys/device.h> 90 #if NRND > 0 91 #include <sys/rnd.h> 92 #endif 93 94 #include <net/if.h> 95 #include <net/if_dl.h> 96 #include <net/if_ether.h> 97 #include <net/if_media.h> 98 99 #if NBPFILTER > 0 100 #include <net/bpf.h> 101 #include <net/bpfdesc.h> 102 #endif 103 104 #include <machine/cpu.h> 105 #include <machine/bus.h> 106 #include <machine/intr.h> 107 108 #include <dev/mii/mii.h> 109 #include <dev/mii/miivar.h> 110 #include <dev/mii/mii_bitbang.h> 111 112 #include <dev/ic/elink3var.h> 113 #include <dev/ic/elink3reg.h> 114 115 #ifdef DEBUG 116 int epdebug = 0; 117 #endif 118 119 /* 120 * XXX endian workaround for big-endian CPUs with pcmcia: 121 * if stream methods for bus_space_multi are not provided, define them 122 * using non-stream bus_space_{read,write}_multi_. 123 * Assumes host CPU is same endian-ness as bus. 124 */ 125 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 126 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 127 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 128 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 129 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 130 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 131 132 /* 133 * Structure to map media-present bits in boards to ifmedia codes and 134 * printable media names. Used for table-driven ifmedia initialization. 135 */ 136 struct ep_media { 137 int epm_mpbit; /* media present bit */ 138 const char *epm_name; /* name of medium */ 139 int epm_ifmedia; /* ifmedia word for medium */ 140 int epm_epmedia; /* ELINKMEDIA_* constant */ 141 }; 142 143 /* 144 * Media table for the Demon/Vortex/Boomerang chipsets. 145 * 146 * Note that MII on the Demon and Vortex (3c59x) indicates an external 147 * MII connector (for connecting an external PHY) ... I think. Treat 148 * it as `manual' on these chips. 149 * 150 * Any Boomerang (3c90x) chips with MII really do have an internal 151 * MII and real PHYs attached; no `native' media. 152 */ 153 const struct ep_media ep_vortex_media[] = { 154 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 155 ELINKMEDIA_10BASE_T }, 156 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 157 ELINKMEDIA_10BASE_T }, 158 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 159 ELINKMEDIA_AUI }, 160 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 161 ELINKMEDIA_10BASE_2 }, 162 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 163 ELINKMEDIA_100BASE_TX }, 164 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 165 ELINKMEDIA_100BASE_TX }, 166 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 167 ELINKMEDIA_100BASE_FX }, 168 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 169 ELINKMEDIA_MII }, 170 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 171 ELINKMEDIA_100BASE_T4 }, 172 { 0, NULL, 0, 173 0 }, 174 }; 175 176 /* 177 * Media table for the older 3Com Etherlink III chipset, used 178 * in the 3c509, 3c579, and 3c589. 179 */ 180 const struct ep_media ep_509_media[] = { 181 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 182 ELINKMEDIA_10BASE_T }, 183 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 184 ELINKMEDIA_AUI }, 185 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 186 ELINKMEDIA_10BASE_2 }, 187 { 0, NULL, 0, 188 0 }, 189 }; 190 191 void ep_internalconfig __P((struct ep_softc *sc)); 192 void ep_vortex_probemedia __P((struct ep_softc *sc)); 193 void ep_509_probemedia __P((struct ep_softc *sc)); 194 195 static void eptxstat __P((struct ep_softc *)); 196 static int epstatus __P((struct ep_softc *)); 197 int epinit __P((struct ifnet *)); 198 void epstop __P((struct ifnet *, int)); 199 int epioctl __P((struct ifnet *, u_long, caddr_t)); 200 void epstart __P((struct ifnet *)); 201 void epwatchdog __P((struct ifnet *)); 202 void epreset __P((struct ep_softc *)); 203 static void epshutdown __P((void *)); 204 void epread __P((struct ep_softc *)); 205 struct mbuf *epget __P((struct ep_softc *, int)); 206 void epmbuffill __P((void *)); 207 void epmbufempty __P((struct ep_softc *)); 208 void epsetfilter __P((struct ep_softc *)); 209 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 210 void epsetmedia __P((struct ep_softc *)); 211 212 /* ifmedia callbacks */ 213 int ep_media_change __P((struct ifnet *ifp)); 214 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 215 216 /* MII callbacks */ 217 int ep_mii_readreg __P((struct device *, int, int)); 218 void ep_mii_writereg __P((struct device *, int, int, int)); 219 void ep_statchg __P((struct device *)); 220 221 void ep_tick __P((void *)); 222 223 static int epbusyeeprom __P((struct ep_softc *)); 224 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 225 static inline void ep_reset_cmd __P((struct ep_softc *sc, 226 u_int cmd, u_int arg)); 227 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 228 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 229 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 230 231 /* 232 * MII bit-bang glue. 233 */ 234 u_int32_t ep_mii_bitbang_read __P((struct device *)); 235 void ep_mii_bitbang_write __P((struct device *, u_int32_t)); 236 237 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 238 ep_mii_bitbang_read, 239 ep_mii_bitbang_write, 240 { 241 PHYSMGMT_DATA, /* MII_BIT_MDO */ 242 PHYSMGMT_DATA, /* MII_BIT_MDI */ 243 PHYSMGMT_CLK, /* MII_BIT_MDC */ 244 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 245 0, /* MII_BIT_DIR_PHY_HOST */ 246 } 247 }; 248 249 /* 250 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 251 * Window 1 registers offset! 252 */ 253 static __inline int 254 ep_w1_reg(sc, reg) 255 struct ep_softc *sc; 256 int reg; 257 { 258 259 switch (sc->ep_chipset) { 260 case ELINK_CHIPSET_CORKSCREW: 261 return (reg + 0x10); 262 263 case ELINK_CHIPSET_ROADRUNNER: 264 switch (reg) { 265 case ELINK_W1_FREE_TX: 266 case ELINK_W1_RUNNER_RDCTL: 267 case ELINK_W1_RUNNER_WRCTL: 268 return (reg); 269 } 270 return (reg + 0x10); 271 } 272 273 return (reg); 274 } 275 276 /* 277 * Wait for any pending reset to complete. 278 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 279 * but older hardware doesn't implement it and we must delay. 280 */ 281 static inline void 282 ep_finish_reset(iot, ioh) 283 bus_space_tag_t iot; 284 bus_space_handle_t ioh; 285 { 286 int i; 287 288 for (i = 0; i < 10000; i++) { 289 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 290 S_COMMAND_IN_PROGRESS) == 0) 291 break; 292 DELAY(10); 293 } 294 } 295 296 /* 297 * Issue a (reset) command, and be sure it has completed. 298 * Used for global reset, TX_RESET, RX_RESET. 299 */ 300 static inline void 301 ep_reset_cmd(sc, cmd, arg) 302 struct ep_softc *sc; 303 u_int cmd, arg; 304 { 305 bus_space_tag_t iot = sc->sc_iot; 306 bus_space_handle_t ioh = sc->sc_ioh; 307 308 bus_space_write_2(iot, ioh, cmd, arg); 309 ep_finish_reset(iot, ioh); 310 } 311 312 313 static inline void 314 ep_discard_rxtop(iot, ioh) 315 bus_space_tag_t iot; 316 bus_space_handle_t ioh; 317 { 318 int i; 319 320 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 321 322 /* 323 * Spin for about 1 msec, to avoid forcing a DELAY() between 324 * every received packet (adding latency and limiting pkt-recv rate). 325 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 326 * is about right. 327 */ 328 for (i = 0; i < 8000; i++) { 329 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 330 S_COMMAND_IN_PROGRESS) == 0) 331 return; 332 } 333 334 /* Didn't complete in a hurry. Do DELAY()s. */ 335 ep_finish_reset(iot, ioh); 336 } 337 338 /* 339 * Back-end attach and configure. 340 */ 341 int 342 epconfig(sc, chipset, enaddr) 343 struct ep_softc *sc; 344 u_short chipset; 345 u_int8_t *enaddr; 346 { 347 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 348 bus_space_tag_t iot = sc->sc_iot; 349 bus_space_handle_t ioh = sc->sc_ioh; 350 u_int16_t i; 351 u_int8_t myla[ETHER_ADDR_LEN]; 352 353 callout_init(&sc->sc_mii_callout); 354 callout_init(&sc->sc_mbuf_callout); 355 356 sc->ep_chipset = chipset; 357 358 /* 359 * We could have been groveling around in other register 360 * windows in the front-end; make sure we're in window 0 361 * to read the EEPROM. 362 */ 363 GO_WINDOW(0); 364 365 if (enaddr == NULL) { 366 /* 367 * Read the station address from the eeprom. 368 */ 369 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 370 u_int16_t x = ep_read_eeprom(sc, i); 371 myla[(i << 1)] = x >> 8; 372 myla[(i << 1) + 1] = x; 373 } 374 enaddr = myla; 375 } 376 377 /* 378 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 379 * allow FDDI-sized (4500) byte packets. Commands only take an 380 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 381 * packet length. 382 * Commands to these cards implicitly upshift a packet size 383 * or threshold by 2 bits. 384 * To detect cards with large-packet support, we probe by setting 385 * the transmit threshold register, then change windows and 386 * read back the threshold register directly, and see if the 387 * threshold value was shifted or not. 388 */ 389 bus_space_write_2(iot, ioh, ELINK_COMMAND, 390 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 391 GO_WINDOW(5); 392 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 393 GO_WINDOW(1); 394 switch (i) { 395 case ELINK_LARGEWIN_PROBE: 396 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 397 sc->ep_pktlenshift = 0; 398 break; 399 400 case (ELINK_LARGEWIN_PROBE << 2): 401 sc->ep_pktlenshift = 2; 402 break; 403 404 default: 405 printf("%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 406 "Interface disabled\n", 407 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 408 return (1); 409 } 410 411 /* 412 * Ensure Tx-available interrupts are enabled for 413 * start the interface. 414 * XXX should be in epinit()? 415 */ 416 bus_space_write_2(iot, ioh, ELINK_COMMAND, 417 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 418 419 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 420 ifp->if_softc = sc; 421 ifp->if_start = epstart; 422 ifp->if_ioctl = epioctl; 423 ifp->if_watchdog = epwatchdog; 424 ifp->if_init = epinit; 425 ifp->if_stop = epstop; 426 ifp->if_flags = 427 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 428 IFQ_SET_READY(&ifp->if_snd); 429 430 if_attach(ifp); 431 ether_ifattach(ifp, enaddr); 432 433 /* 434 * Finish configuration: 435 * determine chipset if the front-end couldn't do so, 436 * show board details, set media. 437 */ 438 439 /* 440 * Print RAM size. We also print the Ethernet address in here. 441 * It's extracted from the ifp, so we have to make sure it's 442 * been attached first. 443 */ 444 ep_internalconfig(sc); 445 GO_WINDOW(0); 446 447 /* 448 * Display some additional information, if pertinent. 449 */ 450 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 451 printf("%s: RoadRunner FIFO buffer enabled\n", 452 sc->sc_dev.dv_xname); 453 454 /* 455 * Initialize our media structures and MII info. We'll 456 * probe the MII if we discover that we have one. 457 */ 458 sc->sc_mii.mii_ifp = ifp; 459 sc->sc_mii.mii_readreg = ep_mii_readreg; 460 sc->sc_mii.mii_writereg = ep_mii_writereg; 461 sc->sc_mii.mii_statchg = ep_statchg; 462 ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change, 463 ep_media_status); 464 465 /* 466 * All CORKSCREW chips have MII. 467 */ 468 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) 469 sc->ep_flags |= ELINK_FLAGS_MII; 470 471 /* 472 * Now, determine which media we have. 473 */ 474 switch (sc->ep_chipset) { 475 case ELINK_CHIPSET_ROADRUNNER: 476 if (sc->ep_flags & ELINK_FLAGS_MII) { 477 ep_roadrunner_mii_enable(sc); 478 GO_WINDOW(0); 479 } 480 /* FALLTHROUGH */ 481 482 case ELINK_CHIPSET_CORKSCREW: 483 case ELINK_CHIPSET_BOOMERANG: 484 /* 485 * If the device has MII, probe it. We won't be using 486 * any `native' media in this case, only PHYs. If 487 * we don't, just treat the Boomerang like the Vortex. 488 */ 489 if (sc->ep_flags & ELINK_FLAGS_MII) { 490 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 491 MII_PHY_ANY, MII_OFFSET_ANY, 0); 492 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 493 ifmedia_add(&sc->sc_mii.mii_media, 494 IFM_ETHER|IFM_NONE, 0, NULL); 495 ifmedia_set(&sc->sc_mii.mii_media, 496 IFM_ETHER|IFM_NONE); 497 } else { 498 ifmedia_set(&sc->sc_mii.mii_media, 499 IFM_ETHER|IFM_AUTO); 500 } 501 break; 502 } 503 /* FALLTHROUGH */ 504 505 case ELINK_CHIPSET_VORTEX: 506 ep_vortex_probemedia(sc); 507 break; 508 509 default: 510 ep_509_probemedia(sc); 511 break; 512 } 513 514 GO_WINDOW(1); /* Window 1 is operating window */ 515 516 #if NRND > 0 517 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 518 RND_TYPE_NET, 0); 519 #endif 520 521 sc->tx_start_thresh = 20; /* probably a good starting point. */ 522 523 /* Establish callback to reset card when we reboot. */ 524 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 525 526 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 527 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 528 529 /* The attach is successful. */ 530 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 531 return (0); 532 } 533 534 535 /* 536 * Show interface-model-independent info from window 3 537 * internal-configuration register. 538 */ 539 void 540 ep_internalconfig(sc) 541 struct ep_softc *sc; 542 { 543 bus_space_tag_t iot = sc->sc_iot; 544 bus_space_handle_t ioh = sc->sc_ioh; 545 546 u_int config0; 547 u_int config1; 548 549 int ram_size, ram_width, ram_speed, rom_size, ram_split; 550 /* 551 * NVRAM buffer Rx:Tx config names for busmastering cards 552 * (Demon, Vortex, and later). 553 */ 554 const char *onboard_ram_config[] = { 555 "5:3", "3:1", "1:1", "3:5" }; 556 557 GO_WINDOW(3); 558 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 559 config1 = (u_int)bus_space_read_2(iot, ioh, 560 ELINK_W3_INTERNAL_CONFIG + 2); 561 GO_WINDOW(0); 562 563 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 564 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 565 ram_speed = (config0 & CONFIG_RAMSPEED) >> CONFIG_RAMSPEED_SHIFT; 566 rom_size = (config0 & CONFIG_ROMSIZE) >> CONFIG_ROMSIZE_SHIFT; 567 568 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 569 570 printf("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 571 sc->sc_dev.dv_xname, 572 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 573 8 << ram_size, 574 (ram_width) ? "word" : "byte", 575 onboard_ram_config[ram_split]); 576 } 577 578 579 /* 580 * Find supported media on 3c509-generation hardware that doesn't have 581 * a "reset_options" register in window 3. 582 * Use the config_cntrl register in window 0 instead. 583 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 584 * that implement CONFIG_CTRL. We don't have a good way to set the 585 * default active medium; punt to ifconfig instead. 586 */ 587 void 588 ep_509_probemedia(sc) 589 struct ep_softc *sc; 590 { 591 bus_space_tag_t iot = sc->sc_iot; 592 bus_space_handle_t ioh = sc->sc_ioh; 593 struct ifmedia *ifm = &sc->sc_mii.mii_media; 594 u_int16_t ep_w0_config, port; 595 const struct ep_media *epm; 596 const char *sep = "", *defmedianame = NULL; 597 int defmedia = 0; 598 599 GO_WINDOW(0); 600 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 601 602 printf("%s: ", sc->sc_dev.dv_xname); 603 604 /* Sanity check that there are any media! */ 605 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 606 printf("no media present!\n"); 607 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 608 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 609 return; 610 } 611 612 /* 613 * Get the default media from the EEPROM. 614 */ 615 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 616 617 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 618 619 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 620 if (ep_w0_config & epm->epm_mpbit) { 621 /* 622 * This simple test works because 509 chipsets 623 * don't do full-duplex. 624 */ 625 if (epm->epm_epmedia == port || defmedia == 0) { 626 defmedia = epm->epm_ifmedia; 627 defmedianame = epm->epm_name; 628 } 629 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 630 NULL); 631 PRINT(epm->epm_name); 632 } 633 } 634 635 #undef PRINT 636 637 #ifdef DIAGNOSTIC 638 if (defmedia == 0) 639 panic("ep_509_probemedia: impossible"); 640 #endif 641 642 printf(" (default %s)\n", defmedianame); 643 ifmedia_set(ifm, defmedia); 644 } 645 646 /* 647 * Find media present on large-packet-capable elink3 devices. 648 * Show onboard configuration of large-packet-capable elink3 devices 649 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 650 * Use media and card-version info in window 3 instead. 651 */ 652 void 653 ep_vortex_probemedia(sc) 654 struct ep_softc *sc; 655 { 656 bus_space_tag_t iot = sc->sc_iot; 657 bus_space_handle_t ioh = sc->sc_ioh; 658 struct ifmedia *ifm = &sc->sc_mii.mii_media; 659 const struct ep_media *epm; 660 u_int config1; 661 int reset_options; 662 int default_media; /* 3-bit encoding of default (EEPROM) media */ 663 int defmedia = 0; 664 const char *sep = "", *defmedianame = NULL; 665 666 GO_WINDOW(3); 667 config1 = (u_int)bus_space_read_2(iot, ioh, 668 ELINK_W3_INTERNAL_CONFIG + 2); 669 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 670 GO_WINDOW(0); 671 672 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 673 674 printf("%s: ", sc->sc_dev.dv_xname); 675 676 /* Sanity check that there are any media! */ 677 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 678 printf("no media present!\n"); 679 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 680 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 681 return; 682 } 683 684 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 685 686 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 687 if (reset_options & epm->epm_mpbit) { 688 /* 689 * Default media is a little more complicated 690 * on the Vortex. We support full-duplex which 691 * uses the same reset options bit. 692 * 693 * XXX Check EEPROM for default to FDX? 694 */ 695 if (epm->epm_epmedia == default_media) { 696 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 697 defmedia = epm->epm_ifmedia; 698 defmedianame = epm->epm_name; 699 } 700 } else if (defmedia == 0) { 701 defmedia = epm->epm_ifmedia; 702 defmedianame = epm->epm_name; 703 } 704 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 705 NULL); 706 PRINT(epm->epm_name); 707 } 708 } 709 710 #undef PRINT 711 712 #ifdef DIAGNOSTIC 713 if (defmedia == 0) 714 panic("ep_vortex_probemedia: impossible"); 715 #endif 716 717 printf(" (default %s)\n", defmedianame); 718 ifmedia_set(ifm, defmedia); 719 } 720 721 /* 722 * One second timer, used to tick the MII. 723 */ 724 void 725 ep_tick(arg) 726 void *arg; 727 { 728 struct ep_softc *sc = arg; 729 int s; 730 731 #ifdef DIAGNOSTIC 732 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 733 panic("ep_tick"); 734 #endif 735 736 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 737 return; 738 739 s = splnet(); 740 mii_tick(&sc->sc_mii); 741 splx(s); 742 743 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 744 } 745 746 /* 747 * Bring device up. 748 * 749 * The order in here seems important. Otherwise we may not receive 750 * interrupts. ?! 751 */ 752 int 753 epinit(ifp) 754 struct ifnet *ifp; 755 { 756 struct ep_softc *sc = ifp->if_softc; 757 bus_space_tag_t iot = sc->sc_iot; 758 bus_space_handle_t ioh = sc->sc_ioh; 759 int i, error; 760 761 if (!sc->enabled && (error = epenable(sc)) != 0) 762 return (error); 763 764 /* Make sure any pending reset has completed before touching board */ 765 ep_finish_reset(iot, ioh); 766 767 /* 768 * Cancel any pending I/O. 769 */ 770 epstop(ifp, 0); 771 772 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 773 && sc->bustype != ELINK_BUS_MCA) { 774 GO_WINDOW(0); 775 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 776 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 777 ENABLE_DRQ_IRQ); 778 } 779 780 if (sc->bustype == ELINK_BUS_PCMCIA) { 781 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 782 } 783 784 GO_WINDOW(2); 785 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 786 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 787 LLADDR(ifp->if_sadl)[i]); 788 789 /* 790 * Reset the station-address receive filter. 791 * A bug workaround for busmastering (Vortex, Demon) cards. 792 */ 793 for (i = 0; i < 6; i++) 794 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 795 796 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 797 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 798 799 GO_WINDOW(1); /* Window 1 is operating window */ 800 for (i = 0; i < 31; i++) 801 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 802 803 /* Set threshold for Tx-space available interrupt. */ 804 bus_space_write_2(iot, ioh, ELINK_COMMAND, 805 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 806 807 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 808 /* 809 * Enable options in the PCMCIA LAN COR register, via 810 * RoadRunner Window 1. 811 * 812 * XXX MAGIC CONSTANTS! 813 */ 814 u_int16_t cor; 815 816 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 817 818 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 819 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 820 cor |= 0x10; 821 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 822 cor |= 0x20; 823 bus_space_write_2(iot, ioh, 0, cor); 824 825 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 826 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 827 828 if (sc->ep_flags & ELINK_FLAGS_MII) { 829 ep_roadrunner_mii_enable(sc); 830 GO_WINDOW(1); 831 } 832 } 833 834 /* Enable interrupts. */ 835 bus_space_write_2(iot, ioh, ELINK_COMMAND, 836 SET_RD_0_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 837 S_TX_AVAIL); 838 bus_space_write_2(iot, ioh, ELINK_COMMAND, 839 SET_INTR_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 840 S_TX_AVAIL); 841 842 /* 843 * Attempt to get rid of any stray interrupts that occurred during 844 * configuration. On the i386 this isn't possible because one may 845 * already be queued. However, a single stray interrupt is 846 * unimportant. 847 */ 848 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 849 850 epsetfilter(sc); 851 epsetmedia(sc); 852 853 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 854 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 855 856 epmbuffill(sc); 857 858 /* Interface is now `running', with no output active. */ 859 ifp->if_flags |= IFF_RUNNING; 860 ifp->if_flags &= ~IFF_OACTIVE; 861 862 if (sc->ep_flags & ELINK_FLAGS_MII) { 863 /* Start the one second clock. */ 864 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 865 } 866 867 /* Attempt to start output, if any. */ 868 epstart(ifp); 869 870 return (0); 871 } 872 873 874 /* 875 * Set multicast receive filter. 876 * elink3 hardware has no selective multicast filter in hardware. 877 * Enable reception of all multicasts and filter in software. 878 */ 879 void 880 epsetfilter(sc) 881 struct ep_softc *sc; 882 { 883 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 884 885 GO_WINDOW(1); /* Window 1 is operating window */ 886 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 887 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 888 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 889 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 890 } 891 892 int 893 ep_media_change(ifp) 894 struct ifnet *ifp; 895 { 896 struct ep_softc *sc = ifp->if_softc; 897 898 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 899 epreset(sc); 900 901 return (0); 902 } 903 904 /* 905 * Reset and enable the MII on the RoadRunner. 906 */ 907 void 908 ep_roadrunner_mii_enable(sc) 909 struct ep_softc *sc; 910 { 911 bus_space_tag_t iot = sc->sc_iot; 912 bus_space_handle_t ioh = sc->sc_ioh; 913 914 GO_WINDOW(3); 915 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 916 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 917 delay(1000); 918 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 919 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 920 ELINK_RUNNER_ENABLE_MII); 921 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 922 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 923 delay(1000); 924 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 925 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 926 } 927 928 /* 929 * Set the card to use the specified media. 930 */ 931 void 932 epsetmedia(sc) 933 struct ep_softc *sc; 934 { 935 bus_space_tag_t iot = sc->sc_iot; 936 bus_space_handle_t ioh = sc->sc_ioh; 937 938 /* Turn everything off. First turn off linkbeat and UTP. */ 939 GO_WINDOW(4); 940 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 941 942 /* Turn off coax */ 943 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 944 delay(1000); 945 946 /* 947 * If the device has MII, select it, and then tell the 948 * PHY which media to use. 949 */ 950 if (sc->ep_flags & ELINK_FLAGS_MII) { 951 int config0, config1; 952 953 GO_WINDOW(3); 954 955 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 956 int resopt; 957 958 resopt = bus_space_read_2(iot, ioh, 959 ELINK_W3_RESET_OPTIONS); 960 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 961 resopt | ELINK_RUNNER_ENABLE_MII); 962 } 963 964 config0 = (u_int)bus_space_read_2(iot, ioh, 965 ELINK_W3_INTERNAL_CONFIG); 966 config1 = (u_int)bus_space_read_2(iot, ioh, 967 ELINK_W3_INTERNAL_CONFIG + 2); 968 969 config1 = config1 & ~CONFIG_MEDIAMASK; 970 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 971 972 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 973 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 974 config1); 975 GO_WINDOW(1); /* back to operating window */ 976 977 mii_mediachg(&sc->sc_mii); 978 return; 979 } 980 981 /* 982 * Now turn on the selected media/transceiver. 983 */ 984 GO_WINDOW(4); 985 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 986 case IFM_10_T: 987 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 988 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 989 break; 990 991 case IFM_10_2: 992 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 993 DELAY(1000); /* 50ms not enmough? */ 994 break; 995 996 case IFM_100_TX: 997 case IFM_100_FX: 998 case IFM_100_T4: /* XXX check documentation */ 999 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1000 LINKBEAT_ENABLE); 1001 DELAY(1000); /* not strictly necessary? */ 1002 break; 1003 1004 case IFM_10_5: 1005 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1006 SQE_ENABLE); 1007 DELAY(1000); /* not strictly necessary? */ 1008 break; 1009 1010 case IFM_MANUAL: 1011 /* 1012 * Nothing to do here; we are actually enabling the 1013 * external PHY on the MII port. 1014 */ 1015 break; 1016 1017 case IFM_NONE: 1018 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1019 return; 1020 1021 default: 1022 panic("epsetmedia: impossible"); 1023 } 1024 1025 /* 1026 * Tell the chip which port to use. 1027 */ 1028 switch (sc->ep_chipset) { 1029 case ELINK_CHIPSET_VORTEX: 1030 case ELINK_CHIPSET_BOOMERANG: 1031 { 1032 int mctl, config0, config1; 1033 1034 GO_WINDOW(3); 1035 config0 = (u_int)bus_space_read_2(iot, ioh, 1036 ELINK_W3_INTERNAL_CONFIG); 1037 config1 = (u_int)bus_space_read_2(iot, ioh, 1038 ELINK_W3_INTERNAL_CONFIG + 2); 1039 1040 config1 = config1 & ~CONFIG_MEDIAMASK; 1041 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1042 CONFIG_MEDIAMASK_SHIFT); 1043 1044 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1045 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1046 config1); 1047 1048 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1049 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1050 mctl |= MAC_CONTROL_FDX; 1051 else 1052 mctl &= ~MAC_CONTROL_FDX; 1053 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1054 break; 1055 } 1056 default: 1057 { 1058 int w0_addr_cfg; 1059 1060 GO_WINDOW(0); 1061 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1062 w0_addr_cfg &= 0x3fff; 1063 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1064 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1065 DELAY(1000); 1066 break; 1067 } 1068 } 1069 1070 GO_WINDOW(1); /* Window 1 is operating window */ 1071 } 1072 1073 /* 1074 * Get currently-selected media from card. 1075 * (if_media callback, may be called before interface is brought up). 1076 */ 1077 void 1078 ep_media_status(ifp, req) 1079 struct ifnet *ifp; 1080 struct ifmediareq *req; 1081 { 1082 struct ep_softc *sc = ifp->if_softc; 1083 bus_space_tag_t iot = sc->sc_iot; 1084 bus_space_handle_t ioh = sc->sc_ioh; 1085 1086 if (sc->enabled == 0) { 1087 req->ifm_active = IFM_ETHER|IFM_NONE; 1088 req->ifm_status = 0; 1089 return; 1090 } 1091 1092 /* 1093 * If we have MII, go ask the PHY what's going on. 1094 */ 1095 if (sc->ep_flags & ELINK_FLAGS_MII) { 1096 mii_pollstat(&sc->sc_mii); 1097 req->ifm_active = sc->sc_mii.mii_media_active; 1098 req->ifm_status = sc->sc_mii.mii_media_status; 1099 return; 1100 } 1101 1102 /* 1103 * Ok, at this point we claim that our active media is 1104 * the currently selected media. We'll update our status 1105 * if our chipset allows us to detect link. 1106 */ 1107 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1108 req->ifm_status = 0; 1109 1110 switch (sc->ep_chipset) { 1111 case ELINK_CHIPSET_VORTEX: 1112 case ELINK_CHIPSET_BOOMERANG: 1113 GO_WINDOW(4); 1114 req->ifm_status = IFM_AVALID; 1115 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1116 LINKBEAT_DETECT) 1117 req->ifm_status |= IFM_ACTIVE; 1118 GO_WINDOW(1); /* back to operating window */ 1119 break; 1120 } 1121 } 1122 1123 1124 1125 /* 1126 * Start outputting on the interface. 1127 * Always called as splnet(). 1128 */ 1129 void 1130 epstart(ifp) 1131 struct ifnet *ifp; 1132 { 1133 struct ep_softc *sc = ifp->if_softc; 1134 bus_space_tag_t iot = sc->sc_iot; 1135 bus_space_handle_t ioh = sc->sc_ioh; 1136 struct mbuf *m, *m0; 1137 int sh, len, pad; 1138 bus_addr_t txreg; 1139 1140 /* Don't transmit if interface is busy or not running */ 1141 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1142 return; 1143 1144 startagain: 1145 /* Sneak a peek at the next packet */ 1146 IFQ_POLL(&ifp->if_snd, m0); 1147 if (m0 == 0) 1148 return; 1149 1150 /* We need to use m->m_pkthdr.len, so require the header */ 1151 if ((m0->m_flags & M_PKTHDR) == 0) 1152 panic("epstart: no header mbuf"); 1153 len = m0->m_pkthdr.len; 1154 1155 pad = (4 - len) & 3; 1156 1157 /* 1158 * The 3c509 automatically pads short packets to minimum ethernet 1159 * length, but we drop packets that are too large. Perhaps we should 1160 * truncate them instead? 1161 */ 1162 if (len + pad > ETHER_MAX_LEN) { 1163 /* packet is obviously too large: toss it */ 1164 ++ifp->if_oerrors; 1165 IFQ_DEQUEUE(&ifp->if_snd, m0); 1166 m_freem(m0); 1167 goto readcheck; 1168 } 1169 1170 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1171 len + pad + 4) { 1172 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1173 SET_TX_AVAIL_THRESH | 1174 ((len + pad + 4) >> sc->ep_pktlenshift)); 1175 /* not enough room in FIFO */ 1176 ifp->if_flags |= IFF_OACTIVE; 1177 return; 1178 } else { 1179 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1180 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1181 } 1182 1183 IFQ_DEQUEUE(&ifp->if_snd, m0); 1184 if (m0 == 0) /* not really needed */ 1185 return; 1186 1187 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1188 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1189 1190 #if NBPFILTER > 0 1191 if (ifp->if_bpf) 1192 bpf_mtap(ifp->if_bpf, m0); 1193 #endif 1194 1195 /* 1196 * Do the output at a high interrupt priority level so that an 1197 * interrupt from another device won't cause a FIFO underrun. 1198 * We choose splsched() since that blocks essentially everything 1199 * except for interrupts from serial devices (which typically 1200 * lose data if their interrupt isn't serviced fast enough). 1201 * 1202 * XXX THIS CAN CAUSE CLOCK DRIFT! 1203 */ 1204 sh = splsched(); 1205 1206 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1207 1208 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1209 /* 1210 * Prime the FIFO buffer counter (number of 16-bit 1211 * words about to be written to the FIFO). 1212 * 1213 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1214 * COUNTER IS NON-ZERO! 1215 */ 1216 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1217 (len + pad) >> 1); 1218 } 1219 1220 bus_space_write_2(iot, ioh, txreg, len); 1221 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1222 if (ELINK_IS_BUS_32(sc->bustype)) { 1223 for (m = m0; m;) { 1224 if (m->m_len > 3) { 1225 /* align our reads from core */ 1226 if (mtod(m, u_long) & 3) { 1227 u_long count = 1228 4 - (mtod(m, u_long) & 3); 1229 bus_space_write_multi_1(iot, ioh, 1230 txreg, mtod(m, u_int8_t *), count); 1231 m->m_data = 1232 (void *)(mtod(m, u_long) + count); 1233 m->m_len -= count; 1234 } 1235 bus_space_write_multi_stream_4(iot, ioh, 1236 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1237 m->m_data = (void *)(mtod(m, u_long) + 1238 (u_long)(m->m_len & ~3)); 1239 m->m_len -= m->m_len & ~3; 1240 } 1241 if (m->m_len) { 1242 bus_space_write_multi_1(iot, ioh, 1243 txreg, mtod(m, u_int8_t *), m->m_len); 1244 } 1245 MFREE(m, m0); 1246 m = m0; 1247 } 1248 } else { 1249 for (m = m0; m;) { 1250 if (m->m_len > 1) { 1251 if (mtod(m, u_long) & 1) { 1252 bus_space_write_1(iot, ioh, 1253 txreg, *(mtod(m, u_int8_t *))); 1254 m->m_data = 1255 (void *)(mtod(m, u_long) + 1); 1256 m->m_len -= 1; 1257 } 1258 bus_space_write_multi_stream_2(iot, ioh, 1259 txreg, mtod(m, u_int16_t *), 1260 m->m_len >> 1); 1261 } 1262 if (m->m_len & 1) { 1263 bus_space_write_1(iot, ioh, txreg, 1264 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1265 } 1266 MFREE(m, m0); 1267 m = m0; 1268 } 1269 } 1270 while (pad--) 1271 bus_space_write_1(iot, ioh, txreg, 0); 1272 1273 splx(sh); 1274 1275 ++ifp->if_opackets; 1276 1277 readcheck: 1278 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1279 ERR_INCOMPLETE) == 0) { 1280 /* We received a complete packet. */ 1281 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1282 1283 if ((status & S_INTR_LATCH) == 0) { 1284 /* 1285 * No interrupt, read the packet and continue 1286 * Is this supposed to happen? Is my motherboard 1287 * completely busted? 1288 */ 1289 epread(sc); 1290 } else { 1291 /* Got an interrupt, return so that it gets serviced. */ 1292 return; 1293 } 1294 } else { 1295 /* Check if we are stuck and reset [see XXX comment] */ 1296 if (epstatus(sc)) { 1297 if (ifp->if_flags & IFF_DEBUG) 1298 printf("%s: adapter reset\n", 1299 sc->sc_dev.dv_xname); 1300 epreset(sc); 1301 } 1302 } 1303 1304 goto startagain; 1305 } 1306 1307 1308 /* 1309 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1310 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1311 * We detect this situation and we reset the adapter. 1312 * It happens at times when there is a lot of broadcast traffic 1313 * on the cable (once in a blue moon). 1314 */ 1315 static int 1316 epstatus(sc) 1317 struct ep_softc *sc; 1318 { 1319 bus_space_tag_t iot = sc->sc_iot; 1320 bus_space_handle_t ioh = sc->sc_ioh; 1321 u_int16_t fifost; 1322 1323 /* 1324 * Check the FIFO status and act accordingly 1325 */ 1326 GO_WINDOW(4); 1327 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1328 GO_WINDOW(1); 1329 1330 if (fifost & FIFOS_RX_UNDERRUN) { 1331 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1332 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1333 epreset(sc); 1334 return 0; 1335 } 1336 1337 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1338 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1339 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1340 return 1; 1341 } 1342 1343 if (fifost & FIFOS_RX_OVERRUN) { 1344 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1345 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1346 return 1; 1347 } 1348 1349 if (fifost & FIFOS_TX_OVERRUN) { 1350 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1351 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1352 epreset(sc); 1353 return 0; 1354 } 1355 1356 return 0; 1357 } 1358 1359 1360 static void 1361 eptxstat(sc) 1362 struct ep_softc *sc; 1363 { 1364 bus_space_tag_t iot = sc->sc_iot; 1365 bus_space_handle_t ioh = sc->sc_ioh; 1366 int i; 1367 1368 /* 1369 * We need to read+write TX_STATUS until we get a 0 status 1370 * in order to turn off the interrupt flag. 1371 */ 1372 while ((i = bus_space_read_1(iot, ioh, 1373 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1374 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1375 0x0); 1376 1377 if (i & TXS_JABBER) { 1378 ++sc->sc_ethercom.ec_if.if_oerrors; 1379 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1380 printf("%s: jabber (%x)\n", 1381 sc->sc_dev.dv_xname, i); 1382 epreset(sc); 1383 } else if (i & TXS_UNDERRUN) { 1384 ++sc->sc_ethercom.ec_if.if_oerrors; 1385 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1386 printf("%s: fifo underrun (%x) @%d\n", 1387 sc->sc_dev.dv_xname, i, 1388 sc->tx_start_thresh); 1389 if (sc->tx_succ_ok < 100) 1390 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1391 sc->tx_start_thresh + 20); 1392 sc->tx_succ_ok = 0; 1393 epreset(sc); 1394 } else if (i & TXS_MAX_COLLISION) { 1395 ++sc->sc_ethercom.ec_if.if_collisions; 1396 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1397 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1398 } else 1399 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1400 } 1401 } 1402 1403 int 1404 epintr(arg) 1405 void *arg; 1406 { 1407 struct ep_softc *sc = arg; 1408 bus_space_tag_t iot = sc->sc_iot; 1409 bus_space_handle_t ioh = sc->sc_ioh; 1410 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1411 u_int16_t status; 1412 int ret = 0; 1413 1414 if (sc->enabled == 0 || 1415 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1416 return (0); 1417 1418 for (;;) { 1419 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1420 1421 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1422 1423 if ((status & (S_TX_COMPLETE | S_TX_AVAIL | 1424 S_RX_COMPLETE | S_CARD_FAILURE)) == 0) { 1425 if ((status & S_INTR_LATCH) == 0) { 1426 #if 0 1427 printf("%s: intr latch cleared %d\n", 1428 sc->sc_dev.dv_xname, status); 1429 #endif 1430 break; 1431 } 1432 } 1433 1434 ret = 1; 1435 1436 /* 1437 * Acknowledge any interrupts. It's important that we do this 1438 * first, since there would otherwise be a race condition. 1439 * Due to the i386 interrupt queueing, we may get spurious 1440 * interrupts occasionally. 1441 */ 1442 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1443 (status & (C_INTR_LATCH | 1444 C_CARD_FAILURE | 1445 C_TX_COMPLETE | 1446 C_TX_AVAIL | 1447 C_RX_COMPLETE | 1448 C_RX_EARLY | 1449 C_INT_RQD | 1450 C_UPD_STATS))); 1451 1452 #if 0 1453 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1454 1455 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1456 (status & S_RX_COMPLETE)?" RX_COMPLETE":"", 1457 (status & S_TX_COMPLETE)?" TX_COMPLETE":"", 1458 (status & S_TX_AVAIL)?" TX_AVAIL":"", 1459 (status & S_CARD_FAILURE)?" CARD_FAILURE":""); 1460 #endif 1461 1462 if (status & S_RX_COMPLETE) { 1463 epread(sc); 1464 } 1465 if (status & S_TX_AVAIL) { 1466 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1467 epstart(&sc->sc_ethercom.ec_if); 1468 } 1469 if (status & S_CARD_FAILURE) { 1470 printf("%s: adapter failure (%x)\n", 1471 sc->sc_dev.dv_xname, status); 1472 #if 1 1473 epinit(ifp); 1474 #else 1475 epreset(sc); 1476 #endif 1477 return (1); 1478 } 1479 if (status & S_TX_COMPLETE) { 1480 eptxstat(sc); 1481 epstart(ifp); 1482 } 1483 1484 #if NRND > 0 1485 if (status) 1486 rnd_add_uint32(&sc->rnd_source, status); 1487 #endif 1488 } 1489 1490 /* no more interrupts */ 1491 return (ret); 1492 } 1493 1494 void 1495 epread(sc) 1496 struct ep_softc *sc; 1497 { 1498 bus_space_tag_t iot = sc->sc_iot; 1499 bus_space_handle_t ioh = sc->sc_ioh; 1500 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1501 struct mbuf *m; 1502 int len; 1503 1504 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1505 1506 again: 1507 if (ifp->if_flags & IFF_DEBUG) { 1508 int err = len & ERR_MASK; 1509 char *s = NULL; 1510 1511 if (len & ERR_INCOMPLETE) 1512 s = "incomplete packet"; 1513 else if (err == ERR_OVERRUN) 1514 s = "packet overrun"; 1515 else if (err == ERR_RUNT) 1516 s = "runt packet"; 1517 else if (err == ERR_ALIGNMENT) 1518 s = "bad alignment"; 1519 else if (err == ERR_CRC) 1520 s = "bad crc"; 1521 else if (err == ERR_OVERSIZE) 1522 s = "oversized packet"; 1523 else if (err == ERR_DRIBBLE) 1524 s = "dribble bits"; 1525 1526 if (s) 1527 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1528 } 1529 1530 if (len & ERR_INCOMPLETE) 1531 return; 1532 1533 if (len & ERR_RX) { 1534 ++ifp->if_ierrors; 1535 goto abort; 1536 } 1537 1538 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1539 1540 /* Pull packet off interface. */ 1541 m = epget(sc, len); 1542 if (m == 0) { 1543 ifp->if_ierrors++; 1544 goto abort; 1545 } 1546 1547 ++ifp->if_ipackets; 1548 1549 #if NBPFILTER > 0 1550 /* 1551 * Check if there's a BPF listener on this interface. 1552 * If so, hand off the raw packet to BPF. 1553 */ 1554 if (ifp->if_bpf) 1555 bpf_mtap(ifp->if_bpf, m); 1556 #endif 1557 1558 (*ifp->if_input)(ifp, m); 1559 1560 /* 1561 * In periods of high traffic we can actually receive enough 1562 * packets so that the fifo overrun bit will be set at this point, 1563 * even though we just read a packet. In this case we 1564 * are not going to receive any more interrupts. We check for 1565 * this condition and read again until the fifo is not full. 1566 * We could simplify this test by not using epstatus(), but 1567 * rechecking the RX_STATUS register directly. This test could 1568 * result in unnecessary looping in cases where there is a new 1569 * packet but the fifo is not full, but it will not fix the 1570 * stuck behavior. 1571 * 1572 * Even with this improvement, we still get packet overrun errors 1573 * which are hurting performance. Maybe when I get some more time 1574 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1575 */ 1576 if (epstatus(sc)) { 1577 len = bus_space_read_2(iot, ioh, 1578 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1579 /* Check if we are stuck and reset [see XXX comment] */ 1580 if (len & ERR_INCOMPLETE) { 1581 if (ifp->if_flags & IFF_DEBUG) 1582 printf("%s: adapter reset\n", 1583 sc->sc_dev.dv_xname); 1584 epreset(sc); 1585 return; 1586 } 1587 goto again; 1588 } 1589 1590 return; 1591 1592 abort: 1593 ep_discard_rxtop(iot, ioh); 1594 1595 } 1596 1597 struct mbuf * 1598 epget(sc, totlen) 1599 struct ep_softc *sc; 1600 int totlen; 1601 { 1602 bus_space_tag_t iot = sc->sc_iot; 1603 bus_space_handle_t ioh = sc->sc_ioh; 1604 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1605 struct mbuf *m; 1606 bus_addr_t rxreg; 1607 int len, remaining; 1608 int s; 1609 caddr_t newdata; 1610 u_long offset; 1611 1612 m = sc->mb[sc->next_mb]; 1613 sc->mb[sc->next_mb] = 0; 1614 if (m == 0) { 1615 MGETHDR(m, M_DONTWAIT, MT_DATA); 1616 if (m == 0) 1617 return 0; 1618 } else { 1619 /* If the queue is no longer full, refill. */ 1620 if (sc->last_mb == sc->next_mb) 1621 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1622 1623 /* Convert one of our saved mbuf's. */ 1624 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1625 m->m_data = m->m_pktdat; 1626 m->m_flags = M_PKTHDR; 1627 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr)); 1628 } 1629 m->m_pkthdr.rcvif = ifp; 1630 m->m_pkthdr.len = totlen; 1631 len = MHLEN; 1632 1633 /* 1634 * Allocate big enough space to hold whole packet, to avoid 1635 * allocating new mbufs on splsched(). 1636 */ 1637 if (totlen + ALIGNBYTES > len) { 1638 if (totlen + ALIGNBYTES > MCLBYTES) { 1639 len = ALIGN(totlen + ALIGNBYTES); 1640 MEXTMALLOC(m, len, M_DONTWAIT); 1641 } else { 1642 len = MCLBYTES; 1643 MCLGET(m, M_DONTWAIT); 1644 } 1645 if ((m->m_flags & M_EXT) == 0) { 1646 m_free(m); 1647 return 0; 1648 } 1649 } 1650 1651 /* align the struct ip header */ 1652 newdata = (caddr_t) ALIGN(m->m_data + sizeof(struct ether_header)) 1653 - sizeof(struct ether_header); 1654 m->m_data = newdata; 1655 m->m_len = totlen; 1656 1657 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1658 remaining = totlen; 1659 offset = mtod(m, u_long); 1660 1661 /* 1662 * We read the packet at a high interrupt priority level so that 1663 * an interrupt from another device won't cause the card's packet 1664 * buffer to overflow. We choose splsched() since that blocks 1665 * essentially everything except for interrupts from serial 1666 * devices (which typically lose data if their interrupt isn't 1667 * serviced fast enough). 1668 * 1669 * XXX THIS CAN CAUSE CLOCK DRIFT! 1670 */ 1671 s = splsched(); 1672 1673 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1674 /* 1675 * Prime the FIFO buffer counter (number of 16-bit 1676 * words about to be read from the FIFO). 1677 * 1678 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1679 * COUNTER IS NON-ZERO! 1680 */ 1681 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1682 } 1683 1684 if (ELINK_IS_BUS_32(sc->bustype)) { 1685 /* 1686 * Read bytes up to the point where we are aligned. 1687 * (We can align to 4 bytes, rather than ALIGNBYTES, 1688 * here because we're later reading 4-byte chunks.) 1689 */ 1690 if ((remaining > 3) && (offset & 3)) { 1691 int count = (4 - (offset & 3)); 1692 bus_space_read_multi_1(iot, ioh, 1693 rxreg, (u_int8_t *) offset, count); 1694 offset += count; 1695 remaining -= count; 1696 } 1697 if (remaining > 3) { 1698 bus_space_read_multi_stream_4(iot, ioh, 1699 rxreg, (u_int32_t *) offset, 1700 remaining >> 2); 1701 offset += remaining & ~3; 1702 remaining &= 3; 1703 } 1704 if (remaining) { 1705 bus_space_read_multi_1(iot, ioh, 1706 rxreg, (u_int8_t *) offset, remaining); 1707 } 1708 } else { 1709 if ((remaining > 1) && (offset & 1)) { 1710 bus_space_read_multi_1(iot, ioh, 1711 rxreg, (u_int8_t *) offset, 1); 1712 remaining -= 1; 1713 offset += 1; 1714 } 1715 if (remaining > 1) { 1716 bus_space_read_multi_stream_2(iot, ioh, 1717 rxreg, (u_int16_t *) offset, 1718 remaining >> 1); 1719 offset += remaining & ~1; 1720 } 1721 if (remaining & 1) { 1722 bus_space_read_multi_1(iot, ioh, 1723 rxreg, (u_int8_t *) offset, remaining & 1); 1724 } 1725 } 1726 1727 ep_discard_rxtop(iot, ioh); 1728 1729 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1730 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1731 splx(s); 1732 1733 return (m); 1734 } 1735 1736 int 1737 epioctl(ifp, cmd, data) 1738 struct ifnet *ifp; 1739 u_long cmd; 1740 caddr_t data; 1741 { 1742 struct ep_softc *sc = ifp->if_softc; 1743 struct ifreq *ifr = (struct ifreq *)data; 1744 int s, error = 0; 1745 1746 s = splnet(); 1747 1748 switch (cmd) { 1749 1750 case SIOCSIFMEDIA: 1751 case SIOCGIFMEDIA: 1752 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1753 break; 1754 1755 case SIOCADDMULTI: 1756 case SIOCDELMULTI: 1757 if (sc->enabled == 0) { 1758 error = EIO; 1759 break; 1760 } 1761 1762 default: 1763 error = ether_ioctl(ifp, cmd, data); 1764 1765 if (error == ENETRESET) { 1766 /* 1767 * Multicast list has changed; set the hardware filter 1768 * accordingly. 1769 */ 1770 epreset(sc); 1771 error = 0; 1772 } 1773 break; 1774 } 1775 1776 splx(s); 1777 return (error); 1778 } 1779 1780 void 1781 epreset(sc) 1782 struct ep_softc *sc; 1783 { 1784 int s; 1785 1786 s = splnet(); 1787 epinit(&sc->sc_ethercom.ec_if); 1788 splx(s); 1789 } 1790 1791 void 1792 epwatchdog(ifp) 1793 struct ifnet *ifp; 1794 { 1795 struct ep_softc *sc = ifp->if_softc; 1796 1797 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1798 ++sc->sc_ethercom.ec_if.if_oerrors; 1799 1800 epreset(sc); 1801 } 1802 1803 void 1804 epstop(ifp, disable) 1805 struct ifnet *ifp; 1806 int disable; 1807 { 1808 struct ep_softc *sc = ifp->if_softc; 1809 bus_space_tag_t iot = sc->sc_iot; 1810 bus_space_handle_t ioh = sc->sc_ioh; 1811 1812 if (sc->ep_flags & ELINK_FLAGS_MII) { 1813 /* Stop the one second clock. */ 1814 callout_stop(&sc->sc_mbuf_callout); 1815 1816 /* Down the MII. */ 1817 mii_down(&sc->sc_mii); 1818 } 1819 1820 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1821 /* 1822 * Clear the FIFO buffer count, thus halting 1823 * any currently-running transactions. 1824 */ 1825 GO_WINDOW(1); /* sanity */ 1826 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1827 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1828 } 1829 1830 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1831 ep_discard_rxtop(iot, ioh); 1832 1833 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1834 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1835 1836 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1837 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1838 1839 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1840 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1841 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1842 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1843 1844 epmbufempty(sc); 1845 1846 if (disable) 1847 epdisable(sc); 1848 1849 ifp->if_flags &= ~IFF_RUNNING; 1850 } 1851 1852 1853 /* 1854 * Before reboots, reset card completely. 1855 */ 1856 static void 1857 epshutdown(arg) 1858 void *arg; 1859 { 1860 struct ep_softc *sc = arg; 1861 int s = splnet(); 1862 1863 if (sc->enabled) { 1864 epstop(&sc->sc_ethercom.ec_if, 1); 1865 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1866 sc->enabled = 0; 1867 } 1868 splx(s); 1869 } 1870 1871 /* 1872 * We get eeprom data from the id_port given an offset into the 1873 * eeprom. Basically; after the ID_sequence is sent to all of 1874 * the cards; they enter the ID_CMD state where they will accept 1875 * command requests. 0x80-0xbf loads the eeprom data. We then 1876 * read the port 16 times and with every read; the cards check 1877 * for contention (ie: if one card writes a 0 bit and another 1878 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1879 * each card compares the data on the bus; if there is a difference 1880 * then that card goes into ID_WAIT state again). In the meantime; 1881 * one bit of data is returned in the AX register which is conveniently 1882 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1883 * bit of data with each read. 1884 * 1885 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1886 */ 1887 u_int16_t 1888 epreadeeprom(iot, ioh, offset) 1889 bus_space_tag_t iot; 1890 bus_space_handle_t ioh; 1891 int offset; 1892 { 1893 u_int16_t data = 0; 1894 int i; 1895 1896 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1897 delay(1000); 1898 for (i = 0; i < 16; i++) 1899 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1900 return (data); 1901 } 1902 1903 static int 1904 epbusyeeprom(sc) 1905 struct ep_softc *sc; 1906 { 1907 bus_space_tag_t iot = sc->sc_iot; 1908 bus_space_handle_t ioh = sc->sc_ioh; 1909 bus_addr_t eecmd; 1910 int i = 100, j; 1911 uint16_t busybit; 1912 1913 if (sc->bustype == ELINK_BUS_PCMCIA) { 1914 delay(1000); 1915 return 0; 1916 } 1917 1918 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1919 eecmd = CORK_ASIC_EEPROM_COMMAND; 1920 busybit = CORK_EEPROM_BUSY; 1921 } else { 1922 eecmd = ELINK_W0_EEPROM_COMMAND; 1923 busybit = EEPROM_BUSY; 1924 } 1925 1926 j = 0; /* bad GCC flow analysis */ 1927 while (i--) { 1928 j = bus_space_read_2(iot, ioh, eecmd); 1929 if (j & busybit) 1930 delay(100); 1931 else 1932 break; 1933 } 1934 if (i == 0) { 1935 printf("\n%s: eeprom failed to come ready\n", 1936 sc->sc_dev.dv_xname); 1937 return (1); 1938 } 1939 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW && 1940 (j & EEPROM_TST_MODE) != 0) { 1941 /* XXX PnP mode? */ 1942 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 1943 return (1); 1944 } 1945 return (0); 1946 } 1947 1948 u_int16_t 1949 ep_read_eeprom(sc, offset) 1950 struct ep_softc *sc; 1951 u_int16_t offset; 1952 { 1953 bus_addr_t eecmd, eedata; 1954 u_int16_t readcmd; 1955 1956 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1957 eecmd = CORK_ASIC_EEPROM_COMMAND; 1958 eedata = CORK_ASIC_EEPROM_DATA; 1959 } else { 1960 eecmd = ELINK_W0_EEPROM_COMMAND; 1961 eedata = ELINK_W0_EEPROM_DATA; 1962 } 1963 1964 /* 1965 * RoadRunner has a larger EEPROM, so a different read command 1966 * is required. 1967 */ 1968 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1969 readcmd = READ_EEPROM_RR; 1970 else 1971 readcmd = READ_EEPROM; 1972 1973 if (epbusyeeprom(sc)) 1974 return (0); /* XXX why is eeprom busy? */ 1975 1976 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset); 1977 1978 if (epbusyeeprom(sc)) 1979 return (0); /* XXX why is eeprom busy? */ 1980 1981 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata)); 1982 } 1983 1984 void 1985 epmbuffill(v) 1986 void *v; 1987 { 1988 struct ep_softc *sc = v; 1989 struct mbuf *m; 1990 int s, i; 1991 1992 s = splnet(); 1993 i = sc->last_mb; 1994 do { 1995 if (sc->mb[i] == 0) { 1996 MGET(m, M_DONTWAIT, MT_DATA); 1997 if (m == 0) 1998 break; 1999 sc->mb[i] = m; 2000 } 2001 i = (i + 1) % MAX_MBS; 2002 } while (i != sc->next_mb); 2003 sc->last_mb = i; 2004 /* If the queue was not filled, try again. */ 2005 if (sc->last_mb != sc->next_mb) 2006 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 2007 splx(s); 2008 } 2009 2010 void 2011 epmbufempty(sc) 2012 struct ep_softc *sc; 2013 { 2014 int s, i; 2015 2016 s = splnet(); 2017 for (i = 0; i<MAX_MBS; i++) { 2018 if (sc->mb[i]) { 2019 m_freem(sc->mb[i]); 2020 sc->mb[i] = NULL; 2021 } 2022 } 2023 sc->last_mb = sc->next_mb = 0; 2024 callout_stop(&sc->sc_mbuf_callout); 2025 splx(s); 2026 } 2027 2028 int 2029 epenable(sc) 2030 struct ep_softc *sc; 2031 { 2032 2033 if (sc->enabled == 0 && sc->enable != NULL) { 2034 if ((*sc->enable)(sc) != 0) { 2035 printf("%s: device enable failed\n", 2036 sc->sc_dev.dv_xname); 2037 return (EIO); 2038 } 2039 } 2040 2041 sc->enabled = 1; 2042 return (0); 2043 } 2044 2045 void 2046 epdisable(sc) 2047 struct ep_softc *sc; 2048 { 2049 2050 if (sc->enabled != 0 && sc->disable != NULL) { 2051 (*sc->disable)(sc); 2052 sc->enabled = 0; 2053 } 2054 } 2055 2056 /* 2057 * ep_activate: 2058 * 2059 * Handle device activation/deactivation requests. 2060 */ 2061 int 2062 ep_activate(self, act) 2063 struct device *self; 2064 enum devact act; 2065 { 2066 struct ep_softc *sc = (struct ep_softc *)self; 2067 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2068 int error = 0, s; 2069 2070 s = splnet(); 2071 switch (act) { 2072 case DVACT_ACTIVATE: 2073 error = EOPNOTSUPP; 2074 break; 2075 2076 case DVACT_DEACTIVATE: 2077 if (sc->ep_flags & ELINK_FLAGS_MII) 2078 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2079 MII_OFFSET_ANY); 2080 if_deactivate(ifp); 2081 break; 2082 } 2083 splx(s); 2084 return (error); 2085 } 2086 2087 /* 2088 * ep_detach: 2089 * 2090 * Detach a elink3 interface. 2091 */ 2092 int 2093 ep_detach(self, flags) 2094 struct device *self; 2095 int flags; 2096 { 2097 struct ep_softc *sc = (struct ep_softc *)self; 2098 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2099 2100 /* Succeed now if there's no work to do. */ 2101 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2102 return (0); 2103 2104 epdisable(sc); 2105 2106 callout_stop(&sc->sc_mii_callout); 2107 callout_stop(&sc->sc_mbuf_callout); 2108 2109 if (sc->ep_flags & ELINK_FLAGS_MII) { 2110 /* Detach all PHYs */ 2111 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2112 } 2113 2114 /* Delete all remaining media. */ 2115 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2116 2117 #if NRND > 0 2118 rnd_detach_source(&sc->rnd_source); 2119 #endif 2120 ether_ifdetach(ifp); 2121 if_detach(ifp); 2122 2123 shutdownhook_disestablish(sc->sd_hook); 2124 2125 return (0); 2126 } 2127 2128 u_int32_t 2129 ep_mii_bitbang_read(self) 2130 struct device *self; 2131 { 2132 struct ep_softc *sc = (void *) self; 2133 2134 /* We're already in Window 4. */ 2135 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2136 ELINK_W4_BOOM_PHYSMGMT)); 2137 } 2138 2139 void 2140 ep_mii_bitbang_write(self, val) 2141 struct device *self; 2142 u_int32_t val; 2143 { 2144 struct ep_softc *sc = (void *) self; 2145 2146 /* We're already in Window 4. */ 2147 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2148 ELINK_W4_BOOM_PHYSMGMT, val); 2149 } 2150 2151 int 2152 ep_mii_readreg(self, phy, reg) 2153 struct device *self; 2154 int phy, reg; 2155 { 2156 struct ep_softc *sc = (void *) self; 2157 int val; 2158 2159 GO_WINDOW(4); 2160 2161 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2162 2163 GO_WINDOW(1); 2164 2165 return (val); 2166 } 2167 2168 void 2169 ep_mii_writereg(self, phy, reg, val) 2170 struct device *self; 2171 int phy, reg, val; 2172 { 2173 struct ep_softc *sc = (void *) self; 2174 2175 GO_WINDOW(4); 2176 2177 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2178 2179 GO_WINDOW(1); 2180 } 2181 2182 void 2183 ep_statchg(self) 2184 struct device *self; 2185 { 2186 struct ep_softc *sc = (struct ep_softc *)self; 2187 bus_space_tag_t iot = sc->sc_iot; 2188 bus_space_handle_t ioh = sc->sc_ioh; 2189 int mctl; 2190 2191 GO_WINDOW(3); 2192 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2193 if (sc->sc_mii.mii_media_active & IFM_FDX) 2194 mctl |= MAC_CONTROL_FDX; 2195 else 2196 mctl &= ~MAC_CONTROL_FDX; 2197 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2198 GO_WINDOW(1); /* back to operating window */ 2199 } 2200
Indexes created Sat Sep 27 22:09:54 GMT 2025