elink3.c revision 1.103
1 /* $NetBSD: elink3.c,v 1.103 2002/06/08 16:59:26 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include <sys/cdefs.h> 72 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.103 2002/06/08 16:59:26 yamt Exp $"); 73 74 #include "opt_inet.h" 75 #include "opt_ns.h" 76 #include "bpfilter.h" 77 #include "rnd.h" 78 79 #include <sys/param.h> 80 #include <sys/systm.h> 81 #include <sys/callout.h> 82 #include <sys/kernel.h> 83 #include <sys/mbuf.h> 84 #include <sys/socket.h> 85 #include <sys/ioctl.h> 86 #include <sys/errno.h> 87 #include <sys/syslog.h> 88 #include <sys/select.h> 89 #include <sys/device.h> 90 #if NRND > 0 91 #include <sys/rnd.h> 92 #endif 93 94 #include <net/if.h> 95 #include <net/if_dl.h> 96 #include <net/if_ether.h> 97 #include <net/if_media.h> 98 99 #if NBPFILTER > 0 100 #include <net/bpf.h> 101 #include <net/bpfdesc.h> 102 #endif 103 104 #include <machine/cpu.h> 105 #include <machine/bus.h> 106 #include <machine/intr.h> 107 108 #include <dev/mii/mii.h> 109 #include <dev/mii/miivar.h> 110 #include <dev/mii/mii_bitbang.h> 111 112 #include <dev/ic/elink3var.h> 113 #include <dev/ic/elink3reg.h> 114 115 #ifdef DEBUG 116 int epdebug = 0; 117 #endif 118 119 /* 120 * XXX endian workaround for big-endian CPUs with pcmcia: 121 * if stream methods for bus_space_multi are not provided, define them 122 * using non-stream bus_space_{read,write}_multi_. 123 * Assumes host CPU is same endian-ness as bus. 124 */ 125 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 126 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 127 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 128 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 129 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 130 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 131 132 /* 133 * Structure to map media-present bits in boards to ifmedia codes and 134 * printable media names. Used for table-driven ifmedia initialization. 135 */ 136 struct ep_media { 137 int epm_mpbit; /* media present bit */ 138 const char *epm_name; /* name of medium */ 139 int epm_ifmedia; /* ifmedia word for medium */ 140 int epm_epmedia; /* ELINKMEDIA_* constant */ 141 }; 142 143 /* 144 * Media table for the Demon/Vortex/Boomerang chipsets. 145 * 146 * Note that MII on the Demon and Vortex (3c59x) indicates an external 147 * MII connector (for connecting an external PHY) ... I think. Treat 148 * it as `manual' on these chips. 149 * 150 * Any Boomerang (3c90x) chips with MII really do have an internal 151 * MII and real PHYs attached; no `native' media. 152 */ 153 const struct ep_media ep_vortex_media[] = { 154 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 155 ELINKMEDIA_10BASE_T }, 156 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 157 ELINKMEDIA_10BASE_T }, 158 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 159 ELINKMEDIA_AUI }, 160 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 161 ELINKMEDIA_10BASE_2 }, 162 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 163 ELINKMEDIA_100BASE_TX }, 164 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 165 ELINKMEDIA_100BASE_TX }, 166 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 167 ELINKMEDIA_100BASE_FX }, 168 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 169 ELINKMEDIA_MII }, 170 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 171 ELINKMEDIA_100BASE_T4 }, 172 { 0, NULL, 0, 173 0 }, 174 }; 175 176 /* 177 * Media table for the older 3Com Etherlink III chipset, used 178 * in the 3c509, 3c579, and 3c589. 179 */ 180 const struct ep_media ep_509_media[] = { 181 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 182 ELINKMEDIA_10BASE_T }, 183 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 184 ELINKMEDIA_AUI }, 185 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 186 ELINKMEDIA_10BASE_2 }, 187 { 0, NULL, 0, 188 0 }, 189 }; 190 191 void ep_internalconfig __P((struct ep_softc *sc)); 192 void ep_vortex_probemedia __P((struct ep_softc *sc)); 193 void ep_509_probemedia __P((struct ep_softc *sc)); 194 195 static void eptxstat __P((struct ep_softc *)); 196 static int epstatus __P((struct ep_softc *)); 197 int epinit __P((struct ifnet *)); 198 void epstop __P((struct ifnet *, int)); 199 int epioctl __P((struct ifnet *, u_long, caddr_t)); 200 void epstart __P((struct ifnet *)); 201 void epwatchdog __P((struct ifnet *)); 202 void epreset __P((struct ep_softc *)); 203 static void epshutdown __P((void *)); 204 void epread __P((struct ep_softc *)); 205 struct mbuf *epget __P((struct ep_softc *, int)); 206 void epmbuffill __P((void *)); 207 void epmbufempty __P((struct ep_softc *)); 208 void epsetfilter __P((struct ep_softc *)); 209 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 210 void epsetmedia __P((struct ep_softc *)); 211 212 /* ifmedia callbacks */ 213 int ep_media_change __P((struct ifnet *ifp)); 214 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 215 216 /* MII callbacks */ 217 int ep_mii_readreg __P((struct device *, int, int)); 218 void ep_mii_writereg __P((struct device *, int, int, int)); 219 void ep_statchg __P((struct device *)); 220 221 void ep_tick __P((void *)); 222 223 static int epbusyeeprom __P((struct ep_softc *)); 224 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 225 static inline void ep_reset_cmd __P((struct ep_softc *sc, 226 u_int cmd, u_int arg)); 227 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 228 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 229 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 230 231 /* 232 * MII bit-bang glue. 233 */ 234 u_int32_t ep_mii_bitbang_read __P((struct device *)); 235 void ep_mii_bitbang_write __P((struct device *, u_int32_t)); 236 237 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 238 ep_mii_bitbang_read, 239 ep_mii_bitbang_write, 240 { 241 PHYSMGMT_DATA, /* MII_BIT_MDO */ 242 PHYSMGMT_DATA, /* MII_BIT_MDI */ 243 PHYSMGMT_CLK, /* MII_BIT_MDC */ 244 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 245 0, /* MII_BIT_DIR_PHY_HOST */ 246 } 247 }; 248 249 /* 250 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 251 * Window 1 registers offset! 252 */ 253 static __inline int 254 ep_w1_reg(sc, reg) 255 struct ep_softc *sc; 256 int reg; 257 { 258 259 switch (sc->ep_chipset) { 260 case ELINK_CHIPSET_CORKSCREW: 261 return (reg + 0x10); 262 263 case ELINK_CHIPSET_ROADRUNNER: 264 switch (reg) { 265 case ELINK_W1_FREE_TX: 266 case ELINK_W1_RUNNER_RDCTL: 267 case ELINK_W1_RUNNER_WRCTL: 268 return (reg); 269 } 270 return (reg + 0x10); 271 } 272 273 return (reg); 274 } 275 276 /* 277 * Wait for any pending reset to complete. 278 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 279 * but older hardware doesn't implement it and we must delay. 280 */ 281 static inline void 282 ep_finish_reset(iot, ioh) 283 bus_space_tag_t iot; 284 bus_space_handle_t ioh; 285 { 286 int i; 287 288 for (i = 0; i < 10000; i++) { 289 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 290 COMMAND_IN_PROGRESS) == 0) 291 break; 292 DELAY(10); 293 } 294 } 295 296 /* 297 * Issue a (reset) command, and be sure it has completed. 298 * Used for global reset, TX_RESET, RX_RESET. 299 */ 300 static inline void 301 ep_reset_cmd(sc, cmd, arg) 302 struct ep_softc *sc; 303 u_int cmd, arg; 304 { 305 bus_space_tag_t iot = sc->sc_iot; 306 bus_space_handle_t ioh = sc->sc_ioh; 307 308 bus_space_write_2(iot, ioh, cmd, arg); 309 ep_finish_reset(iot, ioh); 310 } 311 312 313 static inline void 314 ep_discard_rxtop(iot, ioh) 315 bus_space_tag_t iot; 316 bus_space_handle_t ioh; 317 { 318 int i; 319 320 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 321 322 /* 323 * Spin for about 1 msec, to avoid forcing a DELAY() between 324 * every received packet (adding latency and limiting pkt-recv rate). 325 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 326 * is about right. 327 */ 328 for (i = 0; i < 8000; i++) { 329 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 330 COMMAND_IN_PROGRESS) == 0) 331 return; 332 } 333 334 /* Didn't complete in a hurry. Do DELAY()s. */ 335 ep_finish_reset(iot, ioh); 336 } 337 338 /* 339 * Back-end attach and configure. 340 */ 341 int 342 epconfig(sc, chipset, enaddr) 343 struct ep_softc *sc; 344 u_short chipset; 345 u_int8_t *enaddr; 346 { 347 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 348 bus_space_tag_t iot = sc->sc_iot; 349 bus_space_handle_t ioh = sc->sc_ioh; 350 u_int16_t i; 351 u_int8_t myla[ETHER_ADDR_LEN]; 352 353 callout_init(&sc->sc_mii_callout); 354 callout_init(&sc->sc_mbuf_callout); 355 356 sc->ep_chipset = chipset; 357 358 /* 359 * We could have been groveling around in other register 360 * windows in the front-end; make sure we're in window 0 361 * to read the EEPROM. 362 */ 363 GO_WINDOW(0); 364 365 if (enaddr == NULL) { 366 /* 367 * Read the station address from the eeprom. 368 */ 369 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 370 u_int16_t x = ep_read_eeprom(sc, i); 371 myla[(i << 1)] = x >> 8; 372 myla[(i << 1) + 1] = x; 373 } 374 enaddr = myla; 375 } 376 377 /* 378 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 379 * allow FDDI-sized (4500) byte packets. Commands only take an 380 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 381 * packet length. 382 * Commands to these cards implicitly upshift a packet size 383 * or threshold by 2 bits. 384 * To detect cards with large-packet support, we probe by setting 385 * the transmit threshold register, then change windows and 386 * read back the threshold register directly, and see if the 387 * threshold value was shifted or not. 388 */ 389 bus_space_write_2(iot, ioh, ELINK_COMMAND, 390 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 391 GO_WINDOW(5); 392 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 393 GO_WINDOW(1); 394 switch (i) { 395 case ELINK_LARGEWIN_PROBE: 396 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 397 sc->ep_pktlenshift = 0; 398 break; 399 400 case (ELINK_LARGEWIN_PROBE << 2): 401 sc->ep_pktlenshift = 2; 402 break; 403 404 default: 405 printf("%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 406 "Interface disabled\n", 407 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 408 return (1); 409 } 410 411 /* 412 * Ensure Tx-available interrupts are enabled for 413 * start the interface. 414 * XXX should be in epinit()? 415 */ 416 bus_space_write_2(iot, ioh, ELINK_COMMAND, 417 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 418 419 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 420 ifp->if_softc = sc; 421 ifp->if_start = epstart; 422 ifp->if_ioctl = epioctl; 423 ifp->if_watchdog = epwatchdog; 424 ifp->if_init = epinit; 425 ifp->if_stop = epstop; 426 ifp->if_flags = 427 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 428 IFQ_SET_READY(&ifp->if_snd); 429 430 if_attach(ifp); 431 ether_ifattach(ifp, enaddr); 432 433 /* 434 * Finish configuration: 435 * determine chipset if the front-end couldn't do so, 436 * show board details, set media. 437 */ 438 439 /* 440 * Print RAM size. We also print the Ethernet address in here. 441 * It's extracted from the ifp, so we have to make sure it's 442 * been attached first. 443 */ 444 ep_internalconfig(sc); 445 GO_WINDOW(0); 446 447 /* 448 * Display some additional information, if pertinent. 449 */ 450 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 451 printf("%s: RoadRunner FIFO buffer enabled\n", 452 sc->sc_dev.dv_xname); 453 454 /* 455 * Initialize our media structures and MII info. We'll 456 * probe the MII if we discover that we have one. 457 */ 458 sc->sc_mii.mii_ifp = ifp; 459 sc->sc_mii.mii_readreg = ep_mii_readreg; 460 sc->sc_mii.mii_writereg = ep_mii_writereg; 461 sc->sc_mii.mii_statchg = ep_statchg; 462 ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change, 463 ep_media_status); 464 465 /* 466 * All CORKSCREW chips have MII. 467 */ 468 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) 469 sc->ep_flags |= ELINK_FLAGS_MII; 470 471 /* 472 * Now, determine which media we have. 473 */ 474 switch (sc->ep_chipset) { 475 case ELINK_CHIPSET_ROADRUNNER: 476 if (sc->ep_flags & ELINK_FLAGS_MII) { 477 ep_roadrunner_mii_enable(sc); 478 GO_WINDOW(0); 479 } 480 /* FALLTHROUGH */ 481 482 case ELINK_CHIPSET_CORKSCREW: 483 case ELINK_CHIPSET_BOOMERANG: 484 /* 485 * If the device has MII, probe it. We won't be using 486 * any `native' media in this case, only PHYs. If 487 * we don't, just treat the Boomerang like the Vortex. 488 */ 489 if (sc->ep_flags & ELINK_FLAGS_MII) { 490 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 491 MII_PHY_ANY, MII_OFFSET_ANY, 0); 492 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 493 ifmedia_add(&sc->sc_mii.mii_media, 494 IFM_ETHER|IFM_NONE, 0, NULL); 495 ifmedia_set(&sc->sc_mii.mii_media, 496 IFM_ETHER|IFM_NONE); 497 } else { 498 ifmedia_set(&sc->sc_mii.mii_media, 499 IFM_ETHER|IFM_AUTO); 500 } 501 break; 502 } 503 /* FALLTHROUGH */ 504 505 case ELINK_CHIPSET_VORTEX: 506 ep_vortex_probemedia(sc); 507 break; 508 509 default: 510 ep_509_probemedia(sc); 511 break; 512 } 513 514 GO_WINDOW(1); /* Window 1 is operating window */ 515 516 #if NRND > 0 517 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 518 RND_TYPE_NET, 0); 519 #endif 520 521 sc->tx_start_thresh = 20; /* probably a good starting point. */ 522 523 /* Establish callback to reset card when we reboot. */ 524 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 525 526 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 527 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 528 529 /* The attach is successful. */ 530 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 531 return (0); 532 } 533 534 535 /* 536 * Show interface-model-independent info from window 3 537 * internal-configuration register. 538 */ 539 void 540 ep_internalconfig(sc) 541 struct ep_softc *sc; 542 { 543 bus_space_tag_t iot = sc->sc_iot; 544 bus_space_handle_t ioh = sc->sc_ioh; 545 546 u_int config0; 547 u_int config1; 548 549 int ram_size, ram_width, ram_speed, rom_size, ram_split; 550 /* 551 * NVRAM buffer Rx:Tx config names for busmastering cards 552 * (Demon, Vortex, and later). 553 */ 554 const char *const onboard_ram_config[] = { 555 "5:3", "3:1", "1:1", "3:5" }; 556 557 GO_WINDOW(3); 558 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 559 config1 = (u_int)bus_space_read_2(iot, ioh, 560 ELINK_W3_INTERNAL_CONFIG + 2); 561 GO_WINDOW(0); 562 563 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 564 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 565 ram_speed = (config0 & CONFIG_RAMSPEED) >> CONFIG_RAMSPEED_SHIFT; 566 rom_size = (config0 & CONFIG_ROMSIZE) >> CONFIG_ROMSIZE_SHIFT; 567 568 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 569 570 printf("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 571 sc->sc_dev.dv_xname, 572 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 573 8 << ram_size, 574 (ram_width) ? "word" : "byte", 575 onboard_ram_config[ram_split]); 576 } 577 578 579 /* 580 * Find supported media on 3c509-generation hardware that doesn't have 581 * a "reset_options" register in window 3. 582 * Use the config_cntrl register in window 0 instead. 583 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 584 * that implement CONFIG_CTRL. We don't have a good way to set the 585 * default active medium; punt to ifconfig instead. 586 */ 587 void 588 ep_509_probemedia(sc) 589 struct ep_softc *sc; 590 { 591 bus_space_tag_t iot = sc->sc_iot; 592 bus_space_handle_t ioh = sc->sc_ioh; 593 struct ifmedia *ifm = &sc->sc_mii.mii_media; 594 u_int16_t ep_w0_config, port; 595 const struct ep_media *epm; 596 const char *sep = "", *defmedianame = NULL; 597 int defmedia = 0; 598 599 GO_WINDOW(0); 600 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 601 602 printf("%s: ", sc->sc_dev.dv_xname); 603 604 /* Sanity check that there are any media! */ 605 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 606 printf("no media present!\n"); 607 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 608 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 609 return; 610 } 611 612 /* 613 * Get the default media from the EEPROM. 614 */ 615 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 616 617 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 618 619 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 620 if (ep_w0_config & epm->epm_mpbit) { 621 /* 622 * This simple test works because 509 chipsets 623 * don't do full-duplex. 624 */ 625 if (epm->epm_epmedia == port || defmedia == 0) { 626 defmedia = epm->epm_ifmedia; 627 defmedianame = epm->epm_name; 628 } 629 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 630 NULL); 631 PRINT(epm->epm_name); 632 } 633 } 634 635 #undef PRINT 636 637 #ifdef DIAGNOSTIC 638 if (defmedia == 0) 639 panic("ep_509_probemedia: impossible"); 640 #endif 641 642 printf(" (default %s)\n", defmedianame); 643 ifmedia_set(ifm, defmedia); 644 } 645 646 /* 647 * Find media present on large-packet-capable elink3 devices. 648 * Show onboard configuration of large-packet-capable elink3 devices 649 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 650 * Use media and card-version info in window 3 instead. 651 */ 652 void 653 ep_vortex_probemedia(sc) 654 struct ep_softc *sc; 655 { 656 bus_space_tag_t iot = sc->sc_iot; 657 bus_space_handle_t ioh = sc->sc_ioh; 658 struct ifmedia *ifm = &sc->sc_mii.mii_media; 659 const struct ep_media *epm; 660 u_int config1; 661 int reset_options; 662 int default_media; /* 3-bit encoding of default (EEPROM) media */ 663 int defmedia = 0; 664 const char *sep = "", *defmedianame = NULL; 665 666 GO_WINDOW(3); 667 config1 = (u_int)bus_space_read_2(iot, ioh, 668 ELINK_W3_INTERNAL_CONFIG + 2); 669 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 670 GO_WINDOW(0); 671 672 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 673 674 printf("%s: ", sc->sc_dev.dv_xname); 675 676 /* Sanity check that there are any media! */ 677 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 678 printf("no media present!\n"); 679 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 680 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 681 return; 682 } 683 684 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 685 686 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 687 if (reset_options & epm->epm_mpbit) { 688 /* 689 * Default media is a little more complicated 690 * on the Vortex. We support full-duplex which 691 * uses the same reset options bit. 692 * 693 * XXX Check EEPROM for default to FDX? 694 */ 695 if (epm->epm_epmedia == default_media) { 696 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 697 defmedia = epm->epm_ifmedia; 698 defmedianame = epm->epm_name; 699 } 700 } else if (defmedia == 0) { 701 defmedia = epm->epm_ifmedia; 702 defmedianame = epm->epm_name; 703 } 704 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 705 NULL); 706 PRINT(epm->epm_name); 707 } 708 } 709 710 #undef PRINT 711 712 #ifdef DIAGNOSTIC 713 if (defmedia == 0) 714 panic("ep_vortex_probemedia: impossible"); 715 #endif 716 717 printf(" (default %s)\n", defmedianame); 718 ifmedia_set(ifm, defmedia); 719 } 720 721 /* 722 * One second timer, used to tick the MII. 723 */ 724 void 725 ep_tick(arg) 726 void *arg; 727 { 728 struct ep_softc *sc = arg; 729 int s; 730 731 #ifdef DIAGNOSTIC 732 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 733 panic("ep_tick"); 734 #endif 735 736 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 737 return; 738 739 s = splnet(); 740 mii_tick(&sc->sc_mii); 741 splx(s); 742 743 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 744 } 745 746 /* 747 * Bring device up. 748 * 749 * The order in here seems important. Otherwise we may not receive 750 * interrupts. ?! 751 */ 752 int 753 epinit(ifp) 754 struct ifnet *ifp; 755 { 756 struct ep_softc *sc = ifp->if_softc; 757 bus_space_tag_t iot = sc->sc_iot; 758 bus_space_handle_t ioh = sc->sc_ioh; 759 int i, error; 760 761 if (!sc->enabled && (error = epenable(sc)) != 0) 762 return (error); 763 764 /* Make sure any pending reset has completed before touching board */ 765 ep_finish_reset(iot, ioh); 766 767 /* 768 * Cancel any pending I/O. 769 */ 770 epstop(ifp, 0); 771 772 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 773 && sc->bustype != ELINK_BUS_MCA) { 774 GO_WINDOW(0); 775 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 776 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 777 ENABLE_DRQ_IRQ); 778 } 779 780 if (sc->bustype == ELINK_BUS_PCMCIA) { 781 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 782 } 783 784 GO_WINDOW(2); 785 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 786 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 787 LLADDR(ifp->if_sadl)[i]); 788 789 /* 790 * Reset the station-address receive filter. 791 * A bug workaround for busmastering (Vortex, Demon) cards. 792 */ 793 for (i = 0; i < 6; i++) 794 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 795 796 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 797 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 798 799 GO_WINDOW(1); /* Window 1 is operating window */ 800 for (i = 0; i < 31; i++) 801 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 802 803 /* Set threshold for Tx-space available interrupt. */ 804 bus_space_write_2(iot, ioh, ELINK_COMMAND, 805 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 806 807 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 808 /* 809 * Enable options in the PCMCIA LAN COR register, via 810 * RoadRunner Window 1. 811 * 812 * XXX MAGIC CONSTANTS! 813 */ 814 u_int16_t cor; 815 816 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 817 818 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 819 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 820 cor |= 0x10; 821 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 822 cor |= 0x20; 823 bus_space_write_2(iot, ioh, 0, cor); 824 825 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 826 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 827 828 if (sc->ep_flags & ELINK_FLAGS_MII) { 829 ep_roadrunner_mii_enable(sc); 830 GO_WINDOW(1); 831 } 832 } 833 834 /* Enable interrupts. */ 835 bus_space_write_2(iot, ioh, ELINK_COMMAND, 836 SET_RD_0_MASK | WATCHED_INTERRUPTS); 837 bus_space_write_2(iot, ioh, ELINK_COMMAND, 838 SET_INTR_MASK | WATCHED_INTERRUPTS); 839 840 /* 841 * Attempt to get rid of any stray interrupts that occurred during 842 * configuration. On the i386 this isn't possible because one may 843 * already be queued. However, a single stray interrupt is 844 * unimportant. 845 */ 846 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 847 848 epsetfilter(sc); 849 epsetmedia(sc); 850 851 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 852 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 853 854 epmbuffill(sc); 855 856 /* Interface is now `running', with no output active. */ 857 ifp->if_flags |= IFF_RUNNING; 858 ifp->if_flags &= ~IFF_OACTIVE; 859 860 if (sc->ep_flags & ELINK_FLAGS_MII) { 861 /* Start the one second clock. */ 862 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 863 } 864 865 /* Attempt to start output, if any. */ 866 epstart(ifp); 867 868 return (0); 869 } 870 871 872 /* 873 * Set multicast receive filter. 874 * elink3 hardware has no selective multicast filter in hardware. 875 * Enable reception of all multicasts and filter in software. 876 */ 877 void 878 epsetfilter(sc) 879 struct ep_softc *sc; 880 { 881 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 882 883 GO_WINDOW(1); /* Window 1 is operating window */ 884 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 885 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 886 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 887 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 888 } 889 890 int 891 ep_media_change(ifp) 892 struct ifnet *ifp; 893 { 894 struct ep_softc *sc = ifp->if_softc; 895 896 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 897 epreset(sc); 898 899 return (0); 900 } 901 902 /* 903 * Reset and enable the MII on the RoadRunner. 904 */ 905 void 906 ep_roadrunner_mii_enable(sc) 907 struct ep_softc *sc; 908 { 909 bus_space_tag_t iot = sc->sc_iot; 910 bus_space_handle_t ioh = sc->sc_ioh; 911 912 GO_WINDOW(3); 913 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 914 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 915 delay(1000); 916 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 917 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 918 ELINK_RUNNER_ENABLE_MII); 919 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 920 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 921 delay(1000); 922 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 923 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 924 } 925 926 /* 927 * Set the card to use the specified media. 928 */ 929 void 930 epsetmedia(sc) 931 struct ep_softc *sc; 932 { 933 bus_space_tag_t iot = sc->sc_iot; 934 bus_space_handle_t ioh = sc->sc_ioh; 935 936 /* Turn everything off. First turn off linkbeat and UTP. */ 937 GO_WINDOW(4); 938 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 939 940 /* Turn off coax */ 941 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 942 delay(1000); 943 944 /* 945 * If the device has MII, select it, and then tell the 946 * PHY which media to use. 947 */ 948 if (sc->ep_flags & ELINK_FLAGS_MII) { 949 int config0, config1; 950 951 GO_WINDOW(3); 952 953 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 954 int resopt; 955 956 resopt = bus_space_read_2(iot, ioh, 957 ELINK_W3_RESET_OPTIONS); 958 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 959 resopt | ELINK_RUNNER_ENABLE_MII); 960 } 961 962 config0 = (u_int)bus_space_read_2(iot, ioh, 963 ELINK_W3_INTERNAL_CONFIG); 964 config1 = (u_int)bus_space_read_2(iot, ioh, 965 ELINK_W3_INTERNAL_CONFIG + 2); 966 967 config1 = config1 & ~CONFIG_MEDIAMASK; 968 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 969 970 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 971 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 972 config1); 973 GO_WINDOW(1); /* back to operating window */ 974 975 mii_mediachg(&sc->sc_mii); 976 return; 977 } 978 979 /* 980 * Now turn on the selected media/transceiver. 981 */ 982 GO_WINDOW(4); 983 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 984 case IFM_10_T: 985 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 986 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 987 break; 988 989 case IFM_10_2: 990 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 991 DELAY(1000); /* 50ms not enmough? */ 992 break; 993 994 case IFM_100_TX: 995 case IFM_100_FX: 996 case IFM_100_T4: /* XXX check documentation */ 997 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 998 LINKBEAT_ENABLE); 999 DELAY(1000); /* not strictly necessary? */ 1000 break; 1001 1002 case IFM_10_5: 1003 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1004 SQE_ENABLE); 1005 DELAY(1000); /* not strictly necessary? */ 1006 break; 1007 1008 case IFM_MANUAL: 1009 /* 1010 * Nothing to do here; we are actually enabling the 1011 * external PHY on the MII port. 1012 */ 1013 break; 1014 1015 case IFM_NONE: 1016 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1017 return; 1018 1019 default: 1020 panic("epsetmedia: impossible"); 1021 } 1022 1023 /* 1024 * Tell the chip which port to use. 1025 */ 1026 switch (sc->ep_chipset) { 1027 case ELINK_CHIPSET_VORTEX: 1028 case ELINK_CHIPSET_BOOMERANG: 1029 { 1030 int mctl, config0, config1; 1031 1032 GO_WINDOW(3); 1033 config0 = (u_int)bus_space_read_2(iot, ioh, 1034 ELINK_W3_INTERNAL_CONFIG); 1035 config1 = (u_int)bus_space_read_2(iot, ioh, 1036 ELINK_W3_INTERNAL_CONFIG + 2); 1037 1038 config1 = config1 & ~CONFIG_MEDIAMASK; 1039 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1040 CONFIG_MEDIAMASK_SHIFT); 1041 1042 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1043 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1044 config1); 1045 1046 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1047 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1048 mctl |= MAC_CONTROL_FDX; 1049 else 1050 mctl &= ~MAC_CONTROL_FDX; 1051 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1052 break; 1053 } 1054 default: 1055 { 1056 int w0_addr_cfg; 1057 1058 GO_WINDOW(0); 1059 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1060 w0_addr_cfg &= 0x3fff; 1061 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1062 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1063 DELAY(1000); 1064 break; 1065 } 1066 } 1067 1068 GO_WINDOW(1); /* Window 1 is operating window */ 1069 } 1070 1071 /* 1072 * Get currently-selected media from card. 1073 * (if_media callback, may be called before interface is brought up). 1074 */ 1075 void 1076 ep_media_status(ifp, req) 1077 struct ifnet *ifp; 1078 struct ifmediareq *req; 1079 { 1080 struct ep_softc *sc = ifp->if_softc; 1081 bus_space_tag_t iot = sc->sc_iot; 1082 bus_space_handle_t ioh = sc->sc_ioh; 1083 1084 if (sc->enabled == 0) { 1085 req->ifm_active = IFM_ETHER|IFM_NONE; 1086 req->ifm_status = 0; 1087 return; 1088 } 1089 1090 /* 1091 * If we have MII, go ask the PHY what's going on. 1092 */ 1093 if (sc->ep_flags & ELINK_FLAGS_MII) { 1094 mii_pollstat(&sc->sc_mii); 1095 req->ifm_active = sc->sc_mii.mii_media_active; 1096 req->ifm_status = sc->sc_mii.mii_media_status; 1097 return; 1098 } 1099 1100 /* 1101 * Ok, at this point we claim that our active media is 1102 * the currently selected media. We'll update our status 1103 * if our chipset allows us to detect link. 1104 */ 1105 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1106 req->ifm_status = 0; 1107 1108 switch (sc->ep_chipset) { 1109 case ELINK_CHIPSET_VORTEX: 1110 case ELINK_CHIPSET_BOOMERANG: 1111 GO_WINDOW(4); 1112 req->ifm_status = IFM_AVALID; 1113 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1114 LINKBEAT_DETECT) 1115 req->ifm_status |= IFM_ACTIVE; 1116 GO_WINDOW(1); /* back to operating window */ 1117 break; 1118 } 1119 } 1120 1121 1122 1123 /* 1124 * Start outputting on the interface. 1125 * Always called as splnet(). 1126 */ 1127 void 1128 epstart(ifp) 1129 struct ifnet *ifp; 1130 { 1131 struct ep_softc *sc = ifp->if_softc; 1132 bus_space_tag_t iot = sc->sc_iot; 1133 bus_space_handle_t ioh = sc->sc_ioh; 1134 struct mbuf *m, *m0; 1135 int sh, len, pad; 1136 bus_size_t txreg; 1137 1138 /* Don't transmit if interface is busy or not running */ 1139 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1140 return; 1141 1142 startagain: 1143 /* Sneak a peek at the next packet */ 1144 IFQ_POLL(&ifp->if_snd, m0); 1145 if (m0 == 0) 1146 return; 1147 1148 /* We need to use m->m_pkthdr.len, so require the header */ 1149 if ((m0->m_flags & M_PKTHDR) == 0) 1150 panic("epstart: no header mbuf"); 1151 len = m0->m_pkthdr.len; 1152 1153 pad = (4 - len) & 3; 1154 1155 /* 1156 * The 3c509 automatically pads short packets to minimum ethernet 1157 * length, but we drop packets that are too large. Perhaps we should 1158 * truncate them instead? 1159 */ 1160 if (len + pad > ETHER_MAX_LEN) { 1161 /* packet is obviously too large: toss it */ 1162 ++ifp->if_oerrors; 1163 IFQ_DEQUEUE(&ifp->if_snd, m0); 1164 m_freem(m0); 1165 goto readcheck; 1166 } 1167 1168 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1169 len + pad + 4) { 1170 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1171 SET_TX_AVAIL_THRESH | 1172 ((len + pad + 4) >> sc->ep_pktlenshift)); 1173 /* not enough room in FIFO */ 1174 ifp->if_flags |= IFF_OACTIVE; 1175 return; 1176 } else { 1177 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1178 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1179 } 1180 1181 IFQ_DEQUEUE(&ifp->if_snd, m0); 1182 if (m0 == 0) /* not really needed */ 1183 return; 1184 1185 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1186 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1187 1188 #if NBPFILTER > 0 1189 if (ifp->if_bpf) 1190 bpf_mtap(ifp->if_bpf, m0); 1191 #endif 1192 1193 /* 1194 * Do the output at a high interrupt priority level so that an 1195 * interrupt from another device won't cause a FIFO underrun. 1196 * We choose splsched() since that blocks essentially everything 1197 * except for interrupts from serial devices (which typically 1198 * lose data if their interrupt isn't serviced fast enough). 1199 * 1200 * XXX THIS CAN CAUSE CLOCK DRIFT! 1201 */ 1202 sh = splsched(); 1203 1204 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1205 1206 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1207 /* 1208 * Prime the FIFO buffer counter (number of 16-bit 1209 * words about to be written to the FIFO). 1210 * 1211 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1212 * COUNTER IS NON-ZERO! 1213 */ 1214 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1215 (len + pad) >> 1); 1216 } 1217 1218 bus_space_write_2(iot, ioh, txreg, len); 1219 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1220 if (ELINK_IS_BUS_32(sc->bustype)) { 1221 for (m = m0; m;) { 1222 if (m->m_len > 3) { 1223 /* align our reads from core */ 1224 if (mtod(m, u_long) & 3) { 1225 u_long count = 1226 4 - (mtod(m, u_long) & 3); 1227 bus_space_write_multi_1(iot, ioh, 1228 txreg, mtod(m, u_int8_t *), count); 1229 m->m_data = 1230 (void *)(mtod(m, u_long) + count); 1231 m->m_len -= count; 1232 } 1233 bus_space_write_multi_stream_4(iot, ioh, 1234 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1235 m->m_data = (void *)(mtod(m, u_long) + 1236 (u_long)(m->m_len & ~3)); 1237 m->m_len -= m->m_len & ~3; 1238 } 1239 if (m->m_len) { 1240 bus_space_write_multi_1(iot, ioh, 1241 txreg, mtod(m, u_int8_t *), m->m_len); 1242 } 1243 MFREE(m, m0); 1244 m = m0; 1245 } 1246 } else { 1247 for (m = m0; m;) { 1248 if (m->m_len > 1) { 1249 if (mtod(m, u_long) & 1) { 1250 bus_space_write_1(iot, ioh, 1251 txreg, *(mtod(m, u_int8_t *))); 1252 m->m_data = 1253 (void *)(mtod(m, u_long) + 1); 1254 m->m_len -= 1; 1255 } 1256 bus_space_write_multi_stream_2(iot, ioh, 1257 txreg, mtod(m, u_int16_t *), 1258 m->m_len >> 1); 1259 } 1260 if (m->m_len & 1) { 1261 bus_space_write_1(iot, ioh, txreg, 1262 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1263 } 1264 MFREE(m, m0); 1265 m = m0; 1266 } 1267 } 1268 while (pad--) 1269 bus_space_write_1(iot, ioh, txreg, 0); 1270 1271 splx(sh); 1272 1273 ++ifp->if_opackets; 1274 1275 readcheck: 1276 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1277 ERR_INCOMPLETE) == 0) { 1278 /* We received a complete packet. */ 1279 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1280 1281 if ((status & INTR_LATCH) == 0) { 1282 /* 1283 * No interrupt, read the packet and continue 1284 * Is this supposed to happen? Is my motherboard 1285 * completely busted? 1286 */ 1287 epread(sc); 1288 } else { 1289 /* Got an interrupt, return so that it gets serviced. */ 1290 return; 1291 } 1292 } else { 1293 /* Check if we are stuck and reset [see XXX comment] */ 1294 if (epstatus(sc)) { 1295 if (ifp->if_flags & IFF_DEBUG) 1296 printf("%s: adapter reset\n", 1297 sc->sc_dev.dv_xname); 1298 epreset(sc); 1299 } 1300 } 1301 1302 goto startagain; 1303 } 1304 1305 1306 /* 1307 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1308 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1309 * We detect this situation and we reset the adapter. 1310 * It happens at times when there is a lot of broadcast traffic 1311 * on the cable (once in a blue moon). 1312 */ 1313 static int 1314 epstatus(sc) 1315 struct ep_softc *sc; 1316 { 1317 bus_space_tag_t iot = sc->sc_iot; 1318 bus_space_handle_t ioh = sc->sc_ioh; 1319 u_int16_t fifost; 1320 1321 /* 1322 * Check the FIFO status and act accordingly 1323 */ 1324 GO_WINDOW(4); 1325 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1326 GO_WINDOW(1); 1327 1328 if (fifost & FIFOS_RX_UNDERRUN) { 1329 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1330 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1331 epreset(sc); 1332 return 0; 1333 } 1334 1335 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1336 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1337 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1338 return 1; 1339 } 1340 1341 if (fifost & FIFOS_RX_OVERRUN) { 1342 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1343 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1344 return 1; 1345 } 1346 1347 if (fifost & FIFOS_TX_OVERRUN) { 1348 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1349 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1350 epreset(sc); 1351 return 0; 1352 } 1353 1354 return 0; 1355 } 1356 1357 1358 static void 1359 eptxstat(sc) 1360 struct ep_softc *sc; 1361 { 1362 bus_space_tag_t iot = sc->sc_iot; 1363 bus_space_handle_t ioh = sc->sc_ioh; 1364 int i; 1365 1366 /* 1367 * We need to read+write TX_STATUS until we get a 0 status 1368 * in order to turn off the interrupt flag. 1369 */ 1370 while ((i = bus_space_read_1(iot, ioh, 1371 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1372 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1373 0x0); 1374 1375 if (i & TXS_JABBER) { 1376 ++sc->sc_ethercom.ec_if.if_oerrors; 1377 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1378 printf("%s: jabber (%x)\n", 1379 sc->sc_dev.dv_xname, i); 1380 epreset(sc); 1381 } else if (i & TXS_UNDERRUN) { 1382 ++sc->sc_ethercom.ec_if.if_oerrors; 1383 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1384 printf("%s: fifo underrun (%x) @%d\n", 1385 sc->sc_dev.dv_xname, i, 1386 sc->tx_start_thresh); 1387 if (sc->tx_succ_ok < 100) 1388 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1389 sc->tx_start_thresh + 20); 1390 sc->tx_succ_ok = 0; 1391 epreset(sc); 1392 } else if (i & TXS_MAX_COLLISION) { 1393 ++sc->sc_ethercom.ec_if.if_collisions; 1394 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1395 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1396 } else 1397 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1398 } 1399 } 1400 1401 int 1402 epintr(arg) 1403 void *arg; 1404 { 1405 struct ep_softc *sc = arg; 1406 bus_space_tag_t iot = sc->sc_iot; 1407 bus_space_handle_t ioh = sc->sc_ioh; 1408 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1409 u_int16_t status; 1410 int ret = 0; 1411 1412 if (sc->enabled == 0 || 1413 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1414 return (0); 1415 1416 1417 for (;;) { 1418 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1419 1420 if ((status & WATCHED_INTERRUPTS) == 0) { 1421 if ((status & INTR_LATCH) == 0) { 1422 #if 0 1423 printf("%s: intr latch cleared\n", 1424 sc->sc_dev.dv_xname); 1425 #endif 1426 break; 1427 } 1428 } 1429 1430 ret = 1; 1431 1432 /* 1433 * Acknowledge any interrupts. It's important that we do this 1434 * first, since there would otherwise be a race condition. 1435 * Due to the i386 interrupt queueing, we may get spurious 1436 * interrupts occasionally. 1437 */ 1438 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1439 (status & (INTR_LATCH | ALL_INTERRUPTS))); 1440 1441 #if 0 1442 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1443 1444 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1445 (status & RX_COMPLETE)?" RX_COMPLETE":"", 1446 (status & TX_COMPLETE)?" TX_COMPLETE":"", 1447 (status & TX_AVAIL)?" TX_AVAIL":"", 1448 (status & CARD_FAILURE)?" CARD_FAILURE":""); 1449 #endif 1450 1451 if (status & RX_COMPLETE) { 1452 epread(sc); 1453 } 1454 if (status & TX_AVAIL) { 1455 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1456 epstart(&sc->sc_ethercom.ec_if); 1457 } 1458 if (status & CARD_FAILURE) { 1459 printf("%s: adapter failure (%x)\n", 1460 sc->sc_dev.dv_xname, status); 1461 #if 1 1462 epinit(ifp); 1463 #else 1464 epreset(sc); 1465 #endif 1466 return (1); 1467 } 1468 if (status & TX_COMPLETE) { 1469 eptxstat(sc); 1470 epstart(ifp); 1471 } 1472 1473 #if NRND > 0 1474 if (status) 1475 rnd_add_uint32(&sc->rnd_source, status); 1476 #endif 1477 } 1478 1479 /* no more interrupts */ 1480 return (ret); 1481 } 1482 1483 void 1484 epread(sc) 1485 struct ep_softc *sc; 1486 { 1487 bus_space_tag_t iot = sc->sc_iot; 1488 bus_space_handle_t ioh = sc->sc_ioh; 1489 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1490 struct mbuf *m; 1491 int len; 1492 1493 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1494 1495 again: 1496 if (ifp->if_flags & IFF_DEBUG) { 1497 int err = len & ERR_MASK; 1498 char *s = NULL; 1499 1500 if (len & ERR_INCOMPLETE) 1501 s = "incomplete packet"; 1502 else if (err == ERR_OVERRUN) 1503 s = "packet overrun"; 1504 else if (err == ERR_RUNT) 1505 s = "runt packet"; 1506 else if (err == ERR_ALIGNMENT) 1507 s = "bad alignment"; 1508 else if (err == ERR_CRC) 1509 s = "bad crc"; 1510 else if (err == ERR_OVERSIZE) 1511 s = "oversized packet"; 1512 else if (err == ERR_DRIBBLE) 1513 s = "dribble bits"; 1514 1515 if (s) 1516 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1517 } 1518 1519 if (len & ERR_INCOMPLETE) 1520 return; 1521 1522 if (len & ERR_RX) { 1523 ++ifp->if_ierrors; 1524 goto abort; 1525 } 1526 1527 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1528 1529 /* Pull packet off interface. */ 1530 m = epget(sc, len); 1531 if (m == 0) { 1532 ifp->if_ierrors++; 1533 goto abort; 1534 } 1535 1536 ++ifp->if_ipackets; 1537 1538 #if NBPFILTER > 0 1539 /* 1540 * Check if there's a BPF listener on this interface. 1541 * If so, hand off the raw packet to BPF. 1542 */ 1543 if (ifp->if_bpf) 1544 bpf_mtap(ifp->if_bpf, m); 1545 #endif 1546 1547 (*ifp->if_input)(ifp, m); 1548 1549 /* 1550 * In periods of high traffic we can actually receive enough 1551 * packets so that the fifo overrun bit will be set at this point, 1552 * even though we just read a packet. In this case we 1553 * are not going to receive any more interrupts. We check for 1554 * this condition and read again until the fifo is not full. 1555 * We could simplify this test by not using epstatus(), but 1556 * rechecking the RX_STATUS register directly. This test could 1557 * result in unnecessary looping in cases where there is a new 1558 * packet but the fifo is not full, but it will not fix the 1559 * stuck behavior. 1560 * 1561 * Even with this improvement, we still get packet overrun errors 1562 * which are hurting performance. Maybe when I get some more time 1563 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1564 */ 1565 if (epstatus(sc)) { 1566 len = bus_space_read_2(iot, ioh, 1567 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1568 /* Check if we are stuck and reset [see XXX comment] */ 1569 if (len & ERR_INCOMPLETE) { 1570 if (ifp->if_flags & IFF_DEBUG) 1571 printf("%s: adapter reset\n", 1572 sc->sc_dev.dv_xname); 1573 epreset(sc); 1574 return; 1575 } 1576 goto again; 1577 } 1578 1579 return; 1580 1581 abort: 1582 ep_discard_rxtop(iot, ioh); 1583 1584 } 1585 1586 struct mbuf * 1587 epget(sc, totlen) 1588 struct ep_softc *sc; 1589 int totlen; 1590 { 1591 bus_space_tag_t iot = sc->sc_iot; 1592 bus_space_handle_t ioh = sc->sc_ioh; 1593 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1594 struct mbuf *m; 1595 bus_size_t rxreg; 1596 int len, remaining; 1597 int s; 1598 caddr_t newdata; 1599 u_long offset; 1600 1601 m = sc->mb[sc->next_mb]; 1602 sc->mb[sc->next_mb] = 0; 1603 if (m == 0) { 1604 MGETHDR(m, M_DONTWAIT, MT_DATA); 1605 if (m == 0) 1606 return 0; 1607 } else { 1608 /* If the queue is no longer full, refill. */ 1609 if (sc->last_mb == sc->next_mb) 1610 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1611 1612 /* Convert one of our saved mbuf's. */ 1613 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1614 m->m_data = m->m_pktdat; 1615 m->m_flags = M_PKTHDR; 1616 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr)); 1617 } 1618 m->m_pkthdr.rcvif = ifp; 1619 m->m_pkthdr.len = totlen; 1620 len = MHLEN; 1621 1622 /* 1623 * Allocate big enough space to hold whole packet, to avoid 1624 * allocating new mbufs on splsched(). 1625 */ 1626 if (totlen + ALIGNBYTES > len) { 1627 if (totlen + ALIGNBYTES > MCLBYTES) { 1628 len = ALIGN(totlen + ALIGNBYTES); 1629 MEXTMALLOC(m, len, M_DONTWAIT); 1630 } else { 1631 len = MCLBYTES; 1632 MCLGET(m, M_DONTWAIT); 1633 } 1634 if ((m->m_flags & M_EXT) == 0) { 1635 m_free(m); 1636 return 0; 1637 } 1638 } 1639 1640 /* align the struct ip header */ 1641 newdata = (caddr_t) ALIGN(m->m_data + sizeof(struct ether_header)) 1642 - sizeof(struct ether_header); 1643 m->m_data = newdata; 1644 m->m_len = totlen; 1645 1646 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1647 remaining = totlen; 1648 offset = mtod(m, u_long); 1649 1650 /* 1651 * We read the packet at a high interrupt priority level so that 1652 * an interrupt from another device won't cause the card's packet 1653 * buffer to overflow. We choose splsched() since that blocks 1654 * essentially everything except for interrupts from serial 1655 * devices (which typically lose data if their interrupt isn't 1656 * serviced fast enough). 1657 * 1658 * XXX THIS CAN CAUSE CLOCK DRIFT! 1659 */ 1660 s = splsched(); 1661 1662 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1663 /* 1664 * Prime the FIFO buffer counter (number of 16-bit 1665 * words about to be read from the FIFO). 1666 * 1667 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1668 * COUNTER IS NON-ZERO! 1669 */ 1670 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1671 } 1672 1673 if (ELINK_IS_BUS_32(sc->bustype)) { 1674 /* 1675 * Read bytes up to the point where we are aligned. 1676 * (We can align to 4 bytes, rather than ALIGNBYTES, 1677 * here because we're later reading 4-byte chunks.) 1678 */ 1679 if ((remaining > 3) && (offset & 3)) { 1680 int count = (4 - (offset & 3)); 1681 bus_space_read_multi_1(iot, ioh, 1682 rxreg, (u_int8_t *) offset, count); 1683 offset += count; 1684 remaining -= count; 1685 } 1686 if (remaining > 3) { 1687 bus_space_read_multi_stream_4(iot, ioh, 1688 rxreg, (u_int32_t *) offset, 1689 remaining >> 2); 1690 offset += remaining & ~3; 1691 remaining &= 3; 1692 } 1693 if (remaining) { 1694 bus_space_read_multi_1(iot, ioh, 1695 rxreg, (u_int8_t *) offset, remaining); 1696 } 1697 } else { 1698 if ((remaining > 1) && (offset & 1)) { 1699 bus_space_read_multi_1(iot, ioh, 1700 rxreg, (u_int8_t *) offset, 1); 1701 remaining -= 1; 1702 offset += 1; 1703 } 1704 if (remaining > 1) { 1705 bus_space_read_multi_stream_2(iot, ioh, 1706 rxreg, (u_int16_t *) offset, 1707 remaining >> 1); 1708 offset += remaining & ~1; 1709 } 1710 if (remaining & 1) { 1711 bus_space_read_multi_1(iot, ioh, 1712 rxreg, (u_int8_t *) offset, remaining & 1); 1713 } 1714 } 1715 1716 ep_discard_rxtop(iot, ioh); 1717 1718 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1719 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1720 splx(s); 1721 1722 return (m); 1723 } 1724 1725 int 1726 epioctl(ifp, cmd, data) 1727 struct ifnet *ifp; 1728 u_long cmd; 1729 caddr_t data; 1730 { 1731 struct ep_softc *sc = ifp->if_softc; 1732 struct ifreq *ifr = (struct ifreq *)data; 1733 int s, error = 0; 1734 1735 s = splnet(); 1736 1737 switch (cmd) { 1738 1739 case SIOCSIFMEDIA: 1740 case SIOCGIFMEDIA: 1741 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1742 break; 1743 1744 case SIOCADDMULTI: 1745 case SIOCDELMULTI: 1746 if (sc->enabled == 0) { 1747 error = EIO; 1748 break; 1749 } 1750 1751 default: 1752 error = ether_ioctl(ifp, cmd, data); 1753 1754 if (error == ENETRESET) { 1755 /* 1756 * Multicast list has changed; set the hardware filter 1757 * accordingly. 1758 */ 1759 epreset(sc); 1760 error = 0; 1761 } 1762 break; 1763 } 1764 1765 splx(s); 1766 return (error); 1767 } 1768 1769 void 1770 epreset(sc) 1771 struct ep_softc *sc; 1772 { 1773 int s; 1774 1775 s = splnet(); 1776 epinit(&sc->sc_ethercom.ec_if); 1777 splx(s); 1778 } 1779 1780 void 1781 epwatchdog(ifp) 1782 struct ifnet *ifp; 1783 { 1784 struct ep_softc *sc = ifp->if_softc; 1785 1786 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1787 ++sc->sc_ethercom.ec_if.if_oerrors; 1788 1789 epreset(sc); 1790 } 1791 1792 void 1793 epstop(ifp, disable) 1794 struct ifnet *ifp; 1795 int disable; 1796 { 1797 struct ep_softc *sc = ifp->if_softc; 1798 bus_space_tag_t iot = sc->sc_iot; 1799 bus_space_handle_t ioh = sc->sc_ioh; 1800 1801 if (sc->ep_flags & ELINK_FLAGS_MII) { 1802 /* Stop the one second clock. */ 1803 callout_stop(&sc->sc_mbuf_callout); 1804 1805 /* Down the MII. */ 1806 mii_down(&sc->sc_mii); 1807 } 1808 1809 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1810 /* 1811 * Clear the FIFO buffer count, thus halting 1812 * any currently-running transactions. 1813 */ 1814 GO_WINDOW(1); /* sanity */ 1815 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1816 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1817 } 1818 1819 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1820 ep_discard_rxtop(iot, ioh); 1821 1822 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1823 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1824 1825 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1826 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1827 1828 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1829 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1830 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1831 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1832 1833 epmbufempty(sc); 1834 1835 if (disable) 1836 epdisable(sc); 1837 1838 ifp->if_flags &= ~IFF_RUNNING; 1839 } 1840 1841 1842 /* 1843 * Before reboots, reset card completely. 1844 */ 1845 static void 1846 epshutdown(arg) 1847 void *arg; 1848 { 1849 struct ep_softc *sc = arg; 1850 int s = splnet(); 1851 1852 if (sc->enabled) { 1853 epstop(&sc->sc_ethercom.ec_if, 1); 1854 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1855 sc->enabled = 0; 1856 } 1857 splx(s); 1858 } 1859 1860 /* 1861 * We get eeprom data from the id_port given an offset into the 1862 * eeprom. Basically; after the ID_sequence is sent to all of 1863 * the cards; they enter the ID_CMD state where they will accept 1864 * command requests. 0x80-0xbf loads the eeprom data. We then 1865 * read the port 16 times and with every read; the cards check 1866 * for contention (ie: if one card writes a 0 bit and another 1867 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1868 * each card compares the data on the bus; if there is a difference 1869 * then that card goes into ID_WAIT state again). In the meantime; 1870 * one bit of data is returned in the AX register which is conveniently 1871 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1872 * bit of data with each read. 1873 * 1874 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1875 */ 1876 u_int16_t 1877 epreadeeprom(iot, ioh, offset) 1878 bus_space_tag_t iot; 1879 bus_space_handle_t ioh; 1880 int offset; 1881 { 1882 u_int16_t data = 0; 1883 int i; 1884 1885 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1886 delay(1000); 1887 for (i = 0; i < 16; i++) 1888 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1889 return (data); 1890 } 1891 1892 static int 1893 epbusyeeprom(sc) 1894 struct ep_softc *sc; 1895 { 1896 bus_space_tag_t iot = sc->sc_iot; 1897 bus_space_handle_t ioh = sc->sc_ioh; 1898 bus_size_t eecmd; 1899 int i = 100, j; 1900 uint16_t busybit; 1901 1902 if (sc->bustype == ELINK_BUS_PCMCIA) { 1903 delay(1000); 1904 return 0; 1905 } 1906 1907 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1908 eecmd = CORK_ASIC_EEPROM_COMMAND; 1909 busybit = CORK_EEPROM_BUSY; 1910 } else { 1911 eecmd = ELINK_W0_EEPROM_COMMAND; 1912 busybit = EEPROM_BUSY; 1913 } 1914 1915 j = 0; /* bad GCC flow analysis */ 1916 while (i--) { 1917 j = bus_space_read_2(iot, ioh, eecmd); 1918 if (j & busybit) 1919 delay(100); 1920 else 1921 break; 1922 } 1923 if (i == 0) { 1924 printf("\n%s: eeprom failed to come ready\n", 1925 sc->sc_dev.dv_xname); 1926 return (1); 1927 } 1928 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW && 1929 (j & EEPROM_TST_MODE) != 0) { 1930 /* XXX PnP mode? */ 1931 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 1932 return (1); 1933 } 1934 return (0); 1935 } 1936 1937 u_int16_t 1938 ep_read_eeprom(sc, offset) 1939 struct ep_softc *sc; 1940 u_int16_t offset; 1941 { 1942 bus_size_t eecmd, eedata; 1943 u_int16_t readcmd; 1944 1945 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1946 eecmd = CORK_ASIC_EEPROM_COMMAND; 1947 eedata = CORK_ASIC_EEPROM_DATA; 1948 } else { 1949 eecmd = ELINK_W0_EEPROM_COMMAND; 1950 eedata = ELINK_W0_EEPROM_DATA; 1951 } 1952 1953 /* 1954 * RoadRunner has a larger EEPROM, so a different read command 1955 * is required. 1956 */ 1957 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1958 readcmd = READ_EEPROM_RR; 1959 else 1960 readcmd = READ_EEPROM; 1961 1962 if (epbusyeeprom(sc)) 1963 return (0); /* XXX why is eeprom busy? */ 1964 1965 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset); 1966 1967 if (epbusyeeprom(sc)) 1968 return (0); /* XXX why is eeprom busy? */ 1969 1970 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata)); 1971 } 1972 1973 void 1974 epmbuffill(v) 1975 void *v; 1976 { 1977 struct ep_softc *sc = v; 1978 struct mbuf *m; 1979 int s, i; 1980 1981 s = splnet(); 1982 i = sc->last_mb; 1983 do { 1984 if (sc->mb[i] == 0) { 1985 MGET(m, M_DONTWAIT, MT_DATA); 1986 if (m == 0) 1987 break; 1988 sc->mb[i] = m; 1989 } 1990 i = (i + 1) % MAX_MBS; 1991 } while (i != sc->next_mb); 1992 sc->last_mb = i; 1993 /* If the queue was not filled, try again. */ 1994 if (sc->last_mb != sc->next_mb) 1995 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1996 splx(s); 1997 } 1998 1999 void 2000 epmbufempty(sc) 2001 struct ep_softc *sc; 2002 { 2003 int s, i; 2004 2005 s = splnet(); 2006 for (i = 0; i<MAX_MBS; i++) { 2007 if (sc->mb[i]) { 2008 m_freem(sc->mb[i]); 2009 sc->mb[i] = NULL; 2010 } 2011 } 2012 sc->last_mb = sc->next_mb = 0; 2013 callout_stop(&sc->sc_mbuf_callout); 2014 splx(s); 2015 } 2016 2017 int 2018 epenable(sc) 2019 struct ep_softc *sc; 2020 { 2021 2022 if (sc->enabled == 0 && sc->enable != NULL) { 2023 if ((*sc->enable)(sc) != 0) { 2024 printf("%s: device enable failed\n", 2025 sc->sc_dev.dv_xname); 2026 return (EIO); 2027 } 2028 } 2029 2030 sc->enabled = 1; 2031 return (0); 2032 } 2033 2034 void 2035 epdisable(sc) 2036 struct ep_softc *sc; 2037 { 2038 2039 if (sc->enabled != 0 && sc->disable != NULL) { 2040 (*sc->disable)(sc); 2041 sc->enabled = 0; 2042 } 2043 } 2044 2045 /* 2046 * ep_activate: 2047 * 2048 * Handle device activation/deactivation requests. 2049 */ 2050 int 2051 ep_activate(self, act) 2052 struct device *self; 2053 enum devact act; 2054 { 2055 struct ep_softc *sc = (struct ep_softc *)self; 2056 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2057 int error = 0, s; 2058 2059 s = splnet(); 2060 switch (act) { 2061 case DVACT_ACTIVATE: 2062 error = EOPNOTSUPP; 2063 break; 2064 2065 case DVACT_DEACTIVATE: 2066 if (sc->ep_flags & ELINK_FLAGS_MII) 2067 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2068 MII_OFFSET_ANY); 2069 if_deactivate(ifp); 2070 break; 2071 } 2072 splx(s); 2073 return (error); 2074 } 2075 2076 /* 2077 * ep_detach: 2078 * 2079 * Detach a elink3 interface. 2080 */ 2081 int 2082 ep_detach(self, flags) 2083 struct device *self; 2084 int flags; 2085 { 2086 struct ep_softc *sc = (struct ep_softc *)self; 2087 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2088 2089 /* Succeed now if there's no work to do. */ 2090 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2091 return (0); 2092 2093 epdisable(sc); 2094 2095 callout_stop(&sc->sc_mii_callout); 2096 callout_stop(&sc->sc_mbuf_callout); 2097 2098 if (sc->ep_flags & ELINK_FLAGS_MII) { 2099 /* Detach all PHYs */ 2100 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2101 } 2102 2103 /* Delete all remaining media. */ 2104 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2105 2106 #if NRND > 0 2107 rnd_detach_source(&sc->rnd_source); 2108 #endif 2109 ether_ifdetach(ifp); 2110 if_detach(ifp); 2111 2112 shutdownhook_disestablish(sc->sd_hook); 2113 2114 return (0); 2115 } 2116 2117 u_int32_t 2118 ep_mii_bitbang_read(self) 2119 struct device *self; 2120 { 2121 struct ep_softc *sc = (void *) self; 2122 2123 /* We're already in Window 4. */ 2124 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2125 ELINK_W4_BOOM_PHYSMGMT)); 2126 } 2127 2128 void 2129 ep_mii_bitbang_write(self, val) 2130 struct device *self; 2131 u_int32_t val; 2132 { 2133 struct ep_softc *sc = (void *) self; 2134 2135 /* We're already in Window 4. */ 2136 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2137 ELINK_W4_BOOM_PHYSMGMT, val); 2138 } 2139 2140 int 2141 ep_mii_readreg(self, phy, reg) 2142 struct device *self; 2143 int phy, reg; 2144 { 2145 struct ep_softc *sc = (void *) self; 2146 int val; 2147 2148 GO_WINDOW(4); 2149 2150 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2151 2152 GO_WINDOW(1); 2153 2154 return (val); 2155 } 2156 2157 void 2158 ep_mii_writereg(self, phy, reg, val) 2159 struct device *self; 2160 int phy, reg, val; 2161 { 2162 struct ep_softc *sc = (void *) self; 2163 2164 GO_WINDOW(4); 2165 2166 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2167 2168 GO_WINDOW(1); 2169 } 2170 2171 void 2172 ep_statchg(self) 2173 struct device *self; 2174 { 2175 struct ep_softc *sc = (struct ep_softc *)self; 2176 bus_space_tag_t iot = sc->sc_iot; 2177 bus_space_handle_t ioh = sc->sc_ioh; 2178 int mctl; 2179 2180 GO_WINDOW(3); 2181 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2182 if (sc->sc_mii.mii_media_active & IFM_FDX) 2183 mctl |= MAC_CONTROL_FDX; 2184 else 2185 mctl &= ~MAC_CONTROL_FDX; 2186 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2187 GO_WINDOW(1); /* back to operating window */ 2188 } 2189
Indexes created Sun Sep 28 12:09:53 GMT 2025