elink3.c revision 1.107
1 /* $NetBSD: elink3.c,v 1.107 2004/08/09 00:25:33 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include <sys/cdefs.h> 72 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.107 2004/08/09 00:25:33 mycroft Exp $"); 73 74 #include "opt_inet.h" 75 #include "opt_ns.h" 76 #include "bpfilter.h" 77 #include "rnd.h" 78 79 #include <sys/param.h> 80 #include <sys/systm.h> 81 #include <sys/callout.h> 82 #include <sys/kernel.h> 83 #include <sys/mbuf.h> 84 #include <sys/socket.h> 85 #include <sys/ioctl.h> 86 #include <sys/errno.h> 87 #include <sys/syslog.h> 88 #include <sys/select.h> 89 #include <sys/device.h> 90 #if NRND > 0 91 #include <sys/rnd.h> 92 #endif 93 94 #include <net/if.h> 95 #include <net/if_dl.h> 96 #include <net/if_ether.h> 97 #include <net/if_media.h> 98 99 #if NBPFILTER > 0 100 #include <net/bpf.h> 101 #include <net/bpfdesc.h> 102 #endif 103 104 #include <machine/cpu.h> 105 #include <machine/bus.h> 106 #include <machine/intr.h> 107 108 #include <dev/mii/mii.h> 109 #include <dev/mii/miivar.h> 110 #include <dev/mii/mii_bitbang.h> 111 112 #include <dev/ic/elink3var.h> 113 #include <dev/ic/elink3reg.h> 114 115 #ifdef DEBUG 116 int epdebug = 0; 117 #endif 118 119 /* 120 * XXX endian workaround for big-endian CPUs with pcmcia: 121 * if stream methods for bus_space_multi are not provided, define them 122 * using non-stream bus_space_{read,write}_multi_. 123 * Assumes host CPU is same endian-ness as bus. 124 */ 125 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 126 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 127 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 128 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 129 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 130 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 131 132 /* 133 * Structure to map media-present bits in boards to ifmedia codes and 134 * printable media names. Used for table-driven ifmedia initialization. 135 */ 136 struct ep_media { 137 int epm_mpbit; /* media present bit */ 138 const char *epm_name; /* name of medium */ 139 int epm_ifmedia; /* ifmedia word for medium */ 140 int epm_epmedia; /* ELINKMEDIA_* constant */ 141 }; 142 143 /* 144 * Media table for the Demon/Vortex/Boomerang chipsets. 145 * 146 * Note that MII on the Demon and Vortex (3c59x) indicates an external 147 * MII connector (for connecting an external PHY) ... I think. Treat 148 * it as `manual' on these chips. 149 * 150 * Any Boomerang (3c90x) chips with MII really do have an internal 151 * MII and real PHYs attached; no `native' media. 152 */ 153 const struct ep_media ep_vortex_media[] = { 154 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 155 ELINKMEDIA_10BASE_T }, 156 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 157 ELINKMEDIA_10BASE_T }, 158 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 159 ELINKMEDIA_AUI }, 160 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 161 ELINKMEDIA_10BASE_2 }, 162 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 163 ELINKMEDIA_100BASE_TX }, 164 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 165 ELINKMEDIA_100BASE_TX }, 166 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 167 ELINKMEDIA_100BASE_FX }, 168 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 169 ELINKMEDIA_MII }, 170 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 171 ELINKMEDIA_100BASE_T4 }, 172 { 0, NULL, 0, 173 0 }, 174 }; 175 176 /* 177 * Media table for the older 3Com Etherlink III chipset, used 178 * in the 3c509, 3c579, and 3c589. 179 */ 180 const struct ep_media ep_509_media[] = { 181 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 182 ELINKMEDIA_10BASE_T }, 183 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 184 ELINKMEDIA_AUI }, 185 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 186 ELINKMEDIA_10BASE_2 }, 187 { 0, NULL, 0, 188 0 }, 189 }; 190 191 void ep_internalconfig __P((struct ep_softc *sc)); 192 void ep_vortex_probemedia __P((struct ep_softc *sc)); 193 void ep_509_probemedia __P((struct ep_softc *sc)); 194 195 static void eptxstat __P((struct ep_softc *)); 196 static int epstatus __P((struct ep_softc *)); 197 int epinit __P((struct ifnet *)); 198 void epstop __P((struct ifnet *, int)); 199 int epioctl __P((struct ifnet *, u_long, caddr_t)); 200 void epstart __P((struct ifnet *)); 201 void epwatchdog __P((struct ifnet *)); 202 void epreset __P((struct ep_softc *)); 203 static void epshutdown __P((void *)); 204 void epread __P((struct ep_softc *)); 205 struct mbuf *epget __P((struct ep_softc *, int)); 206 void epmbuffill __P((void *)); 207 void epmbufempty __P((struct ep_softc *)); 208 void epsetfilter __P((struct ep_softc *)); 209 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 210 void epsetmedia __P((struct ep_softc *)); 211 212 /* ifmedia callbacks */ 213 int ep_media_change __P((struct ifnet *ifp)); 214 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 215 216 /* MII callbacks */ 217 int ep_mii_readreg __P((struct device *, int, int)); 218 void ep_mii_writereg __P((struct device *, int, int, int)); 219 void ep_statchg __P((struct device *)); 220 221 void ep_tick __P((void *)); 222 223 static int epbusyeeprom __P((struct ep_softc *)); 224 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 225 static inline void ep_reset_cmd __P((struct ep_softc *sc, 226 u_int cmd, u_int arg)); 227 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 228 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 229 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 230 231 /* 232 * MII bit-bang glue. 233 */ 234 u_int32_t ep_mii_bitbang_read __P((struct device *)); 235 void ep_mii_bitbang_write __P((struct device *, u_int32_t)); 236 237 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 238 ep_mii_bitbang_read, 239 ep_mii_bitbang_write, 240 { 241 PHYSMGMT_DATA, /* MII_BIT_MDO */ 242 PHYSMGMT_DATA, /* MII_BIT_MDI */ 243 PHYSMGMT_CLK, /* MII_BIT_MDC */ 244 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 245 0, /* MII_BIT_DIR_PHY_HOST */ 246 } 247 }; 248 249 /* 250 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 251 * Window 1 registers offset! 252 */ 253 static __inline int 254 ep_w1_reg(sc, reg) 255 struct ep_softc *sc; 256 int reg; 257 { 258 259 switch (sc->ep_chipset) { 260 case ELINK_CHIPSET_CORKSCREW: 261 return (reg + 0x10); 262 263 case ELINK_CHIPSET_ROADRUNNER: 264 switch (reg) { 265 case ELINK_W1_FREE_TX: 266 case ELINK_W1_RUNNER_RDCTL: 267 case ELINK_W1_RUNNER_WRCTL: 268 return (reg); 269 } 270 return (reg + 0x10); 271 } 272 273 return (reg); 274 } 275 276 /* 277 * Wait for any pending reset to complete. 278 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 279 * but older hardware doesn't implement it and we must delay. 280 */ 281 static inline void 282 ep_finish_reset(iot, ioh) 283 bus_space_tag_t iot; 284 bus_space_handle_t ioh; 285 { 286 int i; 287 288 for (i = 0; i < 10000; i++) { 289 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 290 COMMAND_IN_PROGRESS) == 0) 291 break; 292 DELAY(10); 293 } 294 } 295 296 /* 297 * Issue a (reset) command, and be sure it has completed. 298 * Used for global reset, TX_RESET, RX_RESET. 299 */ 300 static inline void 301 ep_reset_cmd(sc, cmd, arg) 302 struct ep_softc *sc; 303 u_int cmd, arg; 304 { 305 bus_space_tag_t iot = sc->sc_iot; 306 bus_space_handle_t ioh = sc->sc_ioh; 307 308 bus_space_write_2(iot, ioh, cmd, arg); 309 ep_finish_reset(iot, ioh); 310 } 311 312 313 static inline void 314 ep_discard_rxtop(iot, ioh) 315 bus_space_tag_t iot; 316 bus_space_handle_t ioh; 317 { 318 int i; 319 320 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 321 322 /* 323 * Spin for about 1 msec, to avoid forcing a DELAY() between 324 * every received packet (adding latency and limiting pkt-recv rate). 325 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 326 * is about right. 327 */ 328 for (i = 0; i < 8000; i++) { 329 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 330 COMMAND_IN_PROGRESS) == 0) 331 return; 332 } 333 334 /* Didn't complete in a hurry. Do DELAY()s. */ 335 ep_finish_reset(iot, ioh); 336 } 337 338 /* 339 * Back-end attach and configure. 340 */ 341 int 342 epconfig(sc, chipset, enaddr) 343 struct ep_softc *sc; 344 u_short chipset; 345 u_int8_t *enaddr; 346 { 347 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 348 bus_space_tag_t iot = sc->sc_iot; 349 bus_space_handle_t ioh = sc->sc_ioh; 350 u_int16_t i; 351 u_int8_t myla[ETHER_ADDR_LEN]; 352 353 callout_init(&sc->sc_mii_callout); 354 callout_init(&sc->sc_mbuf_callout); 355 356 sc->ep_chipset = chipset; 357 358 /* 359 * We could have been groveling around in other register 360 * windows in the front-end; make sure we're in window 0 361 * to read the EEPROM. 362 */ 363 GO_WINDOW(0); 364 365 if (enaddr == NULL) { 366 /* 367 * Read the station address from the eeprom. 368 */ 369 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 370 u_int16_t x = ep_read_eeprom(sc, i); 371 myla[(i << 1)] = x >> 8; 372 myla[(i << 1) + 1] = x; 373 } 374 enaddr = myla; 375 } 376 377 /* 378 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 379 * allow FDDI-sized (4500) byte packets. Commands only take an 380 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 381 * packet length. 382 * Commands to these cards implicitly upshift a packet size 383 * or threshold by 2 bits. 384 * To detect cards with large-packet support, we probe by setting 385 * the transmit threshold register, then change windows and 386 * read back the threshold register directly, and see if the 387 * threshold value was shifted or not. 388 */ 389 bus_space_write_2(iot, ioh, ELINK_COMMAND, 390 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 391 GO_WINDOW(5); 392 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 393 GO_WINDOW(1); 394 switch (i) { 395 case ELINK_LARGEWIN_PROBE: 396 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 397 sc->ep_pktlenshift = 0; 398 break; 399 400 case (ELINK_LARGEWIN_PROBE << 2): 401 sc->ep_pktlenshift = 2; 402 break; 403 404 default: 405 aprint_error( 406 "%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 407 "Interface disabled\n", 408 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 409 return (1); 410 } 411 412 /* 413 * Ensure Tx-available interrupts are enabled for 414 * start the interface. 415 * XXX should be in epinit()? 416 */ 417 bus_space_write_2(iot, ioh, ELINK_COMMAND, 418 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 419 420 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 421 ifp->if_softc = sc; 422 ifp->if_start = epstart; 423 ifp->if_ioctl = epioctl; 424 ifp->if_watchdog = epwatchdog; 425 ifp->if_init = epinit; 426 ifp->if_stop = epstop; 427 ifp->if_flags = 428 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 429 IFQ_SET_READY(&ifp->if_snd); 430 431 if_attach(ifp); 432 ether_ifattach(ifp, enaddr); 433 434 /* 435 * Finish configuration: 436 * determine chipset if the front-end couldn't do so, 437 * show board details, set media. 438 */ 439 440 /* 441 * Print RAM size. We also print the Ethernet address in here. 442 * It's extracted from the ifp, so we have to make sure it's 443 * been attached first. 444 */ 445 ep_internalconfig(sc); 446 GO_WINDOW(0); 447 448 /* 449 * Display some additional information, if pertinent. 450 */ 451 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 452 aprint_normal("%s: RoadRunner FIFO buffer enabled\n", 453 sc->sc_dev.dv_xname); 454 455 /* 456 * Initialize our media structures and MII info. We'll 457 * probe the MII if we discover that we have one. 458 */ 459 sc->sc_mii.mii_ifp = ifp; 460 sc->sc_mii.mii_readreg = ep_mii_readreg; 461 sc->sc_mii.mii_writereg = ep_mii_writereg; 462 sc->sc_mii.mii_statchg = ep_statchg; 463 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, ep_media_change, 464 ep_media_status); 465 466 /* 467 * All CORKSCREW chips have MII. 468 */ 469 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) 470 sc->ep_flags |= ELINK_FLAGS_MII; 471 472 /* 473 * Now, determine which media we have. 474 */ 475 switch (sc->ep_chipset) { 476 case ELINK_CHIPSET_ROADRUNNER: 477 if (sc->ep_flags & ELINK_FLAGS_MII) { 478 ep_roadrunner_mii_enable(sc); 479 GO_WINDOW(0); 480 } 481 /* FALLTHROUGH */ 482 483 case ELINK_CHIPSET_CORKSCREW: 484 case ELINK_CHIPSET_BOOMERANG: 485 /* 486 * If the device has MII, probe it. We won't be using 487 * any `native' media in this case, only PHYs. If 488 * we don't, just treat the Boomerang like the Vortex. 489 */ 490 if (sc->ep_flags & ELINK_FLAGS_MII) { 491 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 492 MII_PHY_ANY, MII_OFFSET_ANY, 0); 493 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 494 ifmedia_add(&sc->sc_mii.mii_media, 495 IFM_ETHER|IFM_NONE, 0, NULL); 496 ifmedia_set(&sc->sc_mii.mii_media, 497 IFM_ETHER|IFM_NONE); 498 } else { 499 ifmedia_set(&sc->sc_mii.mii_media, 500 IFM_ETHER|IFM_AUTO); 501 } 502 break; 503 } 504 /* FALLTHROUGH */ 505 506 case ELINK_CHIPSET_VORTEX: 507 ep_vortex_probemedia(sc); 508 break; 509 510 default: 511 ep_509_probemedia(sc); 512 break; 513 } 514 515 GO_WINDOW(1); /* Window 1 is operating window */ 516 517 #if NRND > 0 518 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 519 RND_TYPE_NET, 0); 520 #endif 521 522 sc->tx_start_thresh = 20; /* probably a good starting point. */ 523 524 /* Establish callback to reset card when we reboot. */ 525 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 526 527 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 528 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 529 530 /* The attach is successful. */ 531 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 532 return (0); 533 } 534 535 536 /* 537 * Show interface-model-independent info from window 3 538 * internal-configuration register. 539 */ 540 void 541 ep_internalconfig(sc) 542 struct ep_softc *sc; 543 { 544 bus_space_tag_t iot = sc->sc_iot; 545 bus_space_handle_t ioh = sc->sc_ioh; 546 547 u_int config0; 548 u_int config1; 549 550 int ram_size, ram_width, ram_split; 551 /* 552 * NVRAM buffer Rx:Tx config names for busmastering cards 553 * (Demon, Vortex, and later). 554 */ 555 const char *const onboard_ram_config[] = { 556 "5:3", "3:1", "1:1", "3:5" }; 557 558 GO_WINDOW(3); 559 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 560 config1 = (u_int)bus_space_read_2(iot, ioh, 561 ELINK_W3_INTERNAL_CONFIG + 2); 562 GO_WINDOW(0); 563 564 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 565 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 566 567 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 568 569 aprint_normal("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 570 sc->sc_dev.dv_xname, 571 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 572 8 << ram_size, 573 (ram_width) ? "word" : "byte", 574 onboard_ram_config[ram_split]); 575 } 576 577 578 /* 579 * Find supported media on 3c509-generation hardware that doesn't have 580 * a "reset_options" register in window 3. 581 * Use the config_cntrl register in window 0 instead. 582 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 583 * that implement CONFIG_CTRL. We don't have a good way to set the 584 * default active medium; punt to ifconfig instead. 585 */ 586 void 587 ep_509_probemedia(sc) 588 struct ep_softc *sc; 589 { 590 bus_space_tag_t iot = sc->sc_iot; 591 bus_space_handle_t ioh = sc->sc_ioh; 592 struct ifmedia *ifm = &sc->sc_mii.mii_media; 593 u_int16_t ep_w0_config, port; 594 const struct ep_media *epm; 595 const char *sep = "", *defmedianame = NULL; 596 int defmedia = 0; 597 598 GO_WINDOW(0); 599 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 600 601 aprint_normal("%s: ", sc->sc_dev.dv_xname); 602 603 /* Sanity check that there are any media! */ 604 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 605 aprint_error("no media present!\n"); 606 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 607 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 608 return; 609 } 610 611 /* 612 * Get the default media from the EEPROM. 613 */ 614 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 615 616 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 617 618 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 619 if (ep_w0_config & epm->epm_mpbit) { 620 /* 621 * This simple test works because 509 chipsets 622 * don't do full-duplex. 623 */ 624 if (epm->epm_epmedia == port || defmedia == 0) { 625 defmedia = epm->epm_ifmedia; 626 defmedianame = epm->epm_name; 627 } 628 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 629 NULL); 630 PRINT(epm->epm_name); 631 } 632 } 633 634 #undef PRINT 635 636 #ifdef DIAGNOSTIC 637 if (defmedia == 0) 638 panic("ep_509_probemedia: impossible"); 639 #endif 640 641 aprint_normal(" (default %s)\n", defmedianame); 642 ifmedia_set(ifm, defmedia); 643 } 644 645 /* 646 * Find media present on large-packet-capable elink3 devices. 647 * Show onboard configuration of large-packet-capable elink3 devices 648 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 649 * Use media and card-version info in window 3 instead. 650 */ 651 void 652 ep_vortex_probemedia(sc) 653 struct ep_softc *sc; 654 { 655 bus_space_tag_t iot = sc->sc_iot; 656 bus_space_handle_t ioh = sc->sc_ioh; 657 struct ifmedia *ifm = &sc->sc_mii.mii_media; 658 const struct ep_media *epm; 659 u_int config1; 660 int reset_options; 661 int default_media; /* 3-bit encoding of default (EEPROM) media */ 662 int defmedia = 0; 663 const char *sep = "", *defmedianame = NULL; 664 665 GO_WINDOW(3); 666 config1 = (u_int)bus_space_read_2(iot, ioh, 667 ELINK_W3_INTERNAL_CONFIG + 2); 668 reset_options = (int)bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 669 GO_WINDOW(0); 670 671 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 672 673 aprint_normal("%s: ", sc->sc_dev.dv_xname); 674 675 /* Sanity check that there are any media! */ 676 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 677 aprint_error("no media present!\n"); 678 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 679 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 680 return; 681 } 682 683 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 684 685 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 686 if (reset_options & epm->epm_mpbit) { 687 /* 688 * Default media is a little more complicated 689 * on the Vortex. We support full-duplex which 690 * uses the same reset options bit. 691 * 692 * XXX Check EEPROM for default to FDX? 693 */ 694 if (epm->epm_epmedia == default_media) { 695 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 696 defmedia = epm->epm_ifmedia; 697 defmedianame = epm->epm_name; 698 } 699 } else if (defmedia == 0) { 700 defmedia = epm->epm_ifmedia; 701 defmedianame = epm->epm_name; 702 } 703 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 704 NULL); 705 PRINT(epm->epm_name); 706 } 707 } 708 709 #undef PRINT 710 711 #ifdef DIAGNOSTIC 712 if (defmedia == 0) 713 panic("ep_vortex_probemedia: impossible"); 714 #endif 715 716 aprint_normal(" (default %s)\n", defmedianame); 717 ifmedia_set(ifm, defmedia); 718 } 719 720 /* 721 * One second timer, used to tick the MII. 722 */ 723 void 724 ep_tick(arg) 725 void *arg; 726 { 727 struct ep_softc *sc = arg; 728 int s; 729 730 #ifdef DIAGNOSTIC 731 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 732 panic("ep_tick"); 733 #endif 734 735 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 736 return; 737 738 s = splnet(); 739 mii_tick(&sc->sc_mii); 740 splx(s); 741 742 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 743 } 744 745 /* 746 * Bring device up. 747 * 748 * The order in here seems important. Otherwise we may not receive 749 * interrupts. ?! 750 */ 751 int 752 epinit(ifp) 753 struct ifnet *ifp; 754 { 755 struct ep_softc *sc = ifp->if_softc; 756 bus_space_tag_t iot = sc->sc_iot; 757 bus_space_handle_t ioh = sc->sc_ioh; 758 int i, error; 759 u_int8_t *addr; 760 761 if (!sc->enabled && (error = epenable(sc)) != 0) 762 return (error); 763 764 /* Make sure any pending reset has completed before touching board */ 765 ep_finish_reset(iot, ioh); 766 767 /* 768 * Cancel any pending I/O. 769 */ 770 epstop(ifp, 0); 771 772 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 773 && sc->bustype != ELINK_BUS_MCA) { 774 GO_WINDOW(0); 775 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 776 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 777 ENABLE_DRQ_IRQ); 778 } 779 780 if (sc->bustype == ELINK_BUS_PCMCIA) { 781 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 782 } 783 784 GO_WINDOW(2); 785 /* Reload the ether_addr. */ 786 addr = LLADDR(ifp->if_sadl); 787 for (i = 0; i < 6; i += 2) 788 bus_space_write_2(iot, ioh, ELINK_W2_ADDR_0 + i, 789 (addr[i] << 0) | (addr[i + 1] << 8)); 790 791 /* 792 * Reset the station-address receive filter. 793 * A bug workaround for busmastering (Vortex, Demon) cards. 794 */ 795 for (i = 0; i < 6; i += 2) 796 bus_space_write_2(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 797 798 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 799 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 800 801 GO_WINDOW(1); /* Window 1 is operating window */ 802 for (i = 0; i < 31; i++) 803 bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 804 805 /* Set threshold for Tx-space available interrupt. */ 806 bus_space_write_2(iot, ioh, ELINK_COMMAND, 807 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 808 809 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 810 /* 811 * Enable options in the PCMCIA LAN COR register, via 812 * RoadRunner Window 1. 813 * 814 * XXX MAGIC CONSTANTS! 815 */ 816 u_int16_t cor; 817 818 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 819 820 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 821 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 822 cor |= 0x10; 823 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 824 cor |= 0x20; 825 bus_space_write_2(iot, ioh, 0, cor); 826 827 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 828 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 829 830 if (sc->ep_flags & ELINK_FLAGS_MII) { 831 ep_roadrunner_mii_enable(sc); 832 GO_WINDOW(1); 833 } 834 } 835 836 /* Enable interrupts. */ 837 bus_space_write_2(iot, ioh, ELINK_COMMAND, 838 SET_RD_0_MASK | WATCHED_INTERRUPTS); 839 bus_space_write_2(iot, ioh, ELINK_COMMAND, 840 SET_INTR_MASK | WATCHED_INTERRUPTS); 841 842 /* 843 * Attempt to get rid of any stray interrupts that occurred during 844 * configuration. On the i386 this isn't possible because one may 845 * already be queued. However, a single stray interrupt is 846 * unimportant. 847 */ 848 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 849 850 epsetfilter(sc); 851 epsetmedia(sc); 852 853 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 854 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 855 856 epmbuffill(sc); 857 858 /* Interface is now `running', with no output active. */ 859 ifp->if_flags |= IFF_RUNNING; 860 ifp->if_flags &= ~IFF_OACTIVE; 861 862 if (sc->ep_flags & ELINK_FLAGS_MII) { 863 /* Start the one second clock. */ 864 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 865 } 866 867 /* Attempt to start output, if any. */ 868 epstart(ifp); 869 870 return (0); 871 } 872 873 874 /* 875 * Set multicast receive filter. 876 * elink3 hardware has no selective multicast filter in hardware. 877 * Enable reception of all multicasts and filter in software. 878 */ 879 void 880 epsetfilter(sc) 881 struct ep_softc *sc; 882 { 883 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 884 885 GO_WINDOW(1); /* Window 1 is operating window */ 886 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 887 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 888 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 889 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 890 } 891 892 int 893 ep_media_change(ifp) 894 struct ifnet *ifp; 895 { 896 struct ep_softc *sc = ifp->if_softc; 897 898 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 899 epreset(sc); 900 901 return (0); 902 } 903 904 /* 905 * Reset and enable the MII on the RoadRunner. 906 */ 907 void 908 ep_roadrunner_mii_enable(sc) 909 struct ep_softc *sc; 910 { 911 bus_space_tag_t iot = sc->sc_iot; 912 bus_space_handle_t ioh = sc->sc_ioh; 913 914 GO_WINDOW(3); 915 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 916 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 917 delay(1000); 918 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 919 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 920 ELINK_RUNNER_ENABLE_MII); 921 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 922 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 923 delay(1000); 924 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 925 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 926 } 927 928 /* 929 * Set the card to use the specified media. 930 */ 931 void 932 epsetmedia(sc) 933 struct ep_softc *sc; 934 { 935 bus_space_tag_t iot = sc->sc_iot; 936 bus_space_handle_t ioh = sc->sc_ioh; 937 938 /* Turn everything off. First turn off linkbeat and UTP. */ 939 GO_WINDOW(4); 940 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 941 942 /* Turn off coax */ 943 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 944 delay(1000); 945 946 /* 947 * If the device has MII, select it, and then tell the 948 * PHY which media to use. 949 */ 950 if (sc->ep_flags & ELINK_FLAGS_MII) { 951 int config0, config1; 952 953 GO_WINDOW(3); 954 955 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 956 int resopt; 957 958 resopt = bus_space_read_2(iot, ioh, 959 ELINK_W3_RESET_OPTIONS); 960 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 961 resopt | ELINK_RUNNER_ENABLE_MII); 962 } 963 964 config0 = (u_int)bus_space_read_2(iot, ioh, 965 ELINK_W3_INTERNAL_CONFIG); 966 config1 = (u_int)bus_space_read_2(iot, ioh, 967 ELINK_W3_INTERNAL_CONFIG + 2); 968 969 config1 = config1 & ~CONFIG_MEDIAMASK; 970 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 971 972 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 973 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 974 config1); 975 GO_WINDOW(1); /* back to operating window */ 976 977 mii_mediachg(&sc->sc_mii); 978 return; 979 } 980 981 /* 982 * Now turn on the selected media/transceiver. 983 */ 984 GO_WINDOW(4); 985 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 986 case IFM_10_T: 987 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 988 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 989 break; 990 991 case IFM_10_2: 992 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 993 DELAY(1000); /* 50ms not enmough? */ 994 break; 995 996 case IFM_100_TX: 997 case IFM_100_FX: 998 case IFM_100_T4: /* XXX check documentation */ 999 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1000 LINKBEAT_ENABLE); 1001 DELAY(1000); /* not strictly necessary? */ 1002 break; 1003 1004 case IFM_10_5: 1005 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1006 SQE_ENABLE); 1007 DELAY(1000); /* not strictly necessary? */ 1008 break; 1009 1010 case IFM_MANUAL: 1011 /* 1012 * Nothing to do here; we are actually enabling the 1013 * external PHY on the MII port. 1014 */ 1015 break; 1016 1017 case IFM_NONE: 1018 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1019 return; 1020 1021 default: 1022 panic("epsetmedia: impossible"); 1023 } 1024 1025 /* 1026 * Tell the chip which port to use. 1027 */ 1028 switch (sc->ep_chipset) { 1029 case ELINK_CHIPSET_VORTEX: 1030 case ELINK_CHIPSET_BOOMERANG: 1031 { 1032 int mctl, config0, config1; 1033 1034 GO_WINDOW(3); 1035 config0 = (u_int)bus_space_read_2(iot, ioh, 1036 ELINK_W3_INTERNAL_CONFIG); 1037 config1 = (u_int)bus_space_read_2(iot, ioh, 1038 ELINK_W3_INTERNAL_CONFIG + 2); 1039 1040 config1 = config1 & ~CONFIG_MEDIAMASK; 1041 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1042 CONFIG_MEDIAMASK_SHIFT); 1043 1044 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1045 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1046 config1); 1047 1048 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1049 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1050 mctl |= MAC_CONTROL_FDX; 1051 else 1052 mctl &= ~MAC_CONTROL_FDX; 1053 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1054 break; 1055 } 1056 default: 1057 { 1058 int w0_addr_cfg; 1059 1060 GO_WINDOW(0); 1061 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1062 w0_addr_cfg &= 0x3fff; 1063 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1064 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1065 DELAY(1000); 1066 break; 1067 } 1068 } 1069 1070 GO_WINDOW(1); /* Window 1 is operating window */ 1071 } 1072 1073 /* 1074 * Get currently-selected media from card. 1075 * (if_media callback, may be called before interface is brought up). 1076 */ 1077 void 1078 ep_media_status(ifp, req) 1079 struct ifnet *ifp; 1080 struct ifmediareq *req; 1081 { 1082 struct ep_softc *sc = ifp->if_softc; 1083 bus_space_tag_t iot = sc->sc_iot; 1084 bus_space_handle_t ioh = sc->sc_ioh; 1085 1086 if (sc->enabled == 0) { 1087 req->ifm_active = IFM_ETHER|IFM_NONE; 1088 req->ifm_status = 0; 1089 return; 1090 } 1091 1092 /* 1093 * If we have MII, go ask the PHY what's going on. 1094 */ 1095 if (sc->ep_flags & ELINK_FLAGS_MII) { 1096 mii_pollstat(&sc->sc_mii); 1097 req->ifm_active = sc->sc_mii.mii_media_active; 1098 req->ifm_status = sc->sc_mii.mii_media_status; 1099 return; 1100 } 1101 1102 /* 1103 * Ok, at this point we claim that our active media is 1104 * the currently selected media. We'll update our status 1105 * if our chipset allows us to detect link. 1106 */ 1107 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1108 req->ifm_status = 0; 1109 1110 switch (sc->ep_chipset) { 1111 case ELINK_CHIPSET_VORTEX: 1112 case ELINK_CHIPSET_BOOMERANG: 1113 GO_WINDOW(4); 1114 req->ifm_status = IFM_AVALID; 1115 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1116 LINKBEAT_DETECT) 1117 req->ifm_status |= IFM_ACTIVE; 1118 GO_WINDOW(1); /* back to operating window */ 1119 break; 1120 } 1121 } 1122 1123 1124 1125 /* 1126 * Start outputting on the interface. 1127 * Always called as splnet(). 1128 */ 1129 void 1130 epstart(ifp) 1131 struct ifnet *ifp; 1132 { 1133 struct ep_softc *sc = ifp->if_softc; 1134 bus_space_tag_t iot = sc->sc_iot; 1135 bus_space_handle_t ioh = sc->sc_ioh; 1136 struct mbuf *m, *m0; 1137 int sh, len, pad; 1138 bus_size_t txreg; 1139 1140 /* Don't transmit if interface is busy or not running */ 1141 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1142 return; 1143 1144 startagain: 1145 /* Sneak a peek at the next packet */ 1146 IFQ_POLL(&ifp->if_snd, m0); 1147 if (m0 == 0) 1148 return; 1149 1150 /* We need to use m->m_pkthdr.len, so require the header */ 1151 if ((m0->m_flags & M_PKTHDR) == 0) 1152 panic("epstart: no header mbuf"); 1153 len = m0->m_pkthdr.len; 1154 1155 pad = (4 - len) & 3; 1156 1157 /* 1158 * The 3c509 automatically pads short packets to minimum ethernet 1159 * length, but we drop packets that are too large. Perhaps we should 1160 * truncate them instead? 1161 */ 1162 if (len + pad > ETHER_MAX_LEN) { 1163 /* packet is obviously too large: toss it */ 1164 ++ifp->if_oerrors; 1165 IFQ_DEQUEUE(&ifp->if_snd, m0); 1166 m_freem(m0); 1167 goto readcheck; 1168 } 1169 1170 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1171 len + pad + 4) { 1172 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1173 SET_TX_AVAIL_THRESH | 1174 ((len + pad + 4) >> sc->ep_pktlenshift)); 1175 /* not enough room in FIFO */ 1176 ifp->if_flags |= IFF_OACTIVE; 1177 return; 1178 } else { 1179 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1180 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1181 } 1182 1183 IFQ_DEQUEUE(&ifp->if_snd, m0); 1184 if (m0 == 0) /* not really needed */ 1185 return; 1186 1187 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1188 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1189 1190 #if NBPFILTER > 0 1191 if (ifp->if_bpf) 1192 bpf_mtap(ifp->if_bpf, m0); 1193 #endif 1194 1195 /* 1196 * Do the output at a high interrupt priority level so that an 1197 * interrupt from another device won't cause a FIFO underrun. 1198 * We choose splsched() since that blocks essentially everything 1199 * except for interrupts from serial devices (which typically 1200 * lose data if their interrupt isn't serviced fast enough). 1201 * 1202 * XXX THIS CAN CAUSE CLOCK DRIFT! 1203 */ 1204 sh = splsched(); 1205 1206 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1207 1208 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1209 /* 1210 * Prime the FIFO buffer counter (number of 16-bit 1211 * words about to be written to the FIFO). 1212 * 1213 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1214 * COUNTER IS NON-ZERO! 1215 */ 1216 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1217 (len + pad) >> 1); 1218 } 1219 1220 bus_space_write_2(iot, ioh, txreg, len); 1221 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1222 if (ELINK_IS_BUS_32(sc->bustype)) { 1223 for (m = m0; m;) { 1224 if (m->m_len > 3) { 1225 /* align our reads from core */ 1226 if (mtod(m, u_long) & 3) { 1227 u_long count = 1228 4 - (mtod(m, u_long) & 3); 1229 bus_space_write_multi_1(iot, ioh, 1230 txreg, mtod(m, u_int8_t *), count); 1231 m->m_data = 1232 (void *)(mtod(m, u_long) + count); 1233 m->m_len -= count; 1234 } 1235 bus_space_write_multi_stream_4(iot, ioh, 1236 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1237 m->m_data = (void *)(mtod(m, u_long) + 1238 (u_long)(m->m_len & ~3)); 1239 m->m_len -= m->m_len & ~3; 1240 } 1241 if (m->m_len) { 1242 bus_space_write_multi_1(iot, ioh, 1243 txreg, mtod(m, u_int8_t *), m->m_len); 1244 } 1245 MFREE(m, m0); 1246 m = m0; 1247 } 1248 } else { 1249 for (m = m0; m;) { 1250 if (m->m_len > 1) { 1251 if (mtod(m, u_long) & 1) { 1252 bus_space_write_1(iot, ioh, 1253 txreg, *(mtod(m, u_int8_t *))); 1254 m->m_data = 1255 (void *)(mtod(m, u_long) + 1); 1256 m->m_len -= 1; 1257 } 1258 bus_space_write_multi_stream_2(iot, ioh, 1259 txreg, mtod(m, u_int16_t *), 1260 m->m_len >> 1); 1261 } 1262 if (m->m_len & 1) { 1263 bus_space_write_1(iot, ioh, txreg, 1264 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1265 } 1266 MFREE(m, m0); 1267 m = m0; 1268 } 1269 } 1270 while (pad--) 1271 bus_space_write_1(iot, ioh, txreg, 0); 1272 1273 splx(sh); 1274 1275 ++ifp->if_opackets; 1276 1277 readcheck: 1278 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1279 ERR_INCOMPLETE) == 0) { 1280 /* We received a complete packet. */ 1281 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1282 1283 if ((status & INTR_LATCH) == 0) { 1284 /* 1285 * No interrupt, read the packet and continue 1286 * Is this supposed to happen? Is my motherboard 1287 * completely busted? 1288 */ 1289 epread(sc); 1290 } else { 1291 /* Got an interrupt, return so that it gets serviced. */ 1292 return; 1293 } 1294 } else { 1295 /* Check if we are stuck and reset [see XXX comment] */ 1296 if (epstatus(sc)) { 1297 if (ifp->if_flags & IFF_DEBUG) 1298 printf("%s: adapter reset\n", 1299 sc->sc_dev.dv_xname); 1300 epreset(sc); 1301 } 1302 } 1303 1304 goto startagain; 1305 } 1306 1307 1308 /* 1309 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1310 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1311 * We detect this situation and we reset the adapter. 1312 * It happens at times when there is a lot of broadcast traffic 1313 * on the cable (once in a blue moon). 1314 */ 1315 static int 1316 epstatus(sc) 1317 struct ep_softc *sc; 1318 { 1319 bus_space_tag_t iot = sc->sc_iot; 1320 bus_space_handle_t ioh = sc->sc_ioh; 1321 u_int16_t fifost; 1322 1323 /* 1324 * Check the FIFO status and act accordingly 1325 */ 1326 GO_WINDOW(4); 1327 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1328 GO_WINDOW(1); 1329 1330 if (fifost & FIFOS_RX_UNDERRUN) { 1331 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1332 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1333 epreset(sc); 1334 return 0; 1335 } 1336 1337 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1338 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1339 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1340 return 1; 1341 } 1342 1343 if (fifost & FIFOS_RX_OVERRUN) { 1344 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1345 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1346 return 1; 1347 } 1348 1349 if (fifost & FIFOS_TX_OVERRUN) { 1350 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1351 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1352 epreset(sc); 1353 return 0; 1354 } 1355 1356 return 0; 1357 } 1358 1359 1360 static void 1361 eptxstat(sc) 1362 struct ep_softc *sc; 1363 { 1364 bus_space_tag_t iot = sc->sc_iot; 1365 bus_space_handle_t ioh = sc->sc_ioh; 1366 int i; 1367 1368 /* 1369 * We need to read+write TX_STATUS until we get a 0 status 1370 * in order to turn off the interrupt flag. 1371 */ 1372 while ((i = bus_space_read_2(iot, ioh, 1373 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1374 bus_space_write_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1375 0x0); 1376 1377 if (i & TXS_JABBER) { 1378 ++sc->sc_ethercom.ec_if.if_oerrors; 1379 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1380 printf("%s: jabber (%x)\n", 1381 sc->sc_dev.dv_xname, i); 1382 epreset(sc); 1383 } else if (i & TXS_UNDERRUN) { 1384 ++sc->sc_ethercom.ec_if.if_oerrors; 1385 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1386 printf("%s: fifo underrun (%x) @%d\n", 1387 sc->sc_dev.dv_xname, i, 1388 sc->tx_start_thresh); 1389 if (sc->tx_succ_ok < 100) 1390 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1391 sc->tx_start_thresh + 20); 1392 sc->tx_succ_ok = 0; 1393 epreset(sc); 1394 } else if (i & TXS_MAX_COLLISION) { 1395 ++sc->sc_ethercom.ec_if.if_collisions; 1396 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1397 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1398 } else 1399 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1400 } 1401 } 1402 1403 int 1404 epintr(arg) 1405 void *arg; 1406 { 1407 struct ep_softc *sc = arg; 1408 bus_space_tag_t iot = sc->sc_iot; 1409 bus_space_handle_t ioh = sc->sc_ioh; 1410 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1411 u_int16_t status; 1412 int ret = 0; 1413 1414 if (sc->enabled == 0 || 1415 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1416 return (0); 1417 1418 1419 for (;;) { 1420 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1421 1422 if ((status & WATCHED_INTERRUPTS) == 0) { 1423 if ((status & INTR_LATCH) == 0) { 1424 #if 0 1425 printf("%s: intr latch cleared\n", 1426 sc->sc_dev.dv_xname); 1427 #endif 1428 break; 1429 } 1430 } 1431 1432 ret = 1; 1433 1434 /* 1435 * Acknowledge any interrupts. It's important that we do this 1436 * first, since there would otherwise be a race condition. 1437 * Due to the i386 interrupt queueing, we may get spurious 1438 * interrupts occasionally. 1439 */ 1440 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1441 (status & (INTR_LATCH | ALL_INTERRUPTS))); 1442 1443 #if 0 1444 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1445 1446 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1447 (status & RX_COMPLETE)?" RX_COMPLETE":"", 1448 (status & TX_COMPLETE)?" TX_COMPLETE":"", 1449 (status & TX_AVAIL)?" TX_AVAIL":"", 1450 (status & CARD_FAILURE)?" CARD_FAILURE":""); 1451 #endif 1452 1453 if (status & RX_COMPLETE) { 1454 epread(sc); 1455 } 1456 if (status & TX_AVAIL) { 1457 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1458 epstart(&sc->sc_ethercom.ec_if); 1459 } 1460 if (status & CARD_FAILURE) { 1461 printf("%s: adapter failure (%x)\n", 1462 sc->sc_dev.dv_xname, status); 1463 #if 1 1464 epinit(ifp); 1465 #else 1466 epreset(sc); 1467 #endif 1468 return (1); 1469 } 1470 if (status & TX_COMPLETE) { 1471 eptxstat(sc); 1472 epstart(ifp); 1473 } 1474 1475 #if NRND > 0 1476 if (status) 1477 rnd_add_uint32(&sc->rnd_source, status); 1478 #endif 1479 } 1480 1481 /* no more interrupts */ 1482 return (ret); 1483 } 1484 1485 void 1486 epread(sc) 1487 struct ep_softc *sc; 1488 { 1489 bus_space_tag_t iot = sc->sc_iot; 1490 bus_space_handle_t ioh = sc->sc_ioh; 1491 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1492 struct mbuf *m; 1493 int len; 1494 1495 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1496 1497 again: 1498 if (ifp->if_flags & IFF_DEBUG) { 1499 int err = len & ERR_MASK; 1500 char *s = NULL; 1501 1502 if (len & ERR_INCOMPLETE) 1503 s = "incomplete packet"; 1504 else if (err == ERR_OVERRUN) 1505 s = "packet overrun"; 1506 else if (err == ERR_RUNT) 1507 s = "runt packet"; 1508 else if (err == ERR_ALIGNMENT) 1509 s = "bad alignment"; 1510 else if (err == ERR_CRC) 1511 s = "bad crc"; 1512 else if (err == ERR_OVERSIZE) 1513 s = "oversized packet"; 1514 else if (err == ERR_DRIBBLE) 1515 s = "dribble bits"; 1516 1517 if (s) 1518 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1519 } 1520 1521 if (len & ERR_INCOMPLETE) 1522 return; 1523 1524 if (len & ERR_RX) { 1525 ++ifp->if_ierrors; 1526 goto abort; 1527 } 1528 1529 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1530 1531 /* Pull packet off interface. */ 1532 m = epget(sc, len); 1533 if (m == 0) { 1534 ifp->if_ierrors++; 1535 goto abort; 1536 } 1537 1538 ++ifp->if_ipackets; 1539 1540 #if NBPFILTER > 0 1541 /* 1542 * Check if there's a BPF listener on this interface. 1543 * If so, hand off the raw packet to BPF. 1544 */ 1545 if (ifp->if_bpf) 1546 bpf_mtap(ifp->if_bpf, m); 1547 #endif 1548 1549 (*ifp->if_input)(ifp, m); 1550 1551 /* 1552 * In periods of high traffic we can actually receive enough 1553 * packets so that the fifo overrun bit will be set at this point, 1554 * even though we just read a packet. In this case we 1555 * are not going to receive any more interrupts. We check for 1556 * this condition and read again until the fifo is not full. 1557 * We could simplify this test by not using epstatus(), but 1558 * rechecking the RX_STATUS register directly. This test could 1559 * result in unnecessary looping in cases where there is a new 1560 * packet but the fifo is not full, but it will not fix the 1561 * stuck behavior. 1562 * 1563 * Even with this improvement, we still get packet overrun errors 1564 * which are hurting performance. Maybe when I get some more time 1565 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1566 */ 1567 if (epstatus(sc)) { 1568 len = bus_space_read_2(iot, ioh, 1569 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1570 /* Check if we are stuck and reset [see XXX comment] */ 1571 if (len & ERR_INCOMPLETE) { 1572 if (ifp->if_flags & IFF_DEBUG) 1573 printf("%s: adapter reset\n", 1574 sc->sc_dev.dv_xname); 1575 epreset(sc); 1576 return; 1577 } 1578 goto again; 1579 } 1580 1581 return; 1582 1583 abort: 1584 ep_discard_rxtop(iot, ioh); 1585 1586 } 1587 1588 struct mbuf * 1589 epget(sc, totlen) 1590 struct ep_softc *sc; 1591 int totlen; 1592 { 1593 bus_space_tag_t iot = sc->sc_iot; 1594 bus_space_handle_t ioh = sc->sc_ioh; 1595 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1596 struct mbuf *m; 1597 bus_size_t rxreg; 1598 int len, remaining; 1599 int s; 1600 caddr_t newdata; 1601 u_long offset; 1602 1603 m = sc->mb[sc->next_mb]; 1604 sc->mb[sc->next_mb] = 0; 1605 if (m == 0) { 1606 MGETHDR(m, M_DONTWAIT, MT_DATA); 1607 if (m == 0) 1608 return 0; 1609 } else { 1610 /* If the queue is no longer full, refill. */ 1611 if (sc->last_mb == sc->next_mb) 1612 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1613 1614 /* Convert one of our saved mbuf's. */ 1615 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1616 m->m_data = m->m_pktdat; 1617 m->m_flags = M_PKTHDR; 1618 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr)); 1619 } 1620 m->m_pkthdr.rcvif = ifp; 1621 m->m_pkthdr.len = totlen; 1622 len = MHLEN; 1623 1624 /* 1625 * Allocate big enough space to hold whole packet, to avoid 1626 * allocating new mbufs on splsched(). 1627 */ 1628 if (totlen + ALIGNBYTES > len) { 1629 if (totlen + ALIGNBYTES > MCLBYTES) { 1630 len = ALIGN(totlen + ALIGNBYTES); 1631 MEXTMALLOC(m, len, M_DONTWAIT); 1632 } else { 1633 len = MCLBYTES; 1634 MCLGET(m, M_DONTWAIT); 1635 } 1636 if ((m->m_flags & M_EXT) == 0) { 1637 m_free(m); 1638 return 0; 1639 } 1640 } 1641 1642 /* align the struct ip header */ 1643 newdata = (caddr_t) ALIGN(m->m_data + sizeof(struct ether_header)) 1644 - sizeof(struct ether_header); 1645 m->m_data = newdata; 1646 m->m_len = totlen; 1647 1648 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1649 remaining = totlen; 1650 offset = mtod(m, u_long); 1651 1652 /* 1653 * We read the packet at a high interrupt priority level so that 1654 * an interrupt from another device won't cause the card's packet 1655 * buffer to overflow. We choose splsched() since that blocks 1656 * essentially everything except for interrupts from serial 1657 * devices (which typically lose data if their interrupt isn't 1658 * serviced fast enough). 1659 * 1660 * XXX THIS CAN CAUSE CLOCK DRIFT! 1661 */ 1662 s = splsched(); 1663 1664 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1665 /* 1666 * Prime the FIFO buffer counter (number of 16-bit 1667 * words about to be read from the FIFO). 1668 * 1669 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1670 * COUNTER IS NON-ZERO! 1671 */ 1672 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1673 } 1674 1675 if (ELINK_IS_BUS_32(sc->bustype)) { 1676 /* 1677 * Read bytes up to the point where we are aligned. 1678 * (We can align to 4 bytes, rather than ALIGNBYTES, 1679 * here because we're later reading 4-byte chunks.) 1680 */ 1681 if ((remaining > 3) && (offset & 3)) { 1682 int count = (4 - (offset & 3)); 1683 bus_space_read_multi_1(iot, ioh, 1684 rxreg, (u_int8_t *) offset, count); 1685 offset += count; 1686 remaining -= count; 1687 } 1688 if (remaining > 3) { 1689 bus_space_read_multi_stream_4(iot, ioh, 1690 rxreg, (u_int32_t *) offset, 1691 remaining >> 2); 1692 offset += remaining & ~3; 1693 remaining &= 3; 1694 } 1695 if (remaining) { 1696 bus_space_read_multi_1(iot, ioh, 1697 rxreg, (u_int8_t *) offset, remaining); 1698 } 1699 } else { 1700 if ((remaining > 1) && (offset & 1)) { 1701 bus_space_read_multi_1(iot, ioh, 1702 rxreg, (u_int8_t *) offset, 1); 1703 remaining -= 1; 1704 offset += 1; 1705 } 1706 if (remaining > 1) { 1707 bus_space_read_multi_stream_2(iot, ioh, 1708 rxreg, (u_int16_t *) offset, 1709 remaining >> 1); 1710 offset += remaining & ~1; 1711 } 1712 if (remaining & 1) { 1713 bus_space_read_multi_1(iot, ioh, 1714 rxreg, (u_int8_t *) offset, remaining & 1); 1715 } 1716 } 1717 1718 ep_discard_rxtop(iot, ioh); 1719 1720 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1721 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1722 splx(s); 1723 1724 return (m); 1725 } 1726 1727 int 1728 epioctl(ifp, cmd, data) 1729 struct ifnet *ifp; 1730 u_long cmd; 1731 caddr_t data; 1732 { 1733 struct ep_softc *sc = ifp->if_softc; 1734 struct ifreq *ifr = (struct ifreq *)data; 1735 int s, error = 0; 1736 1737 s = splnet(); 1738 1739 switch (cmd) { 1740 1741 case SIOCSIFMEDIA: 1742 case SIOCGIFMEDIA: 1743 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1744 break; 1745 1746 case SIOCADDMULTI: 1747 case SIOCDELMULTI: 1748 if (sc->enabled == 0) { 1749 error = EIO; 1750 break; 1751 } 1752 1753 default: 1754 error = ether_ioctl(ifp, cmd, data); 1755 1756 if (error == ENETRESET) { 1757 /* 1758 * Multicast list has changed; set the hardware filter 1759 * accordingly. 1760 */ 1761 epreset(sc); 1762 error = 0; 1763 } 1764 break; 1765 } 1766 1767 splx(s); 1768 return (error); 1769 } 1770 1771 void 1772 epreset(sc) 1773 struct ep_softc *sc; 1774 { 1775 int s; 1776 1777 s = splnet(); 1778 epinit(&sc->sc_ethercom.ec_if); 1779 splx(s); 1780 } 1781 1782 void 1783 epwatchdog(ifp) 1784 struct ifnet *ifp; 1785 { 1786 struct ep_softc *sc = ifp->if_softc; 1787 1788 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1789 ++sc->sc_ethercom.ec_if.if_oerrors; 1790 1791 epreset(sc); 1792 } 1793 1794 void 1795 epstop(ifp, disable) 1796 struct ifnet *ifp; 1797 int disable; 1798 { 1799 struct ep_softc *sc = ifp->if_softc; 1800 bus_space_tag_t iot = sc->sc_iot; 1801 bus_space_handle_t ioh = sc->sc_ioh; 1802 1803 if (sc->ep_flags & ELINK_FLAGS_MII) { 1804 /* Stop the one second clock. */ 1805 callout_stop(&sc->sc_mbuf_callout); 1806 1807 /* Down the MII. */ 1808 mii_down(&sc->sc_mii); 1809 } 1810 1811 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1812 /* 1813 * Clear the FIFO buffer count, thus halting 1814 * any currently-running transactions. 1815 */ 1816 GO_WINDOW(1); /* sanity */ 1817 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1818 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1819 } 1820 1821 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1822 ep_discard_rxtop(iot, ioh); 1823 1824 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1825 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1826 1827 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1828 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1829 1830 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1831 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1832 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1833 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1834 1835 epmbufempty(sc); 1836 1837 if (disable) 1838 epdisable(sc); 1839 1840 ifp->if_flags &= ~IFF_RUNNING; 1841 } 1842 1843 1844 /* 1845 * Before reboots, reset card completely. 1846 */ 1847 static void 1848 epshutdown(arg) 1849 void *arg; 1850 { 1851 struct ep_softc *sc = arg; 1852 int s = splnet(); 1853 1854 if (sc->enabled) { 1855 epstop(&sc->sc_ethercom.ec_if, 1); 1856 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1857 sc->enabled = 0; 1858 } 1859 splx(s); 1860 } 1861 1862 /* 1863 * We get eeprom data from the id_port given an offset into the 1864 * eeprom. Basically; after the ID_sequence is sent to all of 1865 * the cards; they enter the ID_CMD state where they will accept 1866 * command requests. 0x80-0xbf loads the eeprom data. We then 1867 * read the port 16 times and with every read; the cards check 1868 * for contention (ie: if one card writes a 0 bit and another 1869 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1870 * each card compares the data on the bus; if there is a difference 1871 * then that card goes into ID_WAIT state again). In the meantime; 1872 * one bit of data is returned in the AX register which is conveniently 1873 * returned to us by bus_space_read_2(). Hence; we read 16 times getting one 1874 * bit of data with each read. 1875 * 1876 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1877 */ 1878 u_int16_t 1879 epreadeeprom(iot, ioh, offset) 1880 bus_space_tag_t iot; 1881 bus_space_handle_t ioh; 1882 int offset; 1883 { 1884 u_int16_t data = 0; 1885 int i; 1886 1887 bus_space_write_2(iot, ioh, 0, 0x80 + offset); 1888 delay(1000); 1889 for (i = 0; i < 16; i++) 1890 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1891 return (data); 1892 } 1893 1894 static int 1895 epbusyeeprom(sc) 1896 struct ep_softc *sc; 1897 { 1898 bus_space_tag_t iot = sc->sc_iot; 1899 bus_space_handle_t ioh = sc->sc_ioh; 1900 bus_size_t eecmd; 1901 int i = 100, j; 1902 uint16_t busybit; 1903 1904 if (sc->bustype == ELINK_BUS_PCMCIA) { 1905 delay(1000); 1906 return 0; 1907 } 1908 1909 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1910 eecmd = CORK_ASIC_EEPROM_COMMAND; 1911 busybit = CORK_EEPROM_BUSY; 1912 } else { 1913 eecmd = ELINK_W0_EEPROM_COMMAND; 1914 busybit = EEPROM_BUSY; 1915 } 1916 1917 j = 0; /* bad GCC flow analysis */ 1918 while (i--) { 1919 j = bus_space_read_2(iot, ioh, eecmd); 1920 if (j & busybit) 1921 delay(100); 1922 else 1923 break; 1924 } 1925 if (i == 0) { 1926 printf("\n%s: eeprom failed to come ready\n", 1927 sc->sc_dev.dv_xname); 1928 return (1); 1929 } 1930 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW && 1931 (j & EEPROM_TST_MODE) != 0) { 1932 /* XXX PnP mode? */ 1933 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 1934 return (1); 1935 } 1936 return (0); 1937 } 1938 1939 u_int16_t 1940 ep_read_eeprom(sc, offset) 1941 struct ep_softc *sc; 1942 u_int16_t offset; 1943 { 1944 bus_size_t eecmd, eedata; 1945 u_int16_t readcmd; 1946 1947 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1948 eecmd = CORK_ASIC_EEPROM_COMMAND; 1949 eedata = CORK_ASIC_EEPROM_DATA; 1950 } else { 1951 eecmd = ELINK_W0_EEPROM_COMMAND; 1952 eedata = ELINK_W0_EEPROM_DATA; 1953 } 1954 1955 /* 1956 * RoadRunner has a larger EEPROM, so a different read command 1957 * is required. 1958 */ 1959 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1960 readcmd = READ_EEPROM_RR; 1961 else 1962 readcmd = READ_EEPROM; 1963 1964 if (epbusyeeprom(sc)) 1965 return (0); /* XXX why is eeprom busy? */ 1966 1967 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset); 1968 1969 if (epbusyeeprom(sc)) 1970 return (0); /* XXX why is eeprom busy? */ 1971 1972 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata)); 1973 } 1974 1975 void 1976 epmbuffill(v) 1977 void *v; 1978 { 1979 struct ep_softc *sc = v; 1980 struct mbuf *m; 1981 int s, i; 1982 1983 s = splnet(); 1984 i = sc->last_mb; 1985 do { 1986 if (sc->mb[i] == 0) { 1987 MGET(m, M_DONTWAIT, MT_DATA); 1988 if (m == 0) 1989 break; 1990 sc->mb[i] = m; 1991 } 1992 i = (i + 1) % MAX_MBS; 1993 } while (i != sc->next_mb); 1994 sc->last_mb = i; 1995 /* If the queue was not filled, try again. */ 1996 if (sc->last_mb != sc->next_mb) 1997 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1998 splx(s); 1999 } 2000 2001 void 2002 epmbufempty(sc) 2003 struct ep_softc *sc; 2004 { 2005 int s, i; 2006 2007 s = splnet(); 2008 for (i = 0; i<MAX_MBS; i++) { 2009 if (sc->mb[i]) { 2010 m_freem(sc->mb[i]); 2011 sc->mb[i] = NULL; 2012 } 2013 } 2014 sc->last_mb = sc->next_mb = 0; 2015 callout_stop(&sc->sc_mbuf_callout); 2016 splx(s); 2017 } 2018 2019 int 2020 epenable(sc) 2021 struct ep_softc *sc; 2022 { 2023 2024 if (sc->enabled == 0 && sc->enable != NULL) { 2025 if ((*sc->enable)(sc) != 0) { 2026 printf("%s: device enable failed\n", 2027 sc->sc_dev.dv_xname); 2028 return (EIO); 2029 } 2030 } 2031 2032 sc->enabled = 1; 2033 return (0); 2034 } 2035 2036 void 2037 epdisable(sc) 2038 struct ep_softc *sc; 2039 { 2040 2041 if (sc->enabled != 0 && sc->disable != NULL) { 2042 (*sc->disable)(sc); 2043 sc->enabled = 0; 2044 } 2045 } 2046 2047 /* 2048 * ep_activate: 2049 * 2050 * Handle device activation/deactivation requests. 2051 */ 2052 int 2053 ep_activate(self, act) 2054 struct device *self; 2055 enum devact act; 2056 { 2057 struct ep_softc *sc = (struct ep_softc *)self; 2058 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2059 int error = 0, s; 2060 2061 s = splnet(); 2062 switch (act) { 2063 case DVACT_ACTIVATE: 2064 error = EOPNOTSUPP; 2065 break; 2066 2067 case DVACT_DEACTIVATE: 2068 if (sc->ep_flags & ELINK_FLAGS_MII) 2069 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2070 MII_OFFSET_ANY); 2071 if_deactivate(ifp); 2072 break; 2073 } 2074 splx(s); 2075 return (error); 2076 } 2077 2078 /* 2079 * ep_detach: 2080 * 2081 * Detach a elink3 interface. 2082 */ 2083 int 2084 ep_detach(self, flags) 2085 struct device *self; 2086 int flags; 2087 { 2088 struct ep_softc *sc = (struct ep_softc *)self; 2089 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2090 2091 /* Succeed now if there's no work to do. */ 2092 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2093 return (0); 2094 2095 epdisable(sc); 2096 2097 callout_stop(&sc->sc_mii_callout); 2098 callout_stop(&sc->sc_mbuf_callout); 2099 2100 if (sc->ep_flags & ELINK_FLAGS_MII) { 2101 /* Detach all PHYs */ 2102 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2103 } 2104 2105 /* Delete all remaining media. */ 2106 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2107 2108 #if NRND > 0 2109 rnd_detach_source(&sc->rnd_source); 2110 #endif 2111 ether_ifdetach(ifp); 2112 if_detach(ifp); 2113 2114 shutdownhook_disestablish(sc->sd_hook); 2115 2116 return (0); 2117 } 2118 2119 u_int32_t 2120 ep_mii_bitbang_read(self) 2121 struct device *self; 2122 { 2123 struct ep_softc *sc = (void *) self; 2124 2125 /* We're already in Window 4. */ 2126 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2127 ELINK_W4_BOOM_PHYSMGMT)); 2128 } 2129 2130 void 2131 ep_mii_bitbang_write(self, val) 2132 struct device *self; 2133 u_int32_t val; 2134 { 2135 struct ep_softc *sc = (void *) self; 2136 2137 /* We're already in Window 4. */ 2138 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2139 ELINK_W4_BOOM_PHYSMGMT, val); 2140 } 2141 2142 int 2143 ep_mii_readreg(self, phy, reg) 2144 struct device *self; 2145 int phy, reg; 2146 { 2147 struct ep_softc *sc = (void *) self; 2148 int val; 2149 2150 GO_WINDOW(4); 2151 2152 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2153 2154 GO_WINDOW(1); 2155 2156 return (val); 2157 } 2158 2159 void 2160 ep_mii_writereg(self, phy, reg, val) 2161 struct device *self; 2162 int phy, reg, val; 2163 { 2164 struct ep_softc *sc = (void *) self; 2165 2166 GO_WINDOW(4); 2167 2168 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2169 2170 GO_WINDOW(1); 2171 } 2172 2173 void 2174 ep_statchg(self) 2175 struct device *self; 2176 { 2177 struct ep_softc *sc = (struct ep_softc *)self; 2178 bus_space_tag_t iot = sc->sc_iot; 2179 bus_space_handle_t ioh = sc->sc_ioh; 2180 int mctl; 2181 2182 GO_WINDOW(3); 2183 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2184 if (sc->sc_mii.mii_media_active & IFM_FDX) 2185 mctl |= MAC_CONTROL_FDX; 2186 else 2187 mctl &= ~MAC_CONTROL_FDX; 2188 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2189 GO_WINDOW(1); /* back to operating window */ 2190 } 2191
Indexes created Thu Sep 25 08:09:54 GMT 2025