elink3.c revision 1.122
1 /* $NetBSD: elink3.c,v 1.122 2007/07/09 21:00:35 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include <sys/cdefs.h> 72 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.122 2007/07/09 21:00:35 ad Exp $"); 73 74 #include "opt_inet.h" 75 #include "bpfilter.h" 76 #include "rnd.h" 77 78 #include <sys/param.h> 79 #include <sys/systm.h> 80 #include <sys/callout.h> 81 #include <sys/kernel.h> 82 #include <sys/mbuf.h> 83 #include <sys/socket.h> 84 #include <sys/ioctl.h> 85 #include <sys/errno.h> 86 #include <sys/syslog.h> 87 #include <sys/select.h> 88 #include <sys/device.h> 89 #if NRND > 0 90 #include <sys/rnd.h> 91 #endif 92 93 #include <net/if.h> 94 #include <net/if_dl.h> 95 #include <net/if_ether.h> 96 #include <net/if_media.h> 97 98 #if NBPFILTER > 0 99 #include <net/bpf.h> 100 #include <net/bpfdesc.h> 101 #endif 102 103 #include <machine/cpu.h> 104 #include <machine/bus.h> 105 #include <machine/intr.h> 106 107 #include <dev/mii/mii.h> 108 #include <dev/mii/miivar.h> 109 #include <dev/mii/mii_bitbang.h> 110 111 #include <dev/ic/elink3var.h> 112 #include <dev/ic/elink3reg.h> 113 114 #ifdef DEBUG 115 int epdebug = 0; 116 #endif 117 118 /* 119 * XXX endian workaround for big-endian CPUs with pcmcia: 120 * if stream methods for bus_space_multi are not provided, define them 121 * using non-stream bus_space_{read,write}_multi_. 122 * Assumes host CPU is same endian-ness as bus. 123 */ 124 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 125 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 126 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 127 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 128 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 129 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 130 131 /* 132 * Structure to map media-present bits in boards to ifmedia codes and 133 * printable media names. Used for table-driven ifmedia initialization. 134 */ 135 struct ep_media { 136 int epm_mpbit; /* media present bit */ 137 const char *epm_name; /* name of medium */ 138 int epm_ifmedia; /* ifmedia word for medium */ 139 int epm_epmedia; /* ELINKMEDIA_* constant */ 140 }; 141 142 /* 143 * Media table for the Demon/Vortex/Boomerang chipsets. 144 * 145 * Note that MII on the Demon and Vortex (3c59x) indicates an external 146 * MII connector (for connecting an external PHY) ... I think. Treat 147 * it as `manual' on these chips. 148 * 149 * Any Boomerang (3c90x) chips with MII really do have an internal 150 * MII and real PHYs attached; no `native' media. 151 */ 152 const struct ep_media ep_vortex_media[] = { 153 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 154 ELINKMEDIA_10BASE_T }, 155 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 156 ELINKMEDIA_10BASE_T }, 157 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 158 ELINKMEDIA_AUI }, 159 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 160 ELINKMEDIA_10BASE_2 }, 161 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 162 ELINKMEDIA_100BASE_TX }, 163 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 164 ELINKMEDIA_100BASE_TX }, 165 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 166 ELINKMEDIA_100BASE_FX }, 167 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 168 ELINKMEDIA_MII }, 169 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 170 ELINKMEDIA_100BASE_T4 }, 171 { 0, NULL, 0, 172 0 }, 173 }; 174 175 /* 176 * Media table for the older 3Com Etherlink III chipset, used 177 * in the 3c509, 3c579, and 3c589. 178 */ 179 const struct ep_media ep_509_media[] = { 180 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 181 ELINKMEDIA_10BASE_T }, 182 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 183 ELINKMEDIA_AUI }, 184 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 185 ELINKMEDIA_10BASE_2 }, 186 { 0, NULL, 0, 187 0 }, 188 }; 189 190 void ep_internalconfig(struct ep_softc *sc); 191 void ep_vortex_probemedia(struct ep_softc *sc); 192 void ep_509_probemedia(struct ep_softc *sc); 193 194 static void eptxstat(struct ep_softc *); 195 static int epstatus(struct ep_softc *); 196 int epinit(struct ifnet *); 197 void epstop(struct ifnet *, int); 198 int epioctl(struct ifnet *, u_long, void *); 199 void epstart(struct ifnet *); 200 void epwatchdog(struct ifnet *); 201 void epreset(struct ep_softc *); 202 static void epshutdown(void *); 203 void epread(struct ep_softc *); 204 struct mbuf *epget(struct ep_softc *, int); 205 void epmbuffill(void *); 206 void epmbufempty(struct ep_softc *); 207 void epsetfilter(struct ep_softc *); 208 void ep_roadrunner_mii_enable(struct ep_softc *); 209 void epsetmedia(struct ep_softc *); 210 211 /* ifmedia callbacks */ 212 int ep_media_change(struct ifnet *ifp); 213 void ep_media_status(struct ifnet *ifp, struct ifmediareq *req); 214 215 /* MII callbacks */ 216 int ep_mii_readreg(struct device *, int, int); 217 void ep_mii_writereg(struct device *, int, int, int); 218 void ep_statchg(struct device *); 219 220 void ep_tick(void *); 221 222 static int epbusyeeprom(struct ep_softc *); 223 u_int16_t ep_read_eeprom(struct ep_softc *, u_int16_t); 224 static inline void ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg); 225 static inline void ep_finish_reset(bus_space_tag_t, bus_space_handle_t); 226 static inline void ep_discard_rxtop(bus_space_tag_t, bus_space_handle_t); 227 static inline int ep_w1_reg(struct ep_softc *, int); 228 229 /* 230 * MII bit-bang glue. 231 */ 232 u_int32_t ep_mii_bitbang_read(struct device *); 233 void ep_mii_bitbang_write(struct device *, u_int32_t); 234 235 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 236 ep_mii_bitbang_read, 237 ep_mii_bitbang_write, 238 { 239 PHYSMGMT_DATA, /* MII_BIT_MDO */ 240 PHYSMGMT_DATA, /* MII_BIT_MDI */ 241 PHYSMGMT_CLK, /* MII_BIT_MDC */ 242 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 243 0, /* MII_BIT_DIR_PHY_HOST */ 244 } 245 }; 246 247 /* 248 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 249 * Window 1 registers offset! 250 */ 251 static inline int 252 ep_w1_reg(sc, reg) 253 struct ep_softc *sc; 254 int reg; 255 { 256 257 switch (sc->ep_chipset) { 258 case ELINK_CHIPSET_CORKSCREW: 259 return (reg + 0x10); 260 261 case ELINK_CHIPSET_ROADRUNNER: 262 switch (reg) { 263 case ELINK_W1_FREE_TX: 264 case ELINK_W1_RUNNER_RDCTL: 265 case ELINK_W1_RUNNER_WRCTL: 266 return (reg); 267 } 268 return (reg + 0x10); 269 } 270 271 return (reg); 272 } 273 274 /* 275 * Wait for any pending reset to complete. 276 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 277 * but older hardware doesn't implement it and we must delay. 278 */ 279 static inline void 280 ep_finish_reset(iot, ioh) 281 bus_space_tag_t iot; 282 bus_space_handle_t ioh; 283 { 284 int i; 285 286 for (i = 0; i < 10000; i++) { 287 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 288 COMMAND_IN_PROGRESS) == 0) 289 break; 290 DELAY(10); 291 } 292 } 293 294 /* 295 * Issue a (reset) command, and be sure it has completed. 296 * Used for global reset, TX_RESET, RX_RESET. 297 */ 298 static inline void 299 ep_reset_cmd(sc, cmd, arg) 300 struct ep_softc *sc; 301 u_int cmd, arg; 302 { 303 bus_space_tag_t iot = sc->sc_iot; 304 bus_space_handle_t ioh = sc->sc_ioh; 305 306 bus_space_write_2(iot, ioh, cmd, arg); 307 ep_finish_reset(iot, ioh); 308 } 309 310 311 static inline void 312 ep_discard_rxtop(iot, ioh) 313 bus_space_tag_t iot; 314 bus_space_handle_t ioh; 315 { 316 int i; 317 318 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 319 320 /* 321 * Spin for about 1 msec, to avoid forcing a DELAY() between 322 * every received packet (adding latency and limiting pkt-recv rate). 323 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 324 * is about right. 325 */ 326 for (i = 0; i < 8000; i++) { 327 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 328 COMMAND_IN_PROGRESS) == 0) 329 return; 330 } 331 332 /* Didn't complete in a hurry. Do DELAY()s. */ 333 ep_finish_reset(iot, ioh); 334 } 335 336 /* 337 * Back-end attach and configure. 338 */ 339 int 340 epconfig(sc, chipset, enaddr) 341 struct ep_softc *sc; 342 u_short chipset; 343 u_int8_t *enaddr; 344 { 345 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 346 bus_space_tag_t iot = sc->sc_iot; 347 bus_space_handle_t ioh = sc->sc_ioh; 348 u_int16_t i; 349 u_int8_t myla[ETHER_ADDR_LEN]; 350 351 callout_init(&sc->sc_mii_callout, 0); 352 callout_init(&sc->sc_mbuf_callout, 0); 353 354 sc->ep_chipset = chipset; 355 356 /* 357 * We could have been groveling around in other register 358 * windows in the front-end; make sure we're in window 0 359 * to read the EEPROM. 360 */ 361 GO_WINDOW(0); 362 363 if (enaddr == NULL) { 364 /* 365 * Read the station address from the eeprom. 366 */ 367 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 368 u_int16_t x = ep_read_eeprom(sc, i); 369 myla[(i << 1)] = x >> 8; 370 myla[(i << 1) + 1] = x; 371 } 372 enaddr = myla; 373 } 374 375 /* 376 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 377 * allow FDDI-sized (4500) byte packets. Commands only take an 378 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 379 * packet length. 380 * Commands to these cards implicitly upshift a packet size 381 * or threshold by 2 bits. 382 * To detect cards with large-packet support, we probe by setting 383 * the transmit threshold register, then change windows and 384 * read back the threshold register directly, and see if the 385 * threshold value was shifted or not. 386 */ 387 bus_space_write_2(iot, ioh, ELINK_COMMAND, 388 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 389 GO_WINDOW(5); 390 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 391 GO_WINDOW(1); 392 switch (i) { 393 case ELINK_LARGEWIN_PROBE: 394 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 395 sc->ep_pktlenshift = 0; 396 break; 397 398 case (ELINK_LARGEWIN_PROBE << 2): 399 sc->ep_pktlenshift = 2; 400 break; 401 402 default: 403 aprint_error( 404 "%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 405 "Interface disabled\n", 406 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 407 return (1); 408 } 409 410 /* 411 * Ensure Tx-available interrupts are enabled for 412 * start the interface. 413 * XXX should be in epinit()? 414 */ 415 bus_space_write_2(iot, ioh, ELINK_COMMAND, 416 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 417 418 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 419 ifp->if_softc = sc; 420 ifp->if_start = epstart; 421 ifp->if_ioctl = epioctl; 422 ifp->if_watchdog = epwatchdog; 423 ifp->if_init = epinit; 424 ifp->if_stop = epstop; 425 ifp->if_flags = 426 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 427 IFQ_SET_READY(&ifp->if_snd); 428 429 if_attach(ifp); 430 ether_ifattach(ifp, enaddr); 431 432 /* 433 * Finish configuration: 434 * determine chipset if the front-end couldn't do so, 435 * show board details, set media. 436 */ 437 438 /* 439 * Print RAM size. We also print the Ethernet address in here. 440 * It's extracted from the ifp, so we have to make sure it's 441 * been attached first. 442 */ 443 ep_internalconfig(sc); 444 GO_WINDOW(0); 445 446 /* 447 * Display some additional information, if pertinent. 448 */ 449 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 450 aprint_normal("%s: RoadRunner FIFO buffer enabled\n", 451 sc->sc_dev.dv_xname); 452 453 /* 454 * Initialize our media structures and MII info. We'll 455 * probe the MII if we discover that we have one. 456 */ 457 sc->sc_mii.mii_ifp = ifp; 458 sc->sc_mii.mii_readreg = ep_mii_readreg; 459 sc->sc_mii.mii_writereg = ep_mii_writereg; 460 sc->sc_mii.mii_statchg = ep_statchg; 461 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, ep_media_change, 462 ep_media_status); 463 464 /* 465 * All CORKSCREW chips have MII. 466 */ 467 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) 468 sc->ep_flags |= ELINK_FLAGS_MII; 469 470 /* 471 * Now, determine which media we have. 472 */ 473 switch (sc->ep_chipset) { 474 case ELINK_CHIPSET_ROADRUNNER: 475 if (sc->ep_flags & ELINK_FLAGS_MII) { 476 ep_roadrunner_mii_enable(sc); 477 GO_WINDOW(0); 478 } 479 /* FALLTHROUGH */ 480 481 case ELINK_CHIPSET_CORKSCREW: 482 case ELINK_CHIPSET_BOOMERANG: 483 /* 484 * If the device has MII, probe it. We won't be using 485 * any `native' media in this case, only PHYs. If 486 * we don't, just treat the Boomerang like the Vortex. 487 */ 488 if (sc->ep_flags & ELINK_FLAGS_MII) { 489 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 490 MII_PHY_ANY, MII_OFFSET_ANY, 0); 491 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 492 ifmedia_add(&sc->sc_mii.mii_media, 493 IFM_ETHER|IFM_NONE, 0, NULL); 494 ifmedia_set(&sc->sc_mii.mii_media, 495 IFM_ETHER|IFM_NONE); 496 } else { 497 ifmedia_set(&sc->sc_mii.mii_media, 498 IFM_ETHER|IFM_AUTO); 499 } 500 break; 501 } 502 /* FALLTHROUGH */ 503 504 case ELINK_CHIPSET_VORTEX: 505 ep_vortex_probemedia(sc); 506 break; 507 508 default: 509 ep_509_probemedia(sc); 510 break; 511 } 512 513 GO_WINDOW(1); /* Window 1 is operating window */ 514 515 #if NRND > 0 516 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 517 RND_TYPE_NET, 0); 518 #endif 519 520 sc->tx_start_thresh = 20; /* probably a good starting point. */ 521 522 /* Establish callback to reset card when we reboot. */ 523 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 524 525 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 526 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 527 528 /* The attach is successful. */ 529 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 530 return (0); 531 } 532 533 534 /* 535 * Show interface-model-independent info from window 3 536 * internal-configuration register. 537 */ 538 void 539 ep_internalconfig(sc) 540 struct ep_softc *sc; 541 { 542 bus_space_tag_t iot = sc->sc_iot; 543 bus_space_handle_t ioh = sc->sc_ioh; 544 545 u_int config0; 546 u_int config1; 547 548 int ram_size, ram_width, ram_split; 549 /* 550 * NVRAM buffer Rx:Tx config names for busmastering cards 551 * (Demon, Vortex, and later). 552 */ 553 const char *const onboard_ram_config[] = { 554 "5:3", "3:1", "1:1", "3:5" }; 555 556 GO_WINDOW(3); 557 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 558 config1 = (u_int)bus_space_read_2(iot, ioh, 559 ELINK_W3_INTERNAL_CONFIG + 2); 560 GO_WINDOW(0); 561 562 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 563 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 564 565 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 566 567 aprint_normal("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 568 sc->sc_dev.dv_xname, 569 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 570 8 << ram_size, 571 (ram_width) ? "word" : "byte", 572 onboard_ram_config[ram_split]); 573 } 574 575 576 /* 577 * Find supported media on 3c509-generation hardware that doesn't have 578 * a "reset_options" register in window 3. 579 * Use the config_cntrl register in window 0 instead. 580 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 581 * that implement CONFIG_CTRL. We don't have a good way to set the 582 * default active medium; punt to ifconfig instead. 583 */ 584 void 585 ep_509_probemedia(sc) 586 struct ep_softc *sc; 587 { 588 bus_space_tag_t iot = sc->sc_iot; 589 bus_space_handle_t ioh = sc->sc_ioh; 590 struct ifmedia *ifm = &sc->sc_mii.mii_media; 591 u_int16_t ep_w0_config, port; 592 const struct ep_media *epm; 593 const char *sep = "", *defmedianame = NULL; 594 int defmedia = 0; 595 596 GO_WINDOW(0); 597 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 598 599 aprint_normal("%s: ", sc->sc_dev.dv_xname); 600 601 /* Sanity check that there are any media! */ 602 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 603 aprint_error("no media present!\n"); 604 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 605 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 606 return; 607 } 608 609 /* 610 * Get the default media from the EEPROM. 611 */ 612 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 613 614 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 615 616 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 617 if (ep_w0_config & epm->epm_mpbit) { 618 /* 619 * This simple test works because 509 chipsets 620 * don't do full-duplex. 621 */ 622 if (epm->epm_epmedia == port || defmedia == 0) { 623 defmedia = epm->epm_ifmedia; 624 defmedianame = epm->epm_name; 625 } 626 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 627 NULL); 628 PRINT(epm->epm_name); 629 } 630 } 631 632 #undef PRINT 633 634 #ifdef DIAGNOSTIC 635 if (defmedia == 0) 636 panic("ep_509_probemedia: impossible"); 637 #endif 638 639 aprint_normal(" (default %s)\n", defmedianame); 640 ifmedia_set(ifm, defmedia); 641 } 642 643 /* 644 * Find media present on large-packet-capable elink3 devices. 645 * Show onboard configuration of large-packet-capable elink3 devices 646 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 647 * Use media and card-version info in window 3 instead. 648 */ 649 void 650 ep_vortex_probemedia(sc) 651 struct ep_softc *sc; 652 { 653 bus_space_tag_t iot = sc->sc_iot; 654 bus_space_handle_t ioh = sc->sc_ioh; 655 struct ifmedia *ifm = &sc->sc_mii.mii_media; 656 const struct ep_media *epm; 657 u_int config1; 658 int reset_options; 659 int default_media; /* 3-bit encoding of default (EEPROM) media */ 660 int defmedia = 0; 661 const char *sep = "", *defmedianame = NULL; 662 663 GO_WINDOW(3); 664 config1 = (u_int)bus_space_read_2(iot, ioh, 665 ELINK_W3_INTERNAL_CONFIG + 2); 666 reset_options = (int)bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 667 GO_WINDOW(0); 668 669 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 670 671 aprint_normal("%s: ", sc->sc_dev.dv_xname); 672 673 /* Sanity check that there are any media! */ 674 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 675 aprint_error("no media present!\n"); 676 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 677 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 678 return; 679 } 680 681 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 682 683 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 684 if (reset_options & epm->epm_mpbit) { 685 /* 686 * Default media is a little more complicated 687 * on the Vortex. We support full-duplex which 688 * uses the same reset options bit. 689 * 690 * XXX Check EEPROM for default to FDX? 691 */ 692 if (epm->epm_epmedia == default_media) { 693 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 694 defmedia = epm->epm_ifmedia; 695 defmedianame = epm->epm_name; 696 } 697 } else if (defmedia == 0) { 698 defmedia = epm->epm_ifmedia; 699 defmedianame = epm->epm_name; 700 } 701 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 702 NULL); 703 PRINT(epm->epm_name); 704 } 705 } 706 707 #undef PRINT 708 709 #ifdef DIAGNOSTIC 710 if (defmedia == 0) 711 panic("ep_vortex_probemedia: impossible"); 712 #endif 713 714 aprint_normal(" (default %s)\n", defmedianame); 715 ifmedia_set(ifm, defmedia); 716 } 717 718 /* 719 * One second timer, used to tick the MII. 720 */ 721 void 722 ep_tick(arg) 723 void *arg; 724 { 725 struct ep_softc *sc = arg; 726 int s; 727 728 #ifdef DIAGNOSTIC 729 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 730 panic("ep_tick"); 731 #endif 732 733 if (!device_is_active(&sc->sc_dev)) 734 return; 735 736 s = splnet(); 737 mii_tick(&sc->sc_mii); 738 splx(s); 739 740 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 741 } 742 743 /* 744 * Bring device up. 745 * 746 * The order in here seems important. Otherwise we may not receive 747 * interrupts. ?! 748 */ 749 int 750 epinit(ifp) 751 struct ifnet *ifp; 752 { 753 struct ep_softc *sc = ifp->if_softc; 754 bus_space_tag_t iot = sc->sc_iot; 755 bus_space_handle_t ioh = sc->sc_ioh; 756 int i, error; 757 u_int8_t *addr; 758 759 if (!sc->enabled && (error = epenable(sc)) != 0) 760 return (error); 761 762 /* Make sure any pending reset has completed before touching board */ 763 ep_finish_reset(iot, ioh); 764 765 /* 766 * Cancel any pending I/O. 767 */ 768 epstop(ifp, 0); 769 770 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 771 && sc->bustype != ELINK_BUS_MCA) { 772 GO_WINDOW(0); 773 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 774 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 775 ENABLE_DRQ_IRQ); 776 } 777 778 if (sc->bustype == ELINK_BUS_PCMCIA) { 779 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 780 } 781 782 GO_WINDOW(2); 783 /* Reload the ether_addr. */ 784 addr = LLADDR(ifp->if_sadl); 785 for (i = 0; i < 6; i += 2) 786 bus_space_write_2(iot, ioh, ELINK_W2_ADDR_0 + i, 787 (addr[i] << 0) | (addr[i + 1] << 8)); 788 789 /* 790 * Reset the station-address receive filter. 791 * A bug workaround for busmastering (Vortex, Demon) cards. 792 */ 793 for (i = 0; i < 6; i += 2) 794 bus_space_write_2(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 795 796 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 797 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 798 799 GO_WINDOW(1); /* Window 1 is operating window */ 800 for (i = 0; i < 31; i++) 801 (void)bus_space_read_2(iot, ioh, 802 ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 803 804 /* Set threshold for Tx-space available interrupt. */ 805 bus_space_write_2(iot, ioh, ELINK_COMMAND, 806 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 807 808 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 809 /* 810 * Enable options in the PCMCIA LAN COR register, via 811 * RoadRunner Window 1. 812 * 813 * XXX MAGIC CONSTANTS! 814 */ 815 u_int16_t cor; 816 817 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 818 819 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 820 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 821 cor |= 0x10; 822 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 823 cor |= 0x20; 824 bus_space_write_2(iot, ioh, 0, cor); 825 826 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 827 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 828 829 if (sc->ep_flags & ELINK_FLAGS_MII) { 830 ep_roadrunner_mii_enable(sc); 831 GO_WINDOW(1); 832 } 833 } 834 835 /* Enable interrupts. */ 836 bus_space_write_2(iot, ioh, ELINK_COMMAND, 837 SET_RD_0_MASK | WATCHED_INTERRUPTS); 838 bus_space_write_2(iot, ioh, ELINK_COMMAND, 839 SET_INTR_MASK | WATCHED_INTERRUPTS); 840 841 /* 842 * Attempt to get rid of any stray interrupts that occurred during 843 * configuration. On the i386 this isn't possible because one may 844 * already be queued. However, a single stray interrupt is 845 * unimportant. 846 */ 847 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 848 849 epsetfilter(sc); 850 epsetmedia(sc); 851 852 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 853 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 854 855 epmbuffill(sc); 856 857 /* Interface is now `running', with no output active. */ 858 ifp->if_flags |= IFF_RUNNING; 859 ifp->if_flags &= ~IFF_OACTIVE; 860 861 if (sc->ep_flags & ELINK_FLAGS_MII) { 862 /* Start the one second clock. */ 863 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 864 } 865 866 /* Attempt to start output, if any. */ 867 epstart(ifp); 868 869 return (0); 870 } 871 872 873 /* 874 * Set multicast receive filter. 875 * elink3 hardware has no selective multicast filter in hardware. 876 * Enable reception of all multicasts and filter in software. 877 */ 878 void 879 epsetfilter(sc) 880 struct ep_softc *sc; 881 { 882 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 883 884 GO_WINDOW(1); /* Window 1 is operating window */ 885 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 886 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 887 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 888 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 889 } 890 891 int 892 ep_media_change(ifp) 893 struct ifnet *ifp; 894 { 895 struct ep_softc *sc = ifp->if_softc; 896 897 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 898 epreset(sc); 899 900 return (0); 901 } 902 903 /* 904 * Reset and enable the MII on the RoadRunner. 905 */ 906 void 907 ep_roadrunner_mii_enable(sc) 908 struct ep_softc *sc; 909 { 910 bus_space_tag_t iot = sc->sc_iot; 911 bus_space_handle_t ioh = sc->sc_ioh; 912 913 GO_WINDOW(3); 914 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 915 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 916 delay(1000); 917 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 918 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 919 ELINK_RUNNER_ENABLE_MII); 920 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 921 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 922 delay(1000); 923 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 924 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 925 } 926 927 /* 928 * Set the card to use the specified media. 929 */ 930 void 931 epsetmedia(sc) 932 struct ep_softc *sc; 933 { 934 bus_space_tag_t iot = sc->sc_iot; 935 bus_space_handle_t ioh = sc->sc_ioh; 936 937 /* Turn everything off. First turn off linkbeat and UTP. */ 938 GO_WINDOW(4); 939 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 940 941 /* Turn off coax */ 942 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 943 delay(1000); 944 945 /* 946 * If the device has MII, select it, and then tell the 947 * PHY which media to use. 948 */ 949 if (sc->ep_flags & ELINK_FLAGS_MII) { 950 int config0, config1; 951 952 GO_WINDOW(3); 953 954 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 955 int resopt; 956 957 resopt = bus_space_read_2(iot, ioh, 958 ELINK_W3_RESET_OPTIONS); 959 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 960 resopt | ELINK_RUNNER_ENABLE_MII); 961 } 962 963 config0 = (u_int)bus_space_read_2(iot, ioh, 964 ELINK_W3_INTERNAL_CONFIG); 965 config1 = (u_int)bus_space_read_2(iot, ioh, 966 ELINK_W3_INTERNAL_CONFIG + 2); 967 968 config1 = config1 & ~CONFIG_MEDIAMASK; 969 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 970 971 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 972 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 973 config1); 974 GO_WINDOW(1); /* back to operating window */ 975 976 mii_mediachg(&sc->sc_mii); 977 return; 978 } 979 980 /* 981 * Now turn on the selected media/transceiver. 982 */ 983 GO_WINDOW(4); 984 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 985 case IFM_10_T: 986 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 987 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 988 break; 989 990 case IFM_10_2: 991 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 992 DELAY(1000); /* 50ms not enmough? */ 993 break; 994 995 case IFM_100_TX: 996 case IFM_100_FX: 997 case IFM_100_T4: /* XXX check documentation */ 998 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 999 LINKBEAT_ENABLE); 1000 DELAY(1000); /* not strictly necessary? */ 1001 break; 1002 1003 case IFM_10_5: 1004 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1005 SQE_ENABLE); 1006 DELAY(1000); /* not strictly necessary? */ 1007 break; 1008 1009 case IFM_MANUAL: 1010 /* 1011 * Nothing to do here; we are actually enabling the 1012 * external PHY on the MII port. 1013 */ 1014 break; 1015 1016 case IFM_NONE: 1017 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1018 return; 1019 1020 default: 1021 panic("epsetmedia: impossible"); 1022 } 1023 1024 /* 1025 * Tell the chip which port to use. 1026 */ 1027 switch (sc->ep_chipset) { 1028 case ELINK_CHIPSET_VORTEX: 1029 case ELINK_CHIPSET_BOOMERANG: 1030 { 1031 int mctl, config0, config1; 1032 1033 GO_WINDOW(3); 1034 config0 = (u_int)bus_space_read_2(iot, ioh, 1035 ELINK_W3_INTERNAL_CONFIG); 1036 config1 = (u_int)bus_space_read_2(iot, ioh, 1037 ELINK_W3_INTERNAL_CONFIG + 2); 1038 1039 config1 = config1 & ~CONFIG_MEDIAMASK; 1040 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1041 CONFIG_MEDIAMASK_SHIFT); 1042 1043 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1044 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1045 config1); 1046 1047 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1048 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1049 mctl |= MAC_CONTROL_FDX; 1050 else 1051 mctl &= ~MAC_CONTROL_FDX; 1052 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1053 break; 1054 } 1055 default: 1056 { 1057 int w0_addr_cfg; 1058 1059 GO_WINDOW(0); 1060 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1061 w0_addr_cfg &= 0x3fff; 1062 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1063 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1064 DELAY(1000); 1065 break; 1066 } 1067 } 1068 1069 GO_WINDOW(1); /* Window 1 is operating window */ 1070 } 1071 1072 /* 1073 * Get currently-selected media from card. 1074 * (if_media callback, may be called before interface is brought up). 1075 */ 1076 void 1077 ep_media_status(ifp, req) 1078 struct ifnet *ifp; 1079 struct ifmediareq *req; 1080 { 1081 struct ep_softc *sc = ifp->if_softc; 1082 bus_space_tag_t iot = sc->sc_iot; 1083 bus_space_handle_t ioh = sc->sc_ioh; 1084 1085 if (sc->enabled == 0) { 1086 req->ifm_active = IFM_ETHER|IFM_NONE; 1087 req->ifm_status = 0; 1088 return; 1089 } 1090 1091 /* 1092 * If we have MII, go ask the PHY what's going on. 1093 */ 1094 if (sc->ep_flags & ELINK_FLAGS_MII) { 1095 mii_pollstat(&sc->sc_mii); 1096 req->ifm_active = sc->sc_mii.mii_media_active; 1097 req->ifm_status = sc->sc_mii.mii_media_status; 1098 return; 1099 } 1100 1101 /* 1102 * Ok, at this point we claim that our active media is 1103 * the currently selected media. We'll update our status 1104 * if our chipset allows us to detect link. 1105 */ 1106 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1107 req->ifm_status = 0; 1108 1109 switch (sc->ep_chipset) { 1110 case ELINK_CHIPSET_VORTEX: 1111 case ELINK_CHIPSET_BOOMERANG: 1112 GO_WINDOW(4); 1113 req->ifm_status = IFM_AVALID; 1114 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1115 LINKBEAT_DETECT) 1116 req->ifm_status |= IFM_ACTIVE; 1117 GO_WINDOW(1); /* back to operating window */ 1118 break; 1119 } 1120 } 1121 1122 1123 1124 /* 1125 * Start outputting on the interface. 1126 * Always called as splnet(). 1127 */ 1128 void 1129 epstart(ifp) 1130 struct ifnet *ifp; 1131 { 1132 struct ep_softc *sc = ifp->if_softc; 1133 bus_space_tag_t iot = sc->sc_iot; 1134 bus_space_handle_t ioh = sc->sc_ioh; 1135 struct mbuf *m, *m0; 1136 int sh, len, pad; 1137 bus_size_t txreg; 1138 1139 /* Don't transmit if interface is busy or not running */ 1140 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1141 return; 1142 1143 startagain: 1144 /* Sneak a peek at the next packet */ 1145 IFQ_POLL(&ifp->if_snd, m0); 1146 if (m0 == 0) 1147 return; 1148 1149 /* We need to use m->m_pkthdr.len, so require the header */ 1150 if ((m0->m_flags & M_PKTHDR) == 0) 1151 panic("epstart: no header mbuf"); 1152 len = m0->m_pkthdr.len; 1153 1154 pad = (4 - len) & 3; 1155 1156 /* 1157 * The 3c509 automatically pads short packets to minimum ethernet 1158 * length, but we drop packets that are too large. Perhaps we should 1159 * truncate them instead? 1160 */ 1161 if (len + pad > ETHER_MAX_LEN) { 1162 /* packet is obviously too large: toss it */ 1163 ++ifp->if_oerrors; 1164 IFQ_DEQUEUE(&ifp->if_snd, m0); 1165 m_freem(m0); 1166 goto readcheck; 1167 } 1168 1169 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1170 len + pad + 4) { 1171 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1172 SET_TX_AVAIL_THRESH | 1173 ((len + pad + 4) >> sc->ep_pktlenshift)); 1174 /* not enough room in FIFO */ 1175 ifp->if_flags |= IFF_OACTIVE; 1176 return; 1177 } else { 1178 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1179 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1180 } 1181 1182 IFQ_DEQUEUE(&ifp->if_snd, m0); 1183 if (m0 == 0) /* not really needed */ 1184 return; 1185 1186 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1187 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1188 1189 #if NBPFILTER > 0 1190 if (ifp->if_bpf) 1191 bpf_mtap(ifp->if_bpf, m0); 1192 #endif 1193 1194 /* 1195 * Do the output at a high interrupt priority level so that an 1196 * interrupt from another device won't cause a FIFO underrun. 1197 * We choose splsched() since that blocks essentially everything 1198 * except for interrupts from serial devices (which typically 1199 * lose data if their interrupt isn't serviced fast enough). 1200 * 1201 * XXX THIS CAN CAUSE CLOCK DRIFT! 1202 */ 1203 sh = splsched(); 1204 1205 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1206 1207 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1208 /* 1209 * Prime the FIFO buffer counter (number of 16-bit 1210 * words about to be written to the FIFO). 1211 * 1212 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1213 * COUNTER IS NON-ZERO! 1214 */ 1215 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1216 (len + pad) >> 1); 1217 } 1218 1219 bus_space_write_2(iot, ioh, txreg, len); 1220 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1221 if (ELINK_IS_BUS_32(sc->bustype)) { 1222 for (m = m0; m;) { 1223 if (m->m_len > 3) { 1224 /* align our reads from core */ 1225 if (mtod(m, u_long) & 3) { 1226 u_long count = 1227 4 - (mtod(m, u_long) & 3); 1228 bus_space_write_multi_1(iot, ioh, 1229 txreg, mtod(m, u_int8_t *), count); 1230 m->m_data = 1231 (void *)(mtod(m, u_long) + count); 1232 m->m_len -= count; 1233 } 1234 bus_space_write_multi_stream_4(iot, ioh, 1235 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1236 m->m_data = (void *)(mtod(m, u_long) + 1237 (u_long)(m->m_len & ~3)); 1238 m->m_len -= m->m_len & ~3; 1239 } 1240 if (m->m_len) { 1241 bus_space_write_multi_1(iot, ioh, 1242 txreg, mtod(m, u_int8_t *), m->m_len); 1243 } 1244 MFREE(m, m0); 1245 m = m0; 1246 } 1247 } else { 1248 for (m = m0; m;) { 1249 if (m->m_len > 1) { 1250 if (mtod(m, u_long) & 1) { 1251 bus_space_write_1(iot, ioh, 1252 txreg, *(mtod(m, u_int8_t *))); 1253 m->m_data = 1254 (void *)(mtod(m, u_long) + 1); 1255 m->m_len -= 1; 1256 } 1257 bus_space_write_multi_stream_2(iot, ioh, 1258 txreg, mtod(m, u_int16_t *), 1259 m->m_len >> 1); 1260 } 1261 if (m->m_len & 1) { 1262 bus_space_write_1(iot, ioh, txreg, 1263 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1264 } 1265 MFREE(m, m0); 1266 m = m0; 1267 } 1268 } 1269 while (pad--) 1270 bus_space_write_1(iot, ioh, txreg, 0); 1271 1272 splx(sh); 1273 1274 ++ifp->if_opackets; 1275 1276 readcheck: 1277 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1278 ERR_INCOMPLETE) == 0) { 1279 /* We received a complete packet. */ 1280 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1281 1282 if ((status & INTR_LATCH) == 0) { 1283 /* 1284 * No interrupt, read the packet and continue 1285 * Is this supposed to happen? Is my motherboard 1286 * completely busted? 1287 */ 1288 epread(sc); 1289 } else { 1290 /* Got an interrupt, return so that it gets serviced. */ 1291 return; 1292 } 1293 } else { 1294 /* Check if we are stuck and reset [see XXX comment] */ 1295 if (epstatus(sc)) { 1296 if (ifp->if_flags & IFF_DEBUG) 1297 printf("%s: adapter reset\n", 1298 sc->sc_dev.dv_xname); 1299 epreset(sc); 1300 } 1301 } 1302 1303 goto startagain; 1304 } 1305 1306 1307 /* 1308 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1309 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1310 * We detect this situation and we reset the adapter. 1311 * It happens at times when there is a lot of broadcast traffic 1312 * on the cable (once in a blue moon). 1313 */ 1314 static int 1315 epstatus(sc) 1316 struct ep_softc *sc; 1317 { 1318 bus_space_tag_t iot = sc->sc_iot; 1319 bus_space_handle_t ioh = sc->sc_ioh; 1320 u_int16_t fifost; 1321 1322 /* 1323 * Check the FIFO status and act accordingly 1324 */ 1325 GO_WINDOW(4); 1326 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1327 GO_WINDOW(1); 1328 1329 if (fifost & FIFOS_RX_UNDERRUN) { 1330 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1331 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1332 epreset(sc); 1333 return 0; 1334 } 1335 1336 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1337 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1338 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1339 return 1; 1340 } 1341 1342 if (fifost & FIFOS_RX_OVERRUN) { 1343 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1344 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1345 return 1; 1346 } 1347 1348 if (fifost & FIFOS_TX_OVERRUN) { 1349 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1350 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1351 epreset(sc); 1352 return 0; 1353 } 1354 1355 return 0; 1356 } 1357 1358 1359 static void 1360 eptxstat(sc) 1361 struct ep_softc *sc; 1362 { 1363 bus_space_tag_t iot = sc->sc_iot; 1364 bus_space_handle_t ioh = sc->sc_ioh; 1365 int i; 1366 1367 /* 1368 * We need to read+write TX_STATUS until we get a 0 status 1369 * in order to turn off the interrupt flag. 1370 */ 1371 while ((i = bus_space_read_2(iot, ioh, 1372 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1373 bus_space_write_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1374 0x0); 1375 1376 if (i & TXS_JABBER) { 1377 ++sc->sc_ethercom.ec_if.if_oerrors; 1378 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1379 printf("%s: jabber (%x)\n", 1380 sc->sc_dev.dv_xname, i); 1381 epreset(sc); 1382 } else if (i & TXS_UNDERRUN) { 1383 ++sc->sc_ethercom.ec_if.if_oerrors; 1384 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1385 printf("%s: fifo underrun (%x) @%d\n", 1386 sc->sc_dev.dv_xname, i, 1387 sc->tx_start_thresh); 1388 if (sc->tx_succ_ok < 100) 1389 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1390 sc->tx_start_thresh + 20); 1391 sc->tx_succ_ok = 0; 1392 epreset(sc); 1393 } else if (i & TXS_MAX_COLLISION) { 1394 ++sc->sc_ethercom.ec_if.if_collisions; 1395 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1396 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1397 } else 1398 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1399 } 1400 } 1401 1402 int 1403 epintr(arg) 1404 void *arg; 1405 { 1406 struct ep_softc *sc = arg; 1407 bus_space_tag_t iot = sc->sc_iot; 1408 bus_space_handle_t ioh = sc->sc_ioh; 1409 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1410 u_int16_t status; 1411 int ret = 0; 1412 1413 if (sc->enabled == 0 || !device_is_active(&sc->sc_dev)) 1414 return (0); 1415 1416 1417 for (;;) { 1418 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1419 1420 if ((status & WATCHED_INTERRUPTS) == 0) { 1421 if ((status & INTR_LATCH) == 0) { 1422 #if 0 1423 printf("%s: intr latch cleared\n", 1424 sc->sc_dev.dv_xname); 1425 #endif 1426 break; 1427 } 1428 } 1429 1430 ret = 1; 1431 1432 /* 1433 * Acknowledge any interrupts. It's important that we do this 1434 * first, since there would otherwise be a race condition. 1435 * Due to the i386 interrupt queueing, we may get spurious 1436 * interrupts occasionally. 1437 */ 1438 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1439 (status & (INTR_LATCH | ALL_INTERRUPTS))); 1440 1441 #if 0 1442 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1443 1444 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1445 (status & RX_COMPLETE)?" RX_COMPLETE":"", 1446 (status & TX_COMPLETE)?" TX_COMPLETE":"", 1447 (status & TX_AVAIL)?" TX_AVAIL":"", 1448 (status & CARD_FAILURE)?" CARD_FAILURE":""); 1449 #endif 1450 1451 if (status & RX_COMPLETE) { 1452 epread(sc); 1453 } 1454 if (status & TX_AVAIL) { 1455 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1456 epstart(&sc->sc_ethercom.ec_if); 1457 } 1458 if (status & CARD_FAILURE) { 1459 printf("%s: adapter failure (%x)\n", 1460 sc->sc_dev.dv_xname, status); 1461 #if 1 1462 epinit(ifp); 1463 #else 1464 epreset(sc); 1465 #endif 1466 return (1); 1467 } 1468 if (status & TX_COMPLETE) { 1469 eptxstat(sc); 1470 epstart(ifp); 1471 } 1472 1473 #if NRND > 0 1474 if (status) 1475 rnd_add_uint32(&sc->rnd_source, status); 1476 #endif 1477 } 1478 1479 /* no more interrupts */ 1480 return (ret); 1481 } 1482 1483 void 1484 epread(sc) 1485 struct ep_softc *sc; 1486 { 1487 bus_space_tag_t iot = sc->sc_iot; 1488 bus_space_handle_t ioh = sc->sc_ioh; 1489 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1490 struct mbuf *m; 1491 int len; 1492 1493 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1494 1495 again: 1496 if (ifp->if_flags & IFF_DEBUG) { 1497 int err = len & ERR_MASK; 1498 const char *s = NULL; 1499 1500 if (len & ERR_INCOMPLETE) 1501 s = "incomplete packet"; 1502 else if (err == ERR_OVERRUN) 1503 s = "packet overrun"; 1504 else if (err == ERR_RUNT) 1505 s = "runt packet"; 1506 else if (err == ERR_ALIGNMENT) 1507 s = "bad alignment"; 1508 else if (err == ERR_CRC) 1509 s = "bad crc"; 1510 else if (err == ERR_OVERSIZE) 1511 s = "oversized packet"; 1512 else if (err == ERR_DRIBBLE) 1513 s = "dribble bits"; 1514 1515 if (s) 1516 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1517 } 1518 1519 if (len & ERR_INCOMPLETE) 1520 return; 1521 1522 if (len & ERR_RX) { 1523 ++ifp->if_ierrors; 1524 goto abort; 1525 } 1526 1527 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1528 1529 /* Pull packet off interface. */ 1530 m = epget(sc, len); 1531 if (m == 0) { 1532 ifp->if_ierrors++; 1533 goto abort; 1534 } 1535 1536 ++ifp->if_ipackets; 1537 1538 #if NBPFILTER > 0 1539 /* 1540 * Check if there's a BPF listener on this interface. 1541 * If so, hand off the raw packet to BPF. 1542 */ 1543 if (ifp->if_bpf) 1544 bpf_mtap(ifp->if_bpf, m); 1545 #endif 1546 1547 (*ifp->if_input)(ifp, m); 1548 1549 /* 1550 * In periods of high traffic we can actually receive enough 1551 * packets so that the fifo overrun bit will be set at this point, 1552 * even though we just read a packet. In this case we 1553 * are not going to receive any more interrupts. We check for 1554 * this condition and read again until the fifo is not full. 1555 * We could simplify this test by not using epstatus(), but 1556 * rechecking the RX_STATUS register directly. This test could 1557 * result in unnecessary looping in cases where there is a new 1558 * packet but the fifo is not full, but it will not fix the 1559 * stuck behavior. 1560 * 1561 * Even with this improvement, we still get packet overrun errors 1562 * which are hurting performance. Maybe when I get some more time 1563 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1564 */ 1565 if (epstatus(sc)) { 1566 len = bus_space_read_2(iot, ioh, 1567 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1568 /* Check if we are stuck and reset [see XXX comment] */ 1569 if (len & ERR_INCOMPLETE) { 1570 if (ifp->if_flags & IFF_DEBUG) 1571 printf("%s: adapter reset\n", 1572 sc->sc_dev.dv_xname); 1573 epreset(sc); 1574 return; 1575 } 1576 goto again; 1577 } 1578 1579 return; 1580 1581 abort: 1582 ep_discard_rxtop(iot, ioh); 1583 1584 } 1585 1586 struct mbuf * 1587 epget(sc, totlen) 1588 struct ep_softc *sc; 1589 int totlen; 1590 { 1591 bus_space_tag_t iot = sc->sc_iot; 1592 bus_space_handle_t ioh = sc->sc_ioh; 1593 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1594 struct mbuf *m; 1595 bus_size_t rxreg; 1596 int len, remaining; 1597 int s; 1598 void *newdata; 1599 u_long offset; 1600 1601 m = sc->mb[sc->next_mb]; 1602 sc->mb[sc->next_mb] = 0; 1603 if (m == 0) { 1604 MGETHDR(m, M_DONTWAIT, MT_DATA); 1605 if (m == 0) 1606 return 0; 1607 } else { 1608 /* If the queue is no longer full, refill. */ 1609 if (sc->last_mb == sc->next_mb) 1610 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1611 1612 /* Convert one of our saved mbuf's. */ 1613 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1614 m->m_data = m->m_pktdat; 1615 m->m_flags = M_PKTHDR; 1616 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr)); 1617 } 1618 m->m_pkthdr.rcvif = ifp; 1619 m->m_pkthdr.len = totlen; 1620 len = MHLEN; 1621 1622 /* 1623 * Allocate big enough space to hold whole packet, to avoid 1624 * allocating new mbufs on splsched(). 1625 */ 1626 if (totlen + ALIGNBYTES > len) { 1627 if (totlen + ALIGNBYTES > MCLBYTES) { 1628 len = ALIGN(totlen + ALIGNBYTES); 1629 MEXTMALLOC(m, len, M_DONTWAIT); 1630 } else { 1631 len = MCLBYTES; 1632 MCLGET(m, M_DONTWAIT); 1633 } 1634 if ((m->m_flags & M_EXT) == 0) { 1635 m_free(m); 1636 return 0; 1637 } 1638 } 1639 1640 /* align the struct ip header */ 1641 newdata = (char *)ALIGN(m->m_data + sizeof(struct ether_header)) 1642 - sizeof(struct ether_header); 1643 m->m_data = newdata; 1644 m->m_len = totlen; 1645 1646 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1647 remaining = totlen; 1648 offset = mtod(m, u_long); 1649 1650 /* 1651 * We read the packet at a high interrupt priority level so that 1652 * an interrupt from another device won't cause the card's packet 1653 * buffer to overflow. We choose splsched() since that blocks 1654 * essentially everything except for interrupts from serial 1655 * devices (which typically lose data if their interrupt isn't 1656 * serviced fast enough). 1657 * 1658 * XXX THIS CAN CAUSE CLOCK DRIFT! 1659 */ 1660 s = splsched(); 1661 1662 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1663 /* 1664 * Prime the FIFO buffer counter (number of 16-bit 1665 * words about to be read from the FIFO). 1666 * 1667 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1668 * COUNTER IS NON-ZERO! 1669 */ 1670 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1671 } 1672 1673 if (ELINK_IS_BUS_32(sc->bustype)) { 1674 /* 1675 * Read bytes up to the point where we are aligned. 1676 * (We can align to 4 bytes, rather than ALIGNBYTES, 1677 * here because we're later reading 4-byte chunks.) 1678 */ 1679 if ((remaining > 3) && (offset & 3)) { 1680 int count = (4 - (offset & 3)); 1681 bus_space_read_multi_1(iot, ioh, 1682 rxreg, (u_int8_t *) offset, count); 1683 offset += count; 1684 remaining -= count; 1685 } 1686 if (remaining > 3) { 1687 bus_space_read_multi_stream_4(iot, ioh, 1688 rxreg, (u_int32_t *) offset, 1689 remaining >> 2); 1690 offset += remaining & ~3; 1691 remaining &= 3; 1692 } 1693 if (remaining) { 1694 bus_space_read_multi_1(iot, ioh, 1695 rxreg, (u_int8_t *) offset, remaining); 1696 } 1697 } else { 1698 if ((remaining > 1) && (offset & 1)) { 1699 bus_space_read_multi_1(iot, ioh, 1700 rxreg, (u_int8_t *) offset, 1); 1701 remaining -= 1; 1702 offset += 1; 1703 } 1704 if (remaining > 1) { 1705 bus_space_read_multi_stream_2(iot, ioh, 1706 rxreg, (u_int16_t *) offset, 1707 remaining >> 1); 1708 offset += remaining & ~1; 1709 } 1710 if (remaining & 1) { 1711 bus_space_read_multi_1(iot, ioh, 1712 rxreg, (u_int8_t *) offset, remaining & 1); 1713 } 1714 } 1715 1716 ep_discard_rxtop(iot, ioh); 1717 1718 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1719 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1720 splx(s); 1721 1722 return (m); 1723 } 1724 1725 int 1726 epioctl(ifp, cmd, data) 1727 struct ifnet *ifp; 1728 u_long cmd; 1729 void *data; 1730 { 1731 struct ep_softc *sc = ifp->if_softc; 1732 struct ifreq *ifr = (struct ifreq *)data; 1733 int s, error = 0; 1734 1735 s = splnet(); 1736 1737 switch (cmd) { 1738 1739 case SIOCSIFMEDIA: 1740 case SIOCGIFMEDIA: 1741 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1742 break; 1743 1744 case SIOCADDMULTI: 1745 case SIOCDELMULTI: 1746 if (sc->enabled == 0) { 1747 error = EIO; 1748 break; 1749 } 1750 1751 default: 1752 error = ether_ioctl(ifp, cmd, data); 1753 1754 if (error == ENETRESET) { 1755 /* 1756 * Multicast list has changed; set the hardware filter 1757 * accordingly. 1758 */ 1759 if (ifp->if_flags & IFF_RUNNING) 1760 epreset(sc); 1761 error = 0; 1762 } 1763 break; 1764 } 1765 1766 splx(s); 1767 return (error); 1768 } 1769 1770 void 1771 epreset(sc) 1772 struct ep_softc *sc; 1773 { 1774 int s; 1775 1776 s = splnet(); 1777 epinit(&sc->sc_ethercom.ec_if); 1778 splx(s); 1779 } 1780 1781 void 1782 epwatchdog(ifp) 1783 struct ifnet *ifp; 1784 { 1785 struct ep_softc *sc = ifp->if_softc; 1786 1787 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1788 ++sc->sc_ethercom.ec_if.if_oerrors; 1789 1790 epreset(sc); 1791 } 1792 1793 void 1794 epstop(ifp, disable) 1795 struct ifnet *ifp; 1796 int disable; 1797 { 1798 struct ep_softc *sc = ifp->if_softc; 1799 bus_space_tag_t iot = sc->sc_iot; 1800 bus_space_handle_t ioh = sc->sc_ioh; 1801 1802 if (sc->ep_flags & ELINK_FLAGS_MII) { 1803 /* Stop the one second clock. */ 1804 callout_stop(&sc->sc_mbuf_callout); 1805 1806 /* Down the MII. */ 1807 mii_down(&sc->sc_mii); 1808 } 1809 1810 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1811 /* 1812 * Clear the FIFO buffer count, thus halting 1813 * any currently-running transactions. 1814 */ 1815 GO_WINDOW(1); /* sanity */ 1816 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1817 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1818 } 1819 1820 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1821 ep_discard_rxtop(iot, ioh); 1822 1823 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1824 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1825 1826 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1827 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1828 1829 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1830 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1831 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1832 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1833 1834 epmbufempty(sc); 1835 1836 if (disable) 1837 epdisable(sc); 1838 1839 ifp->if_flags &= ~IFF_RUNNING; 1840 } 1841 1842 1843 /* 1844 * Before reboots, reset card completely. 1845 */ 1846 static void 1847 epshutdown(arg) 1848 void *arg; 1849 { 1850 struct ep_softc *sc = arg; 1851 int s = splnet(); 1852 1853 if (sc->enabled) { 1854 epstop(&sc->sc_ethercom.ec_if, 0); 1855 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1856 epdisable(sc); 1857 sc->enabled = 0; 1858 } 1859 splx(s); 1860 } 1861 1862 /* 1863 * We get eeprom data from the id_port given an offset into the 1864 * eeprom. Basically; after the ID_sequence is sent to all of 1865 * the cards; they enter the ID_CMD state where they will accept 1866 * command requests. 0x80-0xbf loads the eeprom data. We then 1867 * read the port 16 times and with every read; the cards check 1868 * for contention (ie: if one card writes a 0 bit and another 1869 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1870 * each card compares the data on the bus; if there is a difference 1871 * then that card goes into ID_WAIT state again). In the meantime; 1872 * one bit of data is returned in the AX register which is conveniently 1873 * returned to us by bus_space_read_2(). Hence; we read 16 times getting one 1874 * bit of data with each read. 1875 * 1876 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1877 */ 1878 u_int16_t 1879 epreadeeprom(iot, ioh, offset) 1880 bus_space_tag_t iot; 1881 bus_space_handle_t ioh; 1882 int offset; 1883 { 1884 u_int16_t data = 0; 1885 int i; 1886 1887 bus_space_write_2(iot, ioh, 0, 0x80 + offset); 1888 delay(1000); 1889 for (i = 0; i < 16; i++) 1890 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1891 return (data); 1892 } 1893 1894 static int 1895 epbusyeeprom(sc) 1896 struct ep_softc *sc; 1897 { 1898 bus_space_tag_t iot = sc->sc_iot; 1899 bus_space_handle_t ioh = sc->sc_ioh; 1900 bus_size_t eecmd; 1901 int i = 100, j; 1902 uint16_t busybit; 1903 1904 if (sc->bustype == ELINK_BUS_PCMCIA) { 1905 delay(1000); 1906 return 0; 1907 } 1908 1909 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1910 eecmd = CORK_ASIC_EEPROM_COMMAND; 1911 busybit = CORK_EEPROM_BUSY; 1912 } else { 1913 eecmd = ELINK_W0_EEPROM_COMMAND; 1914 busybit = EEPROM_BUSY; 1915 } 1916 1917 j = 0; /* bad GCC flow analysis */ 1918 while (i--) { 1919 j = bus_space_read_2(iot, ioh, eecmd); 1920 if (j & busybit) 1921 delay(100); 1922 else 1923 break; 1924 } 1925 if (i == 0) { 1926 printf("\n%s: eeprom failed to come ready\n", 1927 sc->sc_dev.dv_xname); 1928 return (1); 1929 } 1930 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW && 1931 (j & EEPROM_TST_MODE) != 0) { 1932 /* XXX PnP mode? */ 1933 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 1934 return (1); 1935 } 1936 return (0); 1937 } 1938 1939 u_int16_t 1940 ep_read_eeprom(sc, offset) 1941 struct ep_softc *sc; 1942 u_int16_t offset; 1943 { 1944 bus_size_t eecmd, eedata; 1945 u_int16_t readcmd; 1946 1947 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1948 eecmd = CORK_ASIC_EEPROM_COMMAND; 1949 eedata = CORK_ASIC_EEPROM_DATA; 1950 } else { 1951 eecmd = ELINK_W0_EEPROM_COMMAND; 1952 eedata = ELINK_W0_EEPROM_DATA; 1953 } 1954 1955 /* 1956 * RoadRunner has a larger EEPROM, so a different read command 1957 * is required. 1958 */ 1959 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1960 readcmd = READ_EEPROM_RR; 1961 else 1962 readcmd = READ_EEPROM; 1963 1964 if (epbusyeeprom(sc)) 1965 return (0); /* XXX why is eeprom busy? */ 1966 1967 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset); 1968 1969 if (epbusyeeprom(sc)) 1970 return (0); /* XXX why is eeprom busy? */ 1971 1972 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata)); 1973 } 1974 1975 void 1976 epmbuffill(v) 1977 void *v; 1978 { 1979 struct ep_softc *sc = v; 1980 struct mbuf *m; 1981 int s, i; 1982 1983 s = splnet(); 1984 i = sc->last_mb; 1985 do { 1986 if (sc->mb[i] == 0) { 1987 MGET(m, M_DONTWAIT, MT_DATA); 1988 if (m == 0) 1989 break; 1990 sc->mb[i] = m; 1991 } 1992 i = (i + 1) % MAX_MBS; 1993 } while (i != sc->next_mb); 1994 sc->last_mb = i; 1995 /* If the queue was not filled, try again. */ 1996 if (sc->last_mb != sc->next_mb) 1997 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1998 splx(s); 1999 } 2000 2001 void 2002 epmbufempty(sc) 2003 struct ep_softc *sc; 2004 { 2005 int s, i; 2006 2007 s = splnet(); 2008 for (i = 0; i<MAX_MBS; i++) { 2009 if (sc->mb[i]) { 2010 m_freem(sc->mb[i]); 2011 sc->mb[i] = NULL; 2012 } 2013 } 2014 sc->last_mb = sc->next_mb = 0; 2015 callout_stop(&sc->sc_mbuf_callout); 2016 splx(s); 2017 } 2018 2019 int 2020 epenable(sc) 2021 struct ep_softc *sc; 2022 { 2023 2024 if (sc->enabled == 0 && sc->enable != NULL) { 2025 if ((*sc->enable)(sc) != 0) { 2026 printf("%s: device enable failed\n", 2027 sc->sc_dev.dv_xname); 2028 return (EIO); 2029 } 2030 } 2031 2032 sc->enabled = 1; 2033 return (0); 2034 } 2035 2036 void 2037 epdisable(sc) 2038 struct ep_softc *sc; 2039 { 2040 2041 if (sc->enabled != 0 && sc->disable != NULL) { 2042 (*sc->disable)(sc); 2043 sc->enabled = 0; 2044 } 2045 } 2046 2047 /* 2048 * ep_activate: 2049 * 2050 * Handle device activation/deactivation requests. 2051 */ 2052 int 2053 ep_activate(self, act) 2054 struct device *self; 2055 enum devact act; 2056 { 2057 struct ep_softc *sc = (struct ep_softc *)self; 2058 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2059 int error = 0, s; 2060 2061 s = splnet(); 2062 switch (act) { 2063 case DVACT_ACTIVATE: 2064 error = EOPNOTSUPP; 2065 break; 2066 2067 case DVACT_DEACTIVATE: 2068 if (sc->ep_flags & ELINK_FLAGS_MII) 2069 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2070 MII_OFFSET_ANY); 2071 if_deactivate(ifp); 2072 break; 2073 } 2074 splx(s); 2075 return (error); 2076 } 2077 2078 /* 2079 * ep_detach: 2080 * 2081 * Detach a elink3 interface. 2082 */ 2083 int 2084 ep_detach(struct device *self, int flags) 2085 { 2086 struct ep_softc *sc = (struct ep_softc *)self; 2087 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2088 2089 /* Succeed now if there's no work to do. */ 2090 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2091 return (0); 2092 2093 epdisable(sc); 2094 2095 callout_stop(&sc->sc_mii_callout); 2096 callout_stop(&sc->sc_mbuf_callout); 2097 2098 if (sc->ep_flags & ELINK_FLAGS_MII) { 2099 /* Detach all PHYs */ 2100 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2101 } 2102 2103 /* Delete all remaining media. */ 2104 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2105 2106 #if NRND > 0 2107 rnd_detach_source(&sc->rnd_source); 2108 #endif 2109 ether_ifdetach(ifp); 2110 if_detach(ifp); 2111 2112 shutdownhook_disestablish(sc->sd_hook); 2113 2114 return (0); 2115 } 2116 2117 u_int32_t 2118 ep_mii_bitbang_read(self) 2119 struct device *self; 2120 { 2121 struct ep_softc *sc = (void *) self; 2122 2123 /* We're already in Window 4. */ 2124 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2125 ELINK_W4_BOOM_PHYSMGMT)); 2126 } 2127 2128 void 2129 ep_mii_bitbang_write(self, val) 2130 struct device *self; 2131 u_int32_t val; 2132 { 2133 struct ep_softc *sc = (void *) self; 2134 2135 /* We're already in Window 4. */ 2136 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2137 ELINK_W4_BOOM_PHYSMGMT, val); 2138 } 2139 2140 int 2141 ep_mii_readreg(self, phy, reg) 2142 struct device *self; 2143 int phy, reg; 2144 { 2145 struct ep_softc *sc = (void *) self; 2146 int val; 2147 2148 GO_WINDOW(4); 2149 2150 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2151 2152 GO_WINDOW(1); 2153 2154 return (val); 2155 } 2156 2157 void 2158 ep_mii_writereg(self, phy, reg, val) 2159 struct device *self; 2160 int phy, reg, val; 2161 { 2162 struct ep_softc *sc = (void *) self; 2163 2164 GO_WINDOW(4); 2165 2166 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2167 2168 GO_WINDOW(1); 2169 } 2170 2171 void 2172 ep_statchg(self) 2173 struct device *self; 2174 { 2175 struct ep_softc *sc = (struct ep_softc *)self; 2176 bus_space_tag_t iot = sc->sc_iot; 2177 bus_space_handle_t ioh = sc->sc_ioh; 2178 int mctl; 2179 2180 GO_WINDOW(3); 2181 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2182 if (sc->sc_mii.mii_media_active & IFM_FDX) 2183 mctl |= MAC_CONTROL_FDX; 2184 else 2185 mctl &= ~MAC_CONTROL_FDX; 2186 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2187 GO_WINDOW(1); /* back to operating window */ 2188 } 2189 2190 void 2191 ep_power(int why, void *arg) 2192 { 2193 struct ep_softc *sc = arg; 2194 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2195 int s; 2196 2197 s = splnet(); 2198 switch (why) { 2199 case PWR_SUSPEND: 2200 case PWR_STANDBY: 2201 epstop(ifp, 1); 2202 break; 2203 case PWR_RESUME: 2204 if (ifp->if_flags & IFF_UP) { 2205 (void)epinit(ifp); 2206 } 2207 break; 2208 case PWR_SOFTSUSPEND: 2209 case PWR_SOFTSTANDBY: 2210 case PWR_SOFTRESUME: 2211 break; 2212 } 2213 splx(s); 2214 } 2215
Indexes created Fri Sep 26 20:09:58 GMT 2025