elink3.c revision 1.125
1 /* $NetBSD: elink3.c,v 1.125 2008/04/08 12:07:26 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include <sys/cdefs.h> 72 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.125 2008/04/08 12:07:26 cegger Exp $"); 73 74 #include "opt_inet.h" 75 #include "bpfilter.h" 76 #include "rnd.h" 77 78 #include <sys/param.h> 79 #include <sys/systm.h> 80 #include <sys/callout.h> 81 #include <sys/kernel.h> 82 #include <sys/mbuf.h> 83 #include <sys/socket.h> 84 #include <sys/ioctl.h> 85 #include <sys/errno.h> 86 #include <sys/syslog.h> 87 #include <sys/select.h> 88 #include <sys/device.h> 89 #if NRND > 0 90 #include <sys/rnd.h> 91 #endif 92 93 #include <net/if.h> 94 #include <net/if_dl.h> 95 #include <net/if_ether.h> 96 #include <net/if_media.h> 97 98 #if NBPFILTER > 0 99 #include <net/bpf.h> 100 #include <net/bpfdesc.h> 101 #endif 102 103 #include <sys/cpu.h> 104 #include <sys/bus.h> 105 #include <sys/intr.h> 106 107 #include <dev/mii/mii.h> 108 #include <dev/mii/miivar.h> 109 #include <dev/mii/mii_bitbang.h> 110 111 #include <dev/ic/elink3var.h> 112 #include <dev/ic/elink3reg.h> 113 114 #ifdef DEBUG 115 int epdebug = 0; 116 #endif 117 118 /* 119 * XXX endian workaround for big-endian CPUs with pcmcia: 120 * if stream methods for bus_space_multi are not provided, define them 121 * using non-stream bus_space_{read,write}_multi_. 122 * Assumes host CPU is same endian-ness as bus. 123 */ 124 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 125 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 126 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 127 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 128 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 129 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 130 131 /* 132 * Structure to map media-present bits in boards to ifmedia codes and 133 * printable media names. Used for table-driven ifmedia initialization. 134 */ 135 struct ep_media { 136 int epm_mpbit; /* media present bit */ 137 const char *epm_name; /* name of medium */ 138 int epm_ifmedia; /* ifmedia word for medium */ 139 int epm_epmedia; /* ELINKMEDIA_* constant */ 140 }; 141 142 /* 143 * Media table for the Demon/Vortex/Boomerang chipsets. 144 * 145 * Note that MII on the Demon and Vortex (3c59x) indicates an external 146 * MII connector (for connecting an external PHY) ... I think. Treat 147 * it as `manual' on these chips. 148 * 149 * Any Boomerang (3c90x) chips with MII really do have an internal 150 * MII and real PHYs attached; no `native' media. 151 */ 152 const struct ep_media ep_vortex_media[] = { 153 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 154 ELINKMEDIA_10BASE_T }, 155 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 156 ELINKMEDIA_10BASE_T }, 157 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 158 ELINKMEDIA_AUI }, 159 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 160 ELINKMEDIA_10BASE_2 }, 161 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 162 ELINKMEDIA_100BASE_TX }, 163 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 164 ELINKMEDIA_100BASE_TX }, 165 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 166 ELINKMEDIA_100BASE_FX }, 167 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 168 ELINKMEDIA_MII }, 169 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 170 ELINKMEDIA_100BASE_T4 }, 171 { 0, NULL, 0, 172 0 }, 173 }; 174 175 /* 176 * Media table for the older 3Com Etherlink III chipset, used 177 * in the 3c509, 3c579, and 3c589. 178 */ 179 const struct ep_media ep_509_media[] = { 180 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 181 ELINKMEDIA_10BASE_T }, 182 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 183 ELINKMEDIA_AUI }, 184 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 185 ELINKMEDIA_10BASE_2 }, 186 { 0, NULL, 0, 187 0 }, 188 }; 189 190 void ep_internalconfig(struct ep_softc *sc); 191 void ep_vortex_probemedia(struct ep_softc *sc); 192 void ep_509_probemedia(struct ep_softc *sc); 193 194 static void eptxstat(struct ep_softc *); 195 static int epstatus(struct ep_softc *); 196 int epinit(struct ifnet *); 197 void epstop(struct ifnet *, int); 198 int epioctl(struct ifnet *, u_long, void *); 199 void epstart(struct ifnet *); 200 void epwatchdog(struct ifnet *); 201 void epreset(struct ep_softc *); 202 static void epshutdown(void *); 203 void epread(struct ep_softc *); 204 struct mbuf *epget(struct ep_softc *, int); 205 void epmbuffill(void *); 206 void epmbufempty(struct ep_softc *); 207 void epsetfilter(struct ep_softc *); 208 void ep_roadrunner_mii_enable(struct ep_softc *); 209 void epsetmedia(struct ep_softc *); 210 211 /* ifmedia callbacks */ 212 int ep_media_change(struct ifnet *ifp); 213 void ep_media_status(struct ifnet *ifp, struct ifmediareq *req); 214 215 /* MII callbacks */ 216 int ep_mii_readreg(struct device *, int, int); 217 void ep_mii_writereg(struct device *, int, int, int); 218 void ep_statchg(struct device *); 219 220 void ep_tick(void *); 221 222 static int epbusyeeprom(struct ep_softc *); 223 u_int16_t ep_read_eeprom(struct ep_softc *, u_int16_t); 224 static inline void ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg); 225 static inline void ep_finish_reset(bus_space_tag_t, bus_space_handle_t); 226 static inline void ep_discard_rxtop(bus_space_tag_t, bus_space_handle_t); 227 static inline int ep_w1_reg(struct ep_softc *, int); 228 229 /* 230 * MII bit-bang glue. 231 */ 232 u_int32_t ep_mii_bitbang_read(struct device *); 233 void ep_mii_bitbang_write(struct device *, u_int32_t); 234 235 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 236 ep_mii_bitbang_read, 237 ep_mii_bitbang_write, 238 { 239 PHYSMGMT_DATA, /* MII_BIT_MDO */ 240 PHYSMGMT_DATA, /* MII_BIT_MDI */ 241 PHYSMGMT_CLK, /* MII_BIT_MDC */ 242 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 243 0, /* MII_BIT_DIR_PHY_HOST */ 244 } 245 }; 246 247 /* 248 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 249 * Window 1 registers offset! 250 */ 251 static inline int 252 ep_w1_reg(sc, reg) 253 struct ep_softc *sc; 254 int reg; 255 { 256 257 switch (sc->ep_chipset) { 258 case ELINK_CHIPSET_CORKSCREW: 259 return (reg + 0x10); 260 261 case ELINK_CHIPSET_ROADRUNNER: 262 switch (reg) { 263 case ELINK_W1_FREE_TX: 264 case ELINK_W1_RUNNER_RDCTL: 265 case ELINK_W1_RUNNER_WRCTL: 266 return (reg); 267 } 268 return (reg + 0x10); 269 } 270 271 return (reg); 272 } 273 274 /* 275 * Wait for any pending reset to complete. 276 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 277 * but older hardware doesn't implement it and we must delay. 278 */ 279 static inline void 280 ep_finish_reset(iot, ioh) 281 bus_space_tag_t iot; 282 bus_space_handle_t ioh; 283 { 284 int i; 285 286 for (i = 0; i < 10000; i++) { 287 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 288 COMMAND_IN_PROGRESS) == 0) 289 break; 290 DELAY(10); 291 } 292 } 293 294 /* 295 * Issue a (reset) command, and be sure it has completed. 296 * Used for global reset, TX_RESET, RX_RESET. 297 */ 298 static inline void 299 ep_reset_cmd(sc, cmd, arg) 300 struct ep_softc *sc; 301 u_int cmd, arg; 302 { 303 bus_space_tag_t iot = sc->sc_iot; 304 bus_space_handle_t ioh = sc->sc_ioh; 305 306 bus_space_write_2(iot, ioh, cmd, arg); 307 ep_finish_reset(iot, ioh); 308 } 309 310 311 static inline void 312 ep_discard_rxtop(iot, ioh) 313 bus_space_tag_t iot; 314 bus_space_handle_t ioh; 315 { 316 int i; 317 318 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 319 320 /* 321 * Spin for about 1 msec, to avoid forcing a DELAY() between 322 * every received packet (adding latency and limiting pkt-recv rate). 323 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 324 * is about right. 325 */ 326 for (i = 0; i < 8000; i++) { 327 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 328 COMMAND_IN_PROGRESS) == 0) 329 return; 330 } 331 332 /* Didn't complete in a hurry. Do DELAY()s. */ 333 ep_finish_reset(iot, ioh); 334 } 335 336 /* 337 * Back-end attach and configure. 338 */ 339 int 340 epconfig(sc, chipset, enaddr) 341 struct ep_softc *sc; 342 u_short chipset; 343 u_int8_t *enaddr; 344 { 345 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 346 bus_space_tag_t iot = sc->sc_iot; 347 bus_space_handle_t ioh = sc->sc_ioh; 348 u_int16_t i; 349 u_int8_t myla[ETHER_ADDR_LEN]; 350 351 callout_init(&sc->sc_mii_callout, 0); 352 callout_init(&sc->sc_mbuf_callout, 0); 353 354 sc->ep_chipset = chipset; 355 356 /* 357 * We could have been groveling around in other register 358 * windows in the front-end; make sure we're in window 0 359 * to read the EEPROM. 360 */ 361 GO_WINDOW(0); 362 363 if (enaddr == NULL) { 364 /* 365 * Read the station address from the eeprom. 366 */ 367 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 368 u_int16_t x = ep_read_eeprom(sc, i); 369 myla[(i << 1)] = x >> 8; 370 myla[(i << 1) + 1] = x; 371 } 372 enaddr = myla; 373 } 374 375 /* 376 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 377 * allow FDDI-sized (4500) byte packets. Commands only take an 378 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 379 * packet length. 380 * Commands to these cards implicitly upshift a packet size 381 * or threshold by 2 bits. 382 * To detect cards with large-packet support, we probe by setting 383 * the transmit threshold register, then change windows and 384 * read back the threshold register directly, and see if the 385 * threshold value was shifted or not. 386 */ 387 bus_space_write_2(iot, ioh, ELINK_COMMAND, 388 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 389 GO_WINDOW(5); 390 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 391 GO_WINDOW(1); 392 switch (i) { 393 case ELINK_LARGEWIN_PROBE: 394 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 395 sc->ep_pktlenshift = 0; 396 break; 397 398 case (ELINK_LARGEWIN_PROBE << 2): 399 sc->ep_pktlenshift = 2; 400 break; 401 402 default: 403 aprint_error_dev(&sc->sc_dev, 404 "wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 405 "Interface disabled\n", 406 ELINK_LARGEWIN_PROBE, (int) i); 407 return (1); 408 } 409 410 /* 411 * Ensure Tx-available interrupts are enabled for 412 * start the interface. 413 * XXX should be in epinit()? 414 */ 415 bus_space_write_2(iot, ioh, ELINK_COMMAND, 416 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 417 418 strlcpy(ifp->if_xname, device_xname(&sc->sc_dev), IFNAMSIZ); 419 ifp->if_softc = sc; 420 ifp->if_start = epstart; 421 ifp->if_ioctl = epioctl; 422 ifp->if_watchdog = epwatchdog; 423 ifp->if_init = epinit; 424 ifp->if_stop = epstop; 425 ifp->if_flags = 426 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 427 IFQ_SET_READY(&ifp->if_snd); 428 429 if_attach(ifp); 430 ether_ifattach(ifp, enaddr); 431 432 /* 433 * Finish configuration: 434 * determine chipset if the front-end couldn't do so, 435 * show board details, set media. 436 */ 437 438 /* 439 * Print RAM size. We also print the Ethernet address in here. 440 * It's extracted from the ifp, so we have to make sure it's 441 * been attached first. 442 */ 443 ep_internalconfig(sc); 444 GO_WINDOW(0); 445 446 /* 447 * Display some additional information, if pertinent. 448 */ 449 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 450 aprint_normal_dev(&sc->sc_dev, "RoadRunner FIFO buffer enabled\n"); 451 452 /* 453 * Initialize our media structures and MII info. We'll 454 * probe the MII if we discover that we have one. 455 */ 456 sc->sc_mii.mii_ifp = ifp; 457 sc->sc_mii.mii_readreg = ep_mii_readreg; 458 sc->sc_mii.mii_writereg = ep_mii_writereg; 459 sc->sc_mii.mii_statchg = ep_statchg; 460 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, ep_media_change, 461 ep_media_status); 462 463 /* 464 * All CORKSCREW chips have MII. 465 */ 466 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) 467 sc->ep_flags |= ELINK_FLAGS_MII; 468 469 /* 470 * Now, determine which media we have. 471 */ 472 switch (sc->ep_chipset) { 473 case ELINK_CHIPSET_ROADRUNNER: 474 if (sc->ep_flags & ELINK_FLAGS_MII) { 475 ep_roadrunner_mii_enable(sc); 476 GO_WINDOW(0); 477 } 478 /* FALLTHROUGH */ 479 480 case ELINK_CHIPSET_CORKSCREW: 481 case ELINK_CHIPSET_BOOMERANG: 482 /* 483 * If the device has MII, probe it. We won't be using 484 * any `native' media in this case, only PHYs. If 485 * we don't, just treat the Boomerang like the Vortex. 486 */ 487 if (sc->ep_flags & ELINK_FLAGS_MII) { 488 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 489 MII_PHY_ANY, MII_OFFSET_ANY, 0); 490 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 491 ifmedia_add(&sc->sc_mii.mii_media, 492 IFM_ETHER|IFM_NONE, 0, NULL); 493 ifmedia_set(&sc->sc_mii.mii_media, 494 IFM_ETHER|IFM_NONE); 495 } else { 496 ifmedia_set(&sc->sc_mii.mii_media, 497 IFM_ETHER|IFM_AUTO); 498 } 499 break; 500 } 501 /* FALLTHROUGH */ 502 503 case ELINK_CHIPSET_VORTEX: 504 ep_vortex_probemedia(sc); 505 break; 506 507 default: 508 ep_509_probemedia(sc); 509 break; 510 } 511 512 GO_WINDOW(1); /* Window 1 is operating window */ 513 514 #if NRND > 0 515 rnd_attach_source(&sc->rnd_source, device_xname(&sc->sc_dev), 516 RND_TYPE_NET, 0); 517 #endif 518 519 sc->tx_start_thresh = 20; /* probably a good starting point. */ 520 521 /* Establish callback to reset card when we reboot. */ 522 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 523 524 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 525 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 526 527 /* The attach is successful. */ 528 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 529 return (0); 530 } 531 532 533 /* 534 * Show interface-model-independent info from window 3 535 * internal-configuration register. 536 */ 537 void 538 ep_internalconfig(sc) 539 struct ep_softc *sc; 540 { 541 bus_space_tag_t iot = sc->sc_iot; 542 bus_space_handle_t ioh = sc->sc_ioh; 543 544 u_int config0; 545 u_int config1; 546 547 int ram_size, ram_width, ram_split; 548 /* 549 * NVRAM buffer Rx:Tx config names for busmastering cards 550 * (Demon, Vortex, and later). 551 */ 552 const char *const onboard_ram_config[] = { 553 "5:3", "3:1", "1:1", "3:5" }; 554 555 GO_WINDOW(3); 556 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 557 config1 = (u_int)bus_space_read_2(iot, ioh, 558 ELINK_W3_INTERNAL_CONFIG + 2); 559 GO_WINDOW(0); 560 561 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 562 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 563 564 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 565 566 aprint_normal_dev(&sc->sc_dev, "address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 567 ether_sprintf(CLLADDR(sc->sc_ethercom.ec_if.if_sadl)), 568 8 << ram_size, 569 (ram_width) ? "word" : "byte", 570 onboard_ram_config[ram_split]); 571 } 572 573 574 /* 575 * Find supported media on 3c509-generation hardware that doesn't have 576 * a "reset_options" register in window 3. 577 * Use the config_cntrl register in window 0 instead. 578 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 579 * that implement CONFIG_CTRL. We don't have a good way to set the 580 * default active medium; punt to ifconfig instead. 581 */ 582 void 583 ep_509_probemedia(sc) 584 struct ep_softc *sc; 585 { 586 bus_space_tag_t iot = sc->sc_iot; 587 bus_space_handle_t ioh = sc->sc_ioh; 588 struct ifmedia *ifm = &sc->sc_mii.mii_media; 589 u_int16_t ep_w0_config, port; 590 const struct ep_media *epm; 591 const char *sep = "", *defmedianame = NULL; 592 int defmedia = 0; 593 594 GO_WINDOW(0); 595 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 596 597 aprint_normal_dev(&sc->sc_dev, ""); 598 599 /* Sanity check that there are any media! */ 600 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 601 aprint_error("no media present!\n"); 602 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 603 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 604 return; 605 } 606 607 /* 608 * Get the default media from the EEPROM. 609 */ 610 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 611 612 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 613 614 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 615 if (ep_w0_config & epm->epm_mpbit) { 616 /* 617 * This simple test works because 509 chipsets 618 * don't do full-duplex. 619 */ 620 if (epm->epm_epmedia == port || defmedia == 0) { 621 defmedia = epm->epm_ifmedia; 622 defmedianame = epm->epm_name; 623 } 624 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 625 NULL); 626 PRINT(epm->epm_name); 627 } 628 } 629 630 #undef PRINT 631 632 #ifdef DIAGNOSTIC 633 if (defmedia == 0) 634 panic("ep_509_probemedia: impossible"); 635 #endif 636 637 aprint_normal(" (default %s)\n", defmedianame); 638 ifmedia_set(ifm, defmedia); 639 } 640 641 /* 642 * Find media present on large-packet-capable elink3 devices. 643 * Show onboard configuration of large-packet-capable elink3 devices 644 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 645 * Use media and card-version info in window 3 instead. 646 */ 647 void 648 ep_vortex_probemedia(sc) 649 struct ep_softc *sc; 650 { 651 bus_space_tag_t iot = sc->sc_iot; 652 bus_space_handle_t ioh = sc->sc_ioh; 653 struct ifmedia *ifm = &sc->sc_mii.mii_media; 654 const struct ep_media *epm; 655 u_int config1; 656 int reset_options; 657 int default_media; /* 3-bit encoding of default (EEPROM) media */ 658 int defmedia = 0; 659 const char *sep = "", *defmedianame = NULL; 660 661 GO_WINDOW(3); 662 config1 = (u_int)bus_space_read_2(iot, ioh, 663 ELINK_W3_INTERNAL_CONFIG + 2); 664 reset_options = (int)bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 665 GO_WINDOW(0); 666 667 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 668 669 aprint_normal_dev(&sc->sc_dev, ""); 670 671 /* Sanity check that there are any media! */ 672 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 673 aprint_error("no media present!\n"); 674 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 675 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 676 return; 677 } 678 679 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 680 681 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 682 if (reset_options & epm->epm_mpbit) { 683 /* 684 * Default media is a little more complicated 685 * on the Vortex. We support full-duplex which 686 * uses the same reset options bit. 687 * 688 * XXX Check EEPROM for default to FDX? 689 */ 690 if (epm->epm_epmedia == default_media) { 691 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 692 defmedia = epm->epm_ifmedia; 693 defmedianame = epm->epm_name; 694 } 695 } else if (defmedia == 0) { 696 defmedia = epm->epm_ifmedia; 697 defmedianame = epm->epm_name; 698 } 699 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 700 NULL); 701 PRINT(epm->epm_name); 702 } 703 } 704 705 #undef PRINT 706 707 #ifdef DIAGNOSTIC 708 if (defmedia == 0) 709 panic("ep_vortex_probemedia: impossible"); 710 #endif 711 712 aprint_normal(" (default %s)\n", defmedianame); 713 ifmedia_set(ifm, defmedia); 714 } 715 716 /* 717 * One second timer, used to tick the MII. 718 */ 719 void 720 ep_tick(arg) 721 void *arg; 722 { 723 struct ep_softc *sc = arg; 724 int s; 725 726 #ifdef DIAGNOSTIC 727 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 728 panic("ep_tick"); 729 #endif 730 731 if (!device_is_active(&sc->sc_dev)) 732 return; 733 734 s = splnet(); 735 mii_tick(&sc->sc_mii); 736 splx(s); 737 738 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 739 } 740 741 /* 742 * Bring device up. 743 * 744 * The order in here seems important. Otherwise we may not receive 745 * interrupts. ?! 746 */ 747 int 748 epinit(ifp) 749 struct ifnet *ifp; 750 { 751 struct ep_softc *sc = ifp->if_softc; 752 bus_space_tag_t iot = sc->sc_iot; 753 bus_space_handle_t ioh = sc->sc_ioh; 754 int i, error; 755 const u_int8_t *addr; 756 757 if (!sc->enabled && (error = epenable(sc)) != 0) 758 return (error); 759 760 /* Make sure any pending reset has completed before touching board */ 761 ep_finish_reset(iot, ioh); 762 763 /* 764 * Cancel any pending I/O. 765 */ 766 epstop(ifp, 0); 767 768 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 769 && sc->bustype != ELINK_BUS_MCA) { 770 GO_WINDOW(0); 771 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 772 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 773 ENABLE_DRQ_IRQ); 774 } 775 776 if (sc->bustype == ELINK_BUS_PCMCIA) { 777 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 778 } 779 780 GO_WINDOW(2); 781 /* Reload the ether_addr. */ 782 addr = CLLADDR(ifp->if_sadl); 783 for (i = 0; i < 6; i += 2) 784 bus_space_write_2(iot, ioh, ELINK_W2_ADDR_0 + i, 785 (addr[i] << 0) | (addr[i + 1] << 8)); 786 787 /* 788 * Reset the station-address receive filter. 789 * A bug workaround for busmastering (Vortex, Demon) cards. 790 */ 791 for (i = 0; i < 6; i += 2) 792 bus_space_write_2(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 793 794 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 795 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 796 797 GO_WINDOW(1); /* Window 1 is operating window */ 798 for (i = 0; i < 31; i++) 799 (void)bus_space_read_2(iot, ioh, 800 ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 801 802 /* Set threshold for Tx-space available interrupt. */ 803 bus_space_write_2(iot, ioh, ELINK_COMMAND, 804 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 805 806 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 807 /* 808 * Enable options in the PCMCIA LAN COR register, via 809 * RoadRunner Window 1. 810 * 811 * XXX MAGIC CONSTANTS! 812 */ 813 u_int16_t cor; 814 815 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 816 817 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 818 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 819 cor |= 0x10; 820 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 821 cor |= 0x20; 822 bus_space_write_2(iot, ioh, 0, cor); 823 824 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 825 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 826 827 if (sc->ep_flags & ELINK_FLAGS_MII) { 828 ep_roadrunner_mii_enable(sc); 829 GO_WINDOW(1); 830 } 831 } 832 833 /* Enable interrupts. */ 834 bus_space_write_2(iot, ioh, ELINK_COMMAND, 835 SET_RD_0_MASK | WATCHED_INTERRUPTS); 836 bus_space_write_2(iot, ioh, ELINK_COMMAND, 837 SET_INTR_MASK | WATCHED_INTERRUPTS); 838 839 /* 840 * Attempt to get rid of any stray interrupts that occurred during 841 * configuration. On the i386 this isn't possible because one may 842 * already be queued. However, a single stray interrupt is 843 * unimportant. 844 */ 845 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 846 847 epsetfilter(sc); 848 epsetmedia(sc); 849 850 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 851 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 852 853 epmbuffill(sc); 854 855 /* Interface is now `running', with no output active. */ 856 ifp->if_flags |= IFF_RUNNING; 857 ifp->if_flags &= ~IFF_OACTIVE; 858 859 if (sc->ep_flags & ELINK_FLAGS_MII) { 860 /* Start the one second clock. */ 861 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 862 } 863 864 /* Attempt to start output, if any. */ 865 epstart(ifp); 866 867 return (0); 868 } 869 870 871 /* 872 * Set multicast receive filter. 873 * elink3 hardware has no selective multicast filter in hardware. 874 * Enable reception of all multicasts and filter in software. 875 */ 876 void 877 epsetfilter(sc) 878 struct ep_softc *sc; 879 { 880 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 881 882 GO_WINDOW(1); /* Window 1 is operating window */ 883 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 884 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 885 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 886 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 887 } 888 889 int 890 ep_media_change(ifp) 891 struct ifnet *ifp; 892 { 893 struct ep_softc *sc = ifp->if_softc; 894 895 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 896 epreset(sc); 897 898 return (0); 899 } 900 901 /* 902 * Reset and enable the MII on the RoadRunner. 903 */ 904 void 905 ep_roadrunner_mii_enable(sc) 906 struct ep_softc *sc; 907 { 908 bus_space_tag_t iot = sc->sc_iot; 909 bus_space_handle_t ioh = sc->sc_ioh; 910 911 GO_WINDOW(3); 912 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 913 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 914 delay(1000); 915 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 916 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 917 ELINK_RUNNER_ENABLE_MII); 918 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 919 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 920 delay(1000); 921 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 922 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 923 } 924 925 /* 926 * Set the card to use the specified media. 927 */ 928 void 929 epsetmedia(sc) 930 struct ep_softc *sc; 931 { 932 bus_space_tag_t iot = sc->sc_iot; 933 bus_space_handle_t ioh = sc->sc_ioh; 934 935 /* Turn everything off. First turn off linkbeat and UTP. */ 936 GO_WINDOW(4); 937 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 938 939 /* Turn off coax */ 940 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 941 delay(1000); 942 943 /* 944 * If the device has MII, select it, and then tell the 945 * PHY which media to use. 946 */ 947 if (sc->ep_flags & ELINK_FLAGS_MII) { 948 int config0, config1; 949 950 GO_WINDOW(3); 951 952 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 953 int resopt; 954 955 resopt = bus_space_read_2(iot, ioh, 956 ELINK_W3_RESET_OPTIONS); 957 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 958 resopt | ELINK_RUNNER_ENABLE_MII); 959 } 960 961 config0 = (u_int)bus_space_read_2(iot, ioh, 962 ELINK_W3_INTERNAL_CONFIG); 963 config1 = (u_int)bus_space_read_2(iot, ioh, 964 ELINK_W3_INTERNAL_CONFIG + 2); 965 966 config1 = config1 & ~CONFIG_MEDIAMASK; 967 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 968 969 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 970 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 971 config1); 972 GO_WINDOW(1); /* back to operating window */ 973 974 mii_mediachg(&sc->sc_mii); 975 return; 976 } 977 978 /* 979 * Now turn on the selected media/transceiver. 980 */ 981 GO_WINDOW(4); 982 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 983 case IFM_10_T: 984 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 985 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 986 break; 987 988 case IFM_10_2: 989 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 990 DELAY(1000); /* 50ms not enmough? */ 991 break; 992 993 case IFM_100_TX: 994 case IFM_100_FX: 995 case IFM_100_T4: /* XXX check documentation */ 996 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 997 LINKBEAT_ENABLE); 998 DELAY(1000); /* not strictly necessary? */ 999 break; 1000 1001 case IFM_10_5: 1002 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1003 SQE_ENABLE); 1004 DELAY(1000); /* not strictly necessary? */ 1005 break; 1006 1007 case IFM_MANUAL: 1008 /* 1009 * Nothing to do here; we are actually enabling the 1010 * external PHY on the MII port. 1011 */ 1012 break; 1013 1014 case IFM_NONE: 1015 printf("%s: interface disabled\n", device_xname(&sc->sc_dev)); 1016 return; 1017 1018 default: 1019 panic("epsetmedia: impossible"); 1020 } 1021 1022 /* 1023 * Tell the chip which port to use. 1024 */ 1025 switch (sc->ep_chipset) { 1026 case ELINK_CHIPSET_VORTEX: 1027 case ELINK_CHIPSET_BOOMERANG: 1028 { 1029 int mctl, config0, config1; 1030 1031 GO_WINDOW(3); 1032 config0 = (u_int)bus_space_read_2(iot, ioh, 1033 ELINK_W3_INTERNAL_CONFIG); 1034 config1 = (u_int)bus_space_read_2(iot, ioh, 1035 ELINK_W3_INTERNAL_CONFIG + 2); 1036 1037 config1 = config1 & ~CONFIG_MEDIAMASK; 1038 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1039 CONFIG_MEDIAMASK_SHIFT); 1040 1041 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1042 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1043 config1); 1044 1045 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1046 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1047 mctl |= MAC_CONTROL_FDX; 1048 else 1049 mctl &= ~MAC_CONTROL_FDX; 1050 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1051 break; 1052 } 1053 default: 1054 { 1055 int w0_addr_cfg; 1056 1057 GO_WINDOW(0); 1058 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1059 w0_addr_cfg &= 0x3fff; 1060 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1061 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1062 DELAY(1000); 1063 break; 1064 } 1065 } 1066 1067 GO_WINDOW(1); /* Window 1 is operating window */ 1068 } 1069 1070 /* 1071 * Get currently-selected media from card. 1072 * (if_media callback, may be called before interface is brought up). 1073 */ 1074 void 1075 ep_media_status(ifp, req) 1076 struct ifnet *ifp; 1077 struct ifmediareq *req; 1078 { 1079 struct ep_softc *sc = ifp->if_softc; 1080 bus_space_tag_t iot = sc->sc_iot; 1081 bus_space_handle_t ioh = sc->sc_ioh; 1082 1083 if (sc->enabled == 0) { 1084 req->ifm_active = IFM_ETHER|IFM_NONE; 1085 req->ifm_status = 0; 1086 return; 1087 } 1088 1089 /* 1090 * If we have MII, go ask the PHY what's going on. 1091 */ 1092 if (sc->ep_flags & ELINK_FLAGS_MII) { 1093 mii_pollstat(&sc->sc_mii); 1094 req->ifm_active = sc->sc_mii.mii_media_active; 1095 req->ifm_status = sc->sc_mii.mii_media_status; 1096 return; 1097 } 1098 1099 /* 1100 * Ok, at this point we claim that our active media is 1101 * the currently selected media. We'll update our status 1102 * if our chipset allows us to detect link. 1103 */ 1104 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1105 req->ifm_status = 0; 1106 1107 switch (sc->ep_chipset) { 1108 case ELINK_CHIPSET_VORTEX: 1109 case ELINK_CHIPSET_BOOMERANG: 1110 GO_WINDOW(4); 1111 req->ifm_status = IFM_AVALID; 1112 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1113 LINKBEAT_DETECT) 1114 req->ifm_status |= IFM_ACTIVE; 1115 GO_WINDOW(1); /* back to operating window */ 1116 break; 1117 } 1118 } 1119 1120 1121 1122 /* 1123 * Start outputting on the interface. 1124 * Always called as splnet(). 1125 */ 1126 void 1127 epstart(ifp) 1128 struct ifnet *ifp; 1129 { 1130 struct ep_softc *sc = ifp->if_softc; 1131 bus_space_tag_t iot = sc->sc_iot; 1132 bus_space_handle_t ioh = sc->sc_ioh; 1133 struct mbuf *m, *m0; 1134 int sh, len, pad; 1135 bus_size_t txreg; 1136 1137 /* Don't transmit if interface is busy or not running */ 1138 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1139 return; 1140 1141 startagain: 1142 /* Sneak a peek at the next packet */ 1143 IFQ_POLL(&ifp->if_snd, m0); 1144 if (m0 == 0) 1145 return; 1146 1147 /* We need to use m->m_pkthdr.len, so require the header */ 1148 if ((m0->m_flags & M_PKTHDR) == 0) 1149 panic("epstart: no header mbuf"); 1150 len = m0->m_pkthdr.len; 1151 1152 pad = (4 - len) & 3; 1153 1154 /* 1155 * The 3c509 automatically pads short packets to minimum ethernet 1156 * length, but we drop packets that are too large. Perhaps we should 1157 * truncate them instead? 1158 */ 1159 if (len + pad > ETHER_MAX_LEN) { 1160 /* packet is obviously too large: toss it */ 1161 ++ifp->if_oerrors; 1162 IFQ_DEQUEUE(&ifp->if_snd, m0); 1163 m_freem(m0); 1164 goto readcheck; 1165 } 1166 1167 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1168 len + pad + 4) { 1169 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1170 SET_TX_AVAIL_THRESH | 1171 ((len + pad + 4) >> sc->ep_pktlenshift)); 1172 /* not enough room in FIFO */ 1173 ifp->if_flags |= IFF_OACTIVE; 1174 return; 1175 } else { 1176 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1177 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1178 } 1179 1180 IFQ_DEQUEUE(&ifp->if_snd, m0); 1181 if (m0 == 0) /* not really needed */ 1182 return; 1183 1184 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1185 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1186 1187 #if NBPFILTER > 0 1188 if (ifp->if_bpf) 1189 bpf_mtap(ifp->if_bpf, m0); 1190 #endif 1191 1192 /* 1193 * Do the output at a high interrupt priority level so that an 1194 * interrupt from another device won't cause a FIFO underrun. 1195 * We choose splsched() since that blocks essentially everything 1196 * except for interrupts from serial devices (which typically 1197 * lose data if their interrupt isn't serviced fast enough). 1198 * 1199 * XXX THIS CAN CAUSE CLOCK DRIFT! 1200 */ 1201 sh = splsched(); 1202 1203 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1204 1205 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1206 /* 1207 * Prime the FIFO buffer counter (number of 16-bit 1208 * words about to be written to the FIFO). 1209 * 1210 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1211 * COUNTER IS NON-ZERO! 1212 */ 1213 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1214 (len + pad) >> 1); 1215 } 1216 1217 bus_space_write_2(iot, ioh, txreg, len); 1218 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1219 if (ELINK_IS_BUS_32(sc->bustype)) { 1220 for (m = m0; m;) { 1221 if (m->m_len > 3) { 1222 /* align our reads from core */ 1223 if (mtod(m, u_long) & 3) { 1224 u_long count = 1225 4 - (mtod(m, u_long) & 3); 1226 bus_space_write_multi_1(iot, ioh, 1227 txreg, mtod(m, u_int8_t *), count); 1228 m->m_data = 1229 (void *)(mtod(m, u_long) + count); 1230 m->m_len -= count; 1231 } 1232 bus_space_write_multi_stream_4(iot, ioh, 1233 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1234 m->m_data = (void *)(mtod(m, u_long) + 1235 (u_long)(m->m_len & ~3)); 1236 m->m_len -= m->m_len & ~3; 1237 } 1238 if (m->m_len) { 1239 bus_space_write_multi_1(iot, ioh, 1240 txreg, mtod(m, u_int8_t *), m->m_len); 1241 } 1242 MFREE(m, m0); 1243 m = m0; 1244 } 1245 } else { 1246 for (m = m0; m;) { 1247 if (m->m_len > 1) { 1248 if (mtod(m, u_long) & 1) { 1249 bus_space_write_1(iot, ioh, 1250 txreg, *(mtod(m, u_int8_t *))); 1251 m->m_data = 1252 (void *)(mtod(m, u_long) + 1); 1253 m->m_len -= 1; 1254 } 1255 bus_space_write_multi_stream_2(iot, ioh, 1256 txreg, mtod(m, u_int16_t *), 1257 m->m_len >> 1); 1258 } 1259 if (m->m_len & 1) { 1260 bus_space_write_1(iot, ioh, txreg, 1261 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1262 } 1263 MFREE(m, m0); 1264 m = m0; 1265 } 1266 } 1267 while (pad--) 1268 bus_space_write_1(iot, ioh, txreg, 0); 1269 1270 splx(sh); 1271 1272 ++ifp->if_opackets; 1273 1274 readcheck: 1275 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1276 ERR_INCOMPLETE) == 0) { 1277 /* We received a complete packet. */ 1278 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1279 1280 if ((status & INTR_LATCH) == 0) { 1281 /* 1282 * No interrupt, read the packet and continue 1283 * Is this supposed to happen? Is my motherboard 1284 * completely busted? 1285 */ 1286 epread(sc); 1287 } else { 1288 /* Got an interrupt, return so that it gets serviced. */ 1289 return; 1290 } 1291 } else { 1292 /* Check if we are stuck and reset [see XXX comment] */ 1293 if (epstatus(sc)) { 1294 if (ifp->if_flags & IFF_DEBUG) 1295 printf("%s: adapter reset\n", 1296 device_xname(&sc->sc_dev)); 1297 epreset(sc); 1298 } 1299 } 1300 1301 goto startagain; 1302 } 1303 1304 1305 /* 1306 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1307 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1308 * We detect this situation and we reset the adapter. 1309 * It happens at times when there is a lot of broadcast traffic 1310 * on the cable (once in a blue moon). 1311 */ 1312 static int 1313 epstatus(sc) 1314 struct ep_softc *sc; 1315 { 1316 bus_space_tag_t iot = sc->sc_iot; 1317 bus_space_handle_t ioh = sc->sc_ioh; 1318 u_int16_t fifost; 1319 1320 /* 1321 * Check the FIFO status and act accordingly 1322 */ 1323 GO_WINDOW(4); 1324 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1325 GO_WINDOW(1); 1326 1327 if (fifost & FIFOS_RX_UNDERRUN) { 1328 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1329 printf("%s: RX underrun\n", device_xname(&sc->sc_dev)); 1330 epreset(sc); 1331 return 0; 1332 } 1333 1334 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1335 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1336 printf("%s: RX Status overrun\n", device_xname(&sc->sc_dev)); 1337 return 1; 1338 } 1339 1340 if (fifost & FIFOS_RX_OVERRUN) { 1341 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1342 printf("%s: RX overrun\n", device_xname(&sc->sc_dev)); 1343 return 1; 1344 } 1345 1346 if (fifost & FIFOS_TX_OVERRUN) { 1347 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1348 printf("%s: TX overrun\n", device_xname(&sc->sc_dev)); 1349 epreset(sc); 1350 return 0; 1351 } 1352 1353 return 0; 1354 } 1355 1356 1357 static void 1358 eptxstat(sc) 1359 struct ep_softc *sc; 1360 { 1361 bus_space_tag_t iot = sc->sc_iot; 1362 bus_space_handle_t ioh = sc->sc_ioh; 1363 int i; 1364 1365 /* 1366 * We need to read+write TX_STATUS until we get a 0 status 1367 * in order to turn off the interrupt flag. 1368 */ 1369 while ((i = bus_space_read_2(iot, ioh, 1370 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1371 bus_space_write_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1372 0x0); 1373 1374 if (i & TXS_JABBER) { 1375 ++sc->sc_ethercom.ec_if.if_oerrors; 1376 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1377 printf("%s: jabber (%x)\n", 1378 device_xname(&sc->sc_dev), i); 1379 epreset(sc); 1380 } else if (i & TXS_UNDERRUN) { 1381 ++sc->sc_ethercom.ec_if.if_oerrors; 1382 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1383 printf("%s: fifo underrun (%x) @%d\n", 1384 device_xname(&sc->sc_dev), i, 1385 sc->tx_start_thresh); 1386 if (sc->tx_succ_ok < 100) 1387 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1388 sc->tx_start_thresh + 20); 1389 sc->tx_succ_ok = 0; 1390 epreset(sc); 1391 } else if (i & TXS_MAX_COLLISION) { 1392 ++sc->sc_ethercom.ec_if.if_collisions; 1393 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1394 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1395 } else 1396 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1397 } 1398 } 1399 1400 int 1401 epintr(arg) 1402 void *arg; 1403 { 1404 struct ep_softc *sc = arg; 1405 bus_space_tag_t iot = sc->sc_iot; 1406 bus_space_handle_t ioh = sc->sc_ioh; 1407 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1408 u_int16_t status; 1409 int ret = 0; 1410 1411 if (sc->enabled == 0 || !device_is_active(&sc->sc_dev)) 1412 return (0); 1413 1414 1415 for (;;) { 1416 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1417 1418 if ((status & WATCHED_INTERRUPTS) == 0) { 1419 if ((status & INTR_LATCH) == 0) { 1420 #if 0 1421 printf("%s: intr latch cleared\n", 1422 device_xname(&sc->sc_dev)); 1423 #endif 1424 break; 1425 } 1426 } 1427 1428 ret = 1; 1429 1430 /* 1431 * Acknowledge any interrupts. It's important that we do this 1432 * first, since there would otherwise be a race condition. 1433 * Due to the i386 interrupt queueing, we may get spurious 1434 * interrupts occasionally. 1435 */ 1436 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1437 (status & (INTR_LATCH | ALL_INTERRUPTS))); 1438 1439 #if 0 1440 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1441 1442 printf("%s: intr%s%s%s%s\n", device_xname(&sc->sc_dev), 1443 (status & RX_COMPLETE)?" RX_COMPLETE":"", 1444 (status & TX_COMPLETE)?" TX_COMPLETE":"", 1445 (status & TX_AVAIL)?" TX_AVAIL":"", 1446 (status & CARD_FAILURE)?" CARD_FAILURE":""); 1447 #endif 1448 1449 if (status & RX_COMPLETE) { 1450 epread(sc); 1451 } 1452 if (status & TX_AVAIL) { 1453 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1454 epstart(&sc->sc_ethercom.ec_if); 1455 } 1456 if (status & CARD_FAILURE) { 1457 printf("%s: adapter failure (%x)\n", 1458 device_xname(&sc->sc_dev), status); 1459 #if 1 1460 epinit(ifp); 1461 #else 1462 epreset(sc); 1463 #endif 1464 return (1); 1465 } 1466 if (status & TX_COMPLETE) { 1467 eptxstat(sc); 1468 epstart(ifp); 1469 } 1470 1471 #if NRND > 0 1472 if (status) 1473 rnd_add_uint32(&sc->rnd_source, status); 1474 #endif 1475 } 1476 1477 /* no more interrupts */ 1478 return (ret); 1479 } 1480 1481 void 1482 epread(sc) 1483 struct ep_softc *sc; 1484 { 1485 bus_space_tag_t iot = sc->sc_iot; 1486 bus_space_handle_t ioh = sc->sc_ioh; 1487 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1488 struct mbuf *m; 1489 int len; 1490 1491 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1492 1493 again: 1494 if (ifp->if_flags & IFF_DEBUG) { 1495 int err = len & ERR_MASK; 1496 const char *s = NULL; 1497 1498 if (len & ERR_INCOMPLETE) 1499 s = "incomplete packet"; 1500 else if (err == ERR_OVERRUN) 1501 s = "packet overrun"; 1502 else if (err == ERR_RUNT) 1503 s = "runt packet"; 1504 else if (err == ERR_ALIGNMENT) 1505 s = "bad alignment"; 1506 else if (err == ERR_CRC) 1507 s = "bad crc"; 1508 else if (err == ERR_OVERSIZE) 1509 s = "oversized packet"; 1510 else if (err == ERR_DRIBBLE) 1511 s = "dribble bits"; 1512 1513 if (s) 1514 printf("%s: %s\n", device_xname(&sc->sc_dev), s); 1515 } 1516 1517 if (len & ERR_INCOMPLETE) 1518 return; 1519 1520 if (len & ERR_RX) { 1521 ++ifp->if_ierrors; 1522 goto abort; 1523 } 1524 1525 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1526 1527 /* Pull packet off interface. */ 1528 m = epget(sc, len); 1529 if (m == 0) { 1530 ifp->if_ierrors++; 1531 goto abort; 1532 } 1533 1534 ++ifp->if_ipackets; 1535 1536 #if NBPFILTER > 0 1537 /* 1538 * Check if there's a BPF listener on this interface. 1539 * If so, hand off the raw packet to BPF. 1540 */ 1541 if (ifp->if_bpf) 1542 bpf_mtap(ifp->if_bpf, m); 1543 #endif 1544 1545 (*ifp->if_input)(ifp, m); 1546 1547 /* 1548 * In periods of high traffic we can actually receive enough 1549 * packets so that the fifo overrun bit will be set at this point, 1550 * even though we just read a packet. In this case we 1551 * are not going to receive any more interrupts. We check for 1552 * this condition and read again until the fifo is not full. 1553 * We could simplify this test by not using epstatus(), but 1554 * rechecking the RX_STATUS register directly. This test could 1555 * result in unnecessary looping in cases where there is a new 1556 * packet but the fifo is not full, but it will not fix the 1557 * stuck behavior. 1558 * 1559 * Even with this improvement, we still get packet overrun errors 1560 * which are hurting performance. Maybe when I get some more time 1561 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1562 */ 1563 if (epstatus(sc)) { 1564 len = bus_space_read_2(iot, ioh, 1565 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1566 /* Check if we are stuck and reset [see XXX comment] */ 1567 if (len & ERR_INCOMPLETE) { 1568 if (ifp->if_flags & IFF_DEBUG) 1569 printf("%s: adapter reset\n", 1570 device_xname(&sc->sc_dev)); 1571 epreset(sc); 1572 return; 1573 } 1574 goto again; 1575 } 1576 1577 return; 1578 1579 abort: 1580 ep_discard_rxtop(iot, ioh); 1581 1582 } 1583 1584 struct mbuf * 1585 epget(sc, totlen) 1586 struct ep_softc *sc; 1587 int totlen; 1588 { 1589 bus_space_tag_t iot = sc->sc_iot; 1590 bus_space_handle_t ioh = sc->sc_ioh; 1591 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1592 struct mbuf *m; 1593 bus_size_t rxreg; 1594 int len, remaining; 1595 int s; 1596 void *newdata; 1597 u_long offset; 1598 1599 m = sc->mb[sc->next_mb]; 1600 sc->mb[sc->next_mb] = 0; 1601 if (m == 0) { 1602 MGETHDR(m, M_DONTWAIT, MT_DATA); 1603 if (m == 0) 1604 return 0; 1605 } else { 1606 /* If the queue is no longer full, refill. */ 1607 if (sc->last_mb == sc->next_mb) 1608 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1609 1610 /* Convert one of our saved mbuf's. */ 1611 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1612 m->m_data = m->m_pktdat; 1613 m->m_flags = M_PKTHDR; 1614 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr)); 1615 } 1616 m->m_pkthdr.rcvif = ifp; 1617 m->m_pkthdr.len = totlen; 1618 len = MHLEN; 1619 1620 /* 1621 * Allocate big enough space to hold whole packet, to avoid 1622 * allocating new mbufs on splsched(). 1623 */ 1624 if (totlen + ALIGNBYTES > len) { 1625 if (totlen + ALIGNBYTES > MCLBYTES) { 1626 len = ALIGN(totlen + ALIGNBYTES); 1627 MEXTMALLOC(m, len, M_DONTWAIT); 1628 } else { 1629 len = MCLBYTES; 1630 MCLGET(m, M_DONTWAIT); 1631 } 1632 if ((m->m_flags & M_EXT) == 0) { 1633 m_free(m); 1634 return 0; 1635 } 1636 } 1637 1638 /* align the struct ip header */ 1639 newdata = (char *)ALIGN(m->m_data + sizeof(struct ether_header)) 1640 - sizeof(struct ether_header); 1641 m->m_data = newdata; 1642 m->m_len = totlen; 1643 1644 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1645 remaining = totlen; 1646 offset = mtod(m, u_long); 1647 1648 /* 1649 * We read the packet at a high interrupt priority level so that 1650 * an interrupt from another device won't cause the card's packet 1651 * buffer to overflow. We choose splsched() since that blocks 1652 * essentially everything except for interrupts from serial 1653 * devices (which typically lose data if their interrupt isn't 1654 * serviced fast enough). 1655 * 1656 * XXX THIS CAN CAUSE CLOCK DRIFT! 1657 */ 1658 s = splsched(); 1659 1660 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1661 /* 1662 * Prime the FIFO buffer counter (number of 16-bit 1663 * words about to be read from the FIFO). 1664 * 1665 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1666 * COUNTER IS NON-ZERO! 1667 */ 1668 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1669 } 1670 1671 if (ELINK_IS_BUS_32(sc->bustype)) { 1672 /* 1673 * Read bytes up to the point where we are aligned. 1674 * (We can align to 4 bytes, rather than ALIGNBYTES, 1675 * here because we're later reading 4-byte chunks.) 1676 */ 1677 if ((remaining > 3) && (offset & 3)) { 1678 int count = (4 - (offset & 3)); 1679 bus_space_read_multi_1(iot, ioh, 1680 rxreg, (u_int8_t *) offset, count); 1681 offset += count; 1682 remaining -= count; 1683 } 1684 if (remaining > 3) { 1685 bus_space_read_multi_stream_4(iot, ioh, 1686 rxreg, (u_int32_t *) offset, 1687 remaining >> 2); 1688 offset += remaining & ~3; 1689 remaining &= 3; 1690 } 1691 if (remaining) { 1692 bus_space_read_multi_1(iot, ioh, 1693 rxreg, (u_int8_t *) offset, remaining); 1694 } 1695 } else { 1696 if ((remaining > 1) && (offset & 1)) { 1697 bus_space_read_multi_1(iot, ioh, 1698 rxreg, (u_int8_t *) offset, 1); 1699 remaining -= 1; 1700 offset += 1; 1701 } 1702 if (remaining > 1) { 1703 bus_space_read_multi_stream_2(iot, ioh, 1704 rxreg, (u_int16_t *) offset, 1705 remaining >> 1); 1706 offset += remaining & ~1; 1707 } 1708 if (remaining & 1) { 1709 bus_space_read_multi_1(iot, ioh, 1710 rxreg, (u_int8_t *) offset, remaining & 1); 1711 } 1712 } 1713 1714 ep_discard_rxtop(iot, ioh); 1715 1716 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1717 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1718 splx(s); 1719 1720 return (m); 1721 } 1722 1723 int 1724 epioctl(ifp, cmd, data) 1725 struct ifnet *ifp; 1726 u_long cmd; 1727 void *data; 1728 { 1729 struct ep_softc *sc = ifp->if_softc; 1730 struct ifreq *ifr = (struct ifreq *)data; 1731 int s, error = 0; 1732 1733 s = splnet(); 1734 1735 switch (cmd) { 1736 1737 case SIOCSIFMEDIA: 1738 case SIOCGIFMEDIA: 1739 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1740 break; 1741 1742 case SIOCADDMULTI: 1743 case SIOCDELMULTI: 1744 if (sc->enabled == 0) { 1745 error = EIO; 1746 break; 1747 } 1748 1749 default: 1750 error = ether_ioctl(ifp, cmd, data); 1751 1752 if (error == ENETRESET) { 1753 /* 1754 * Multicast list has changed; set the hardware filter 1755 * accordingly. 1756 */ 1757 if (ifp->if_flags & IFF_RUNNING) 1758 epreset(sc); 1759 error = 0; 1760 } 1761 break; 1762 } 1763 1764 splx(s); 1765 return (error); 1766 } 1767 1768 void 1769 epreset(sc) 1770 struct ep_softc *sc; 1771 { 1772 int s; 1773 1774 s = splnet(); 1775 epinit(&sc->sc_ethercom.ec_if); 1776 splx(s); 1777 } 1778 1779 void 1780 epwatchdog(ifp) 1781 struct ifnet *ifp; 1782 { 1783 struct ep_softc *sc = ifp->if_softc; 1784 1785 log(LOG_ERR, "%s: device timeout\n", device_xname(&sc->sc_dev)); 1786 ++sc->sc_ethercom.ec_if.if_oerrors; 1787 1788 epreset(sc); 1789 } 1790 1791 void 1792 epstop(ifp, disable) 1793 struct ifnet *ifp; 1794 int disable; 1795 { 1796 struct ep_softc *sc = ifp->if_softc; 1797 bus_space_tag_t iot = sc->sc_iot; 1798 bus_space_handle_t ioh = sc->sc_ioh; 1799 1800 if (sc->ep_flags & ELINK_FLAGS_MII) { 1801 /* Stop the one second clock. */ 1802 callout_stop(&sc->sc_mbuf_callout); 1803 1804 /* Down the MII. */ 1805 mii_down(&sc->sc_mii); 1806 } 1807 1808 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1809 /* 1810 * Clear the FIFO buffer count, thus halting 1811 * any currently-running transactions. 1812 */ 1813 GO_WINDOW(1); /* sanity */ 1814 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1815 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1816 } 1817 1818 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1819 ep_discard_rxtop(iot, ioh); 1820 1821 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1822 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1823 1824 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1825 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1826 1827 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1828 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1829 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1830 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1831 1832 epmbufempty(sc); 1833 1834 if (disable) 1835 epdisable(sc); 1836 1837 ifp->if_flags &= ~IFF_RUNNING; 1838 } 1839 1840 1841 /* 1842 * Before reboots, reset card completely. 1843 */ 1844 static void 1845 epshutdown(arg) 1846 void *arg; 1847 { 1848 struct ep_softc *sc = arg; 1849 int s = splnet(); 1850 1851 if (sc->enabled) { 1852 epstop(&sc->sc_ethercom.ec_if, 0); 1853 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1854 epdisable(sc); 1855 sc->enabled = 0; 1856 } 1857 splx(s); 1858 } 1859 1860 /* 1861 * We get eeprom data from the id_port given an offset into the 1862 * eeprom. Basically; after the ID_sequence is sent to all of 1863 * the cards; they enter the ID_CMD state where they will accept 1864 * command requests. 0x80-0xbf loads the eeprom data. We then 1865 * read the port 16 times and with every read; the cards check 1866 * for contention (ie: if one card writes a 0 bit and another 1867 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1868 * each card compares the data on the bus; if there is a difference 1869 * then that card goes into ID_WAIT state again). In the meantime; 1870 * one bit of data is returned in the AX register which is conveniently 1871 * returned to us by bus_space_read_2(). Hence; we read 16 times getting one 1872 * bit of data with each read. 1873 * 1874 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1875 */ 1876 u_int16_t 1877 epreadeeprom(iot, ioh, offset) 1878 bus_space_tag_t iot; 1879 bus_space_handle_t ioh; 1880 int offset; 1881 { 1882 u_int16_t data = 0; 1883 int i; 1884 1885 bus_space_write_2(iot, ioh, 0, 0x80 + offset); 1886 delay(1000); 1887 for (i = 0; i < 16; i++) 1888 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1889 return (data); 1890 } 1891 1892 static int 1893 epbusyeeprom(sc) 1894 struct ep_softc *sc; 1895 { 1896 bus_space_tag_t iot = sc->sc_iot; 1897 bus_space_handle_t ioh = sc->sc_ioh; 1898 bus_size_t eecmd; 1899 int i = 100, j; 1900 uint16_t busybit; 1901 1902 if (sc->bustype == ELINK_BUS_PCMCIA) { 1903 delay(1000); 1904 return 0; 1905 } 1906 1907 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1908 eecmd = CORK_ASIC_EEPROM_COMMAND; 1909 busybit = CORK_EEPROM_BUSY; 1910 } else { 1911 eecmd = ELINK_W0_EEPROM_COMMAND; 1912 busybit = EEPROM_BUSY; 1913 } 1914 1915 j = 0; /* bad GCC flow analysis */ 1916 while (i--) { 1917 j = bus_space_read_2(iot, ioh, eecmd); 1918 if (j & busybit) 1919 delay(100); 1920 else 1921 break; 1922 } 1923 if (i == 0) { 1924 aprint_normal("\n"); 1925 aprint_error_dev(&sc->sc_dev, "eeprom failed to come ready\n"); 1926 return (1); 1927 } 1928 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW && 1929 (j & EEPROM_TST_MODE) != 0) { 1930 /* XXX PnP mode? */ 1931 printf("\n%s: erase pencil mark!\n", device_xname(&sc->sc_dev)); 1932 return (1); 1933 } 1934 return (0); 1935 } 1936 1937 u_int16_t 1938 ep_read_eeprom(sc, offset) 1939 struct ep_softc *sc; 1940 u_int16_t offset; 1941 { 1942 bus_size_t eecmd, eedata; 1943 u_int16_t readcmd; 1944 1945 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1946 eecmd = CORK_ASIC_EEPROM_COMMAND; 1947 eedata = CORK_ASIC_EEPROM_DATA; 1948 } else { 1949 eecmd = ELINK_W0_EEPROM_COMMAND; 1950 eedata = ELINK_W0_EEPROM_DATA; 1951 } 1952 1953 /* 1954 * RoadRunner has a larger EEPROM, so a different read command 1955 * is required. 1956 */ 1957 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1958 readcmd = READ_EEPROM_RR; 1959 else 1960 readcmd = READ_EEPROM; 1961 1962 if (epbusyeeprom(sc)) 1963 return (0); /* XXX why is eeprom busy? */ 1964 1965 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset); 1966 1967 if (epbusyeeprom(sc)) 1968 return (0); /* XXX why is eeprom busy? */ 1969 1970 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata)); 1971 } 1972 1973 void 1974 epmbuffill(v) 1975 void *v; 1976 { 1977 struct ep_softc *sc = v; 1978 struct mbuf *m; 1979 int s, i; 1980 1981 s = splnet(); 1982 i = sc->last_mb; 1983 do { 1984 if (sc->mb[i] == 0) { 1985 MGET(m, M_DONTWAIT, MT_DATA); 1986 if (m == 0) 1987 break; 1988 sc->mb[i] = m; 1989 } 1990 i = (i + 1) % MAX_MBS; 1991 } while (i != sc->next_mb); 1992 sc->last_mb = i; 1993 /* If the queue was not filled, try again. */ 1994 if (sc->last_mb != sc->next_mb) 1995 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1996 splx(s); 1997 } 1998 1999 void 2000 epmbufempty(sc) 2001 struct ep_softc *sc; 2002 { 2003 int s, i; 2004 2005 s = splnet(); 2006 for (i = 0; i<MAX_MBS; i++) { 2007 if (sc->mb[i]) { 2008 m_freem(sc->mb[i]); 2009 sc->mb[i] = NULL; 2010 } 2011 } 2012 sc->last_mb = sc->next_mb = 0; 2013 callout_stop(&sc->sc_mbuf_callout); 2014 splx(s); 2015 } 2016 2017 int 2018 epenable(sc) 2019 struct ep_softc *sc; 2020 { 2021 2022 if (sc->enabled == 0 && sc->enable != NULL) { 2023 if ((*sc->enable)(sc) != 0) { 2024 aprint_error_dev(&sc->sc_dev, "device enable failed\n"); 2025 return (EIO); 2026 } 2027 } 2028 2029 sc->enabled = 1; 2030 return (0); 2031 } 2032 2033 void 2034 epdisable(sc) 2035 struct ep_softc *sc; 2036 { 2037 2038 if (sc->enabled != 0 && sc->disable != NULL) { 2039 (*sc->disable)(sc); 2040 sc->enabled = 0; 2041 } 2042 } 2043 2044 /* 2045 * ep_activate: 2046 * 2047 * Handle device activation/deactivation requests. 2048 */ 2049 int 2050 ep_activate(self, act) 2051 struct device *self; 2052 enum devact act; 2053 { 2054 struct ep_softc *sc = (struct ep_softc *)self; 2055 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2056 int error = 0, s; 2057 2058 s = splnet(); 2059 switch (act) { 2060 case DVACT_ACTIVATE: 2061 error = EOPNOTSUPP; 2062 break; 2063 2064 case DVACT_DEACTIVATE: 2065 if (sc->ep_flags & ELINK_FLAGS_MII) 2066 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2067 MII_OFFSET_ANY); 2068 if_deactivate(ifp); 2069 break; 2070 } 2071 splx(s); 2072 return (error); 2073 } 2074 2075 /* 2076 * ep_detach: 2077 * 2078 * Detach a elink3 interface. 2079 */ 2080 int 2081 ep_detach(struct device *self, int flags) 2082 { 2083 struct ep_softc *sc = (struct ep_softc *)self; 2084 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2085 2086 /* Succeed now if there's no work to do. */ 2087 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2088 return (0); 2089 2090 epdisable(sc); 2091 2092 callout_stop(&sc->sc_mii_callout); 2093 callout_stop(&sc->sc_mbuf_callout); 2094 2095 if (sc->ep_flags & ELINK_FLAGS_MII) { 2096 /* Detach all PHYs */ 2097 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2098 } 2099 2100 /* Delete all remaining media. */ 2101 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2102 2103 #if NRND > 0 2104 rnd_detach_source(&sc->rnd_source); 2105 #endif 2106 ether_ifdetach(ifp); 2107 if_detach(ifp); 2108 2109 shutdownhook_disestablish(sc->sd_hook); 2110 2111 return (0); 2112 } 2113 2114 u_int32_t 2115 ep_mii_bitbang_read(self) 2116 struct device *self; 2117 { 2118 struct ep_softc *sc = (void *) self; 2119 2120 /* We're already in Window 4. */ 2121 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2122 ELINK_W4_BOOM_PHYSMGMT)); 2123 } 2124 2125 void 2126 ep_mii_bitbang_write(self, val) 2127 struct device *self; 2128 u_int32_t val; 2129 { 2130 struct ep_softc *sc = (void *) self; 2131 2132 /* We're already in Window 4. */ 2133 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2134 ELINK_W4_BOOM_PHYSMGMT, val); 2135 } 2136 2137 int 2138 ep_mii_readreg(self, phy, reg) 2139 struct device *self; 2140 int phy, reg; 2141 { 2142 struct ep_softc *sc = (void *) self; 2143 int val; 2144 2145 GO_WINDOW(4); 2146 2147 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2148 2149 GO_WINDOW(1); 2150 2151 return (val); 2152 } 2153 2154 void 2155 ep_mii_writereg(self, phy, reg, val) 2156 struct device *self; 2157 int phy, reg, val; 2158 { 2159 struct ep_softc *sc = (void *) self; 2160 2161 GO_WINDOW(4); 2162 2163 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2164 2165 GO_WINDOW(1); 2166 } 2167 2168 void 2169 ep_statchg(self) 2170 struct device *self; 2171 { 2172 struct ep_softc *sc = (struct ep_softc *)self; 2173 bus_space_tag_t iot = sc->sc_iot; 2174 bus_space_handle_t ioh = sc->sc_ioh; 2175 int mctl; 2176 2177 GO_WINDOW(3); 2178 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2179 if (sc->sc_mii.mii_media_active & IFM_FDX) 2180 mctl |= MAC_CONTROL_FDX; 2181 else 2182 mctl &= ~MAC_CONTROL_FDX; 2183 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2184 GO_WINDOW(1); /* back to operating window */ 2185 } 2186 2187 void 2188 ep_power(int why, void *arg) 2189 { 2190 struct ep_softc *sc = arg; 2191 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2192 int s; 2193 2194 s = splnet(); 2195 switch (why) { 2196 case PWR_SUSPEND: 2197 case PWR_STANDBY: 2198 epstop(ifp, 1); 2199 break; 2200 case PWR_RESUME: 2201 if (ifp->if_flags & IFF_UP) { 2202 (void)epinit(ifp); 2203 } 2204 break; 2205 case PWR_SOFTSUSPEND: 2206 case PWR_SOFTSTANDBY: 2207 case PWR_SOFTRESUME: 2208 break; 2209 } 2210 splx(s); 2211 } 2212
Indexes created Fri Sep 26 20:09:58 GMT 2025