elink3.c revision 1.127
1 /* $NetBSD: elink3.c,v 1.127 2008/08/27 05:33:47 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 35 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by Herb Peyerl. 49 * 4. The name of Herb Peyerl may not be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 #include <sys/cdefs.h> 65 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.127 2008/08/27 05:33:47 christos Exp $"); 66 67 #include "opt_inet.h" 68 #include "bpfilter.h" 69 #include "rnd.h" 70 71 #include <sys/param.h> 72 #include <sys/systm.h> 73 #include <sys/callout.h> 74 #include <sys/kernel.h> 75 #include <sys/mbuf.h> 76 #include <sys/socket.h> 77 #include <sys/ioctl.h> 78 #include <sys/errno.h> 79 #include <sys/syslog.h> 80 #include <sys/select.h> 81 #include <sys/device.h> 82 #if NRND > 0 83 #include <sys/rnd.h> 84 #endif 85 86 #include <net/if.h> 87 #include <net/if_dl.h> 88 #include <net/if_ether.h> 89 #include <net/if_media.h> 90 91 #if NBPFILTER > 0 92 #include <net/bpf.h> 93 #include <net/bpfdesc.h> 94 #endif 95 96 #include <sys/cpu.h> 97 #include <sys/bus.h> 98 #include <sys/intr.h> 99 100 #include <dev/mii/mii.h> 101 #include <dev/mii/miivar.h> 102 #include <dev/mii/mii_bitbang.h> 103 104 #include <dev/ic/elink3var.h> 105 #include <dev/ic/elink3reg.h> 106 107 #ifdef DEBUG 108 int epdebug = 0; 109 #endif 110 111 /* 112 * XXX endian workaround for big-endian CPUs with pcmcia: 113 * if stream methods for bus_space_multi are not provided, define them 114 * using non-stream bus_space_{read,write}_multi_. 115 * Assumes host CPU is same endian-ness as bus. 116 */ 117 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 118 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 119 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 120 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 121 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 122 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 123 124 /* 125 * Structure to map media-present bits in boards to ifmedia codes and 126 * printable media names. Used for table-driven ifmedia initialization. 127 */ 128 struct ep_media { 129 int epm_mpbit; /* media present bit */ 130 const char *epm_name; /* name of medium */ 131 int epm_ifmedia; /* ifmedia word for medium */ 132 int epm_epmedia; /* ELINKMEDIA_* constant */ 133 }; 134 135 /* 136 * Media table for the Demon/Vortex/Boomerang chipsets. 137 * 138 * Note that MII on the Demon and Vortex (3c59x) indicates an external 139 * MII connector (for connecting an external PHY) ... I think. Treat 140 * it as `manual' on these chips. 141 * 142 * Any Boomerang (3c90x) chips with MII really do have an internal 143 * MII and real PHYs attached; no `native' media. 144 */ 145 const struct ep_media ep_vortex_media[] = { 146 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 147 ELINKMEDIA_10BASE_T }, 148 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 149 ELINKMEDIA_10BASE_T }, 150 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 151 ELINKMEDIA_AUI }, 152 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 153 ELINKMEDIA_10BASE_2 }, 154 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 155 ELINKMEDIA_100BASE_TX }, 156 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 157 ELINKMEDIA_100BASE_TX }, 158 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 159 ELINKMEDIA_100BASE_FX }, 160 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 161 ELINKMEDIA_MII }, 162 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 163 ELINKMEDIA_100BASE_T4 }, 164 { 0, NULL, 0, 165 0 }, 166 }; 167 168 /* 169 * Media table for the older 3Com Etherlink III chipset, used 170 * in the 3c509, 3c579, and 3c589. 171 */ 172 const struct ep_media ep_509_media[] = { 173 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 174 ELINKMEDIA_10BASE_T }, 175 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 176 ELINKMEDIA_AUI }, 177 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 178 ELINKMEDIA_10BASE_2 }, 179 { 0, NULL, 0, 180 0 }, 181 }; 182 183 void ep_internalconfig(struct ep_softc *sc); 184 void ep_vortex_probemedia(struct ep_softc *sc); 185 void ep_509_probemedia(struct ep_softc *sc); 186 187 static void eptxstat(struct ep_softc *); 188 static int epstatus(struct ep_softc *); 189 int epinit(struct ifnet *); 190 void epstop(struct ifnet *, int); 191 int epioctl(struct ifnet *, u_long, void *); 192 void epstart(struct ifnet *); 193 void epwatchdog(struct ifnet *); 194 void epreset(struct ep_softc *); 195 static void epshutdown(void *); 196 void epread(struct ep_softc *); 197 struct mbuf *epget(struct ep_softc *, int); 198 void epmbuffill(void *); 199 void epmbufempty(struct ep_softc *); 200 void epsetfilter(struct ep_softc *); 201 void ep_roadrunner_mii_enable(struct ep_softc *); 202 void epsetmedia(struct ep_softc *); 203 204 /* ifmedia callbacks */ 205 int ep_media_change(struct ifnet *ifp); 206 void ep_media_status(struct ifnet *ifp, struct ifmediareq *req); 207 208 /* MII callbacks */ 209 int ep_mii_readreg(device_t, int, int); 210 void ep_mii_writereg(device_t, int, int, int); 211 void ep_statchg(device_t); 212 213 void ep_tick(void *); 214 215 static int epbusyeeprom(struct ep_softc *); 216 u_int16_t ep_read_eeprom(struct ep_softc *, u_int16_t); 217 static inline void ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg); 218 static inline void ep_finish_reset(bus_space_tag_t, bus_space_handle_t); 219 static inline void ep_discard_rxtop(bus_space_tag_t, bus_space_handle_t); 220 static inline int ep_w1_reg(struct ep_softc *, int); 221 222 /* 223 * MII bit-bang glue. 224 */ 225 u_int32_t ep_mii_bitbang_read(device_t); 226 void ep_mii_bitbang_write(device_t, u_int32_t); 227 228 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 229 ep_mii_bitbang_read, 230 ep_mii_bitbang_write, 231 { 232 PHYSMGMT_DATA, /* MII_BIT_MDO */ 233 PHYSMGMT_DATA, /* MII_BIT_MDI */ 234 PHYSMGMT_CLK, /* MII_BIT_MDC */ 235 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 236 0, /* MII_BIT_DIR_PHY_HOST */ 237 } 238 }; 239 240 /* 241 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 242 * Window 1 registers offset! 243 */ 244 static inline int 245 ep_w1_reg(struct ep_softc *sc, int reg) 246 { 247 248 switch (sc->ep_chipset) { 249 case ELINK_CHIPSET_CORKSCREW: 250 return (reg + 0x10); 251 252 case ELINK_CHIPSET_ROADRUNNER: 253 switch (reg) { 254 case ELINK_W1_FREE_TX: 255 case ELINK_W1_RUNNER_RDCTL: 256 case ELINK_W1_RUNNER_WRCTL: 257 return (reg); 258 } 259 return (reg + 0x10); 260 } 261 262 return (reg); 263 } 264 265 /* 266 * Wait for any pending reset to complete. 267 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 268 * but older hardware doesn't implement it and we must delay. 269 */ 270 static inline void 271 ep_finish_reset(bus_space_tag_t iot, bus_space_handle_t ioh) 272 { 273 int i; 274 275 for (i = 0; i < 10000; i++) { 276 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 277 COMMAND_IN_PROGRESS) == 0) 278 break; 279 DELAY(10); 280 } 281 } 282 283 /* 284 * Issue a (reset) command, and be sure it has completed. 285 * Used for global reset, TX_RESET, RX_RESET. 286 */ 287 static inline void 288 ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg) 289 { 290 bus_space_tag_t iot = sc->sc_iot; 291 bus_space_handle_t ioh = sc->sc_ioh; 292 293 bus_space_write_2(iot, ioh, cmd, arg); 294 ep_finish_reset(iot, ioh); 295 } 296 297 298 static inline void 299 ep_discard_rxtop(bus_space_tag_t iot, bus_space_handle_t ioh) 300 { 301 int i; 302 303 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 304 305 /* 306 * Spin for about 1 msec, to avoid forcing a DELAY() between 307 * every received packet (adding latency and limiting pkt-recv rate). 308 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 309 * is about right. 310 */ 311 for (i = 0; i < 8000; i++) { 312 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 313 COMMAND_IN_PROGRESS) == 0) 314 return; 315 } 316 317 /* Didn't complete in a hurry. Do DELAY()s. */ 318 ep_finish_reset(iot, ioh); 319 } 320 321 /* 322 * Back-end attach and configure. 323 */ 324 int 325 epconfig(struct ep_softc *sc, u_short chipset, u_int8_t *enaddr) 326 { 327 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 328 bus_space_tag_t iot = sc->sc_iot; 329 bus_space_handle_t ioh = sc->sc_ioh; 330 u_int16_t i; 331 u_int8_t myla[ETHER_ADDR_LEN]; 332 333 callout_init(&sc->sc_mii_callout, 0); 334 callout_init(&sc->sc_mbuf_callout, 0); 335 336 sc->ep_chipset = chipset; 337 338 /* 339 * We could have been groveling around in other register 340 * windows in the front-end; make sure we're in window 0 341 * to read the EEPROM. 342 */ 343 GO_WINDOW(0); 344 345 if (enaddr == NULL) { 346 /* 347 * Read the station address from the eeprom. 348 */ 349 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 350 u_int16_t x = ep_read_eeprom(sc, i); 351 myla[(i << 1)] = x >> 8; 352 myla[(i << 1) + 1] = x; 353 } 354 enaddr = myla; 355 } 356 357 /* 358 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 359 * allow FDDI-sized (4500) byte packets. Commands only take an 360 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 361 * packet length. 362 * Commands to these cards implicitly upshift a packet size 363 * or threshold by 2 bits. 364 * To detect cards with large-packet support, we probe by setting 365 * the transmit threshold register, then change windows and 366 * read back the threshold register directly, and see if the 367 * threshold value was shifted or not. 368 */ 369 bus_space_write_2(iot, ioh, ELINK_COMMAND, 370 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 371 GO_WINDOW(5); 372 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 373 GO_WINDOW(1); 374 switch (i) { 375 case ELINK_LARGEWIN_PROBE: 376 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 377 sc->ep_pktlenshift = 0; 378 break; 379 380 case (ELINK_LARGEWIN_PROBE << 2): 381 sc->ep_pktlenshift = 2; 382 break; 383 384 default: 385 aprint_error_dev(sc->sc_dev, 386 "wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 387 "Interface disabled\n", 388 ELINK_LARGEWIN_PROBE, (int) i); 389 return (1); 390 } 391 392 /* 393 * Ensure Tx-available interrupts are enabled for 394 * start the interface. 395 * XXX should be in epinit()? 396 */ 397 bus_space_write_2(iot, ioh, ELINK_COMMAND, 398 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 399 400 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 401 ifp->if_softc = sc; 402 ifp->if_start = epstart; 403 ifp->if_ioctl = epioctl; 404 ifp->if_watchdog = epwatchdog; 405 ifp->if_init = epinit; 406 ifp->if_stop = epstop; 407 ifp->if_flags = 408 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 409 IFQ_SET_READY(&ifp->if_snd); 410 411 if_attach(ifp); 412 ether_ifattach(ifp, enaddr); 413 414 /* 415 * Finish configuration: 416 * determine chipset if the front-end couldn't do so, 417 * show board details, set media. 418 */ 419 420 /* 421 * Print RAM size. We also print the Ethernet address in here. 422 * It's extracted from the ifp, so we have to make sure it's 423 * been attached first. 424 */ 425 ep_internalconfig(sc); 426 GO_WINDOW(0); 427 428 /* 429 * Display some additional information, if pertinent. 430 */ 431 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 432 aprint_normal_dev(sc->sc_dev, "RoadRunner FIFO buffer enabled\n"); 433 434 /* 435 * Initialize our media structures and MII info. We'll 436 * probe the MII if we discover that we have one. 437 */ 438 sc->sc_mii.mii_ifp = ifp; 439 sc->sc_mii.mii_readreg = ep_mii_readreg; 440 sc->sc_mii.mii_writereg = ep_mii_writereg; 441 sc->sc_mii.mii_statchg = ep_statchg; 442 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, ep_media_change, 443 ep_media_status); 444 445 /* 446 * All CORKSCREW chips have MII. 447 */ 448 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) 449 sc->ep_flags |= ELINK_FLAGS_MII; 450 451 /* 452 * Now, determine which media we have. 453 */ 454 switch (sc->ep_chipset) { 455 case ELINK_CHIPSET_ROADRUNNER: 456 if (sc->ep_flags & ELINK_FLAGS_MII) { 457 ep_roadrunner_mii_enable(sc); 458 GO_WINDOW(0); 459 } 460 /* FALLTHROUGH */ 461 462 case ELINK_CHIPSET_CORKSCREW: 463 case ELINK_CHIPSET_BOOMERANG: 464 /* 465 * If the device has MII, probe it. We won't be using 466 * any `native' media in this case, only PHYs. If 467 * we don't, just treat the Boomerang like the Vortex. 468 */ 469 if (sc->ep_flags & ELINK_FLAGS_MII) { 470 mii_attach(sc->sc_dev, &sc->sc_mii, 0xffffffff, 471 MII_PHY_ANY, MII_OFFSET_ANY, 0); 472 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 473 ifmedia_add(&sc->sc_mii.mii_media, 474 IFM_ETHER|IFM_NONE, 0, NULL); 475 ifmedia_set(&sc->sc_mii.mii_media, 476 IFM_ETHER|IFM_NONE); 477 } else { 478 ifmedia_set(&sc->sc_mii.mii_media, 479 IFM_ETHER|IFM_AUTO); 480 } 481 break; 482 } 483 /* FALLTHROUGH */ 484 485 case ELINK_CHIPSET_VORTEX: 486 ep_vortex_probemedia(sc); 487 break; 488 489 default: 490 ep_509_probemedia(sc); 491 break; 492 } 493 494 GO_WINDOW(1); /* Window 1 is operating window */ 495 496 #if NRND > 0 497 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 498 RND_TYPE_NET, 0); 499 #endif 500 501 sc->tx_start_thresh = 20; /* probably a good starting point. */ 502 503 /* Establish callback to reset card when we reboot. */ 504 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 505 506 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 507 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 508 509 /* The attach is successful. */ 510 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 511 return (0); 512 } 513 514 515 /* 516 * Show interface-model-independent info from window 3 517 * internal-configuration register. 518 */ 519 void 520 ep_internalconfig(struct ep_softc *sc) 521 { 522 bus_space_tag_t iot = sc->sc_iot; 523 bus_space_handle_t ioh = sc->sc_ioh; 524 525 u_int config0; 526 u_int config1; 527 528 int ram_size, ram_width, ram_split; 529 /* 530 * NVRAM buffer Rx:Tx config names for busmastering cards 531 * (Demon, Vortex, and later). 532 */ 533 const char *const onboard_ram_config[] = { 534 "5:3", "3:1", "1:1", "3:5" }; 535 536 GO_WINDOW(3); 537 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 538 config1 = (u_int)bus_space_read_2(iot, ioh, 539 ELINK_W3_INTERNAL_CONFIG + 2); 540 GO_WINDOW(0); 541 542 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 543 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 544 545 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 546 547 aprint_normal_dev(sc->sc_dev, "address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 548 ether_sprintf(CLLADDR(sc->sc_ethercom.ec_if.if_sadl)), 549 8 << ram_size, 550 (ram_width) ? "word" : "byte", 551 onboard_ram_config[ram_split]); 552 } 553 554 555 /* 556 * Find supported media on 3c509-generation hardware that doesn't have 557 * a "reset_options" register in window 3. 558 * Use the config_cntrl register in window 0 instead. 559 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 560 * that implement CONFIG_CTRL. We don't have a good way to set the 561 * default active medium; punt to ifconfig instead. 562 */ 563 void 564 ep_509_probemedia(struct ep_softc *sc) 565 { 566 bus_space_tag_t iot = sc->sc_iot; 567 bus_space_handle_t ioh = sc->sc_ioh; 568 struct ifmedia *ifm = &sc->sc_mii.mii_media; 569 u_int16_t ep_w0_config, port; 570 const struct ep_media *epm; 571 const char *sep = "", *defmedianame = NULL; 572 int defmedia = 0; 573 574 GO_WINDOW(0); 575 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 576 577 aprint_normal_dev(sc->sc_dev, ""); 578 579 /* Sanity check that there are any media! */ 580 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 581 aprint_error("no media present!\n"); 582 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 583 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 584 return; 585 } 586 587 /* 588 * Get the default media from the EEPROM. 589 */ 590 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 591 592 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 593 594 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 595 if (ep_w0_config & epm->epm_mpbit) { 596 /* 597 * This simple test works because 509 chipsets 598 * don't do full-duplex. 599 */ 600 if (epm->epm_epmedia == port || defmedia == 0) { 601 defmedia = epm->epm_ifmedia; 602 defmedianame = epm->epm_name; 603 } 604 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 605 NULL); 606 PRINT(epm->epm_name); 607 } 608 } 609 610 #undef PRINT 611 612 #ifdef DIAGNOSTIC 613 if (defmedia == 0) 614 panic("ep_509_probemedia: impossible"); 615 #endif 616 617 aprint_normal(" (default %s)\n", defmedianame); 618 ifmedia_set(ifm, defmedia); 619 } 620 621 /* 622 * Find media present on large-packet-capable elink3 devices. 623 * Show onboard configuration of large-packet-capable elink3 devices 624 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 625 * Use media and card-version info in window 3 instead. 626 */ 627 void 628 ep_vortex_probemedia(struct ep_softc *sc) 629 { 630 bus_space_tag_t iot = sc->sc_iot; 631 bus_space_handle_t ioh = sc->sc_ioh; 632 struct ifmedia *ifm = &sc->sc_mii.mii_media; 633 const struct ep_media *epm; 634 u_int config1; 635 int reset_options; 636 int default_media; /* 3-bit encoding of default (EEPROM) media */ 637 int defmedia = 0; 638 const char *sep = "", *defmedianame = NULL; 639 640 GO_WINDOW(3); 641 config1 = (u_int)bus_space_read_2(iot, ioh, 642 ELINK_W3_INTERNAL_CONFIG + 2); 643 reset_options = (int)bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 644 GO_WINDOW(0); 645 646 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 647 648 aprint_normal_dev(sc->sc_dev, ""); 649 650 /* Sanity check that there are any media! */ 651 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 652 aprint_error("no media present!\n"); 653 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 654 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 655 return; 656 } 657 658 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 659 660 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 661 if (reset_options & epm->epm_mpbit) { 662 /* 663 * Default media is a little more complicated 664 * on the Vortex. We support full-duplex which 665 * uses the same reset options bit. 666 * 667 * XXX Check EEPROM for default to FDX? 668 */ 669 if (epm->epm_epmedia == default_media) { 670 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 671 defmedia = epm->epm_ifmedia; 672 defmedianame = epm->epm_name; 673 } 674 } else if (defmedia == 0) { 675 defmedia = epm->epm_ifmedia; 676 defmedianame = epm->epm_name; 677 } 678 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 679 NULL); 680 PRINT(epm->epm_name); 681 } 682 } 683 684 #undef PRINT 685 686 #ifdef DIAGNOSTIC 687 if (defmedia == 0) 688 panic("ep_vortex_probemedia: impossible"); 689 #endif 690 691 aprint_normal(" (default %s)\n", defmedianame); 692 ifmedia_set(ifm, defmedia); 693 } 694 695 /* 696 * One second timer, used to tick the MII. 697 */ 698 void 699 ep_tick(void *arg) 700 { 701 struct ep_softc *sc = arg; 702 int s; 703 704 #ifdef DIAGNOSTIC 705 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 706 panic("ep_tick"); 707 #endif 708 709 if (!device_is_active(sc->sc_dev)) 710 return; 711 712 s = splnet(); 713 mii_tick(&sc->sc_mii); 714 splx(s); 715 716 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 717 } 718 719 /* 720 * Bring device up. 721 * 722 * The order in here seems important. Otherwise we may not receive 723 * interrupts. ?! 724 */ 725 int 726 epinit(struct ifnet *ifp) 727 { 728 struct ep_softc *sc = ifp->if_softc; 729 bus_space_tag_t iot = sc->sc_iot; 730 bus_space_handle_t ioh = sc->sc_ioh; 731 int i, error; 732 const u_int8_t *addr; 733 734 if (!sc->enabled && (error = epenable(sc)) != 0) 735 return (error); 736 737 /* Make sure any pending reset has completed before touching board */ 738 ep_finish_reset(iot, ioh); 739 740 /* 741 * Cancel any pending I/O. 742 */ 743 epstop(ifp, 0); 744 745 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 746 && sc->bustype != ELINK_BUS_MCA) { 747 GO_WINDOW(0); 748 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 749 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 750 ENABLE_DRQ_IRQ); 751 } 752 753 if (sc->bustype == ELINK_BUS_PCMCIA) { 754 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 755 } 756 757 GO_WINDOW(2); 758 /* Reload the ether_addr. */ 759 addr = CLLADDR(ifp->if_sadl); 760 for (i = 0; i < 6; i += 2) 761 bus_space_write_2(iot, ioh, ELINK_W2_ADDR_0 + i, 762 (addr[i] << 0) | (addr[i + 1] << 8)); 763 764 /* 765 * Reset the station-address receive filter. 766 * A bug workaround for busmastering (Vortex, Demon) cards. 767 */ 768 for (i = 0; i < 6; i += 2) 769 bus_space_write_2(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 770 771 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 772 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 773 774 GO_WINDOW(1); /* Window 1 is operating window */ 775 for (i = 0; i < 31; i++) 776 (void)bus_space_read_2(iot, ioh, 777 ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 778 779 /* Set threshold for Tx-space available interrupt. */ 780 bus_space_write_2(iot, ioh, ELINK_COMMAND, 781 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 782 783 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 784 /* 785 * Enable options in the PCMCIA LAN COR register, via 786 * RoadRunner Window 1. 787 * 788 * XXX MAGIC CONSTANTS! 789 */ 790 u_int16_t cor; 791 792 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 793 794 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 795 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 796 cor |= 0x10; 797 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 798 cor |= 0x20; 799 bus_space_write_2(iot, ioh, 0, cor); 800 801 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 802 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 803 804 if (sc->ep_flags & ELINK_FLAGS_MII) { 805 ep_roadrunner_mii_enable(sc); 806 GO_WINDOW(1); 807 } 808 } 809 810 /* Enable interrupts. */ 811 bus_space_write_2(iot, ioh, ELINK_COMMAND, 812 SET_RD_0_MASK | WATCHED_INTERRUPTS); 813 bus_space_write_2(iot, ioh, ELINK_COMMAND, 814 SET_INTR_MASK | WATCHED_INTERRUPTS); 815 816 /* 817 * Attempt to get rid of any stray interrupts that occurred during 818 * configuration. On the i386 this isn't possible because one may 819 * already be queued. However, a single stray interrupt is 820 * unimportant. 821 */ 822 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 823 824 epsetfilter(sc); 825 epsetmedia(sc); 826 827 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 828 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 829 830 epmbuffill(sc); 831 832 /* Interface is now `running', with no output active. */ 833 ifp->if_flags |= IFF_RUNNING; 834 ifp->if_flags &= ~IFF_OACTIVE; 835 836 if (sc->ep_flags & ELINK_FLAGS_MII) { 837 /* Start the one second clock. */ 838 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 839 } 840 841 /* Attempt to start output, if any. */ 842 epstart(ifp); 843 844 return (0); 845 } 846 847 848 /* 849 * Set multicast receive filter. 850 * elink3 hardware has no selective multicast filter in hardware. 851 * Enable reception of all multicasts and filter in software. 852 */ 853 void 854 epsetfilter(struct ep_softc *sc) 855 { 856 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 857 858 GO_WINDOW(1); /* Window 1 is operating window */ 859 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 860 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 861 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 862 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 863 } 864 865 int 866 ep_media_change(struct ifnet *ifp) 867 { 868 struct ep_softc *sc = ifp->if_softc; 869 870 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 871 epreset(sc); 872 873 return (0); 874 } 875 876 /* 877 * Reset and enable the MII on the RoadRunner. 878 */ 879 void 880 ep_roadrunner_mii_enable(struct ep_softc *sc) 881 { 882 bus_space_tag_t iot = sc->sc_iot; 883 bus_space_handle_t ioh = sc->sc_ioh; 884 885 GO_WINDOW(3); 886 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 887 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 888 delay(1000); 889 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 890 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 891 ELINK_RUNNER_ENABLE_MII); 892 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 893 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 894 delay(1000); 895 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 896 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 897 } 898 899 /* 900 * Set the card to use the specified media. 901 */ 902 void 903 epsetmedia(struct ep_softc *sc) 904 { 905 bus_space_tag_t iot = sc->sc_iot; 906 bus_space_handle_t ioh = sc->sc_ioh; 907 908 /* Turn everything off. First turn off linkbeat and UTP. */ 909 GO_WINDOW(4); 910 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 911 912 /* Turn off coax */ 913 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 914 delay(1000); 915 916 /* 917 * If the device has MII, select it, and then tell the 918 * PHY which media to use. 919 */ 920 if (sc->ep_flags & ELINK_FLAGS_MII) { 921 int config0, config1; 922 923 GO_WINDOW(3); 924 925 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 926 int resopt; 927 928 resopt = bus_space_read_2(iot, ioh, 929 ELINK_W3_RESET_OPTIONS); 930 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 931 resopt | ELINK_RUNNER_ENABLE_MII); 932 } 933 934 config0 = (u_int)bus_space_read_2(iot, ioh, 935 ELINK_W3_INTERNAL_CONFIG); 936 config1 = (u_int)bus_space_read_2(iot, ioh, 937 ELINK_W3_INTERNAL_CONFIG + 2); 938 939 config1 = config1 & ~CONFIG_MEDIAMASK; 940 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 941 942 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 943 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 944 config1); 945 GO_WINDOW(1); /* back to operating window */ 946 947 mii_mediachg(&sc->sc_mii); 948 return; 949 } 950 951 /* 952 * Now turn on the selected media/transceiver. 953 */ 954 GO_WINDOW(4); 955 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 956 case IFM_10_T: 957 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 958 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 959 break; 960 961 case IFM_10_2: 962 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 963 DELAY(1000); /* 50ms not enmough? */ 964 break; 965 966 case IFM_100_TX: 967 case IFM_100_FX: 968 case IFM_100_T4: /* XXX check documentation */ 969 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 970 LINKBEAT_ENABLE); 971 DELAY(1000); /* not strictly necessary? */ 972 break; 973 974 case IFM_10_5: 975 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 976 SQE_ENABLE); 977 DELAY(1000); /* not strictly necessary? */ 978 break; 979 980 case IFM_MANUAL: 981 /* 982 * Nothing to do here; we are actually enabling the 983 * external PHY on the MII port. 984 */ 985 break; 986 987 case IFM_NONE: 988 printf("%s: interface disabled\n", device_xname(sc->sc_dev)); 989 return; 990 991 default: 992 panic("epsetmedia: impossible"); 993 } 994 995 /* 996 * Tell the chip which port to use. 997 */ 998 switch (sc->ep_chipset) { 999 case ELINK_CHIPSET_VORTEX: 1000 case ELINK_CHIPSET_BOOMERANG: 1001 { 1002 int mctl, config0, config1; 1003 1004 GO_WINDOW(3); 1005 config0 = (u_int)bus_space_read_2(iot, ioh, 1006 ELINK_W3_INTERNAL_CONFIG); 1007 config1 = (u_int)bus_space_read_2(iot, ioh, 1008 ELINK_W3_INTERNAL_CONFIG + 2); 1009 1010 config1 = config1 & ~CONFIG_MEDIAMASK; 1011 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1012 CONFIG_MEDIAMASK_SHIFT); 1013 1014 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1015 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1016 config1); 1017 1018 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1019 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1020 mctl |= MAC_CONTROL_FDX; 1021 else 1022 mctl &= ~MAC_CONTROL_FDX; 1023 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1024 break; 1025 } 1026 default: 1027 { 1028 int w0_addr_cfg; 1029 1030 GO_WINDOW(0); 1031 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1032 w0_addr_cfg &= 0x3fff; 1033 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1034 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1035 DELAY(1000); 1036 break; 1037 } 1038 } 1039 1040 GO_WINDOW(1); /* Window 1 is operating window */ 1041 } 1042 1043 /* 1044 * Get currently-selected media from card. 1045 * (if_media callback, may be called before interface is brought up). 1046 */ 1047 void 1048 ep_media_status(struct ifnet *ifp, struct ifmediareq *req) 1049 { 1050 struct ep_softc *sc = ifp->if_softc; 1051 bus_space_tag_t iot = sc->sc_iot; 1052 bus_space_handle_t ioh = sc->sc_ioh; 1053 1054 if (sc->enabled == 0) { 1055 req->ifm_active = IFM_ETHER|IFM_NONE; 1056 req->ifm_status = 0; 1057 return; 1058 } 1059 1060 /* 1061 * If we have MII, go ask the PHY what's going on. 1062 */ 1063 if (sc->ep_flags & ELINK_FLAGS_MII) { 1064 mii_pollstat(&sc->sc_mii); 1065 req->ifm_active = sc->sc_mii.mii_media_active; 1066 req->ifm_status = sc->sc_mii.mii_media_status; 1067 return; 1068 } 1069 1070 /* 1071 * Ok, at this point we claim that our active media is 1072 * the currently selected media. We'll update our status 1073 * if our chipset allows us to detect link. 1074 */ 1075 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1076 req->ifm_status = 0; 1077 1078 switch (sc->ep_chipset) { 1079 case ELINK_CHIPSET_VORTEX: 1080 case ELINK_CHIPSET_BOOMERANG: 1081 GO_WINDOW(4); 1082 req->ifm_status = IFM_AVALID; 1083 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1084 LINKBEAT_DETECT) 1085 req->ifm_status |= IFM_ACTIVE; 1086 GO_WINDOW(1); /* back to operating window */ 1087 break; 1088 } 1089 } 1090 1091 1092 1093 /* 1094 * Start outputting on the interface. 1095 * Always called as splnet(). 1096 */ 1097 void 1098 epstart(struct ifnet *ifp) 1099 { 1100 struct ep_softc *sc = ifp->if_softc; 1101 bus_space_tag_t iot = sc->sc_iot; 1102 bus_space_handle_t ioh = sc->sc_ioh; 1103 struct mbuf *m, *m0; 1104 int sh, len, pad; 1105 bus_size_t txreg; 1106 1107 /* Don't transmit if interface is busy or not running */ 1108 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1109 return; 1110 1111 startagain: 1112 /* Sneak a peek at the next packet */ 1113 IFQ_POLL(&ifp->if_snd, m0); 1114 if (m0 == 0) 1115 return; 1116 1117 /* We need to use m->m_pkthdr.len, so require the header */ 1118 if ((m0->m_flags & M_PKTHDR) == 0) 1119 panic("epstart: no header mbuf"); 1120 len = m0->m_pkthdr.len; 1121 1122 pad = (4 - len) & 3; 1123 1124 /* 1125 * The 3c509 automatically pads short packets to minimum ethernet 1126 * length, but we drop packets that are too large. Perhaps we should 1127 * truncate them instead? 1128 */ 1129 if (len + pad > ETHER_MAX_LEN) { 1130 /* packet is obviously too large: toss it */ 1131 ++ifp->if_oerrors; 1132 IFQ_DEQUEUE(&ifp->if_snd, m0); 1133 m_freem(m0); 1134 goto readcheck; 1135 } 1136 1137 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1138 len + pad + 4) { 1139 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1140 SET_TX_AVAIL_THRESH | 1141 ((len + pad + 4) >> sc->ep_pktlenshift)); 1142 /* not enough room in FIFO */ 1143 ifp->if_flags |= IFF_OACTIVE; 1144 return; 1145 } else { 1146 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1147 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1148 } 1149 1150 IFQ_DEQUEUE(&ifp->if_snd, m0); 1151 if (m0 == 0) /* not really needed */ 1152 return; 1153 1154 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1155 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1156 1157 #if NBPFILTER > 0 1158 if (ifp->if_bpf) 1159 bpf_mtap(ifp->if_bpf, m0); 1160 #endif 1161 1162 /* 1163 * Do the output at a high interrupt priority level so that an 1164 * interrupt from another device won't cause a FIFO underrun. 1165 * We choose splsched() since that blocks essentially everything 1166 * except for interrupts from serial devices (which typically 1167 * lose data if their interrupt isn't serviced fast enough). 1168 * 1169 * XXX THIS CAN CAUSE CLOCK DRIFT! 1170 */ 1171 sh = splsched(); 1172 1173 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1174 1175 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1176 /* 1177 * Prime the FIFO buffer counter (number of 16-bit 1178 * words about to be written to the FIFO). 1179 * 1180 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1181 * COUNTER IS NON-ZERO! 1182 */ 1183 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1184 (len + pad) >> 1); 1185 } 1186 1187 bus_space_write_2(iot, ioh, txreg, len); 1188 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1189 if (ELINK_IS_BUS_32(sc->bustype)) { 1190 for (m = m0; m;) { 1191 if (m->m_len > 3) { 1192 /* align our reads from core */ 1193 if (mtod(m, u_long) & 3) { 1194 u_long count = 1195 4 - (mtod(m, u_long) & 3); 1196 bus_space_write_multi_1(iot, ioh, 1197 txreg, mtod(m, u_int8_t *), count); 1198 m->m_data = 1199 (void *)(mtod(m, u_long) + count); 1200 m->m_len -= count; 1201 } 1202 bus_space_write_multi_stream_4(iot, ioh, 1203 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1204 m->m_data = (void *)(mtod(m, u_long) + 1205 (u_long)(m->m_len & ~3)); 1206 m->m_len -= m->m_len & ~3; 1207 } 1208 if (m->m_len) { 1209 bus_space_write_multi_1(iot, ioh, 1210 txreg, mtod(m, u_int8_t *), m->m_len); 1211 } 1212 MFREE(m, m0); 1213 m = m0; 1214 } 1215 } else { 1216 for (m = m0; m;) { 1217 if (m->m_len > 1) { 1218 if (mtod(m, u_long) & 1) { 1219 bus_space_write_1(iot, ioh, 1220 txreg, *(mtod(m, u_int8_t *))); 1221 m->m_data = 1222 (void *)(mtod(m, u_long) + 1); 1223 m->m_len -= 1; 1224 } 1225 bus_space_write_multi_stream_2(iot, ioh, 1226 txreg, mtod(m, u_int16_t *), 1227 m->m_len >> 1); 1228 } 1229 if (m->m_len & 1) { 1230 bus_space_write_1(iot, ioh, txreg, 1231 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1232 } 1233 MFREE(m, m0); 1234 m = m0; 1235 } 1236 } 1237 while (pad--) 1238 bus_space_write_1(iot, ioh, txreg, 0); 1239 1240 splx(sh); 1241 1242 ++ifp->if_opackets; 1243 1244 readcheck: 1245 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1246 ERR_INCOMPLETE) == 0) { 1247 /* We received a complete packet. */ 1248 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1249 1250 if ((status & INTR_LATCH) == 0) { 1251 /* 1252 * No interrupt, read the packet and continue 1253 * Is this supposed to happen? Is my motherboard 1254 * completely busted? 1255 */ 1256 epread(sc); 1257 } else { 1258 /* Got an interrupt, return so that it gets serviced. */ 1259 return; 1260 } 1261 } else { 1262 /* Check if we are stuck and reset [see XXX comment] */ 1263 if (epstatus(sc)) { 1264 if (ifp->if_flags & IFF_DEBUG) 1265 printf("%s: adapter reset\n", 1266 device_xname(sc->sc_dev)); 1267 epreset(sc); 1268 } 1269 } 1270 1271 goto startagain; 1272 } 1273 1274 1275 /* 1276 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1277 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1278 * We detect this situation and we reset the adapter. 1279 * It happens at times when there is a lot of broadcast traffic 1280 * on the cable (once in a blue moon). 1281 */ 1282 static int 1283 epstatus(struct ep_softc *sc) 1284 { 1285 bus_space_tag_t iot = sc->sc_iot; 1286 bus_space_handle_t ioh = sc->sc_ioh; 1287 u_int16_t fifost; 1288 1289 /* 1290 * Check the FIFO status and act accordingly 1291 */ 1292 GO_WINDOW(4); 1293 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1294 GO_WINDOW(1); 1295 1296 if (fifost & FIFOS_RX_UNDERRUN) { 1297 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1298 printf("%s: RX underrun\n", device_xname(sc->sc_dev)); 1299 epreset(sc); 1300 return 0; 1301 } 1302 1303 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1304 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1305 printf("%s: RX Status overrun\n", device_xname(sc->sc_dev)); 1306 return 1; 1307 } 1308 1309 if (fifost & FIFOS_RX_OVERRUN) { 1310 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1311 printf("%s: RX overrun\n", device_xname(sc->sc_dev)); 1312 return 1; 1313 } 1314 1315 if (fifost & FIFOS_TX_OVERRUN) { 1316 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1317 printf("%s: TX overrun\n", device_xname(sc->sc_dev)); 1318 epreset(sc); 1319 return 0; 1320 } 1321 1322 return 0; 1323 } 1324 1325 1326 static void 1327 eptxstat(struct ep_softc *sc) 1328 { 1329 bus_space_tag_t iot = sc->sc_iot; 1330 bus_space_handle_t ioh = sc->sc_ioh; 1331 int i; 1332 1333 /* 1334 * We need to read+write TX_STATUS until we get a 0 status 1335 * in order to turn off the interrupt flag. 1336 */ 1337 while ((i = bus_space_read_2(iot, ioh, 1338 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1339 bus_space_write_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1340 0x0); 1341 1342 if (i & TXS_JABBER) { 1343 ++sc->sc_ethercom.ec_if.if_oerrors; 1344 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1345 printf("%s: jabber (%x)\n", 1346 device_xname(sc->sc_dev), i); 1347 epreset(sc); 1348 } else if (i & TXS_UNDERRUN) { 1349 ++sc->sc_ethercom.ec_if.if_oerrors; 1350 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1351 printf("%s: fifo underrun (%x) @%d\n", 1352 device_xname(sc->sc_dev), i, 1353 sc->tx_start_thresh); 1354 if (sc->tx_succ_ok < 100) 1355 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1356 sc->tx_start_thresh + 20); 1357 sc->tx_succ_ok = 0; 1358 epreset(sc); 1359 } else if (i & TXS_MAX_COLLISION) { 1360 ++sc->sc_ethercom.ec_if.if_collisions; 1361 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1362 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1363 } else 1364 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1365 } 1366 } 1367 1368 int 1369 epintr(void *arg) 1370 { 1371 struct ep_softc *sc = arg; 1372 bus_space_tag_t iot = sc->sc_iot; 1373 bus_space_handle_t ioh = sc->sc_ioh; 1374 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1375 u_int16_t status; 1376 int ret = 0; 1377 1378 if (sc->enabled == 0 || !device_is_active(sc->sc_dev)) 1379 return (0); 1380 1381 1382 for (;;) { 1383 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1384 1385 if ((status & WATCHED_INTERRUPTS) == 0) { 1386 if ((status & INTR_LATCH) == 0) { 1387 #if 0 1388 printf("%s: intr latch cleared\n", 1389 device_xname(&sc->sc_dev)); 1390 #endif 1391 break; 1392 } 1393 } 1394 1395 ret = 1; 1396 1397 /* 1398 * Acknowledge any interrupts. It's important that we do this 1399 * first, since there would otherwise be a race condition. 1400 * Due to the i386 interrupt queueing, we may get spurious 1401 * interrupts occasionally. 1402 */ 1403 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1404 (status & (INTR_LATCH | ALL_INTERRUPTS))); 1405 1406 #if 0 1407 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1408 1409 printf("%s: intr%s%s%s%s\n", device_xname(&sc->sc_dev), 1410 (status & RX_COMPLETE)?" RX_COMPLETE":"", 1411 (status & TX_COMPLETE)?" TX_COMPLETE":"", 1412 (status & TX_AVAIL)?" TX_AVAIL":"", 1413 (status & CARD_FAILURE)?" CARD_FAILURE":""); 1414 #endif 1415 1416 if (status & RX_COMPLETE) { 1417 epread(sc); 1418 } 1419 if (status & TX_AVAIL) { 1420 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1421 epstart(&sc->sc_ethercom.ec_if); 1422 } 1423 if (status & CARD_FAILURE) { 1424 printf("%s: adapter failure (%x)\n", 1425 device_xname(sc->sc_dev), status); 1426 #if 1 1427 epinit(ifp); 1428 #else 1429 epreset(sc); 1430 #endif 1431 return (1); 1432 } 1433 if (status & TX_COMPLETE) { 1434 eptxstat(sc); 1435 epstart(ifp); 1436 } 1437 1438 #if NRND > 0 1439 if (status) 1440 rnd_add_uint32(&sc->rnd_source, status); 1441 #endif 1442 } 1443 1444 /* no more interrupts */ 1445 return (ret); 1446 } 1447 1448 void 1449 epread(struct ep_softc *sc) 1450 { 1451 bus_space_tag_t iot = sc->sc_iot; 1452 bus_space_handle_t ioh = sc->sc_ioh; 1453 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1454 struct mbuf *m; 1455 int len; 1456 1457 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1458 1459 again: 1460 if (ifp->if_flags & IFF_DEBUG) { 1461 int err = len & ERR_MASK; 1462 const char *s = NULL; 1463 1464 if (len & ERR_INCOMPLETE) 1465 s = "incomplete packet"; 1466 else if (err == ERR_OVERRUN) 1467 s = "packet overrun"; 1468 else if (err == ERR_RUNT) 1469 s = "runt packet"; 1470 else if (err == ERR_ALIGNMENT) 1471 s = "bad alignment"; 1472 else if (err == ERR_CRC) 1473 s = "bad crc"; 1474 else if (err == ERR_OVERSIZE) 1475 s = "oversized packet"; 1476 else if (err == ERR_DRIBBLE) 1477 s = "dribble bits"; 1478 1479 if (s) 1480 printf("%s: %s\n", device_xname(sc->sc_dev), s); 1481 } 1482 1483 if (len & ERR_INCOMPLETE) 1484 return; 1485 1486 if (len & ERR_RX) { 1487 ++ifp->if_ierrors; 1488 goto abort; 1489 } 1490 1491 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1492 1493 /* Pull packet off interface. */ 1494 m = epget(sc, len); 1495 if (m == 0) { 1496 ifp->if_ierrors++; 1497 goto abort; 1498 } 1499 1500 ++ifp->if_ipackets; 1501 1502 #if NBPFILTER > 0 1503 /* 1504 * Check if there's a BPF listener on this interface. 1505 * If so, hand off the raw packet to BPF. 1506 */ 1507 if (ifp->if_bpf) 1508 bpf_mtap(ifp->if_bpf, m); 1509 #endif 1510 1511 (*ifp->if_input)(ifp, m); 1512 1513 /* 1514 * In periods of high traffic we can actually receive enough 1515 * packets so that the fifo overrun bit will be set at this point, 1516 * even though we just read a packet. In this case we 1517 * are not going to receive any more interrupts. We check for 1518 * this condition and read again until the fifo is not full. 1519 * We could simplify this test by not using epstatus(), but 1520 * rechecking the RX_STATUS register directly. This test could 1521 * result in unnecessary looping in cases where there is a new 1522 * packet but the fifo is not full, but it will not fix the 1523 * stuck behavior. 1524 * 1525 * Even with this improvement, we still get packet overrun errors 1526 * which are hurting performance. Maybe when I get some more time 1527 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1528 */ 1529 if (epstatus(sc)) { 1530 len = bus_space_read_2(iot, ioh, 1531 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1532 /* Check if we are stuck and reset [see XXX comment] */ 1533 if (len & ERR_INCOMPLETE) { 1534 if (ifp->if_flags & IFF_DEBUG) 1535 printf("%s: adapter reset\n", 1536 device_xname(sc->sc_dev)); 1537 epreset(sc); 1538 return; 1539 } 1540 goto again; 1541 } 1542 1543 return; 1544 1545 abort: 1546 ep_discard_rxtop(iot, ioh); 1547 1548 } 1549 1550 struct mbuf * 1551 epget(struct ep_softc *sc, int totlen) 1552 { 1553 bus_space_tag_t iot = sc->sc_iot; 1554 bus_space_handle_t ioh = sc->sc_ioh; 1555 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1556 struct mbuf *m; 1557 bus_size_t rxreg; 1558 int len, remaining; 1559 int s; 1560 void *newdata; 1561 u_long offset; 1562 1563 m = sc->mb[sc->next_mb]; 1564 sc->mb[sc->next_mb] = 0; 1565 if (m == 0) { 1566 MGETHDR(m, M_DONTWAIT, MT_DATA); 1567 if (m == 0) 1568 return 0; 1569 } else { 1570 /* If the queue is no longer full, refill. */ 1571 if (sc->last_mb == sc->next_mb) 1572 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1573 1574 /* Convert one of our saved mbuf's. */ 1575 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1576 m->m_data = m->m_pktdat; 1577 m->m_flags = M_PKTHDR; 1578 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr)); 1579 } 1580 m->m_pkthdr.rcvif = ifp; 1581 m->m_pkthdr.len = totlen; 1582 len = MHLEN; 1583 1584 /* 1585 * Allocate big enough space to hold whole packet, to avoid 1586 * allocating new mbufs on splsched(). 1587 */ 1588 if (totlen + ALIGNBYTES > len) { 1589 if (totlen + ALIGNBYTES > MCLBYTES) { 1590 len = ALIGN(totlen + ALIGNBYTES); 1591 MEXTMALLOC(m, len, M_DONTWAIT); 1592 } else { 1593 len = MCLBYTES; 1594 MCLGET(m, M_DONTWAIT); 1595 } 1596 if ((m->m_flags & M_EXT) == 0) { 1597 m_free(m); 1598 return 0; 1599 } 1600 } 1601 1602 /* align the struct ip header */ 1603 newdata = (char *)ALIGN(m->m_data + sizeof(struct ether_header)) 1604 - sizeof(struct ether_header); 1605 m->m_data = newdata; 1606 m->m_len = totlen; 1607 1608 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1609 remaining = totlen; 1610 offset = mtod(m, u_long); 1611 1612 /* 1613 * We read the packet at a high interrupt priority level so that 1614 * an interrupt from another device won't cause the card's packet 1615 * buffer to overflow. We choose splsched() since that blocks 1616 * essentially everything except for interrupts from serial 1617 * devices (which typically lose data if their interrupt isn't 1618 * serviced fast enough). 1619 * 1620 * XXX THIS CAN CAUSE CLOCK DRIFT! 1621 */ 1622 s = splsched(); 1623 1624 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1625 /* 1626 * Prime the FIFO buffer counter (number of 16-bit 1627 * words about to be read from the FIFO). 1628 * 1629 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1630 * COUNTER IS NON-ZERO! 1631 */ 1632 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1633 } 1634 1635 if (ELINK_IS_BUS_32(sc->bustype)) { 1636 /* 1637 * Read bytes up to the point where we are aligned. 1638 * (We can align to 4 bytes, rather than ALIGNBYTES, 1639 * here because we're later reading 4-byte chunks.) 1640 */ 1641 if ((remaining > 3) && (offset & 3)) { 1642 int count = (4 - (offset & 3)); 1643 bus_space_read_multi_1(iot, ioh, 1644 rxreg, (u_int8_t *) offset, count); 1645 offset += count; 1646 remaining -= count; 1647 } 1648 if (remaining > 3) { 1649 bus_space_read_multi_stream_4(iot, ioh, 1650 rxreg, (u_int32_t *) offset, 1651 remaining >> 2); 1652 offset += remaining & ~3; 1653 remaining &= 3; 1654 } 1655 if (remaining) { 1656 bus_space_read_multi_1(iot, ioh, 1657 rxreg, (u_int8_t *) offset, remaining); 1658 } 1659 } else { 1660 if ((remaining > 1) && (offset & 1)) { 1661 bus_space_read_multi_1(iot, ioh, 1662 rxreg, (u_int8_t *) offset, 1); 1663 remaining -= 1; 1664 offset += 1; 1665 } 1666 if (remaining > 1) { 1667 bus_space_read_multi_stream_2(iot, ioh, 1668 rxreg, (u_int16_t *) offset, 1669 remaining >> 1); 1670 offset += remaining & ~1; 1671 } 1672 if (remaining & 1) { 1673 bus_space_read_multi_1(iot, ioh, 1674 rxreg, (u_int8_t *) offset, remaining & 1); 1675 } 1676 } 1677 1678 ep_discard_rxtop(iot, ioh); 1679 1680 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1681 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1682 splx(s); 1683 1684 return (m); 1685 } 1686 1687 int 1688 epioctl(struct ifnet *ifp, u_long cmd, void *data) 1689 { 1690 struct ep_softc *sc = ifp->if_softc; 1691 struct ifreq *ifr = (struct ifreq *)data; 1692 int s, error = 0; 1693 1694 s = splnet(); 1695 1696 switch (cmd) { 1697 1698 case SIOCSIFMEDIA: 1699 case SIOCGIFMEDIA: 1700 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1701 break; 1702 1703 case SIOCADDMULTI: 1704 case SIOCDELMULTI: 1705 if (sc->enabled == 0) { 1706 error = EIO; 1707 break; 1708 } 1709 1710 default: 1711 error = ether_ioctl(ifp, cmd, data); 1712 1713 if (error == ENETRESET) { 1714 /* 1715 * Multicast list has changed; set the hardware filter 1716 * accordingly. 1717 */ 1718 if (ifp->if_flags & IFF_RUNNING) 1719 epreset(sc); 1720 error = 0; 1721 } 1722 break; 1723 } 1724 1725 splx(s); 1726 return (error); 1727 } 1728 1729 void 1730 epreset(struct ep_softc *sc) 1731 { 1732 int s; 1733 1734 s = splnet(); 1735 epinit(&sc->sc_ethercom.ec_if); 1736 splx(s); 1737 } 1738 1739 void 1740 epwatchdog(struct ifnet *ifp) 1741 { 1742 struct ep_softc *sc = ifp->if_softc; 1743 1744 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev)); 1745 ++sc->sc_ethercom.ec_if.if_oerrors; 1746 1747 epreset(sc); 1748 } 1749 1750 void 1751 epstop(struct ifnet *ifp, int disable) 1752 { 1753 struct ep_softc *sc = ifp->if_softc; 1754 bus_space_tag_t iot = sc->sc_iot; 1755 bus_space_handle_t ioh = sc->sc_ioh; 1756 1757 if (sc->ep_flags & ELINK_FLAGS_MII) { 1758 /* Stop the one second clock. */ 1759 callout_stop(&sc->sc_mbuf_callout); 1760 1761 /* Down the MII. */ 1762 mii_down(&sc->sc_mii); 1763 } 1764 1765 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1766 /* 1767 * Clear the FIFO buffer count, thus halting 1768 * any currently-running transactions. 1769 */ 1770 GO_WINDOW(1); /* sanity */ 1771 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1772 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1773 } 1774 1775 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1776 ep_discard_rxtop(iot, ioh); 1777 1778 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1779 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1780 1781 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1782 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1783 1784 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1785 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1786 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1787 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1788 1789 epmbufempty(sc); 1790 1791 if (disable) 1792 epdisable(sc); 1793 1794 ifp->if_flags &= ~IFF_RUNNING; 1795 } 1796 1797 1798 /* 1799 * Before reboots, reset card completely. 1800 */ 1801 static void 1802 epshutdown(void *arg) 1803 { 1804 struct ep_softc *sc = arg; 1805 int s = splnet(); 1806 1807 if (sc->enabled) { 1808 epstop(&sc->sc_ethercom.ec_if, 0); 1809 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1810 epdisable(sc); 1811 sc->enabled = 0; 1812 } 1813 splx(s); 1814 } 1815 1816 /* 1817 * We get eeprom data from the id_port given an offset into the 1818 * eeprom. Basically; after the ID_sequence is sent to all of 1819 * the cards; they enter the ID_CMD state where they will accept 1820 * command requests. 0x80-0xbf loads the eeprom data. We then 1821 * read the port 16 times and with every read; the cards check 1822 * for contention (ie: if one card writes a 0 bit and another 1823 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1824 * each card compares the data on the bus; if there is a difference 1825 * then that card goes into ID_WAIT state again). In the meantime; 1826 * one bit of data is returned in the AX register which is conveniently 1827 * returned to us by bus_space_read_2(). Hence; we read 16 times getting one 1828 * bit of data with each read. 1829 * 1830 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1831 */ 1832 u_int16_t 1833 epreadeeprom(bus_space_tag_t iot, bus_space_handle_t ioh, int offset) 1834 { 1835 u_int16_t data = 0; 1836 int i; 1837 1838 bus_space_write_2(iot, ioh, 0, 0x80 + offset); 1839 delay(1000); 1840 for (i = 0; i < 16; i++) 1841 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1842 return (data); 1843 } 1844 1845 static int 1846 epbusyeeprom(struct ep_softc *sc) 1847 { 1848 bus_space_tag_t iot = sc->sc_iot; 1849 bus_space_handle_t ioh = sc->sc_ioh; 1850 bus_size_t eecmd; 1851 int i = 100, j; 1852 uint16_t busybit; 1853 1854 if (sc->bustype == ELINK_BUS_PCMCIA) { 1855 delay(1000); 1856 return 0; 1857 } 1858 1859 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1860 eecmd = CORK_ASIC_EEPROM_COMMAND; 1861 busybit = CORK_EEPROM_BUSY; 1862 } else { 1863 eecmd = ELINK_W0_EEPROM_COMMAND; 1864 busybit = EEPROM_BUSY; 1865 } 1866 1867 j = 0; /* bad GCC flow analysis */ 1868 while (i--) { 1869 j = bus_space_read_2(iot, ioh, eecmd); 1870 if (j & busybit) 1871 delay(100); 1872 else 1873 break; 1874 } 1875 if (i == 0) { 1876 aprint_normal("\n"); 1877 aprint_error_dev(sc->sc_dev, "eeprom failed to come ready\n"); 1878 return (1); 1879 } 1880 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW && 1881 (j & EEPROM_TST_MODE) != 0) { 1882 /* XXX PnP mode? */ 1883 printf("\n%s: erase pencil mark!\n", device_xname(sc->sc_dev)); 1884 return (1); 1885 } 1886 return (0); 1887 } 1888 1889 u_int16_t 1890 ep_read_eeprom(struct ep_softc *sc, u_int16_t offset) 1891 { 1892 bus_size_t eecmd, eedata; 1893 u_int16_t readcmd; 1894 1895 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1896 eecmd = CORK_ASIC_EEPROM_COMMAND; 1897 eedata = CORK_ASIC_EEPROM_DATA; 1898 } else { 1899 eecmd = ELINK_W0_EEPROM_COMMAND; 1900 eedata = ELINK_W0_EEPROM_DATA; 1901 } 1902 1903 /* 1904 * RoadRunner has a larger EEPROM, so a different read command 1905 * is required. 1906 */ 1907 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1908 readcmd = READ_EEPROM_RR; 1909 else 1910 readcmd = READ_EEPROM; 1911 1912 if (epbusyeeprom(sc)) 1913 return (0); /* XXX why is eeprom busy? */ 1914 1915 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset); 1916 1917 if (epbusyeeprom(sc)) 1918 return (0); /* XXX why is eeprom busy? */ 1919 1920 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata)); 1921 } 1922 1923 void 1924 epmbuffill(void *v) 1925 { 1926 struct ep_softc *sc = v; 1927 struct mbuf *m; 1928 int s, i; 1929 1930 s = splnet(); 1931 i = sc->last_mb; 1932 do { 1933 if (sc->mb[i] == 0) { 1934 MGET(m, M_DONTWAIT, MT_DATA); 1935 if (m == 0) 1936 break; 1937 sc->mb[i] = m; 1938 } 1939 i = (i + 1) % MAX_MBS; 1940 } while (i != sc->next_mb); 1941 sc->last_mb = i; 1942 /* If the queue was not filled, try again. */ 1943 if (sc->last_mb != sc->next_mb) 1944 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1945 splx(s); 1946 } 1947 1948 void 1949 epmbufempty(struct ep_softc *sc) 1950 { 1951 int s, i; 1952 1953 s = splnet(); 1954 for (i = 0; i < MAX_MBS; i++) { 1955 if (sc->mb[i]) { 1956 m_freem(sc->mb[i]); 1957 sc->mb[i] = NULL; 1958 } 1959 } 1960 sc->last_mb = sc->next_mb = 0; 1961 callout_stop(&sc->sc_mbuf_callout); 1962 splx(s); 1963 } 1964 1965 int 1966 epenable(struct ep_softc *sc) 1967 { 1968 1969 if (sc->enabled == 0 && sc->enable != NULL) { 1970 if ((*sc->enable)(sc) != 0) { 1971 aprint_error_dev(sc->sc_dev, "device enable failed\n"); 1972 return (EIO); 1973 } 1974 } 1975 1976 sc->enabled = 1; 1977 return (0); 1978 } 1979 1980 void 1981 epdisable(struct ep_softc *sc) 1982 { 1983 1984 if (sc->enabled != 0 && sc->disable != NULL) { 1985 (*sc->disable)(sc); 1986 sc->enabled = 0; 1987 } 1988 } 1989 1990 /* 1991 * ep_activate: 1992 * 1993 * Handle device activation/deactivation requests. 1994 */ 1995 int 1996 ep_activate(device_t self, enum devact act) 1997 { 1998 struct ep_softc *sc = device_private(self); 1999 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2000 int error = 0, s; 2001 2002 s = splnet(); 2003 switch (act) { 2004 case DVACT_ACTIVATE: 2005 error = EOPNOTSUPP; 2006 break; 2007 2008 case DVACT_DEACTIVATE: 2009 if (sc->ep_flags & ELINK_FLAGS_MII) 2010 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2011 MII_OFFSET_ANY); 2012 if_deactivate(ifp); 2013 break; 2014 } 2015 splx(s); 2016 return (error); 2017 } 2018 2019 /* 2020 * ep_detach: 2021 * 2022 * Detach a elink3 interface. 2023 */ 2024 int 2025 ep_detach(device_t self, int flags) 2026 { 2027 struct ep_softc *sc = device_private(self); 2028 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2029 2030 /* Succeed now if there's no work to do. */ 2031 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2032 return (0); 2033 2034 epdisable(sc); 2035 2036 callout_stop(&sc->sc_mii_callout); 2037 callout_stop(&sc->sc_mbuf_callout); 2038 2039 if (sc->ep_flags & ELINK_FLAGS_MII) { 2040 /* Detach all PHYs */ 2041 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2042 } 2043 2044 /* Delete all remaining media. */ 2045 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2046 2047 #if NRND > 0 2048 rnd_detach_source(&sc->rnd_source); 2049 #endif 2050 ether_ifdetach(ifp); 2051 if_detach(ifp); 2052 2053 shutdownhook_disestablish(sc->sd_hook); 2054 2055 return (0); 2056 } 2057 2058 u_int32_t 2059 ep_mii_bitbang_read(device_t self) 2060 { 2061 struct ep_softc *sc = device_private(self); 2062 2063 /* We're already in Window 4. */ 2064 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2065 ELINK_W4_BOOM_PHYSMGMT)); 2066 } 2067 2068 void 2069 ep_mii_bitbang_write(device_t self, u_int32_t val) 2070 { 2071 struct ep_softc *sc = device_private(self); 2072 2073 /* We're already in Window 4. */ 2074 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2075 ELINK_W4_BOOM_PHYSMGMT, val); 2076 } 2077 2078 int 2079 ep_mii_readreg(device_t self, int phy, int reg) 2080 { 2081 struct ep_softc *sc = device_private(self); 2082 int val; 2083 2084 GO_WINDOW(4); 2085 2086 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2087 2088 GO_WINDOW(1); 2089 2090 return (val); 2091 } 2092 2093 void 2094 ep_mii_writereg(device_t self, int phy, int reg, int val) 2095 { 2096 struct ep_softc *sc = device_private(self); 2097 2098 GO_WINDOW(4); 2099 2100 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2101 2102 GO_WINDOW(1); 2103 } 2104 2105 void 2106 ep_statchg(device_t self) 2107 { 2108 struct ep_softc *sc = device_private(self); 2109 bus_space_tag_t iot = sc->sc_iot; 2110 bus_space_handle_t ioh = sc->sc_ioh; 2111 int mctl; 2112 2113 GO_WINDOW(3); 2114 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2115 if (sc->sc_mii.mii_media_active & IFM_FDX) 2116 mctl |= MAC_CONTROL_FDX; 2117 else 2118 mctl &= ~MAC_CONTROL_FDX; 2119 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2120 GO_WINDOW(1); /* back to operating window */ 2121 } 2122 2123 void 2124 ep_power(int why, void *arg) 2125 { 2126 struct ep_softc *sc = arg; 2127 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2128 int s; 2129 2130 s = splnet(); 2131 switch (why) { 2132 case PWR_SUSPEND: 2133 case PWR_STANDBY: 2134 epstop(ifp, 1); 2135 break; 2136 case PWR_RESUME: 2137 if (ifp->if_flags & IFF_UP) { 2138 (void)epinit(ifp); 2139 } 2140 break; 2141 case PWR_SOFTSUSPEND: 2142 case PWR_SOFTSTANDBY: 2143 case PWR_SOFTRESUME: 2144 break; 2145 } 2146 splx(s); 2147 } 2148
Indexes created Fri Sep 26 08:10:20 GMT 2025