elink3.c revision 1.129
1 /* $NetBSD: elink3.c,v 1.129 2009/09/15 19:20:29 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 35 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by Herb Peyerl. 49 * 4. The name of Herb Peyerl may not be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 #include <sys/cdefs.h> 65 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.129 2009/09/15 19:20:29 dyoung Exp $"); 66 67 #include "opt_inet.h" 68 #include "bpfilter.h" 69 #include "rnd.h" 70 71 #include <sys/param.h> 72 #include <sys/systm.h> 73 #include <sys/callout.h> 74 #include <sys/kernel.h> 75 #include <sys/mbuf.h> 76 #include <sys/socket.h> 77 #include <sys/ioctl.h> 78 #include <sys/errno.h> 79 #include <sys/syslog.h> 80 #include <sys/select.h> 81 #include <sys/device.h> 82 #if NRND > 0 83 #include <sys/rnd.h> 84 #endif 85 86 #include <net/if.h> 87 #include <net/if_dl.h> 88 #include <net/if_ether.h> 89 #include <net/if_media.h> 90 91 #if NBPFILTER > 0 92 #include <net/bpf.h> 93 #include <net/bpfdesc.h> 94 #endif 95 96 #include <sys/cpu.h> 97 #include <sys/bus.h> 98 #include <sys/intr.h> 99 100 #include <dev/mii/mii.h> 101 #include <dev/mii/miivar.h> 102 #include <dev/mii/mii_bitbang.h> 103 104 #include <dev/ic/elink3var.h> 105 #include <dev/ic/elink3reg.h> 106 107 #ifdef DEBUG 108 int epdebug = 0; 109 #endif 110 111 /* 112 * XXX endian workaround for big-endian CPUs with pcmcia: 113 * if stream methods for bus_space_multi are not provided, define them 114 * using non-stream bus_space_{read,write}_multi_. 115 * Assumes host CPU is same endian-ness as bus. 116 */ 117 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 118 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 119 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 120 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 121 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 122 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 123 124 /* 125 * Structure to map media-present bits in boards to ifmedia codes and 126 * printable media names. Used for table-driven ifmedia initialization. 127 */ 128 struct ep_media { 129 int epm_mpbit; /* media present bit */ 130 const char *epm_name; /* name of medium */ 131 int epm_ifmedia; /* ifmedia word for medium */ 132 int epm_epmedia; /* ELINKMEDIA_* constant */ 133 }; 134 135 /* 136 * Media table for the Demon/Vortex/Boomerang chipsets. 137 * 138 * Note that MII on the Demon and Vortex (3c59x) indicates an external 139 * MII connector (for connecting an external PHY) ... I think. Treat 140 * it as `manual' on these chips. 141 * 142 * Any Boomerang (3c90x) chips with MII really do have an internal 143 * MII and real PHYs attached; no `native' media. 144 */ 145 const struct ep_media ep_vortex_media[] = { 146 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 147 ELINKMEDIA_10BASE_T }, 148 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 149 ELINKMEDIA_10BASE_T }, 150 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 151 ELINKMEDIA_AUI }, 152 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 153 ELINKMEDIA_10BASE_2 }, 154 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 155 ELINKMEDIA_100BASE_TX }, 156 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 157 ELINKMEDIA_100BASE_TX }, 158 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 159 ELINKMEDIA_100BASE_FX }, 160 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 161 ELINKMEDIA_MII }, 162 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 163 ELINKMEDIA_100BASE_T4 }, 164 { 0, NULL, 0, 165 0 }, 166 }; 167 168 /* 169 * Media table for the older 3Com Etherlink III chipset, used 170 * in the 3c509, 3c579, and 3c589. 171 */ 172 const struct ep_media ep_509_media[] = { 173 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 174 ELINKMEDIA_10BASE_T }, 175 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 176 ELINKMEDIA_AUI }, 177 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 178 ELINKMEDIA_10BASE_2 }, 179 { 0, NULL, 0, 180 0 }, 181 }; 182 183 void ep_internalconfig(struct ep_softc *sc); 184 void ep_vortex_probemedia(struct ep_softc *sc); 185 void ep_509_probemedia(struct ep_softc *sc); 186 187 static void eptxstat(struct ep_softc *); 188 static int epstatus(struct ep_softc *); 189 int epinit(struct ifnet *); 190 void epstop(struct ifnet *, int); 191 int epioctl(struct ifnet *, u_long, void *); 192 void epstart(struct ifnet *); 193 void epwatchdog(struct ifnet *); 194 void epreset(struct ep_softc *); 195 static bool epshutdown(device_t, int); 196 void epread(struct ep_softc *); 197 struct mbuf *epget(struct ep_softc *, int); 198 void epmbuffill(void *); 199 void epmbufempty(struct ep_softc *); 200 void epsetfilter(struct ep_softc *); 201 void ep_roadrunner_mii_enable(struct ep_softc *); 202 void epsetmedia(struct ep_softc *); 203 204 /* ifmedia callbacks */ 205 int ep_media_change(struct ifnet *ifp); 206 void ep_media_status(struct ifnet *ifp, struct ifmediareq *req); 207 208 /* MII callbacks */ 209 int ep_mii_readreg(device_t, int, int); 210 void ep_mii_writereg(device_t, int, int, int); 211 void ep_statchg(device_t); 212 213 void ep_tick(void *); 214 215 static int epbusyeeprom(struct ep_softc *); 216 u_int16_t ep_read_eeprom(struct ep_softc *, u_int16_t); 217 static inline void ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg); 218 static inline void ep_finish_reset(bus_space_tag_t, bus_space_handle_t); 219 static inline void ep_discard_rxtop(bus_space_tag_t, bus_space_handle_t); 220 static inline int ep_w1_reg(struct ep_softc *, int); 221 222 /* 223 * MII bit-bang glue. 224 */ 225 u_int32_t ep_mii_bitbang_read(device_t); 226 void ep_mii_bitbang_write(device_t, u_int32_t); 227 228 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 229 ep_mii_bitbang_read, 230 ep_mii_bitbang_write, 231 { 232 PHYSMGMT_DATA, /* MII_BIT_MDO */ 233 PHYSMGMT_DATA, /* MII_BIT_MDI */ 234 PHYSMGMT_CLK, /* MII_BIT_MDC */ 235 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 236 0, /* MII_BIT_DIR_PHY_HOST */ 237 } 238 }; 239 240 /* 241 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 242 * Window 1 registers offset! 243 */ 244 static inline int 245 ep_w1_reg(struct ep_softc *sc, int reg) 246 { 247 248 switch (sc->ep_chipset) { 249 case ELINK_CHIPSET_CORKSCREW: 250 return (reg + 0x10); 251 252 case ELINK_CHIPSET_ROADRUNNER: 253 switch (reg) { 254 case ELINK_W1_FREE_TX: 255 case ELINK_W1_RUNNER_RDCTL: 256 case ELINK_W1_RUNNER_WRCTL: 257 return (reg); 258 } 259 return (reg + 0x10); 260 } 261 262 return (reg); 263 } 264 265 /* 266 * Wait for any pending reset to complete. 267 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 268 * but older hardware doesn't implement it and we must delay. 269 */ 270 static inline void 271 ep_finish_reset(bus_space_tag_t iot, bus_space_handle_t ioh) 272 { 273 int i; 274 275 for (i = 0; i < 10000; i++) { 276 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 277 COMMAND_IN_PROGRESS) == 0) 278 break; 279 DELAY(10); 280 } 281 } 282 283 /* 284 * Issue a (reset) command, and be sure it has completed. 285 * Used for global reset, TX_RESET, RX_RESET. 286 */ 287 static inline void 288 ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg) 289 { 290 bus_space_tag_t iot = sc->sc_iot; 291 bus_space_handle_t ioh = sc->sc_ioh; 292 293 bus_space_write_2(iot, ioh, cmd, arg); 294 ep_finish_reset(iot, ioh); 295 } 296 297 298 static inline void 299 ep_discard_rxtop(bus_space_tag_t iot, bus_space_handle_t ioh) 300 { 301 int i; 302 303 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 304 305 /* 306 * Spin for about 1 msec, to avoid forcing a DELAY() between 307 * every received packet (adding latency and limiting pkt-recv rate). 308 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 309 * is about right. 310 */ 311 for (i = 0; i < 8000; i++) { 312 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 313 COMMAND_IN_PROGRESS) == 0) 314 return; 315 } 316 317 /* Didn't complete in a hurry. Do DELAY()s. */ 318 ep_finish_reset(iot, ioh); 319 } 320 321 /* 322 * Back-end attach and configure. 323 */ 324 int 325 epconfig(struct ep_softc *sc, u_short chipset, u_int8_t *enaddr) 326 { 327 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 328 bus_space_tag_t iot = sc->sc_iot; 329 bus_space_handle_t ioh = sc->sc_ioh; 330 u_int16_t i; 331 u_int8_t myla[ETHER_ADDR_LEN]; 332 333 callout_init(&sc->sc_mii_callout, 0); 334 callout_init(&sc->sc_mbuf_callout, 0); 335 336 sc->ep_chipset = chipset; 337 338 /* 339 * We could have been groveling around in other register 340 * windows in the front-end; make sure we're in window 0 341 * to read the EEPROM. 342 */ 343 GO_WINDOW(0); 344 345 if (enaddr == NULL) { 346 /* 347 * Read the station address from the eeprom. 348 */ 349 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 350 u_int16_t x = ep_read_eeprom(sc, i); 351 myla[(i << 1)] = x >> 8; 352 myla[(i << 1) + 1] = x; 353 } 354 enaddr = myla; 355 } 356 357 /* 358 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 359 * allow FDDI-sized (4500) byte packets. Commands only take an 360 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 361 * packet length. 362 * Commands to these cards implicitly upshift a packet size 363 * or threshold by 2 bits. 364 * To detect cards with large-packet support, we probe by setting 365 * the transmit threshold register, then change windows and 366 * read back the threshold register directly, and see if the 367 * threshold value was shifted or not. 368 */ 369 bus_space_write_2(iot, ioh, ELINK_COMMAND, 370 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 371 GO_WINDOW(5); 372 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 373 GO_WINDOW(1); 374 switch (i) { 375 case ELINK_LARGEWIN_PROBE: 376 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 377 sc->ep_pktlenshift = 0; 378 break; 379 380 case (ELINK_LARGEWIN_PROBE << 2): 381 sc->ep_pktlenshift = 2; 382 break; 383 384 default: 385 aprint_error_dev(sc->sc_dev, 386 "wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 387 "Interface disabled\n", 388 ELINK_LARGEWIN_PROBE, (int) i); 389 return (1); 390 } 391 392 /* 393 * Ensure Tx-available interrupts are enabled for 394 * start the interface. 395 * XXX should be in epinit()? 396 */ 397 bus_space_write_2(iot, ioh, ELINK_COMMAND, 398 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 399 400 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 401 ifp->if_softc = sc; 402 ifp->if_start = epstart; 403 ifp->if_ioctl = epioctl; 404 ifp->if_watchdog = epwatchdog; 405 ifp->if_init = epinit; 406 ifp->if_stop = epstop; 407 ifp->if_flags = 408 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 409 IFQ_SET_READY(&ifp->if_snd); 410 411 if_attach(ifp); 412 ether_ifattach(ifp, enaddr); 413 414 /* 415 * Finish configuration: 416 * determine chipset if the front-end couldn't do so, 417 * show board details, set media. 418 */ 419 420 /* 421 * Print RAM size. We also print the Ethernet address in here. 422 * It's extracted from the ifp, so we have to make sure it's 423 * been attached first. 424 */ 425 ep_internalconfig(sc); 426 GO_WINDOW(0); 427 428 /* 429 * Display some additional information, if pertinent. 430 */ 431 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 432 aprint_normal_dev(sc->sc_dev, "RoadRunner FIFO buffer enabled\n"); 433 434 /* 435 * Initialize our media structures and MII info. We'll 436 * probe the MII if we discover that we have one. 437 */ 438 sc->sc_mii.mii_ifp = ifp; 439 sc->sc_mii.mii_readreg = ep_mii_readreg; 440 sc->sc_mii.mii_writereg = ep_mii_writereg; 441 sc->sc_mii.mii_statchg = ep_statchg; 442 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, ep_media_change, 443 ep_media_status); 444 445 /* 446 * All CORKSCREW chips have MII. 447 */ 448 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) 449 sc->ep_flags |= ELINK_FLAGS_MII; 450 451 /* 452 * Now, determine which media we have. 453 */ 454 switch (sc->ep_chipset) { 455 case ELINK_CHIPSET_ROADRUNNER: 456 if (sc->ep_flags & ELINK_FLAGS_MII) { 457 ep_roadrunner_mii_enable(sc); 458 GO_WINDOW(0); 459 } 460 /* FALLTHROUGH */ 461 462 case ELINK_CHIPSET_CORKSCREW: 463 case ELINK_CHIPSET_BOOMERANG: 464 /* 465 * If the device has MII, probe it. We won't be using 466 * any `native' media in this case, only PHYs. If 467 * we don't, just treat the Boomerang like the Vortex. 468 */ 469 if (sc->ep_flags & ELINK_FLAGS_MII) { 470 mii_attach(sc->sc_dev, &sc->sc_mii, 0xffffffff, 471 MII_PHY_ANY, MII_OFFSET_ANY, 0); 472 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 473 ifmedia_add(&sc->sc_mii.mii_media, 474 IFM_ETHER|IFM_NONE, 0, NULL); 475 ifmedia_set(&sc->sc_mii.mii_media, 476 IFM_ETHER|IFM_NONE); 477 } else { 478 ifmedia_set(&sc->sc_mii.mii_media, 479 IFM_ETHER|IFM_AUTO); 480 } 481 break; 482 } 483 /* FALLTHROUGH */ 484 485 case ELINK_CHIPSET_VORTEX: 486 ep_vortex_probemedia(sc); 487 break; 488 489 default: 490 ep_509_probemedia(sc); 491 break; 492 } 493 494 GO_WINDOW(1); /* Window 1 is operating window */ 495 496 #if NRND > 0 497 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 498 RND_TYPE_NET, 0); 499 #endif 500 501 sc->tx_start_thresh = 20; /* probably a good starting point. */ 502 503 /* Establish callback to reset card when we reboot. */ 504 if (pmf_device_register1(sc->sc_dev, NULL, NULL, epshutdown)) 505 pmf_class_network_register(sc->sc_dev, ifp); 506 else 507 aprint_error_dev(sc->sc_dev, 508 "couldn't establish power handler\n"); 509 510 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 511 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 512 513 /* The attach is successful. */ 514 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 515 return (0); 516 } 517 518 519 /* 520 * Show interface-model-independent info from window 3 521 * internal-configuration register. 522 */ 523 void 524 ep_internalconfig(struct ep_softc *sc) 525 { 526 bus_space_tag_t iot = sc->sc_iot; 527 bus_space_handle_t ioh = sc->sc_ioh; 528 529 u_int config0; 530 u_int config1; 531 532 int ram_size, ram_width, ram_split; 533 /* 534 * NVRAM buffer Rx:Tx config names for busmastering cards 535 * (Demon, Vortex, and later). 536 */ 537 const char *const onboard_ram_config[] = { 538 "5:3", "3:1", "1:1", "3:5" }; 539 540 GO_WINDOW(3); 541 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 542 config1 = (u_int)bus_space_read_2(iot, ioh, 543 ELINK_W3_INTERNAL_CONFIG + 2); 544 GO_WINDOW(0); 545 546 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 547 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 548 549 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 550 551 aprint_normal_dev(sc->sc_dev, "address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 552 ether_sprintf(CLLADDR(sc->sc_ethercom.ec_if.if_sadl)), 553 8 << ram_size, 554 (ram_width) ? "word" : "byte", 555 onboard_ram_config[ram_split]); 556 } 557 558 559 /* 560 * Find supported media on 3c509-generation hardware that doesn't have 561 * a "reset_options" register in window 3. 562 * Use the config_cntrl register in window 0 instead. 563 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 564 * that implement CONFIG_CTRL. We don't have a good way to set the 565 * default active medium; punt to ifconfig instead. 566 */ 567 void 568 ep_509_probemedia(struct ep_softc *sc) 569 { 570 bus_space_tag_t iot = sc->sc_iot; 571 bus_space_handle_t ioh = sc->sc_ioh; 572 struct ifmedia *ifm = &sc->sc_mii.mii_media; 573 u_int16_t ep_w0_config, port; 574 const struct ep_media *epm; 575 const char *sep = "", *defmedianame = NULL; 576 int defmedia = 0; 577 578 GO_WINDOW(0); 579 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 580 581 aprint_normal_dev(sc->sc_dev, ""); 582 583 /* Sanity check that there are any media! */ 584 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 585 aprint_error("no media present!\n"); 586 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 587 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 588 return; 589 } 590 591 /* 592 * Get the default media from the EEPROM. 593 */ 594 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 595 596 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 597 598 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 599 if (ep_w0_config & epm->epm_mpbit) { 600 /* 601 * This simple test works because 509 chipsets 602 * don't do full-duplex. 603 */ 604 if (epm->epm_epmedia == port || defmedia == 0) { 605 defmedia = epm->epm_ifmedia; 606 defmedianame = epm->epm_name; 607 } 608 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 609 NULL); 610 PRINT(epm->epm_name); 611 } 612 } 613 614 #undef PRINT 615 616 #ifdef DIAGNOSTIC 617 if (defmedia == 0) 618 panic("ep_509_probemedia: impossible"); 619 #endif 620 621 aprint_normal(" (default %s)\n", defmedianame); 622 ifmedia_set(ifm, defmedia); 623 } 624 625 /* 626 * Find media present on large-packet-capable elink3 devices. 627 * Show onboard configuration of large-packet-capable elink3 devices 628 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 629 * Use media and card-version info in window 3 instead. 630 */ 631 void 632 ep_vortex_probemedia(struct ep_softc *sc) 633 { 634 bus_space_tag_t iot = sc->sc_iot; 635 bus_space_handle_t ioh = sc->sc_ioh; 636 struct ifmedia *ifm = &sc->sc_mii.mii_media; 637 const struct ep_media *epm; 638 u_int config1; 639 int reset_options; 640 int default_media; /* 3-bit encoding of default (EEPROM) media */ 641 int defmedia = 0; 642 const char *sep = "", *defmedianame = NULL; 643 644 GO_WINDOW(3); 645 config1 = (u_int)bus_space_read_2(iot, ioh, 646 ELINK_W3_INTERNAL_CONFIG + 2); 647 reset_options = (int)bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 648 GO_WINDOW(0); 649 650 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 651 652 aprint_normal_dev(sc->sc_dev, ""); 653 654 /* Sanity check that there are any media! */ 655 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 656 aprint_error("no media present!\n"); 657 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 658 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 659 return; 660 } 661 662 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 663 664 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 665 if (reset_options & epm->epm_mpbit) { 666 /* 667 * Default media is a little more complicated 668 * on the Vortex. We support full-duplex which 669 * uses the same reset options bit. 670 * 671 * XXX Check EEPROM for default to FDX? 672 */ 673 if (epm->epm_epmedia == default_media) { 674 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 675 defmedia = epm->epm_ifmedia; 676 defmedianame = epm->epm_name; 677 } 678 } else if (defmedia == 0) { 679 defmedia = epm->epm_ifmedia; 680 defmedianame = epm->epm_name; 681 } 682 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 683 NULL); 684 PRINT(epm->epm_name); 685 } 686 } 687 688 #undef PRINT 689 690 #ifdef DIAGNOSTIC 691 if (defmedia == 0) 692 panic("ep_vortex_probemedia: impossible"); 693 #endif 694 695 aprint_normal(" (default %s)\n", defmedianame); 696 ifmedia_set(ifm, defmedia); 697 } 698 699 /* 700 * One second timer, used to tick the MII. 701 */ 702 void 703 ep_tick(void *arg) 704 { 705 struct ep_softc *sc = arg; 706 int s; 707 708 #ifdef DIAGNOSTIC 709 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 710 panic("ep_tick"); 711 #endif 712 713 if (!device_is_active(sc->sc_dev)) 714 return; 715 716 s = splnet(); 717 mii_tick(&sc->sc_mii); 718 splx(s); 719 720 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 721 } 722 723 /* 724 * Bring device up. 725 * 726 * The order in here seems important. Otherwise we may not receive 727 * interrupts. ?! 728 */ 729 int 730 epinit(struct ifnet *ifp) 731 { 732 struct ep_softc *sc = ifp->if_softc; 733 bus_space_tag_t iot = sc->sc_iot; 734 bus_space_handle_t ioh = sc->sc_ioh; 735 int i, error; 736 const u_int8_t *addr; 737 738 if (!sc->enabled && (error = epenable(sc)) != 0) 739 return (error); 740 741 /* Make sure any pending reset has completed before touching board */ 742 ep_finish_reset(iot, ioh); 743 744 /* 745 * Cancel any pending I/O. 746 */ 747 epstop(ifp, 0); 748 749 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 750 && sc->bustype != ELINK_BUS_MCA) { 751 GO_WINDOW(0); 752 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 753 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 754 ENABLE_DRQ_IRQ); 755 } 756 757 if (sc->bustype == ELINK_BUS_PCMCIA) { 758 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 759 } 760 761 GO_WINDOW(2); 762 /* Reload the ether_addr. */ 763 addr = CLLADDR(ifp->if_sadl); 764 for (i = 0; i < 6; i += 2) 765 bus_space_write_2(iot, ioh, ELINK_W2_ADDR_0 + i, 766 (addr[i] << 0) | (addr[i + 1] << 8)); 767 768 /* 769 * Reset the station-address receive filter. 770 * A bug workaround for busmastering (Vortex, Demon) cards. 771 */ 772 for (i = 0; i < 6; i += 2) 773 bus_space_write_2(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 774 775 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 776 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 777 778 GO_WINDOW(1); /* Window 1 is operating window */ 779 for (i = 0; i < 31; i++) 780 (void)bus_space_read_2(iot, ioh, 781 ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 782 783 /* Set threshold for Tx-space available interrupt. */ 784 bus_space_write_2(iot, ioh, ELINK_COMMAND, 785 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 786 787 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 788 /* 789 * Enable options in the PCMCIA LAN COR register, via 790 * RoadRunner Window 1. 791 * 792 * XXX MAGIC CONSTANTS! 793 */ 794 u_int16_t cor; 795 796 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 797 798 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 799 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 800 cor |= 0x10; 801 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 802 cor |= 0x20; 803 bus_space_write_2(iot, ioh, 0, cor); 804 805 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 806 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 807 808 if (sc->ep_flags & ELINK_FLAGS_MII) { 809 ep_roadrunner_mii_enable(sc); 810 GO_WINDOW(1); 811 } 812 } 813 814 /* Enable interrupts. */ 815 bus_space_write_2(iot, ioh, ELINK_COMMAND, 816 SET_RD_0_MASK | WATCHED_INTERRUPTS); 817 bus_space_write_2(iot, ioh, ELINK_COMMAND, 818 SET_INTR_MASK | WATCHED_INTERRUPTS); 819 820 /* 821 * Attempt to get rid of any stray interrupts that occurred during 822 * configuration. On the i386 this isn't possible because one may 823 * already be queued. However, a single stray interrupt is 824 * unimportant. 825 */ 826 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 827 828 epsetfilter(sc); 829 epsetmedia(sc); 830 831 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 832 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 833 834 epmbuffill(sc); 835 836 /* Interface is now `running', with no output active. */ 837 ifp->if_flags |= IFF_RUNNING; 838 ifp->if_flags &= ~IFF_OACTIVE; 839 840 if (sc->ep_flags & ELINK_FLAGS_MII) { 841 /* Start the one second clock. */ 842 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 843 } 844 845 /* Attempt to start output, if any. */ 846 epstart(ifp); 847 848 return (0); 849 } 850 851 852 /* 853 * Set multicast receive filter. 854 * elink3 hardware has no selective multicast filter in hardware. 855 * Enable reception of all multicasts and filter in software. 856 */ 857 void 858 epsetfilter(struct ep_softc *sc) 859 { 860 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 861 862 GO_WINDOW(1); /* Window 1 is operating window */ 863 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 864 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 865 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 866 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 867 } 868 869 int 870 ep_media_change(struct ifnet *ifp) 871 { 872 struct ep_softc *sc = ifp->if_softc; 873 874 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 875 epreset(sc); 876 877 return (0); 878 } 879 880 /* 881 * Reset and enable the MII on the RoadRunner. 882 */ 883 void 884 ep_roadrunner_mii_enable(struct ep_softc *sc) 885 { 886 bus_space_tag_t iot = sc->sc_iot; 887 bus_space_handle_t ioh = sc->sc_ioh; 888 889 GO_WINDOW(3); 890 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 891 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 892 delay(1000); 893 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 894 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 895 ELINK_RUNNER_ENABLE_MII); 896 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 897 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 898 delay(1000); 899 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 900 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 901 } 902 903 /* 904 * Set the card to use the specified media. 905 */ 906 void 907 epsetmedia(struct ep_softc *sc) 908 { 909 bus_space_tag_t iot = sc->sc_iot; 910 bus_space_handle_t ioh = sc->sc_ioh; 911 912 /* Turn everything off. First turn off linkbeat and UTP. */ 913 GO_WINDOW(4); 914 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 915 916 /* Turn off coax */ 917 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 918 delay(1000); 919 920 /* 921 * If the device has MII, select it, and then tell the 922 * PHY which media to use. 923 */ 924 if (sc->ep_flags & ELINK_FLAGS_MII) { 925 int config0, config1; 926 927 GO_WINDOW(3); 928 929 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 930 int resopt; 931 932 resopt = bus_space_read_2(iot, ioh, 933 ELINK_W3_RESET_OPTIONS); 934 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 935 resopt | ELINK_RUNNER_ENABLE_MII); 936 } 937 938 config0 = (u_int)bus_space_read_2(iot, ioh, 939 ELINK_W3_INTERNAL_CONFIG); 940 config1 = (u_int)bus_space_read_2(iot, ioh, 941 ELINK_W3_INTERNAL_CONFIG + 2); 942 943 config1 = config1 & ~CONFIG_MEDIAMASK; 944 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 945 946 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 947 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 948 config1); 949 GO_WINDOW(1); /* back to operating window */ 950 951 mii_mediachg(&sc->sc_mii); 952 return; 953 } 954 955 /* 956 * Now turn on the selected media/transceiver. 957 */ 958 GO_WINDOW(4); 959 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 960 case IFM_10_T: 961 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 962 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 963 break; 964 965 case IFM_10_2: 966 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 967 DELAY(1000); /* 50ms not enmough? */ 968 break; 969 970 case IFM_100_TX: 971 case IFM_100_FX: 972 case IFM_100_T4: /* XXX check documentation */ 973 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 974 LINKBEAT_ENABLE); 975 DELAY(1000); /* not strictly necessary? */ 976 break; 977 978 case IFM_10_5: 979 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 980 SQE_ENABLE); 981 DELAY(1000); /* not strictly necessary? */ 982 break; 983 984 case IFM_MANUAL: 985 /* 986 * Nothing to do here; we are actually enabling the 987 * external PHY on the MII port. 988 */ 989 break; 990 991 case IFM_NONE: 992 printf("%s: interface disabled\n", device_xname(sc->sc_dev)); 993 return; 994 995 default: 996 panic("epsetmedia: impossible"); 997 } 998 999 /* 1000 * Tell the chip which port to use. 1001 */ 1002 switch (sc->ep_chipset) { 1003 case ELINK_CHIPSET_VORTEX: 1004 case ELINK_CHIPSET_BOOMERANG: 1005 { 1006 int mctl, config0, config1; 1007 1008 GO_WINDOW(3); 1009 config0 = (u_int)bus_space_read_2(iot, ioh, 1010 ELINK_W3_INTERNAL_CONFIG); 1011 config1 = (u_int)bus_space_read_2(iot, ioh, 1012 ELINK_W3_INTERNAL_CONFIG + 2); 1013 1014 config1 = config1 & ~CONFIG_MEDIAMASK; 1015 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1016 CONFIG_MEDIAMASK_SHIFT); 1017 1018 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1019 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1020 config1); 1021 1022 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1023 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1024 mctl |= MAC_CONTROL_FDX; 1025 else 1026 mctl &= ~MAC_CONTROL_FDX; 1027 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1028 break; 1029 } 1030 default: 1031 { 1032 int w0_addr_cfg; 1033 1034 GO_WINDOW(0); 1035 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1036 w0_addr_cfg &= 0x3fff; 1037 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1038 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1039 DELAY(1000); 1040 break; 1041 } 1042 } 1043 1044 GO_WINDOW(1); /* Window 1 is operating window */ 1045 } 1046 1047 /* 1048 * Get currently-selected media from card. 1049 * (if_media callback, may be called before interface is brought up). 1050 */ 1051 void 1052 ep_media_status(struct ifnet *ifp, struct ifmediareq *req) 1053 { 1054 struct ep_softc *sc = ifp->if_softc; 1055 bus_space_tag_t iot = sc->sc_iot; 1056 bus_space_handle_t ioh = sc->sc_ioh; 1057 1058 if (sc->enabled == 0) { 1059 req->ifm_active = IFM_ETHER|IFM_NONE; 1060 req->ifm_status = 0; 1061 return; 1062 } 1063 1064 /* 1065 * If we have MII, go ask the PHY what's going on. 1066 */ 1067 if (sc->ep_flags & ELINK_FLAGS_MII) { 1068 mii_pollstat(&sc->sc_mii); 1069 req->ifm_active = sc->sc_mii.mii_media_active; 1070 req->ifm_status = sc->sc_mii.mii_media_status; 1071 return; 1072 } 1073 1074 /* 1075 * Ok, at this point we claim that our active media is 1076 * the currently selected media. We'll update our status 1077 * if our chipset allows us to detect link. 1078 */ 1079 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1080 req->ifm_status = 0; 1081 1082 switch (sc->ep_chipset) { 1083 case ELINK_CHIPSET_VORTEX: 1084 case ELINK_CHIPSET_BOOMERANG: 1085 GO_WINDOW(4); 1086 req->ifm_status = IFM_AVALID; 1087 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1088 LINKBEAT_DETECT) 1089 req->ifm_status |= IFM_ACTIVE; 1090 GO_WINDOW(1); /* back to operating window */ 1091 break; 1092 } 1093 } 1094 1095 1096 1097 /* 1098 * Start outputting on the interface. 1099 * Always called as splnet(). 1100 */ 1101 void 1102 epstart(struct ifnet *ifp) 1103 { 1104 struct ep_softc *sc = ifp->if_softc; 1105 bus_space_tag_t iot = sc->sc_iot; 1106 bus_space_handle_t ioh = sc->sc_ioh; 1107 struct mbuf *m, *m0; 1108 int sh, len, pad; 1109 bus_size_t txreg; 1110 1111 /* Don't transmit if interface is busy or not running */ 1112 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1113 return; 1114 1115 startagain: 1116 /* Sneak a peek at the next packet */ 1117 IFQ_POLL(&ifp->if_snd, m0); 1118 if (m0 == 0) 1119 return; 1120 1121 /* We need to use m->m_pkthdr.len, so require the header */ 1122 if ((m0->m_flags & M_PKTHDR) == 0) 1123 panic("epstart: no header mbuf"); 1124 len = m0->m_pkthdr.len; 1125 1126 pad = (4 - len) & 3; 1127 1128 /* 1129 * The 3c509 automatically pads short packets to minimum ethernet 1130 * length, but we drop packets that are too large. Perhaps we should 1131 * truncate them instead? 1132 */ 1133 if (len + pad > ETHER_MAX_LEN) { 1134 /* packet is obviously too large: toss it */ 1135 ++ifp->if_oerrors; 1136 IFQ_DEQUEUE(&ifp->if_snd, m0); 1137 m_freem(m0); 1138 goto readcheck; 1139 } 1140 1141 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1142 len + pad + 4) { 1143 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1144 SET_TX_AVAIL_THRESH | 1145 ((len + pad + 4) >> sc->ep_pktlenshift)); 1146 /* not enough room in FIFO */ 1147 ifp->if_flags |= IFF_OACTIVE; 1148 return; 1149 } else { 1150 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1151 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1152 } 1153 1154 IFQ_DEQUEUE(&ifp->if_snd, m0); 1155 if (m0 == 0) /* not really needed */ 1156 return; 1157 1158 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1159 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1160 1161 #if NBPFILTER > 0 1162 if (ifp->if_bpf) 1163 bpf_mtap(ifp->if_bpf, m0); 1164 #endif 1165 1166 /* 1167 * Do the output at a high interrupt priority level so that an 1168 * interrupt from another device won't cause a FIFO underrun. 1169 * We choose splsched() since that blocks essentially everything 1170 * except for interrupts from serial devices (which typically 1171 * lose data if their interrupt isn't serviced fast enough). 1172 * 1173 * XXX THIS CAN CAUSE CLOCK DRIFT! 1174 */ 1175 sh = splsched(); 1176 1177 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1178 1179 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1180 /* 1181 * Prime the FIFO buffer counter (number of 16-bit 1182 * words about to be written to the FIFO). 1183 * 1184 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1185 * COUNTER IS NON-ZERO! 1186 */ 1187 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1188 (len + pad) >> 1); 1189 } 1190 1191 bus_space_write_2(iot, ioh, txreg, len); 1192 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1193 if (ELINK_IS_BUS_32(sc->bustype)) { 1194 for (m = m0; m;) { 1195 if (m->m_len > 3) { 1196 /* align our reads from core */ 1197 if (mtod(m, u_long) & 3) { 1198 u_long count = 1199 4 - (mtod(m, u_long) & 3); 1200 bus_space_write_multi_1(iot, ioh, 1201 txreg, mtod(m, u_int8_t *), count); 1202 m->m_data = 1203 (void *)(mtod(m, u_long) + count); 1204 m->m_len -= count; 1205 } 1206 bus_space_write_multi_stream_4(iot, ioh, 1207 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1208 m->m_data = (void *)(mtod(m, u_long) + 1209 (u_long)(m->m_len & ~3)); 1210 m->m_len -= m->m_len & ~3; 1211 } 1212 if (m->m_len) { 1213 bus_space_write_multi_1(iot, ioh, 1214 txreg, mtod(m, u_int8_t *), m->m_len); 1215 } 1216 MFREE(m, m0); 1217 m = m0; 1218 } 1219 } else { 1220 for (m = m0; m;) { 1221 if (m->m_len > 1) { 1222 if (mtod(m, u_long) & 1) { 1223 bus_space_write_1(iot, ioh, 1224 txreg, *(mtod(m, u_int8_t *))); 1225 m->m_data = 1226 (void *)(mtod(m, u_long) + 1); 1227 m->m_len -= 1; 1228 } 1229 bus_space_write_multi_stream_2(iot, ioh, 1230 txreg, mtod(m, u_int16_t *), 1231 m->m_len >> 1); 1232 } 1233 if (m->m_len & 1) { 1234 bus_space_write_1(iot, ioh, txreg, 1235 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1236 } 1237 MFREE(m, m0); 1238 m = m0; 1239 } 1240 } 1241 while (pad--) 1242 bus_space_write_1(iot, ioh, txreg, 0); 1243 1244 splx(sh); 1245 1246 ++ifp->if_opackets; 1247 1248 readcheck: 1249 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1250 ERR_INCOMPLETE) == 0) { 1251 /* We received a complete packet. */ 1252 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1253 1254 if ((status & INTR_LATCH) == 0) { 1255 /* 1256 * No interrupt, read the packet and continue 1257 * Is this supposed to happen? Is my motherboard 1258 * completely busted? 1259 */ 1260 epread(sc); 1261 } else { 1262 /* Got an interrupt, return so that it gets serviced. */ 1263 return; 1264 } 1265 } else { 1266 /* Check if we are stuck and reset [see XXX comment] */ 1267 if (epstatus(sc)) { 1268 if (ifp->if_flags & IFF_DEBUG) 1269 printf("%s: adapter reset\n", 1270 device_xname(sc->sc_dev)); 1271 epreset(sc); 1272 } 1273 } 1274 1275 goto startagain; 1276 } 1277 1278 1279 /* 1280 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1281 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1282 * We detect this situation and we reset the adapter. 1283 * It happens at times when there is a lot of broadcast traffic 1284 * on the cable (once in a blue moon). 1285 */ 1286 static int 1287 epstatus(struct ep_softc *sc) 1288 { 1289 bus_space_tag_t iot = sc->sc_iot; 1290 bus_space_handle_t ioh = sc->sc_ioh; 1291 u_int16_t fifost; 1292 1293 /* 1294 * Check the FIFO status and act accordingly 1295 */ 1296 GO_WINDOW(4); 1297 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1298 GO_WINDOW(1); 1299 1300 if (fifost & FIFOS_RX_UNDERRUN) { 1301 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1302 printf("%s: RX underrun\n", device_xname(sc->sc_dev)); 1303 epreset(sc); 1304 return 0; 1305 } 1306 1307 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1308 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1309 printf("%s: RX Status overrun\n", device_xname(sc->sc_dev)); 1310 return 1; 1311 } 1312 1313 if (fifost & FIFOS_RX_OVERRUN) { 1314 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1315 printf("%s: RX overrun\n", device_xname(sc->sc_dev)); 1316 return 1; 1317 } 1318 1319 if (fifost & FIFOS_TX_OVERRUN) { 1320 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1321 printf("%s: TX overrun\n", device_xname(sc->sc_dev)); 1322 epreset(sc); 1323 return 0; 1324 } 1325 1326 return 0; 1327 } 1328 1329 1330 static void 1331 eptxstat(struct ep_softc *sc) 1332 { 1333 bus_space_tag_t iot = sc->sc_iot; 1334 bus_space_handle_t ioh = sc->sc_ioh; 1335 int i; 1336 1337 /* 1338 * We need to read+write TX_STATUS until we get a 0 status 1339 * in order to turn off the interrupt flag. 1340 */ 1341 while ((i = bus_space_read_2(iot, ioh, 1342 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1343 bus_space_write_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1344 0x0); 1345 1346 if (i & TXS_JABBER) { 1347 ++sc->sc_ethercom.ec_if.if_oerrors; 1348 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1349 printf("%s: jabber (%x)\n", 1350 device_xname(sc->sc_dev), i); 1351 epreset(sc); 1352 } else if (i & TXS_UNDERRUN) { 1353 ++sc->sc_ethercom.ec_if.if_oerrors; 1354 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1355 printf("%s: fifo underrun (%x) @%d\n", 1356 device_xname(sc->sc_dev), i, 1357 sc->tx_start_thresh); 1358 if (sc->tx_succ_ok < 100) 1359 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1360 sc->tx_start_thresh + 20); 1361 sc->tx_succ_ok = 0; 1362 epreset(sc); 1363 } else if (i & TXS_MAX_COLLISION) { 1364 ++sc->sc_ethercom.ec_if.if_collisions; 1365 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1366 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1367 } else 1368 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1369 } 1370 } 1371 1372 int 1373 epintr(void *arg) 1374 { 1375 struct ep_softc *sc = arg; 1376 bus_space_tag_t iot = sc->sc_iot; 1377 bus_space_handle_t ioh = sc->sc_ioh; 1378 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1379 u_int16_t status; 1380 int ret = 0; 1381 1382 if (sc->enabled == 0 || !device_is_active(sc->sc_dev)) 1383 return (0); 1384 1385 1386 for (;;) { 1387 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1388 1389 if ((status & WATCHED_INTERRUPTS) == 0) { 1390 if ((status & INTR_LATCH) == 0) { 1391 #if 0 1392 printf("%s: intr latch cleared\n", 1393 device_xname(&sc->sc_dev)); 1394 #endif 1395 break; 1396 } 1397 } 1398 1399 ret = 1; 1400 1401 /* 1402 * Acknowledge any interrupts. It's important that we do this 1403 * first, since there would otherwise be a race condition. 1404 * Due to the i386 interrupt queueing, we may get spurious 1405 * interrupts occasionally. 1406 */ 1407 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1408 (status & (INTR_LATCH | ALL_INTERRUPTS))); 1409 1410 #if 0 1411 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1412 1413 printf("%s: intr%s%s%s%s\n", device_xname(&sc->sc_dev), 1414 (status & RX_COMPLETE)?" RX_COMPLETE":"", 1415 (status & TX_COMPLETE)?" TX_COMPLETE":"", 1416 (status & TX_AVAIL)?" TX_AVAIL":"", 1417 (status & CARD_FAILURE)?" CARD_FAILURE":""); 1418 #endif 1419 1420 if (status & RX_COMPLETE) { 1421 epread(sc); 1422 } 1423 if (status & TX_AVAIL) { 1424 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1425 epstart(&sc->sc_ethercom.ec_if); 1426 } 1427 if (status & CARD_FAILURE) { 1428 printf("%s: adapter failure (%x)\n", 1429 device_xname(sc->sc_dev), status); 1430 #if 1 1431 epinit(ifp); 1432 #else 1433 epreset(sc); 1434 #endif 1435 return (1); 1436 } 1437 if (status & TX_COMPLETE) { 1438 eptxstat(sc); 1439 epstart(ifp); 1440 } 1441 1442 #if NRND > 0 1443 if (status) 1444 rnd_add_uint32(&sc->rnd_source, status); 1445 #endif 1446 } 1447 1448 /* no more interrupts */ 1449 return (ret); 1450 } 1451 1452 void 1453 epread(struct ep_softc *sc) 1454 { 1455 bus_space_tag_t iot = sc->sc_iot; 1456 bus_space_handle_t ioh = sc->sc_ioh; 1457 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1458 struct mbuf *m; 1459 int len; 1460 1461 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1462 1463 again: 1464 if (ifp->if_flags & IFF_DEBUG) { 1465 int err = len & ERR_MASK; 1466 const char *s = NULL; 1467 1468 if (len & ERR_INCOMPLETE) 1469 s = "incomplete packet"; 1470 else if (err == ERR_OVERRUN) 1471 s = "packet overrun"; 1472 else if (err == ERR_RUNT) 1473 s = "runt packet"; 1474 else if (err == ERR_ALIGNMENT) 1475 s = "bad alignment"; 1476 else if (err == ERR_CRC) 1477 s = "bad crc"; 1478 else if (err == ERR_OVERSIZE) 1479 s = "oversized packet"; 1480 else if (err == ERR_DRIBBLE) 1481 s = "dribble bits"; 1482 1483 if (s) 1484 printf("%s: %s\n", device_xname(sc->sc_dev), s); 1485 } 1486 1487 if (len & ERR_INCOMPLETE) 1488 return; 1489 1490 if (len & ERR_RX) { 1491 ++ifp->if_ierrors; 1492 goto abort; 1493 } 1494 1495 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1496 1497 /* Pull packet off interface. */ 1498 m = epget(sc, len); 1499 if (m == 0) { 1500 ifp->if_ierrors++; 1501 goto abort; 1502 } 1503 1504 ++ifp->if_ipackets; 1505 1506 #if NBPFILTER > 0 1507 /* 1508 * Check if there's a BPF listener on this interface. 1509 * If so, hand off the raw packet to BPF. 1510 */ 1511 if (ifp->if_bpf) 1512 bpf_mtap(ifp->if_bpf, m); 1513 #endif 1514 1515 (*ifp->if_input)(ifp, m); 1516 1517 /* 1518 * In periods of high traffic we can actually receive enough 1519 * packets so that the fifo overrun bit will be set at this point, 1520 * even though we just read a packet. In this case we 1521 * are not going to receive any more interrupts. We check for 1522 * this condition and read again until the fifo is not full. 1523 * We could simplify this test by not using epstatus(), but 1524 * rechecking the RX_STATUS register directly. This test could 1525 * result in unnecessary looping in cases where there is a new 1526 * packet but the fifo is not full, but it will not fix the 1527 * stuck behavior. 1528 * 1529 * Even with this improvement, we still get packet overrun errors 1530 * which are hurting performance. Maybe when I get some more time 1531 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1532 */ 1533 if (epstatus(sc)) { 1534 len = bus_space_read_2(iot, ioh, 1535 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1536 /* Check if we are stuck and reset [see XXX comment] */ 1537 if (len & ERR_INCOMPLETE) { 1538 if (ifp->if_flags & IFF_DEBUG) 1539 printf("%s: adapter reset\n", 1540 device_xname(sc->sc_dev)); 1541 epreset(sc); 1542 return; 1543 } 1544 goto again; 1545 } 1546 1547 return; 1548 1549 abort: 1550 ep_discard_rxtop(iot, ioh); 1551 1552 } 1553 1554 struct mbuf * 1555 epget(struct ep_softc *sc, int totlen) 1556 { 1557 bus_space_tag_t iot = sc->sc_iot; 1558 bus_space_handle_t ioh = sc->sc_ioh; 1559 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1560 struct mbuf *m; 1561 bus_size_t rxreg; 1562 int len, remaining; 1563 int s; 1564 void *newdata; 1565 u_long offset; 1566 1567 m = sc->mb[sc->next_mb]; 1568 sc->mb[sc->next_mb] = 0; 1569 if (m == 0) { 1570 MGETHDR(m, M_DONTWAIT, MT_DATA); 1571 if (m == 0) 1572 return 0; 1573 } else { 1574 /* If the queue is no longer full, refill. */ 1575 if (sc->last_mb == sc->next_mb) 1576 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1577 1578 /* Convert one of our saved mbuf's. */ 1579 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1580 m->m_data = m->m_pktdat; 1581 m->m_flags = M_PKTHDR; 1582 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr)); 1583 } 1584 m->m_pkthdr.rcvif = ifp; 1585 m->m_pkthdr.len = totlen; 1586 len = MHLEN; 1587 1588 /* 1589 * Allocate big enough space to hold whole packet, to avoid 1590 * allocating new mbufs on splsched(). 1591 */ 1592 if (totlen + ALIGNBYTES > len) { 1593 if (totlen + ALIGNBYTES > MCLBYTES) { 1594 len = ALIGN(totlen + ALIGNBYTES); 1595 MEXTMALLOC(m, len, M_DONTWAIT); 1596 } else { 1597 len = MCLBYTES; 1598 MCLGET(m, M_DONTWAIT); 1599 } 1600 if ((m->m_flags & M_EXT) == 0) { 1601 m_free(m); 1602 return 0; 1603 } 1604 } 1605 1606 /* align the struct ip header */ 1607 newdata = (char *)ALIGN(m->m_data + sizeof(struct ether_header)) 1608 - sizeof(struct ether_header); 1609 m->m_data = newdata; 1610 m->m_len = totlen; 1611 1612 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1613 remaining = totlen; 1614 offset = mtod(m, u_long); 1615 1616 /* 1617 * We read the packet at a high interrupt priority level so that 1618 * an interrupt from another device won't cause the card's packet 1619 * buffer to overflow. We choose splsched() since that blocks 1620 * essentially everything except for interrupts from serial 1621 * devices (which typically lose data if their interrupt isn't 1622 * serviced fast enough). 1623 * 1624 * XXX THIS CAN CAUSE CLOCK DRIFT! 1625 */ 1626 s = splsched(); 1627 1628 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1629 /* 1630 * Prime the FIFO buffer counter (number of 16-bit 1631 * words about to be read from the FIFO). 1632 * 1633 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1634 * COUNTER IS NON-ZERO! 1635 */ 1636 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1637 } 1638 1639 if (ELINK_IS_BUS_32(sc->bustype)) { 1640 /* 1641 * Read bytes up to the point where we are aligned. 1642 * (We can align to 4 bytes, rather than ALIGNBYTES, 1643 * here because we're later reading 4-byte chunks.) 1644 */ 1645 if ((remaining > 3) && (offset & 3)) { 1646 int count = (4 - (offset & 3)); 1647 bus_space_read_multi_1(iot, ioh, 1648 rxreg, (u_int8_t *) offset, count); 1649 offset += count; 1650 remaining -= count; 1651 } 1652 if (remaining > 3) { 1653 bus_space_read_multi_stream_4(iot, ioh, 1654 rxreg, (u_int32_t *) offset, 1655 remaining >> 2); 1656 offset += remaining & ~3; 1657 remaining &= 3; 1658 } 1659 if (remaining) { 1660 bus_space_read_multi_1(iot, ioh, 1661 rxreg, (u_int8_t *) offset, remaining); 1662 } 1663 } else { 1664 if ((remaining > 1) && (offset & 1)) { 1665 bus_space_read_multi_1(iot, ioh, 1666 rxreg, (u_int8_t *) offset, 1); 1667 remaining -= 1; 1668 offset += 1; 1669 } 1670 if (remaining > 1) { 1671 bus_space_read_multi_stream_2(iot, ioh, 1672 rxreg, (u_int16_t *) offset, 1673 remaining >> 1); 1674 offset += remaining & ~1; 1675 } 1676 if (remaining & 1) { 1677 bus_space_read_multi_1(iot, ioh, 1678 rxreg, (u_int8_t *) offset, remaining & 1); 1679 } 1680 } 1681 1682 ep_discard_rxtop(iot, ioh); 1683 1684 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1685 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1686 splx(s); 1687 1688 return (m); 1689 } 1690 1691 int 1692 epioctl(struct ifnet *ifp, u_long cmd, void *data) 1693 { 1694 struct ep_softc *sc = ifp->if_softc; 1695 struct ifreq *ifr = (struct ifreq *)data; 1696 int s, error = 0; 1697 1698 s = splnet(); 1699 1700 switch (cmd) { 1701 1702 case SIOCSIFMEDIA: 1703 case SIOCGIFMEDIA: 1704 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1705 break; 1706 1707 case SIOCADDMULTI: 1708 case SIOCDELMULTI: 1709 if (sc->enabled == 0) { 1710 error = EIO; 1711 break; 1712 } 1713 1714 default: 1715 error = ether_ioctl(ifp, cmd, data); 1716 1717 if (error == ENETRESET) { 1718 /* 1719 * Multicast list has changed; set the hardware filter 1720 * accordingly. 1721 */ 1722 if (ifp->if_flags & IFF_RUNNING) 1723 epreset(sc); 1724 error = 0; 1725 } 1726 break; 1727 } 1728 1729 splx(s); 1730 return (error); 1731 } 1732 1733 void 1734 epreset(struct ep_softc *sc) 1735 { 1736 int s; 1737 1738 s = splnet(); 1739 epinit(&sc->sc_ethercom.ec_if); 1740 splx(s); 1741 } 1742 1743 void 1744 epwatchdog(struct ifnet *ifp) 1745 { 1746 struct ep_softc *sc = ifp->if_softc; 1747 1748 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev)); 1749 ++sc->sc_ethercom.ec_if.if_oerrors; 1750 1751 epreset(sc); 1752 } 1753 1754 void 1755 epstop(struct ifnet *ifp, int disable) 1756 { 1757 struct ep_softc *sc = ifp->if_softc; 1758 bus_space_tag_t iot = sc->sc_iot; 1759 bus_space_handle_t ioh = sc->sc_ioh; 1760 1761 if (sc->ep_flags & ELINK_FLAGS_MII) { 1762 /* Stop the one second clock. */ 1763 callout_stop(&sc->sc_mbuf_callout); 1764 1765 /* Down the MII. */ 1766 mii_down(&sc->sc_mii); 1767 } 1768 1769 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1770 /* 1771 * Clear the FIFO buffer count, thus halting 1772 * any currently-running transactions. 1773 */ 1774 GO_WINDOW(1); /* sanity */ 1775 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1776 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1777 } 1778 1779 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1780 ep_discard_rxtop(iot, ioh); 1781 1782 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1783 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1784 1785 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1786 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1787 1788 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1789 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1790 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1791 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1792 1793 epmbufempty(sc); 1794 1795 if (disable) 1796 epdisable(sc); 1797 1798 ifp->if_flags &= ~IFF_RUNNING; 1799 } 1800 1801 1802 /* 1803 * Before reboots, reset card completely. 1804 */ 1805 static bool 1806 epshutdown(device_t self, int howto) 1807 { 1808 struct ep_softc *sc = device_private(self); 1809 int s = splnet(); 1810 1811 if (sc->enabled) { 1812 epstop(&sc->sc_ethercom.ec_if, 0); 1813 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1814 epdisable(sc); 1815 sc->enabled = 0; 1816 } 1817 splx(s); 1818 1819 return true; 1820 } 1821 1822 /* 1823 * We get eeprom data from the id_port given an offset into the 1824 * eeprom. Basically; after the ID_sequence is sent to all of 1825 * the cards; they enter the ID_CMD state where they will accept 1826 * command requests. 0x80-0xbf loads the eeprom data. We then 1827 * read the port 16 times and with every read; the cards check 1828 * for contention (ie: if one card writes a 0 bit and another 1829 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1830 * each card compares the data on the bus; if there is a difference 1831 * then that card goes into ID_WAIT state again). In the meantime; 1832 * one bit of data is returned in the AX register which is conveniently 1833 * returned to us by bus_space_read_2(). Hence; we read 16 times getting one 1834 * bit of data with each read. 1835 * 1836 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1837 */ 1838 u_int16_t 1839 epreadeeprom(bus_space_tag_t iot, bus_space_handle_t ioh, int offset) 1840 { 1841 u_int16_t data = 0; 1842 int i; 1843 1844 bus_space_write_2(iot, ioh, 0, 0x80 + offset); 1845 delay(1000); 1846 for (i = 0; i < 16; i++) 1847 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1848 return (data); 1849 } 1850 1851 static int 1852 epbusyeeprom(struct ep_softc *sc) 1853 { 1854 bus_space_tag_t iot = sc->sc_iot; 1855 bus_space_handle_t ioh = sc->sc_ioh; 1856 bus_size_t eecmd; 1857 int i = 100, j; 1858 uint16_t busybit; 1859 1860 if (sc->bustype == ELINK_BUS_PCMCIA) { 1861 delay(1000); 1862 return 0; 1863 } 1864 1865 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1866 eecmd = CORK_ASIC_EEPROM_COMMAND; 1867 busybit = CORK_EEPROM_BUSY; 1868 } else { 1869 eecmd = ELINK_W0_EEPROM_COMMAND; 1870 busybit = EEPROM_BUSY; 1871 } 1872 1873 j = 0; /* bad GCC flow analysis */ 1874 while (i--) { 1875 j = bus_space_read_2(iot, ioh, eecmd); 1876 if (j & busybit) 1877 delay(100); 1878 else 1879 break; 1880 } 1881 if (i == 0) { 1882 aprint_normal("\n"); 1883 aprint_error_dev(sc->sc_dev, "eeprom failed to come ready\n"); 1884 return (1); 1885 } 1886 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW && 1887 (j & EEPROM_TST_MODE) != 0) { 1888 /* XXX PnP mode? */ 1889 printf("\n%s: erase pencil mark!\n", device_xname(sc->sc_dev)); 1890 return (1); 1891 } 1892 return (0); 1893 } 1894 1895 u_int16_t 1896 ep_read_eeprom(struct ep_softc *sc, u_int16_t offset) 1897 { 1898 bus_size_t eecmd, eedata; 1899 u_int16_t readcmd; 1900 1901 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1902 eecmd = CORK_ASIC_EEPROM_COMMAND; 1903 eedata = CORK_ASIC_EEPROM_DATA; 1904 } else { 1905 eecmd = ELINK_W0_EEPROM_COMMAND; 1906 eedata = ELINK_W0_EEPROM_DATA; 1907 } 1908 1909 /* 1910 * RoadRunner has a larger EEPROM, so a different read command 1911 * is required. 1912 */ 1913 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1914 readcmd = READ_EEPROM_RR; 1915 else 1916 readcmd = READ_EEPROM; 1917 1918 if (epbusyeeprom(sc)) 1919 return (0); /* XXX why is eeprom busy? */ 1920 1921 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset); 1922 1923 if (epbusyeeprom(sc)) 1924 return (0); /* XXX why is eeprom busy? */ 1925 1926 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata)); 1927 } 1928 1929 void 1930 epmbuffill(void *v) 1931 { 1932 struct ep_softc *sc = v; 1933 struct mbuf *m; 1934 int s, i; 1935 1936 s = splnet(); 1937 i = sc->last_mb; 1938 do { 1939 if (sc->mb[i] == 0) { 1940 MGET(m, M_DONTWAIT, MT_DATA); 1941 if (m == 0) 1942 break; 1943 sc->mb[i] = m; 1944 } 1945 i = (i + 1) % MAX_MBS; 1946 } while (i != sc->next_mb); 1947 sc->last_mb = i; 1948 /* If the queue was not filled, try again. */ 1949 if (sc->last_mb != sc->next_mb) 1950 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1951 splx(s); 1952 } 1953 1954 void 1955 epmbufempty(struct ep_softc *sc) 1956 { 1957 int s, i; 1958 1959 s = splnet(); 1960 for (i = 0; i < MAX_MBS; i++) { 1961 if (sc->mb[i]) { 1962 m_freem(sc->mb[i]); 1963 sc->mb[i] = NULL; 1964 } 1965 } 1966 sc->last_mb = sc->next_mb = 0; 1967 callout_stop(&sc->sc_mbuf_callout); 1968 splx(s); 1969 } 1970 1971 int 1972 epenable(struct ep_softc *sc) 1973 { 1974 1975 if (sc->enabled == 0 && sc->enable != NULL) { 1976 if ((*sc->enable)(sc) != 0) { 1977 aprint_error_dev(sc->sc_dev, "device enable failed\n"); 1978 return (EIO); 1979 } 1980 } 1981 1982 sc->enabled = 1; 1983 return (0); 1984 } 1985 1986 void 1987 epdisable(struct ep_softc *sc) 1988 { 1989 1990 if (sc->enabled != 0 && sc->disable != NULL) { 1991 (*sc->disable)(sc); 1992 sc->enabled = 0; 1993 } 1994 } 1995 1996 /* 1997 * ep_activate: 1998 * 1999 * Handle device activation/deactivation requests. 2000 */ 2001 int 2002 ep_activate(device_t self, enum devact act) 2003 { 2004 struct ep_softc *sc = device_private(self); 2005 2006 switch (act) { 2007 case DVACT_DEACTIVATE: 2008 if_deactivate(&sc->sc_ethercom.ec_if); 2009 return 0; 2010 default: 2011 return EOPNOTSUPP; 2012 } 2013 } 2014 2015 /* 2016 * ep_detach: 2017 * 2018 * Detach a elink3 interface. 2019 */ 2020 int 2021 ep_detach(device_t self, int flags) 2022 { 2023 struct ep_softc *sc = device_private(self); 2024 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2025 2026 /* Succeed now if there's no work to do. */ 2027 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2028 return (0); 2029 2030 epdisable(sc); 2031 2032 callout_stop(&sc->sc_mii_callout); 2033 callout_stop(&sc->sc_mbuf_callout); 2034 2035 if (sc->ep_flags & ELINK_FLAGS_MII) { 2036 /* Detach all PHYs */ 2037 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2038 } 2039 2040 /* Delete all remaining media. */ 2041 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2042 2043 #if NRND > 0 2044 rnd_detach_source(&sc->rnd_source); 2045 #endif 2046 ether_ifdetach(ifp); 2047 if_detach(ifp); 2048 2049 pmf_device_deregister(sc->sc_dev); 2050 2051 return (0); 2052 } 2053 2054 u_int32_t 2055 ep_mii_bitbang_read(device_t self) 2056 { 2057 struct ep_softc *sc = device_private(self); 2058 2059 /* We're already in Window 4. */ 2060 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2061 ELINK_W4_BOOM_PHYSMGMT)); 2062 } 2063 2064 void 2065 ep_mii_bitbang_write(device_t self, u_int32_t val) 2066 { 2067 struct ep_softc *sc = device_private(self); 2068 2069 /* We're already in Window 4. */ 2070 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2071 ELINK_W4_BOOM_PHYSMGMT, val); 2072 } 2073 2074 int 2075 ep_mii_readreg(device_t self, int phy, int reg) 2076 { 2077 struct ep_softc *sc = device_private(self); 2078 int val; 2079 2080 GO_WINDOW(4); 2081 2082 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2083 2084 GO_WINDOW(1); 2085 2086 return (val); 2087 } 2088 2089 void 2090 ep_mii_writereg(device_t self, int phy, int reg, int val) 2091 { 2092 struct ep_softc *sc = device_private(self); 2093 2094 GO_WINDOW(4); 2095 2096 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2097 2098 GO_WINDOW(1); 2099 } 2100 2101 void 2102 ep_statchg(device_t self) 2103 { 2104 struct ep_softc *sc = device_private(self); 2105 bus_space_tag_t iot = sc->sc_iot; 2106 bus_space_handle_t ioh = sc->sc_ioh; 2107 int mctl; 2108 2109 GO_WINDOW(3); 2110 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2111 if (sc->sc_mii.mii_media_active & IFM_FDX) 2112 mctl |= MAC_CONTROL_FDX; 2113 else 2114 mctl &= ~MAC_CONTROL_FDX; 2115 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2116 GO_WINDOW(1); /* back to operating window */ 2117 } 2118 2119 void 2120 ep_power(int why, void *arg) 2121 { 2122 struct ep_softc *sc = arg; 2123 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2124 int s; 2125 2126 s = splnet(); 2127 switch (why) { 2128 case PWR_SUSPEND: 2129 case PWR_STANDBY: 2130 epstop(ifp, 1); 2131 break; 2132 case PWR_RESUME: 2133 if (ifp->if_flags & IFF_UP) { 2134 (void)epinit(ifp); 2135 } 2136 break; 2137 case PWR_SOFTSUSPEND: 2138 case PWR_SOFTSTANDBY: 2139 case PWR_SOFTRESUME: 2140 break; 2141 } 2142 splx(s); 2143 } 2144
Indexes created Thu Sep 25 16:09:42 GMT 2025