elink3.c revision 1.131
1 /* $NetBSD: elink3.c,v 1.131 2010/04/05 07:19:34 joerg Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 35 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by Herb Peyerl. 49 * 4. The name of Herb Peyerl may not be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 #include <sys/cdefs.h> 65 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.131 2010/04/05 07:19:34 joerg Exp $"); 66 67 #include "opt_inet.h" 68 #include "rnd.h" 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/callout.h> 73 #include <sys/kernel.h> 74 #include <sys/mbuf.h> 75 #include <sys/socket.h> 76 #include <sys/ioctl.h> 77 #include <sys/errno.h> 78 #include <sys/syslog.h> 79 #include <sys/select.h> 80 #include <sys/device.h> 81 #if NRND > 0 82 #include <sys/rnd.h> 83 #endif 84 85 #include <net/if.h> 86 #include <net/if_dl.h> 87 #include <net/if_ether.h> 88 #include <net/if_media.h> 89 90 #include <net/bpf.h> 91 #include <net/bpfdesc.h> 92 93 #include <sys/cpu.h> 94 #include <sys/bus.h> 95 #include <sys/intr.h> 96 97 #include <dev/mii/mii.h> 98 #include <dev/mii/miivar.h> 99 #include <dev/mii/mii_bitbang.h> 100 101 #include <dev/ic/elink3var.h> 102 #include <dev/ic/elink3reg.h> 103 104 #ifdef DEBUG 105 int epdebug = 0; 106 #endif 107 108 /* 109 * XXX endian workaround for big-endian CPUs with pcmcia: 110 * if stream methods for bus_space_multi are not provided, define them 111 * using non-stream bus_space_{read,write}_multi_. 112 * Assumes host CPU is same endian-ness as bus. 113 */ 114 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 115 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 116 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 117 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 118 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 119 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 120 121 /* 122 * Structure to map media-present bits in boards to ifmedia codes and 123 * printable media names. Used for table-driven ifmedia initialization. 124 */ 125 struct ep_media { 126 int epm_mpbit; /* media present bit */ 127 const char *epm_name; /* name of medium */ 128 int epm_ifmedia; /* ifmedia word for medium */ 129 int epm_epmedia; /* ELINKMEDIA_* constant */ 130 }; 131 132 /* 133 * Media table for the Demon/Vortex/Boomerang chipsets. 134 * 135 * Note that MII on the Demon and Vortex (3c59x) indicates an external 136 * MII connector (for connecting an external PHY) ... I think. Treat 137 * it as `manual' on these chips. 138 * 139 * Any Boomerang (3c90x) chips with MII really do have an internal 140 * MII and real PHYs attached; no `native' media. 141 */ 142 const struct ep_media ep_vortex_media[] = { 143 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 144 ELINKMEDIA_10BASE_T }, 145 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 146 ELINKMEDIA_10BASE_T }, 147 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 148 ELINKMEDIA_AUI }, 149 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 150 ELINKMEDIA_10BASE_2 }, 151 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 152 ELINKMEDIA_100BASE_TX }, 153 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 154 ELINKMEDIA_100BASE_TX }, 155 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 156 ELINKMEDIA_100BASE_FX }, 157 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 158 ELINKMEDIA_MII }, 159 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 160 ELINKMEDIA_100BASE_T4 }, 161 { 0, NULL, 0, 162 0 }, 163 }; 164 165 /* 166 * Media table for the older 3Com Etherlink III chipset, used 167 * in the 3c509, 3c579, and 3c589. 168 */ 169 const struct ep_media ep_509_media[] = { 170 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 171 ELINKMEDIA_10BASE_T }, 172 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 173 ELINKMEDIA_AUI }, 174 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 175 ELINKMEDIA_10BASE_2 }, 176 { 0, NULL, 0, 177 0 }, 178 }; 179 180 void ep_internalconfig(struct ep_softc *sc); 181 void ep_vortex_probemedia(struct ep_softc *sc); 182 void ep_509_probemedia(struct ep_softc *sc); 183 184 static void eptxstat(struct ep_softc *); 185 static int epstatus(struct ep_softc *); 186 int epinit(struct ifnet *); 187 void epstop(struct ifnet *, int); 188 int epioctl(struct ifnet *, u_long, void *); 189 void epstart(struct ifnet *); 190 void epwatchdog(struct ifnet *); 191 void epreset(struct ep_softc *); 192 static bool epshutdown(device_t, int); 193 void epread(struct ep_softc *); 194 struct mbuf *epget(struct ep_softc *, int); 195 void epmbuffill(void *); 196 void epmbufempty(struct ep_softc *); 197 void epsetfilter(struct ep_softc *); 198 void ep_roadrunner_mii_enable(struct ep_softc *); 199 void epsetmedia(struct ep_softc *); 200 201 /* ifmedia callbacks */ 202 int ep_media_change(struct ifnet *ifp); 203 void ep_media_status(struct ifnet *ifp, struct ifmediareq *req); 204 205 /* MII callbacks */ 206 int ep_mii_readreg(device_t, int, int); 207 void ep_mii_writereg(device_t, int, int, int); 208 void ep_statchg(device_t); 209 210 void ep_tick(void *); 211 212 static int epbusyeeprom(struct ep_softc *); 213 u_int16_t ep_read_eeprom(struct ep_softc *, u_int16_t); 214 static inline void ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg); 215 static inline void ep_finish_reset(bus_space_tag_t, bus_space_handle_t); 216 static inline void ep_discard_rxtop(bus_space_tag_t, bus_space_handle_t); 217 static inline int ep_w1_reg(struct ep_softc *, int); 218 219 /* 220 * MII bit-bang glue. 221 */ 222 u_int32_t ep_mii_bitbang_read(device_t); 223 void ep_mii_bitbang_write(device_t, u_int32_t); 224 225 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 226 ep_mii_bitbang_read, 227 ep_mii_bitbang_write, 228 { 229 PHYSMGMT_DATA, /* MII_BIT_MDO */ 230 PHYSMGMT_DATA, /* MII_BIT_MDI */ 231 PHYSMGMT_CLK, /* MII_BIT_MDC */ 232 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 233 0, /* MII_BIT_DIR_PHY_HOST */ 234 } 235 }; 236 237 /* 238 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 239 * Window 1 registers offset! 240 */ 241 static inline int 242 ep_w1_reg(struct ep_softc *sc, int reg) 243 { 244 245 switch (sc->ep_chipset) { 246 case ELINK_CHIPSET_CORKSCREW: 247 return (reg + 0x10); 248 249 case ELINK_CHIPSET_ROADRUNNER: 250 switch (reg) { 251 case ELINK_W1_FREE_TX: 252 case ELINK_W1_RUNNER_RDCTL: 253 case ELINK_W1_RUNNER_WRCTL: 254 return (reg); 255 } 256 return (reg + 0x10); 257 } 258 259 return (reg); 260 } 261 262 /* 263 * Wait for any pending reset to complete. 264 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 265 * but older hardware doesn't implement it and we must delay. 266 */ 267 static inline void 268 ep_finish_reset(bus_space_tag_t iot, bus_space_handle_t ioh) 269 { 270 int i; 271 272 for (i = 0; i < 10000; i++) { 273 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 274 COMMAND_IN_PROGRESS) == 0) 275 break; 276 DELAY(10); 277 } 278 } 279 280 /* 281 * Issue a (reset) command, and be sure it has completed. 282 * Used for global reset, TX_RESET, RX_RESET. 283 */ 284 static inline void 285 ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg) 286 { 287 bus_space_tag_t iot = sc->sc_iot; 288 bus_space_handle_t ioh = sc->sc_ioh; 289 290 bus_space_write_2(iot, ioh, cmd, arg); 291 ep_finish_reset(iot, ioh); 292 } 293 294 295 static inline void 296 ep_discard_rxtop(bus_space_tag_t iot, bus_space_handle_t ioh) 297 { 298 int i; 299 300 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 301 302 /* 303 * Spin for about 1 msec, to avoid forcing a DELAY() between 304 * every received packet (adding latency and limiting pkt-recv rate). 305 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 306 * is about right. 307 */ 308 for (i = 0; i < 8000; i++) { 309 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 310 COMMAND_IN_PROGRESS) == 0) 311 return; 312 } 313 314 /* Didn't complete in a hurry. Do DELAY()s. */ 315 ep_finish_reset(iot, ioh); 316 } 317 318 /* 319 * Back-end attach and configure. 320 */ 321 int 322 epconfig(struct ep_softc *sc, u_short chipset, u_int8_t *enaddr) 323 { 324 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 325 bus_space_tag_t iot = sc->sc_iot; 326 bus_space_handle_t ioh = sc->sc_ioh; 327 u_int16_t i; 328 u_int8_t myla[ETHER_ADDR_LEN]; 329 330 callout_init(&sc->sc_mii_callout, 0); 331 callout_init(&sc->sc_mbuf_callout, 0); 332 333 sc->ep_chipset = chipset; 334 335 /* 336 * We could have been groveling around in other register 337 * windows in the front-end; make sure we're in window 0 338 * to read the EEPROM. 339 */ 340 GO_WINDOW(0); 341 342 if (enaddr == NULL) { 343 /* 344 * Read the station address from the eeprom. 345 */ 346 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 347 u_int16_t x = ep_read_eeprom(sc, i); 348 myla[(i << 1)] = x >> 8; 349 myla[(i << 1) + 1] = x; 350 } 351 enaddr = myla; 352 } 353 354 /* 355 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 356 * allow FDDI-sized (4500) byte packets. Commands only take an 357 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 358 * packet length. 359 * Commands to these cards implicitly upshift a packet size 360 * or threshold by 2 bits. 361 * To detect cards with large-packet support, we probe by setting 362 * the transmit threshold register, then change windows and 363 * read back the threshold register directly, and see if the 364 * threshold value was shifted or not. 365 */ 366 bus_space_write_2(iot, ioh, ELINK_COMMAND, 367 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 368 GO_WINDOW(5); 369 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 370 GO_WINDOW(1); 371 switch (i) { 372 case ELINK_LARGEWIN_PROBE: 373 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 374 sc->ep_pktlenshift = 0; 375 break; 376 377 case (ELINK_LARGEWIN_PROBE << 2): 378 sc->ep_pktlenshift = 2; 379 break; 380 381 default: 382 aprint_error_dev(sc->sc_dev, 383 "wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 384 "Interface disabled\n", 385 ELINK_LARGEWIN_PROBE, (int) i); 386 return (1); 387 } 388 389 /* 390 * Ensure Tx-available interrupts are enabled for 391 * start the interface. 392 * XXX should be in epinit()? 393 */ 394 bus_space_write_2(iot, ioh, ELINK_COMMAND, 395 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 396 397 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 398 ifp->if_softc = sc; 399 ifp->if_start = epstart; 400 ifp->if_ioctl = epioctl; 401 ifp->if_watchdog = epwatchdog; 402 ifp->if_init = epinit; 403 ifp->if_stop = epstop; 404 ifp->if_flags = 405 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 406 IFQ_SET_READY(&ifp->if_snd); 407 408 if_attach(ifp); 409 ether_ifattach(ifp, enaddr); 410 411 /* 412 * Finish configuration: 413 * determine chipset if the front-end couldn't do so, 414 * show board details, set media. 415 */ 416 417 /* 418 * Print RAM size. We also print the Ethernet address in here. 419 * It's extracted from the ifp, so we have to make sure it's 420 * been attached first. 421 */ 422 ep_internalconfig(sc); 423 GO_WINDOW(0); 424 425 /* 426 * Display some additional information, if pertinent. 427 */ 428 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 429 aprint_normal_dev(sc->sc_dev, "RoadRunner FIFO buffer enabled\n"); 430 431 /* 432 * Initialize our media structures and MII info. We'll 433 * probe the MII if we discover that we have one. 434 */ 435 sc->sc_mii.mii_ifp = ifp; 436 sc->sc_mii.mii_readreg = ep_mii_readreg; 437 sc->sc_mii.mii_writereg = ep_mii_writereg; 438 sc->sc_mii.mii_statchg = ep_statchg; 439 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, ep_media_change, 440 ep_media_status); 441 442 /* 443 * All CORKSCREW chips have MII. 444 */ 445 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) 446 sc->ep_flags |= ELINK_FLAGS_MII; 447 448 /* 449 * Now, determine which media we have. 450 */ 451 switch (sc->ep_chipset) { 452 case ELINK_CHIPSET_ROADRUNNER: 453 if (sc->ep_flags & ELINK_FLAGS_MII) { 454 ep_roadrunner_mii_enable(sc); 455 GO_WINDOW(0); 456 } 457 /* FALLTHROUGH */ 458 459 case ELINK_CHIPSET_CORKSCREW: 460 case ELINK_CHIPSET_BOOMERANG: 461 /* 462 * If the device has MII, probe it. We won't be using 463 * any `native' media in this case, only PHYs. If 464 * we don't, just treat the Boomerang like the Vortex. 465 */ 466 if (sc->ep_flags & ELINK_FLAGS_MII) { 467 mii_attach(sc->sc_dev, &sc->sc_mii, 0xffffffff, 468 MII_PHY_ANY, MII_OFFSET_ANY, 0); 469 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 470 ifmedia_add(&sc->sc_mii.mii_media, 471 IFM_ETHER|IFM_NONE, 0, NULL); 472 ifmedia_set(&sc->sc_mii.mii_media, 473 IFM_ETHER|IFM_NONE); 474 } else { 475 ifmedia_set(&sc->sc_mii.mii_media, 476 IFM_ETHER|IFM_AUTO); 477 } 478 break; 479 } 480 /* FALLTHROUGH */ 481 482 case ELINK_CHIPSET_VORTEX: 483 ep_vortex_probemedia(sc); 484 break; 485 486 default: 487 ep_509_probemedia(sc); 488 break; 489 } 490 491 GO_WINDOW(1); /* Window 1 is operating window */ 492 493 #if NRND > 0 494 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 495 RND_TYPE_NET, 0); 496 #endif 497 498 sc->tx_start_thresh = 20; /* probably a good starting point. */ 499 500 /* Establish callback to reset card when we reboot. */ 501 if (pmf_device_register1(sc->sc_dev, NULL, NULL, epshutdown)) 502 pmf_class_network_register(sc->sc_dev, ifp); 503 else 504 aprint_error_dev(sc->sc_dev, 505 "couldn't establish power handler\n"); 506 507 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 508 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 509 510 /* The attach is successful. */ 511 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 512 return (0); 513 } 514 515 516 /* 517 * Show interface-model-independent info from window 3 518 * internal-configuration register. 519 */ 520 void 521 ep_internalconfig(struct ep_softc *sc) 522 { 523 bus_space_tag_t iot = sc->sc_iot; 524 bus_space_handle_t ioh = sc->sc_ioh; 525 526 u_int config0; 527 u_int config1; 528 529 int ram_size, ram_width, ram_split; 530 /* 531 * NVRAM buffer Rx:Tx config names for busmastering cards 532 * (Demon, Vortex, and later). 533 */ 534 const char *const onboard_ram_config[] = { 535 "5:3", "3:1", "1:1", "3:5" }; 536 537 GO_WINDOW(3); 538 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 539 config1 = (u_int)bus_space_read_2(iot, ioh, 540 ELINK_W3_INTERNAL_CONFIG + 2); 541 GO_WINDOW(0); 542 543 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 544 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 545 546 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 547 548 aprint_normal_dev(sc->sc_dev, "address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 549 ether_sprintf(CLLADDR(sc->sc_ethercom.ec_if.if_sadl)), 550 8 << ram_size, 551 (ram_width) ? "word" : "byte", 552 onboard_ram_config[ram_split]); 553 } 554 555 556 /* 557 * Find supported media on 3c509-generation hardware that doesn't have 558 * a "reset_options" register in window 3. 559 * Use the config_cntrl register in window 0 instead. 560 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 561 * that implement CONFIG_CTRL. We don't have a good way to set the 562 * default active medium; punt to ifconfig instead. 563 */ 564 void 565 ep_509_probemedia(struct ep_softc *sc) 566 { 567 bus_space_tag_t iot = sc->sc_iot; 568 bus_space_handle_t ioh = sc->sc_ioh; 569 struct ifmedia *ifm = &sc->sc_mii.mii_media; 570 u_int16_t ep_w0_config, port; 571 const struct ep_media *epm; 572 const char *sep = "", *defmedianame = NULL; 573 int defmedia = 0; 574 575 GO_WINDOW(0); 576 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 577 578 aprint_normal_dev(sc->sc_dev, ""); 579 580 /* Sanity check that there are any media! */ 581 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 582 aprint_error("no media present!\n"); 583 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 584 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 585 return; 586 } 587 588 /* 589 * Get the default media from the EEPROM. 590 */ 591 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 592 593 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 594 595 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 596 if (ep_w0_config & epm->epm_mpbit) { 597 /* 598 * This simple test works because 509 chipsets 599 * don't do full-duplex. 600 */ 601 if (epm->epm_epmedia == port || defmedia == 0) { 602 defmedia = epm->epm_ifmedia; 603 defmedianame = epm->epm_name; 604 } 605 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 606 NULL); 607 PRINT(epm->epm_name); 608 } 609 } 610 611 #undef PRINT 612 613 #ifdef DIAGNOSTIC 614 if (defmedia == 0) 615 panic("ep_509_probemedia: impossible"); 616 #endif 617 618 aprint_normal(" (default %s)\n", defmedianame); 619 ifmedia_set(ifm, defmedia); 620 } 621 622 /* 623 * Find media present on large-packet-capable elink3 devices. 624 * Show onboard configuration of large-packet-capable elink3 devices 625 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 626 * Use media and card-version info in window 3 instead. 627 */ 628 void 629 ep_vortex_probemedia(struct ep_softc *sc) 630 { 631 bus_space_tag_t iot = sc->sc_iot; 632 bus_space_handle_t ioh = sc->sc_ioh; 633 struct ifmedia *ifm = &sc->sc_mii.mii_media; 634 const struct ep_media *epm; 635 u_int config1; 636 int reset_options; 637 int default_media; /* 3-bit encoding of default (EEPROM) media */ 638 int defmedia = 0; 639 const char *sep = "", *defmedianame = NULL; 640 641 GO_WINDOW(3); 642 config1 = (u_int)bus_space_read_2(iot, ioh, 643 ELINK_W3_INTERNAL_CONFIG + 2); 644 reset_options = (int)bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 645 GO_WINDOW(0); 646 647 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 648 649 aprint_normal_dev(sc->sc_dev, ""); 650 651 /* Sanity check that there are any media! */ 652 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 653 aprint_error("no media present!\n"); 654 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 655 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 656 return; 657 } 658 659 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 660 661 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 662 if (reset_options & epm->epm_mpbit) { 663 /* 664 * Default media is a little more complicated 665 * on the Vortex. We support full-duplex which 666 * uses the same reset options bit. 667 * 668 * XXX Check EEPROM for default to FDX? 669 */ 670 if (epm->epm_epmedia == default_media) { 671 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 672 defmedia = epm->epm_ifmedia; 673 defmedianame = epm->epm_name; 674 } 675 } else if (defmedia == 0) { 676 defmedia = epm->epm_ifmedia; 677 defmedianame = epm->epm_name; 678 } 679 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 680 NULL); 681 PRINT(epm->epm_name); 682 } 683 } 684 685 #undef PRINT 686 687 #ifdef DIAGNOSTIC 688 if (defmedia == 0) 689 panic("ep_vortex_probemedia: impossible"); 690 #endif 691 692 aprint_normal(" (default %s)\n", defmedianame); 693 ifmedia_set(ifm, defmedia); 694 } 695 696 /* 697 * One second timer, used to tick the MII. 698 */ 699 void 700 ep_tick(void *arg) 701 { 702 struct ep_softc *sc = arg; 703 int s; 704 705 #ifdef DIAGNOSTIC 706 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 707 panic("ep_tick"); 708 #endif 709 710 if (!device_is_active(sc->sc_dev)) 711 return; 712 713 s = splnet(); 714 mii_tick(&sc->sc_mii); 715 splx(s); 716 717 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 718 } 719 720 /* 721 * Bring device up. 722 * 723 * The order in here seems important. Otherwise we may not receive 724 * interrupts. ?! 725 */ 726 int 727 epinit(struct ifnet *ifp) 728 { 729 struct ep_softc *sc = ifp->if_softc; 730 bus_space_tag_t iot = sc->sc_iot; 731 bus_space_handle_t ioh = sc->sc_ioh; 732 int i, error; 733 const u_int8_t *addr; 734 735 if (!sc->enabled && (error = epenable(sc)) != 0) 736 return (error); 737 738 /* Make sure any pending reset has completed before touching board */ 739 ep_finish_reset(iot, ioh); 740 741 /* 742 * Cancel any pending I/O. 743 */ 744 epstop(ifp, 0); 745 746 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 747 && sc->bustype != ELINK_BUS_MCA) { 748 GO_WINDOW(0); 749 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 750 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 751 ENABLE_DRQ_IRQ); 752 } 753 754 if (sc->bustype == ELINK_BUS_PCMCIA) { 755 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 756 } 757 758 GO_WINDOW(2); 759 /* Reload the ether_addr. */ 760 addr = CLLADDR(ifp->if_sadl); 761 for (i = 0; i < 6; i += 2) 762 bus_space_write_2(iot, ioh, ELINK_W2_ADDR_0 + i, 763 (addr[i] << 0) | (addr[i + 1] << 8)); 764 765 /* 766 * Reset the station-address receive filter. 767 * A bug workaround for busmastering (Vortex, Demon) cards. 768 */ 769 for (i = 0; i < 6; i += 2) 770 bus_space_write_2(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 771 772 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 773 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 774 775 GO_WINDOW(1); /* Window 1 is operating window */ 776 for (i = 0; i < 31; i++) 777 (void)bus_space_read_2(iot, ioh, 778 ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 779 780 /* Set threshold for Tx-space available interrupt. */ 781 bus_space_write_2(iot, ioh, ELINK_COMMAND, 782 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 783 784 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 785 /* 786 * Enable options in the PCMCIA LAN COR register, via 787 * RoadRunner Window 1. 788 * 789 * XXX MAGIC CONSTANTS! 790 */ 791 u_int16_t cor; 792 793 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 794 795 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 796 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 797 cor |= 0x10; 798 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 799 cor |= 0x20; 800 bus_space_write_2(iot, ioh, 0, cor); 801 802 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 803 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 804 805 if (sc->ep_flags & ELINK_FLAGS_MII) { 806 ep_roadrunner_mii_enable(sc); 807 GO_WINDOW(1); 808 } 809 } 810 811 /* Enable interrupts. */ 812 bus_space_write_2(iot, ioh, ELINK_COMMAND, 813 SET_RD_0_MASK | WATCHED_INTERRUPTS); 814 bus_space_write_2(iot, ioh, ELINK_COMMAND, 815 SET_INTR_MASK | WATCHED_INTERRUPTS); 816 817 /* 818 * Attempt to get rid of any stray interrupts that occurred during 819 * configuration. On the i386 this isn't possible because one may 820 * already be queued. However, a single stray interrupt is 821 * unimportant. 822 */ 823 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 824 825 epsetfilter(sc); 826 epsetmedia(sc); 827 828 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 829 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 830 831 epmbuffill(sc); 832 833 /* Interface is now `running', with no output active. */ 834 ifp->if_flags |= IFF_RUNNING; 835 ifp->if_flags &= ~IFF_OACTIVE; 836 837 if (sc->ep_flags & ELINK_FLAGS_MII) { 838 /* Start the one second clock. */ 839 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 840 } 841 842 /* Attempt to start output, if any. */ 843 epstart(ifp); 844 845 return (0); 846 } 847 848 849 /* 850 * Set multicast receive filter. 851 * elink3 hardware has no selective multicast filter in hardware. 852 * Enable reception of all multicasts and filter in software. 853 */ 854 void 855 epsetfilter(struct ep_softc *sc) 856 { 857 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 858 859 GO_WINDOW(1); /* Window 1 is operating window */ 860 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 861 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 862 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 863 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 864 } 865 866 int 867 ep_media_change(struct ifnet *ifp) 868 { 869 struct ep_softc *sc = ifp->if_softc; 870 871 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 872 epreset(sc); 873 874 return (0); 875 } 876 877 /* 878 * Reset and enable the MII on the RoadRunner. 879 */ 880 void 881 ep_roadrunner_mii_enable(struct ep_softc *sc) 882 { 883 bus_space_tag_t iot = sc->sc_iot; 884 bus_space_handle_t ioh = sc->sc_ioh; 885 886 GO_WINDOW(3); 887 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 888 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 889 delay(1000); 890 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 891 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 892 ELINK_RUNNER_ENABLE_MII); 893 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 894 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 895 delay(1000); 896 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 897 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 898 } 899 900 /* 901 * Set the card to use the specified media. 902 */ 903 void 904 epsetmedia(struct ep_softc *sc) 905 { 906 bus_space_tag_t iot = sc->sc_iot; 907 bus_space_handle_t ioh = sc->sc_ioh; 908 909 /* Turn everything off. First turn off linkbeat and UTP. */ 910 GO_WINDOW(4); 911 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 912 913 /* Turn off coax */ 914 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 915 delay(1000); 916 917 /* 918 * If the device has MII, select it, and then tell the 919 * PHY which media to use. 920 */ 921 if (sc->ep_flags & ELINK_FLAGS_MII) { 922 int config0, config1; 923 924 GO_WINDOW(3); 925 926 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 927 int resopt; 928 929 resopt = bus_space_read_2(iot, ioh, 930 ELINK_W3_RESET_OPTIONS); 931 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 932 resopt | ELINK_RUNNER_ENABLE_MII); 933 } 934 935 config0 = (u_int)bus_space_read_2(iot, ioh, 936 ELINK_W3_INTERNAL_CONFIG); 937 config1 = (u_int)bus_space_read_2(iot, ioh, 938 ELINK_W3_INTERNAL_CONFIG + 2); 939 940 config1 = config1 & ~CONFIG_MEDIAMASK; 941 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 942 943 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 944 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 945 config1); 946 GO_WINDOW(1); /* back to operating window */ 947 948 mii_mediachg(&sc->sc_mii); 949 return; 950 } 951 952 /* 953 * Now turn on the selected media/transceiver. 954 */ 955 GO_WINDOW(4); 956 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 957 case IFM_10_T: 958 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 959 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 960 break; 961 962 case IFM_10_2: 963 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 964 DELAY(1000); /* 50ms not enmough? */ 965 break; 966 967 case IFM_100_TX: 968 case IFM_100_FX: 969 case IFM_100_T4: /* XXX check documentation */ 970 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 971 LINKBEAT_ENABLE); 972 DELAY(1000); /* not strictly necessary? */ 973 break; 974 975 case IFM_10_5: 976 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 977 SQE_ENABLE); 978 DELAY(1000); /* not strictly necessary? */ 979 break; 980 981 case IFM_MANUAL: 982 /* 983 * Nothing to do here; we are actually enabling the 984 * external PHY on the MII port. 985 */ 986 break; 987 988 case IFM_NONE: 989 printf("%s: interface disabled\n", device_xname(sc->sc_dev)); 990 return; 991 992 default: 993 panic("epsetmedia: impossible"); 994 } 995 996 /* 997 * Tell the chip which port to use. 998 */ 999 switch (sc->ep_chipset) { 1000 case ELINK_CHIPSET_VORTEX: 1001 case ELINK_CHIPSET_BOOMERANG: 1002 { 1003 int mctl, config0, config1; 1004 1005 GO_WINDOW(3); 1006 config0 = (u_int)bus_space_read_2(iot, ioh, 1007 ELINK_W3_INTERNAL_CONFIG); 1008 config1 = (u_int)bus_space_read_2(iot, ioh, 1009 ELINK_W3_INTERNAL_CONFIG + 2); 1010 1011 config1 = config1 & ~CONFIG_MEDIAMASK; 1012 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1013 CONFIG_MEDIAMASK_SHIFT); 1014 1015 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1016 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1017 config1); 1018 1019 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1020 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1021 mctl |= MAC_CONTROL_FDX; 1022 else 1023 mctl &= ~MAC_CONTROL_FDX; 1024 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1025 break; 1026 } 1027 default: 1028 { 1029 int w0_addr_cfg; 1030 1031 GO_WINDOW(0); 1032 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1033 w0_addr_cfg &= 0x3fff; 1034 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1035 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1036 DELAY(1000); 1037 break; 1038 } 1039 } 1040 1041 GO_WINDOW(1); /* Window 1 is operating window */ 1042 } 1043 1044 /* 1045 * Get currently-selected media from card. 1046 * (if_media callback, may be called before interface is brought up). 1047 */ 1048 void 1049 ep_media_status(struct ifnet *ifp, struct ifmediareq *req) 1050 { 1051 struct ep_softc *sc = ifp->if_softc; 1052 bus_space_tag_t iot = sc->sc_iot; 1053 bus_space_handle_t ioh = sc->sc_ioh; 1054 1055 if (sc->enabled == 0) { 1056 req->ifm_active = IFM_ETHER|IFM_NONE; 1057 req->ifm_status = 0; 1058 return; 1059 } 1060 1061 /* 1062 * If we have MII, go ask the PHY what's going on. 1063 */ 1064 if (sc->ep_flags & ELINK_FLAGS_MII) { 1065 mii_pollstat(&sc->sc_mii); 1066 req->ifm_active = sc->sc_mii.mii_media_active; 1067 req->ifm_status = sc->sc_mii.mii_media_status; 1068 return; 1069 } 1070 1071 /* 1072 * Ok, at this point we claim that our active media is 1073 * the currently selected media. We'll update our status 1074 * if our chipset allows us to detect link. 1075 */ 1076 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1077 req->ifm_status = 0; 1078 1079 switch (sc->ep_chipset) { 1080 case ELINK_CHIPSET_VORTEX: 1081 case ELINK_CHIPSET_BOOMERANG: 1082 GO_WINDOW(4); 1083 req->ifm_status = IFM_AVALID; 1084 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1085 LINKBEAT_DETECT) 1086 req->ifm_status |= IFM_ACTIVE; 1087 GO_WINDOW(1); /* back to operating window */ 1088 break; 1089 } 1090 } 1091 1092 1093 1094 /* 1095 * Start outputting on the interface. 1096 * Always called as splnet(). 1097 */ 1098 void 1099 epstart(struct ifnet *ifp) 1100 { 1101 struct ep_softc *sc = ifp->if_softc; 1102 bus_space_tag_t iot = sc->sc_iot; 1103 bus_space_handle_t ioh = sc->sc_ioh; 1104 struct mbuf *m, *m0; 1105 int sh, len, pad; 1106 bus_size_t txreg; 1107 1108 /* Don't transmit if interface is busy or not running */ 1109 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1110 return; 1111 1112 startagain: 1113 /* Sneak a peek at the next packet */ 1114 IFQ_POLL(&ifp->if_snd, m0); 1115 if (m0 == 0) 1116 return; 1117 1118 /* We need to use m->m_pkthdr.len, so require the header */ 1119 if ((m0->m_flags & M_PKTHDR) == 0) 1120 panic("epstart: no header mbuf"); 1121 len = m0->m_pkthdr.len; 1122 1123 pad = (4 - len) & 3; 1124 1125 /* 1126 * The 3c509 automatically pads short packets to minimum ethernet 1127 * length, but we drop packets that are too large. Perhaps we should 1128 * truncate them instead? 1129 */ 1130 if (len + pad > ETHER_MAX_LEN) { 1131 /* packet is obviously too large: toss it */ 1132 ++ifp->if_oerrors; 1133 IFQ_DEQUEUE(&ifp->if_snd, m0); 1134 m_freem(m0); 1135 goto readcheck; 1136 } 1137 1138 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1139 len + pad + 4) { 1140 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1141 SET_TX_AVAIL_THRESH | 1142 ((len + pad + 4) >> sc->ep_pktlenshift)); 1143 /* not enough room in FIFO */ 1144 ifp->if_flags |= IFF_OACTIVE; 1145 return; 1146 } else { 1147 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1148 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1149 } 1150 1151 IFQ_DEQUEUE(&ifp->if_snd, m0); 1152 if (m0 == 0) /* not really needed */ 1153 return; 1154 1155 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1156 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1157 1158 bpf_mtap(ifp, m0); 1159 1160 /* 1161 * Do the output at a high interrupt priority level so that an 1162 * interrupt from another device won't cause a FIFO underrun. 1163 * We choose splsched() since that blocks essentially everything 1164 * except for interrupts from serial devices (which typically 1165 * lose data if their interrupt isn't serviced fast enough). 1166 * 1167 * XXX THIS CAN CAUSE CLOCK DRIFT! 1168 */ 1169 sh = splsched(); 1170 1171 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1172 1173 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1174 /* 1175 * Prime the FIFO buffer counter (number of 16-bit 1176 * words about to be written to the FIFO). 1177 * 1178 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1179 * COUNTER IS NON-ZERO! 1180 */ 1181 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1182 (len + pad) >> 1); 1183 } 1184 1185 bus_space_write_2(iot, ioh, txreg, len); 1186 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1187 if (ELINK_IS_BUS_32(sc->bustype)) { 1188 for (m = m0; m;) { 1189 if (m->m_len > 3) { 1190 /* align our reads from core */ 1191 if (mtod(m, u_long) & 3) { 1192 u_long count = 1193 4 - (mtod(m, u_long) & 3); 1194 bus_space_write_multi_1(iot, ioh, 1195 txreg, mtod(m, u_int8_t *), count); 1196 m->m_data = 1197 (void *)(mtod(m, u_long) + count); 1198 m->m_len -= count; 1199 } 1200 bus_space_write_multi_stream_4(iot, ioh, 1201 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1202 m->m_data = (void *)(mtod(m, u_long) + 1203 (u_long)(m->m_len & ~3)); 1204 m->m_len -= m->m_len & ~3; 1205 } 1206 if (m->m_len) { 1207 bus_space_write_multi_1(iot, ioh, 1208 txreg, mtod(m, u_int8_t *), m->m_len); 1209 } 1210 MFREE(m, m0); 1211 m = m0; 1212 } 1213 } else { 1214 for (m = m0; m;) { 1215 if (m->m_len > 1) { 1216 if (mtod(m, u_long) & 1) { 1217 bus_space_write_1(iot, ioh, 1218 txreg, *(mtod(m, u_int8_t *))); 1219 m->m_data = 1220 (void *)(mtod(m, u_long) + 1); 1221 m->m_len -= 1; 1222 } 1223 bus_space_write_multi_stream_2(iot, ioh, 1224 txreg, mtod(m, u_int16_t *), 1225 m->m_len >> 1); 1226 } 1227 if (m->m_len & 1) { 1228 bus_space_write_1(iot, ioh, txreg, 1229 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1230 } 1231 MFREE(m, m0); 1232 m = m0; 1233 } 1234 } 1235 while (pad--) 1236 bus_space_write_1(iot, ioh, txreg, 0); 1237 1238 splx(sh); 1239 1240 ++ifp->if_opackets; 1241 1242 readcheck: 1243 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1244 ERR_INCOMPLETE) == 0) { 1245 /* We received a complete packet. */ 1246 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1247 1248 if ((status & INTR_LATCH) == 0) { 1249 /* 1250 * No interrupt, read the packet and continue 1251 * Is this supposed to happen? Is my motherboard 1252 * completely busted? 1253 */ 1254 epread(sc); 1255 } else { 1256 /* Got an interrupt, return so that it gets serviced. */ 1257 return; 1258 } 1259 } else { 1260 /* Check if we are stuck and reset [see XXX comment] */ 1261 if (epstatus(sc)) { 1262 if (ifp->if_flags & IFF_DEBUG) 1263 printf("%s: adapter reset\n", 1264 device_xname(sc->sc_dev)); 1265 epreset(sc); 1266 } 1267 } 1268 1269 goto startagain; 1270 } 1271 1272 1273 /* 1274 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1275 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1276 * We detect this situation and we reset the adapter. 1277 * It happens at times when there is a lot of broadcast traffic 1278 * on the cable (once in a blue moon). 1279 */ 1280 static int 1281 epstatus(struct ep_softc *sc) 1282 { 1283 bus_space_tag_t iot = sc->sc_iot; 1284 bus_space_handle_t ioh = sc->sc_ioh; 1285 u_int16_t fifost; 1286 1287 /* 1288 * Check the FIFO status and act accordingly 1289 */ 1290 GO_WINDOW(4); 1291 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1292 GO_WINDOW(1); 1293 1294 if (fifost & FIFOS_RX_UNDERRUN) { 1295 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1296 printf("%s: RX underrun\n", device_xname(sc->sc_dev)); 1297 epreset(sc); 1298 return 0; 1299 } 1300 1301 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1302 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1303 printf("%s: RX Status overrun\n", device_xname(sc->sc_dev)); 1304 return 1; 1305 } 1306 1307 if (fifost & FIFOS_RX_OVERRUN) { 1308 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1309 printf("%s: RX overrun\n", device_xname(sc->sc_dev)); 1310 return 1; 1311 } 1312 1313 if (fifost & FIFOS_TX_OVERRUN) { 1314 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1315 printf("%s: TX overrun\n", device_xname(sc->sc_dev)); 1316 epreset(sc); 1317 return 0; 1318 } 1319 1320 return 0; 1321 } 1322 1323 1324 static void 1325 eptxstat(struct ep_softc *sc) 1326 { 1327 bus_space_tag_t iot = sc->sc_iot; 1328 bus_space_handle_t ioh = sc->sc_ioh; 1329 int i; 1330 1331 /* 1332 * We need to read+write TX_STATUS until we get a 0 status 1333 * in order to turn off the interrupt flag. 1334 */ 1335 while ((i = bus_space_read_2(iot, ioh, 1336 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1337 bus_space_write_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1338 0x0); 1339 1340 if (i & TXS_JABBER) { 1341 ++sc->sc_ethercom.ec_if.if_oerrors; 1342 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1343 printf("%s: jabber (%x)\n", 1344 device_xname(sc->sc_dev), i); 1345 epreset(sc); 1346 } else if (i & TXS_UNDERRUN) { 1347 ++sc->sc_ethercom.ec_if.if_oerrors; 1348 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1349 printf("%s: fifo underrun (%x) @%d\n", 1350 device_xname(sc->sc_dev), i, 1351 sc->tx_start_thresh); 1352 if (sc->tx_succ_ok < 100) 1353 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1354 sc->tx_start_thresh + 20); 1355 sc->tx_succ_ok = 0; 1356 epreset(sc); 1357 } else if (i & TXS_MAX_COLLISION) { 1358 ++sc->sc_ethercom.ec_if.if_collisions; 1359 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1360 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1361 } else 1362 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1363 } 1364 } 1365 1366 int 1367 epintr(void *arg) 1368 { 1369 struct ep_softc *sc = arg; 1370 bus_space_tag_t iot = sc->sc_iot; 1371 bus_space_handle_t ioh = sc->sc_ioh; 1372 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1373 u_int16_t status; 1374 int ret = 0; 1375 1376 if (sc->enabled == 0 || !device_is_active(sc->sc_dev)) 1377 return (0); 1378 1379 1380 for (;;) { 1381 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1382 1383 if ((status & WATCHED_INTERRUPTS) == 0) { 1384 if ((status & INTR_LATCH) == 0) { 1385 #if 0 1386 printf("%s: intr latch cleared\n", 1387 device_xname(&sc->sc_dev)); 1388 #endif 1389 break; 1390 } 1391 } 1392 1393 ret = 1; 1394 1395 /* 1396 * Acknowledge any interrupts. It's important that we do this 1397 * first, since there would otherwise be a race condition. 1398 * Due to the i386 interrupt queueing, we may get spurious 1399 * interrupts occasionally. 1400 */ 1401 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1402 (status & (INTR_LATCH | ALL_INTERRUPTS))); 1403 1404 #if 0 1405 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1406 1407 printf("%s: intr%s%s%s%s\n", device_xname(&sc->sc_dev), 1408 (status & RX_COMPLETE)?" RX_COMPLETE":"", 1409 (status & TX_COMPLETE)?" TX_COMPLETE":"", 1410 (status & TX_AVAIL)?" TX_AVAIL":"", 1411 (status & CARD_FAILURE)?" CARD_FAILURE":""); 1412 #endif 1413 1414 if (status & RX_COMPLETE) { 1415 epread(sc); 1416 } 1417 if (status & TX_AVAIL) { 1418 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1419 epstart(&sc->sc_ethercom.ec_if); 1420 } 1421 if (status & CARD_FAILURE) { 1422 printf("%s: adapter failure (%x)\n", 1423 device_xname(sc->sc_dev), status); 1424 #if 1 1425 epinit(ifp); 1426 #else 1427 epreset(sc); 1428 #endif 1429 return (1); 1430 } 1431 if (status & TX_COMPLETE) { 1432 eptxstat(sc); 1433 epstart(ifp); 1434 } 1435 1436 #if NRND > 0 1437 if (status) 1438 rnd_add_uint32(&sc->rnd_source, status); 1439 #endif 1440 } 1441 1442 /* no more interrupts */ 1443 return (ret); 1444 } 1445 1446 void 1447 epread(struct ep_softc *sc) 1448 { 1449 bus_space_tag_t iot = sc->sc_iot; 1450 bus_space_handle_t ioh = sc->sc_ioh; 1451 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1452 struct mbuf *m; 1453 int len; 1454 1455 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1456 1457 again: 1458 if (ifp->if_flags & IFF_DEBUG) { 1459 int err = len & ERR_MASK; 1460 const char *s = NULL; 1461 1462 if (len & ERR_INCOMPLETE) 1463 s = "incomplete packet"; 1464 else if (err == ERR_OVERRUN) 1465 s = "packet overrun"; 1466 else if (err == ERR_RUNT) 1467 s = "runt packet"; 1468 else if (err == ERR_ALIGNMENT) 1469 s = "bad alignment"; 1470 else if (err == ERR_CRC) 1471 s = "bad crc"; 1472 else if (err == ERR_OVERSIZE) 1473 s = "oversized packet"; 1474 else if (err == ERR_DRIBBLE) 1475 s = "dribble bits"; 1476 1477 if (s) 1478 printf("%s: %s\n", device_xname(sc->sc_dev), s); 1479 } 1480 1481 if (len & ERR_INCOMPLETE) 1482 return; 1483 1484 if (len & ERR_RX) { 1485 ++ifp->if_ierrors; 1486 goto abort; 1487 } 1488 1489 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1490 1491 /* Pull packet off interface. */ 1492 m = epget(sc, len); 1493 if (m == 0) { 1494 ifp->if_ierrors++; 1495 goto abort; 1496 } 1497 1498 ++ifp->if_ipackets; 1499 1500 /* 1501 * Check if there's a BPF listener on this interface. 1502 * If so, hand off the raw packet to BPF. 1503 */ 1504 bpf_mtap(ifp, m); 1505 1506 (*ifp->if_input)(ifp, m); 1507 1508 /* 1509 * In periods of high traffic we can actually receive enough 1510 * packets so that the fifo overrun bit will be set at this point, 1511 * even though we just read a packet. In this case we 1512 * are not going to receive any more interrupts. We check for 1513 * this condition and read again until the fifo is not full. 1514 * We could simplify this test by not using epstatus(), but 1515 * rechecking the RX_STATUS register directly. This test could 1516 * result in unnecessary looping in cases where there is a new 1517 * packet but the fifo is not full, but it will not fix the 1518 * stuck behavior. 1519 * 1520 * Even with this improvement, we still get packet overrun errors 1521 * which are hurting performance. Maybe when I get some more time 1522 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1523 */ 1524 if (epstatus(sc)) { 1525 len = bus_space_read_2(iot, ioh, 1526 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1527 /* Check if we are stuck and reset [see XXX comment] */ 1528 if (len & ERR_INCOMPLETE) { 1529 if (ifp->if_flags & IFF_DEBUG) 1530 printf("%s: adapter reset\n", 1531 device_xname(sc->sc_dev)); 1532 epreset(sc); 1533 return; 1534 } 1535 goto again; 1536 } 1537 1538 return; 1539 1540 abort: 1541 ep_discard_rxtop(iot, ioh); 1542 1543 } 1544 1545 struct mbuf * 1546 epget(struct ep_softc *sc, int totlen) 1547 { 1548 bus_space_tag_t iot = sc->sc_iot; 1549 bus_space_handle_t ioh = sc->sc_ioh; 1550 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1551 struct mbuf *m; 1552 bus_size_t rxreg; 1553 int len, remaining; 1554 int s; 1555 void *newdata; 1556 u_long offset; 1557 1558 m = sc->mb[sc->next_mb]; 1559 sc->mb[sc->next_mb] = 0; 1560 if (m == 0) { 1561 MGETHDR(m, M_DONTWAIT, MT_DATA); 1562 if (m == 0) 1563 return 0; 1564 } else { 1565 /* If the queue is no longer full, refill. */ 1566 if (sc->last_mb == sc->next_mb) 1567 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1568 1569 /* Convert one of our saved mbuf's. */ 1570 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1571 m->m_data = m->m_pktdat; 1572 m->m_flags = M_PKTHDR; 1573 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr)); 1574 } 1575 m->m_pkthdr.rcvif = ifp; 1576 m->m_pkthdr.len = totlen; 1577 len = MHLEN; 1578 1579 /* 1580 * Allocate big enough space to hold whole packet, to avoid 1581 * allocating new mbufs on splsched(). 1582 */ 1583 if (totlen + ALIGNBYTES > len) { 1584 if (totlen + ALIGNBYTES > MCLBYTES) { 1585 len = ALIGN(totlen + ALIGNBYTES); 1586 MEXTMALLOC(m, len, M_DONTWAIT); 1587 } else { 1588 len = MCLBYTES; 1589 MCLGET(m, M_DONTWAIT); 1590 } 1591 if ((m->m_flags & M_EXT) == 0) { 1592 m_free(m); 1593 return 0; 1594 } 1595 } 1596 1597 /* align the struct ip header */ 1598 newdata = (char *)ALIGN(m->m_data + sizeof(struct ether_header)) 1599 - sizeof(struct ether_header); 1600 m->m_data = newdata; 1601 m->m_len = totlen; 1602 1603 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1604 remaining = totlen; 1605 offset = mtod(m, u_long); 1606 1607 /* 1608 * We read the packet at a high interrupt priority level so that 1609 * an interrupt from another device won't cause the card's packet 1610 * buffer to overflow. We choose splsched() since that blocks 1611 * essentially everything except for interrupts from serial 1612 * devices (which typically lose data if their interrupt isn't 1613 * serviced fast enough). 1614 * 1615 * XXX THIS CAN CAUSE CLOCK DRIFT! 1616 */ 1617 s = splsched(); 1618 1619 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1620 /* 1621 * Prime the FIFO buffer counter (number of 16-bit 1622 * words about to be read from the FIFO). 1623 * 1624 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1625 * COUNTER IS NON-ZERO! 1626 */ 1627 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1628 } 1629 1630 if (ELINK_IS_BUS_32(sc->bustype)) { 1631 /* 1632 * Read bytes up to the point where we are aligned. 1633 * (We can align to 4 bytes, rather than ALIGNBYTES, 1634 * here because we're later reading 4-byte chunks.) 1635 */ 1636 if ((remaining > 3) && (offset & 3)) { 1637 int count = (4 - (offset & 3)); 1638 bus_space_read_multi_1(iot, ioh, 1639 rxreg, (u_int8_t *) offset, count); 1640 offset += count; 1641 remaining -= count; 1642 } 1643 if (remaining > 3) { 1644 bus_space_read_multi_stream_4(iot, ioh, 1645 rxreg, (u_int32_t *) offset, 1646 remaining >> 2); 1647 offset += remaining & ~3; 1648 remaining &= 3; 1649 } 1650 if (remaining) { 1651 bus_space_read_multi_1(iot, ioh, 1652 rxreg, (u_int8_t *) offset, remaining); 1653 } 1654 } else { 1655 if ((remaining > 1) && (offset & 1)) { 1656 bus_space_read_multi_1(iot, ioh, 1657 rxreg, (u_int8_t *) offset, 1); 1658 remaining -= 1; 1659 offset += 1; 1660 } 1661 if (remaining > 1) { 1662 bus_space_read_multi_stream_2(iot, ioh, 1663 rxreg, (u_int16_t *) offset, 1664 remaining >> 1); 1665 offset += remaining & ~1; 1666 } 1667 if (remaining & 1) { 1668 bus_space_read_multi_1(iot, ioh, 1669 rxreg, (u_int8_t *) offset, remaining & 1); 1670 } 1671 } 1672 1673 ep_discard_rxtop(iot, ioh); 1674 1675 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1676 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1677 splx(s); 1678 1679 return (m); 1680 } 1681 1682 int 1683 epioctl(struct ifnet *ifp, u_long cmd, void *data) 1684 { 1685 struct ep_softc *sc = ifp->if_softc; 1686 struct ifreq *ifr = (struct ifreq *)data; 1687 int s, error = 0; 1688 1689 s = splnet(); 1690 1691 switch (cmd) { 1692 1693 case SIOCSIFMEDIA: 1694 case SIOCGIFMEDIA: 1695 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1696 break; 1697 1698 case SIOCADDMULTI: 1699 case SIOCDELMULTI: 1700 if (sc->enabled == 0) { 1701 error = EIO; 1702 break; 1703 } 1704 1705 default: 1706 error = ether_ioctl(ifp, cmd, data); 1707 1708 if (error == ENETRESET) { 1709 /* 1710 * Multicast list has changed; set the hardware filter 1711 * accordingly. 1712 */ 1713 if (ifp->if_flags & IFF_RUNNING) 1714 epreset(sc); 1715 error = 0; 1716 } 1717 break; 1718 } 1719 1720 splx(s); 1721 return (error); 1722 } 1723 1724 void 1725 epreset(struct ep_softc *sc) 1726 { 1727 int s; 1728 1729 s = splnet(); 1730 epinit(&sc->sc_ethercom.ec_if); 1731 splx(s); 1732 } 1733 1734 void 1735 epwatchdog(struct ifnet *ifp) 1736 { 1737 struct ep_softc *sc = ifp->if_softc; 1738 1739 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev)); 1740 ++sc->sc_ethercom.ec_if.if_oerrors; 1741 1742 epreset(sc); 1743 } 1744 1745 void 1746 epstop(struct ifnet *ifp, int disable) 1747 { 1748 struct ep_softc *sc = ifp->if_softc; 1749 bus_space_tag_t iot = sc->sc_iot; 1750 bus_space_handle_t ioh = sc->sc_ioh; 1751 1752 if (sc->ep_flags & ELINK_FLAGS_MII) { 1753 /* Stop the one second clock. */ 1754 callout_stop(&sc->sc_mbuf_callout); 1755 1756 /* Down the MII. */ 1757 mii_down(&sc->sc_mii); 1758 } 1759 1760 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1761 /* 1762 * Clear the FIFO buffer count, thus halting 1763 * any currently-running transactions. 1764 */ 1765 GO_WINDOW(1); /* sanity */ 1766 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1767 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1768 } 1769 1770 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1771 ep_discard_rxtop(iot, ioh); 1772 1773 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1774 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1775 1776 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1777 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1778 1779 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1780 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1781 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1782 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1783 1784 epmbufempty(sc); 1785 1786 if (disable) 1787 epdisable(sc); 1788 1789 ifp->if_flags &= ~IFF_RUNNING; 1790 } 1791 1792 1793 /* 1794 * Before reboots, reset card completely. 1795 */ 1796 static bool 1797 epshutdown(device_t self, int howto) 1798 { 1799 struct ep_softc *sc = device_private(self); 1800 int s = splnet(); 1801 1802 if (sc->enabled) { 1803 epstop(&sc->sc_ethercom.ec_if, 0); 1804 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1805 epdisable(sc); 1806 sc->enabled = 0; 1807 } 1808 splx(s); 1809 1810 return true; 1811 } 1812 1813 /* 1814 * We get eeprom data from the id_port given an offset into the 1815 * eeprom. Basically; after the ID_sequence is sent to all of 1816 * the cards; they enter the ID_CMD state where they will accept 1817 * command requests. 0x80-0xbf loads the eeprom data. We then 1818 * read the port 16 times and with every read; the cards check 1819 * for contention (ie: if one card writes a 0 bit and another 1820 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1821 * each card compares the data on the bus; if there is a difference 1822 * then that card goes into ID_WAIT state again). In the meantime; 1823 * one bit of data is returned in the AX register which is conveniently 1824 * returned to us by bus_space_read_2(). Hence; we read 16 times getting one 1825 * bit of data with each read. 1826 * 1827 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1828 */ 1829 u_int16_t 1830 epreadeeprom(bus_space_tag_t iot, bus_space_handle_t ioh, int offset) 1831 { 1832 u_int16_t data = 0; 1833 int i; 1834 1835 bus_space_write_2(iot, ioh, 0, 0x80 + offset); 1836 delay(1000); 1837 for (i = 0; i < 16; i++) 1838 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1839 return (data); 1840 } 1841 1842 static int 1843 epbusyeeprom(struct ep_softc *sc) 1844 { 1845 bus_space_tag_t iot = sc->sc_iot; 1846 bus_space_handle_t ioh = sc->sc_ioh; 1847 bus_size_t eecmd; 1848 int i = 100, j; 1849 uint16_t busybit; 1850 1851 if (sc->bustype == ELINK_BUS_PCMCIA) { 1852 delay(1000); 1853 return 0; 1854 } 1855 1856 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1857 eecmd = CORK_ASIC_EEPROM_COMMAND; 1858 busybit = CORK_EEPROM_BUSY; 1859 } else { 1860 eecmd = ELINK_W0_EEPROM_COMMAND; 1861 busybit = EEPROM_BUSY; 1862 } 1863 1864 j = 0; /* bad GCC flow analysis */ 1865 while (i--) { 1866 j = bus_space_read_2(iot, ioh, eecmd); 1867 if (j & busybit) 1868 delay(100); 1869 else 1870 break; 1871 } 1872 if (i == 0) { 1873 aprint_normal("\n"); 1874 aprint_error_dev(sc->sc_dev, "eeprom failed to come ready\n"); 1875 return (1); 1876 } 1877 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW && 1878 (j & EEPROM_TST_MODE) != 0) { 1879 /* XXX PnP mode? */ 1880 printf("\n%s: erase pencil mark!\n", device_xname(sc->sc_dev)); 1881 return (1); 1882 } 1883 return (0); 1884 } 1885 1886 u_int16_t 1887 ep_read_eeprom(struct ep_softc *sc, u_int16_t offset) 1888 { 1889 bus_size_t eecmd, eedata; 1890 u_int16_t readcmd; 1891 1892 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1893 eecmd = CORK_ASIC_EEPROM_COMMAND; 1894 eedata = CORK_ASIC_EEPROM_DATA; 1895 } else { 1896 eecmd = ELINK_W0_EEPROM_COMMAND; 1897 eedata = ELINK_W0_EEPROM_DATA; 1898 } 1899 1900 /* 1901 * RoadRunner has a larger EEPROM, so a different read command 1902 * is required. 1903 */ 1904 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1905 readcmd = READ_EEPROM_RR; 1906 else 1907 readcmd = READ_EEPROM; 1908 1909 if (epbusyeeprom(sc)) 1910 return (0); /* XXX why is eeprom busy? */ 1911 1912 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset); 1913 1914 if (epbusyeeprom(sc)) 1915 return (0); /* XXX why is eeprom busy? */ 1916 1917 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata)); 1918 } 1919 1920 void 1921 epmbuffill(void *v) 1922 { 1923 struct ep_softc *sc = v; 1924 struct mbuf *m; 1925 int s, i; 1926 1927 s = splnet(); 1928 i = sc->last_mb; 1929 do { 1930 if (sc->mb[i] == 0) { 1931 MGET(m, M_DONTWAIT, MT_DATA); 1932 if (m == 0) 1933 break; 1934 sc->mb[i] = m; 1935 } 1936 i = (i + 1) % MAX_MBS; 1937 } while (i != sc->next_mb); 1938 sc->last_mb = i; 1939 /* If the queue was not filled, try again. */ 1940 if (sc->last_mb != sc->next_mb) 1941 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1942 splx(s); 1943 } 1944 1945 void 1946 epmbufempty(struct ep_softc *sc) 1947 { 1948 int s, i; 1949 1950 s = splnet(); 1951 for (i = 0; i < MAX_MBS; i++) { 1952 if (sc->mb[i]) { 1953 m_freem(sc->mb[i]); 1954 sc->mb[i] = NULL; 1955 } 1956 } 1957 sc->last_mb = sc->next_mb = 0; 1958 callout_stop(&sc->sc_mbuf_callout); 1959 splx(s); 1960 } 1961 1962 int 1963 epenable(struct ep_softc *sc) 1964 { 1965 1966 if (sc->enabled == 0 && sc->enable != NULL) { 1967 if ((*sc->enable)(sc) != 0) { 1968 aprint_error_dev(sc->sc_dev, "device enable failed\n"); 1969 return (EIO); 1970 } 1971 } 1972 1973 sc->enabled = 1; 1974 return (0); 1975 } 1976 1977 void 1978 epdisable(struct ep_softc *sc) 1979 { 1980 1981 if (sc->enabled != 0 && sc->disable != NULL) { 1982 (*sc->disable)(sc); 1983 sc->enabled = 0; 1984 } 1985 } 1986 1987 /* 1988 * ep_activate: 1989 * 1990 * Handle device activation/deactivation requests. 1991 */ 1992 int 1993 ep_activate(device_t self, enum devact act) 1994 { 1995 struct ep_softc *sc = device_private(self); 1996 1997 switch (act) { 1998 case DVACT_DEACTIVATE: 1999 if_deactivate(&sc->sc_ethercom.ec_if); 2000 return 0; 2001 default: 2002 return EOPNOTSUPP; 2003 } 2004 } 2005 2006 /* 2007 * ep_detach: 2008 * 2009 * Detach a elink3 interface. 2010 */ 2011 int 2012 ep_detach(device_t self, int flags) 2013 { 2014 struct ep_softc *sc = device_private(self); 2015 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2016 2017 /* Succeed now if there's no work to do. */ 2018 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2019 return (0); 2020 2021 epdisable(sc); 2022 2023 callout_stop(&sc->sc_mii_callout); 2024 callout_stop(&sc->sc_mbuf_callout); 2025 2026 if (sc->ep_flags & ELINK_FLAGS_MII) { 2027 /* Detach all PHYs */ 2028 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2029 } 2030 2031 /* Delete all remaining media. */ 2032 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2033 2034 #if NRND > 0 2035 rnd_detach_source(&sc->rnd_source); 2036 #endif 2037 ether_ifdetach(ifp); 2038 if_detach(ifp); 2039 2040 pmf_device_deregister(sc->sc_dev); 2041 2042 return (0); 2043 } 2044 2045 u_int32_t 2046 ep_mii_bitbang_read(device_t self) 2047 { 2048 struct ep_softc *sc = device_private(self); 2049 2050 /* We're already in Window 4. */ 2051 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2052 ELINK_W4_BOOM_PHYSMGMT)); 2053 } 2054 2055 void 2056 ep_mii_bitbang_write(device_t self, u_int32_t val) 2057 { 2058 struct ep_softc *sc = device_private(self); 2059 2060 /* We're already in Window 4. */ 2061 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2062 ELINK_W4_BOOM_PHYSMGMT, val); 2063 } 2064 2065 int 2066 ep_mii_readreg(device_t self, int phy, int reg) 2067 { 2068 struct ep_softc *sc = device_private(self); 2069 int val; 2070 2071 GO_WINDOW(4); 2072 2073 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2074 2075 GO_WINDOW(1); 2076 2077 return (val); 2078 } 2079 2080 void 2081 ep_mii_writereg(device_t self, int phy, int reg, int val) 2082 { 2083 struct ep_softc *sc = device_private(self); 2084 2085 GO_WINDOW(4); 2086 2087 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2088 2089 GO_WINDOW(1); 2090 } 2091 2092 void 2093 ep_statchg(device_t self) 2094 { 2095 struct ep_softc *sc = device_private(self); 2096 bus_space_tag_t iot = sc->sc_iot; 2097 bus_space_handle_t ioh = sc->sc_ioh; 2098 int mctl; 2099 2100 GO_WINDOW(3); 2101 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2102 if (sc->sc_mii.mii_media_active & IFM_FDX) 2103 mctl |= MAC_CONTROL_FDX; 2104 else 2105 mctl &= ~MAC_CONTROL_FDX; 2106 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2107 GO_WINDOW(1); /* back to operating window */ 2108 } 2109 2110 void 2111 ep_power(int why, void *arg) 2112 { 2113 struct ep_softc *sc = arg; 2114 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2115 int s; 2116 2117 s = splnet(); 2118 switch (why) { 2119 case PWR_SUSPEND: 2120 case PWR_STANDBY: 2121 epstop(ifp, 1); 2122 break; 2123 case PWR_RESUME: 2124 if (ifp->if_flags & IFF_UP) { 2125 (void)epinit(ifp); 2126 } 2127 break; 2128 case PWR_SOFTSUSPEND: 2129 case PWR_SOFTSTANDBY: 2130 case PWR_SOFTRESUME: 2131 break; 2132 } 2133 splx(s); 2134 } 2135
Indexes created Sun Sep 28 16:09:52 GMT 2025