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elink3.c revision 1.138
      1 /*	$NetBSD: elink3.c,v 1.138 2016/06/10 13:27:13 ozaki-r Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  * POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org>
     35  * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org>
     36  * All rights reserved.
     37  *
     38  * Redistribution and use in source and binary forms, with or without
     39  * modification, are permitted provided that the following conditions
     40  * are met:
     41  * 1. Redistributions of source code must retain the above copyright
     42  *    notice, this list of conditions and the following disclaimer.
     43  * 2. Redistributions in binary form must reproduce the above copyright
     44  *    notice, this list of conditions and the following disclaimer in the
     45  *    documentation and/or other materials provided with the distribution.
     46  * 3. All advertising materials mentioning features or use of this software
     47  *    must display the following acknowledgement:
     48  *      This product includes software developed by Herb Peyerl.
     49  * 4. The name of Herb Peyerl may not be used to endorse or promote products
     50  *    derived from this software without specific prior written permission.
     51  *
     52  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     53  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     54  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     55  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     56  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     57  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     58  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     59  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     60  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     61  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     62  */
     63 
     64 #include <sys/cdefs.h>
     65 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.138 2016/06/10 13:27:13 ozaki-r Exp $");
     66 
     67 #include "opt_inet.h"
     68 
     69 #include <sys/param.h>
     70 #include <sys/systm.h>
     71 #include <sys/callout.h>
     72 #include <sys/kernel.h>
     73 #include <sys/mbuf.h>
     74 #include <sys/socket.h>
     75 #include <sys/ioctl.h>
     76 #include <sys/errno.h>
     77 #include <sys/syslog.h>
     78 #include <sys/select.h>
     79 #include <sys/device.h>
     80 #include <sys/rndsource.h>
     81 
     82 #include <net/if.h>
     83 #include <net/if_dl.h>
     84 #include <net/if_ether.h>
     85 #include <net/if_media.h>
     86 
     87 #include <net/bpf.h>
     88 #include <net/bpfdesc.h>
     89 
     90 #include <sys/cpu.h>
     91 #include <sys/bus.h>
     92 #include <sys/intr.h>
     93 
     94 #include <dev/mii/mii.h>
     95 #include <dev/mii/miivar.h>
     96 #include <dev/mii/mii_bitbang.h>
     97 
     98 #include <dev/ic/elink3var.h>
     99 #include <dev/ic/elink3reg.h>
    100 
    101 #ifdef DEBUG
    102 int epdebug = 0;
    103 #endif
    104 
    105 /*
    106  * XXX endian workaround for big-endian CPUs  with pcmcia:
    107  * if stream methods for bus_space_multi are not provided, define them
    108  * using non-stream bus_space_{read,write}_multi_.
    109  * Assumes host CPU is same endian-ness as bus.
    110  */
    111 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
    112 #define bus_space_read_multi_stream_2	bus_space_read_multi_2
    113 #define bus_space_read_multi_stream_4	bus_space_read_multi_4
    114 #define bus_space_write_multi_stream_2	bus_space_write_multi_2
    115 #define bus_space_write_multi_stream_4	bus_space_write_multi_4
    116 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
    117 
    118 /*
    119  * Structure to map media-present bits in boards to ifmedia codes and
    120  * printable media names. Used for table-driven ifmedia initialization.
    121  */
    122 struct ep_media {
    123 	int	epm_mpbit;		/* media present bit */
    124 	const char *epm_name;		/* name of medium */
    125 	int	epm_ifmedia;		/* ifmedia word for medium */
    126 	int	epm_epmedia;		/* ELINKMEDIA_* constant */
    127 };
    128 
    129 /*
    130  * Media table for the Demon/Vortex/Boomerang chipsets.
    131  *
    132  * Note that MII on the Demon and Vortex (3c59x) indicates an external
    133  * MII connector (for connecting an external PHY) ... I think.  Treat
    134  * it as `manual' on these chips.
    135  *
    136  * Any Boomerang (3c90x) chips with MII really do have an internal
    137  * MII and real PHYs attached; no `native' media.
    138  */
    139 const struct ep_media ep_vortex_media[] = {
    140 	{ ELINK_PCI_10BASE_T,	"10baseT",	IFM_ETHER|IFM_10_T,
    141 	  ELINKMEDIA_10BASE_T },
    142 	{ ELINK_PCI_10BASE_T,	"10baseT-FDX",	IFM_ETHER|IFM_10_T|IFM_FDX,
    143 	  ELINKMEDIA_10BASE_T },
    144 	{ ELINK_PCI_AUI,	"10base5",	IFM_ETHER|IFM_10_5,
    145 	  ELINKMEDIA_AUI },
    146 	{ ELINK_PCI_BNC,	"10base2",	IFM_ETHER|IFM_10_2,
    147 	  ELINKMEDIA_10BASE_2 },
    148 	{ ELINK_PCI_100BASE_TX,	"100baseTX",	IFM_ETHER|IFM_100_TX,
    149 	  ELINKMEDIA_100BASE_TX },
    150 	{ ELINK_PCI_100BASE_TX,	"100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX,
    151 	  ELINKMEDIA_100BASE_TX },
    152 	{ ELINK_PCI_100BASE_FX,	"100baseFX",	IFM_ETHER|IFM_100_FX,
    153 	  ELINKMEDIA_100BASE_FX },
    154 	{ ELINK_PCI_100BASE_MII,"manual",	IFM_ETHER|IFM_MANUAL,
    155 	  ELINKMEDIA_MII },
    156 	{ ELINK_PCI_100BASE_T4,	"100baseT4",	IFM_ETHER|IFM_100_T4,
    157 	  ELINKMEDIA_100BASE_T4 },
    158 	{ 0,			NULL,		0,
    159 	  0 },
    160 };
    161 
    162 /*
    163  * Media table for the older 3Com Etherlink III chipset, used
    164  * in the 3c509, 3c579, and 3c589.
    165  */
    166 const struct ep_media ep_509_media[] = {
    167 	{ ELINK_W0_CC_UTP,	"10baseT",	IFM_ETHER|IFM_10_T,
    168 	  ELINKMEDIA_10BASE_T },
    169 	{ ELINK_W0_CC_AUI,	"10base5",	IFM_ETHER|IFM_10_5,
    170 	  ELINKMEDIA_AUI },
    171 	{ ELINK_W0_CC_BNC,	"10base2",	IFM_ETHER|IFM_10_2,
    172 	  ELINKMEDIA_10BASE_2 },
    173 	{ 0,			NULL,		0,
    174 	  0 },
    175 };
    176 
    177 void	ep_internalconfig(struct ep_softc *sc);
    178 void	ep_vortex_probemedia(struct ep_softc *sc);
    179 void	ep_509_probemedia(struct ep_softc *sc);
    180 
    181 static void eptxstat(struct ep_softc *);
    182 static int epstatus(struct ep_softc *);
    183 int	epinit(struct ifnet *);
    184 void	epstop(struct ifnet *, int);
    185 int	epioctl(struct ifnet *, u_long, void *);
    186 void	epstart(struct ifnet *);
    187 void	epwatchdog(struct ifnet *);
    188 void	epreset(struct ep_softc *);
    189 static bool epshutdown(device_t, int);
    190 void	epread(struct ep_softc *);
    191 struct mbuf *epget(struct ep_softc *, int);
    192 void	epmbuffill(void *);
    193 void	epmbufempty(struct ep_softc *);
    194 void	epsetfilter(struct ep_softc *);
    195 void	ep_roadrunner_mii_enable(struct ep_softc *);
    196 void	epsetmedia(struct ep_softc *);
    197 
    198 /* ifmedia callbacks */
    199 int	ep_media_change(struct ifnet *ifp);
    200 void	ep_media_status(struct ifnet *ifp, struct ifmediareq *req);
    201 
    202 /* MII callbacks */
    203 int	ep_mii_readreg(device_t, int, int);
    204 void	ep_mii_writereg(device_t, int, int, int);
    205 void	ep_statchg(struct ifnet *);
    206 
    207 void	ep_tick(void *);
    208 
    209 static int epbusyeeprom(struct ep_softc *);
    210 u_int16_t ep_read_eeprom(struct ep_softc *, u_int16_t);
    211 static inline void ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg);
    212 static inline void ep_finish_reset(bus_space_tag_t, bus_space_handle_t);
    213 static inline void ep_discard_rxtop(bus_space_tag_t, bus_space_handle_t);
    214 static inline int ep_w1_reg(struct ep_softc *, int);
    215 
    216 /*
    217  * MII bit-bang glue.
    218  */
    219 u_int32_t ep_mii_bitbang_read(device_t);
    220 void ep_mii_bitbang_write(device_t, u_int32_t);
    221 
    222 const struct mii_bitbang_ops ep_mii_bitbang_ops = {
    223 	ep_mii_bitbang_read,
    224 	ep_mii_bitbang_write,
    225 	{
    226 		PHYSMGMT_DATA,		/* MII_BIT_MDO */
    227 		PHYSMGMT_DATA,		/* MII_BIT_MDI */
    228 		PHYSMGMT_CLK,		/* MII_BIT_MDC */
    229 		PHYSMGMT_DIR,		/* MII_BIT_DIR_HOST_PHY */
    230 		0,			/* MII_BIT_DIR_PHY_HOST */
    231 	}
    232 };
    233 
    234 /*
    235  * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have
    236  * Window 1 registers offset!
    237  */
    238 static inline int
    239 ep_w1_reg(struct ep_softc *sc, int reg)
    240 {
    241 
    242 	switch (sc->ep_chipset) {
    243 	case ELINK_CHIPSET_CORKSCREW:
    244 		return (reg + 0x10);
    245 
    246 	case ELINK_CHIPSET_ROADRUNNER:
    247 		switch (reg) {
    248 		case ELINK_W1_FREE_TX:
    249 		case ELINK_W1_RUNNER_RDCTL:
    250 		case ELINK_W1_RUNNER_WRCTL:
    251 			return (reg);
    252 		}
    253 		return (reg + 0x10);
    254 	}
    255 
    256 	return (reg);
    257 }
    258 
    259 /*
    260  * Wait for any pending reset to complete.
    261  * On newer hardware we could poll SC_COMMAND_IN_PROGRESS,
    262  * but older hardware doesn't implement it and we must delay.
    263  */
    264 static inline void
    265 ep_finish_reset(bus_space_tag_t iot, bus_space_handle_t ioh)
    266 {
    267 	int i;
    268 
    269 	for (i = 0; i < 10000; i++) {
    270 		if ((bus_space_read_2(iot, ioh, ELINK_STATUS) &
    271 		    COMMAND_IN_PROGRESS) == 0)
    272 			break;
    273 		DELAY(10);
    274 	}
    275 }
    276 
    277 /*
    278  * Issue a (reset) command, and be sure it has completed.
    279  * Used for global reset, TX_RESET, RX_RESET.
    280  */
    281 static inline void
    282 ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg)
    283 {
    284 	bus_space_tag_t iot = sc->sc_iot;
    285 	bus_space_handle_t ioh = sc->sc_ioh;
    286 
    287 	bus_space_write_2(iot, ioh, cmd, arg);
    288 	ep_finish_reset(iot, ioh);
    289 }
    290 
    291 
    292 static inline void
    293 ep_discard_rxtop(bus_space_tag_t iot, bus_space_handle_t ioh)
    294 {
    295 	int i;
    296 
    297 	bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK);
    298 
    299         /*
    300 	 * Spin for about 1 msec, to avoid forcing a DELAY() between
    301 	 * every received packet (adding latency and  limiting pkt-recv rate).
    302 	 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations
    303 	 * is about right.
    304 	 */
    305 	for (i = 0; i < 8000; i++) {
    306 		if ((bus_space_read_2(iot, ioh, ELINK_STATUS) &
    307 		    COMMAND_IN_PROGRESS) == 0)
    308 		    return;
    309 	}
    310 
    311 	/*  Didn't complete in a hurry. Do DELAY()s. */
    312 	ep_finish_reset(iot, ioh);
    313 }
    314 
    315 /*
    316  * Back-end attach and configure.
    317  */
    318 int
    319 epconfig(struct ep_softc *sc, u_short chipset, u_int8_t *enaddr)
    320 {
    321 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
    322 	bus_space_tag_t iot = sc->sc_iot;
    323 	bus_space_handle_t ioh = sc->sc_ioh;
    324 	u_int16_t i;
    325 	u_int8_t myla[ETHER_ADDR_LEN];
    326 
    327 	callout_init(&sc->sc_mii_callout, 0);
    328 	callout_init(&sc->sc_mbuf_callout, 0);
    329 
    330 	sc->ep_chipset = chipset;
    331 
    332 	/*
    333 	 * We could have been groveling around in other register
    334 	 * windows in the front-end; make sure we're in window 0
    335 	 * to read the EEPROM.
    336 	 */
    337 	GO_WINDOW(0);
    338 
    339 	if (enaddr == NULL) {
    340 		/*
    341 		 * Read the station address from the eeprom.
    342 		 */
    343 		for (i = 0; i < ETHER_ADDR_LEN / 2; i++) {
    344 			u_int16_t x = ep_read_eeprom(sc, i);
    345 			myla[(i << 1)] = x >> 8;
    346 			myla[(i << 1) + 1] = x;
    347 		}
    348 		enaddr = myla;
    349 	}
    350 
    351 	/*
    352 	 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards
    353 	 * allow FDDI-sized (4500) byte packets.  Commands only take an
    354 	 * 11-bit parameter, and  11 bits isn't enough to hold a full-size
    355 	 * packet length.
    356 	 * Commands to these cards implicitly upshift a packet size
    357 	 * or threshold by 2 bits.
    358 	 * To detect  cards with large-packet support, we probe by setting
    359 	 * the transmit threshold register, then change windows and
    360 	 * read back the threshold register directly, and see if the
    361 	 * threshold value was shifted or not.
    362 	 */
    363 	bus_space_write_2(iot, ioh, ELINK_COMMAND,
    364 	    SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE);
    365 	GO_WINDOW(5);
    366 	i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH);
    367 	GO_WINDOW(1);
    368 	switch (i)  {
    369 	case ELINK_LARGEWIN_PROBE:
    370 	case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK):
    371 		sc->ep_pktlenshift = 0;
    372 		break;
    373 
    374 	case (ELINK_LARGEWIN_PROBE << 2):
    375 		sc->ep_pktlenshift = 2;
    376 		break;
    377 
    378 	default:
    379 		aprint_error_dev(sc->sc_dev,
    380 		    "wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. "
    381 		    "Interface disabled\n",
    382 		    ELINK_LARGEWIN_PROBE, (int) i);
    383 		return (1);
    384 	}
    385 
    386 	/*
    387 	 * Ensure Tx-available interrupts are enabled for
    388 	 * start the interface.
    389 	 * XXX should be in epinit()?
    390 	 */
    391 	bus_space_write_2(iot, ioh, ELINK_COMMAND,
    392 	    SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift));
    393 
    394 	strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
    395 	ifp->if_softc = sc;
    396 	ifp->if_start = epstart;
    397 	ifp->if_ioctl = epioctl;
    398 	ifp->if_watchdog = epwatchdog;
    399 	ifp->if_init = epinit;
    400 	ifp->if_stop = epstop;
    401 	ifp->if_flags =
    402 	    IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
    403 	IFQ_SET_READY(&ifp->if_snd);
    404 
    405 	if_attach(ifp);
    406 	ether_ifattach(ifp, enaddr);
    407 
    408 	/*
    409 	 * Finish configuration:
    410 	 * determine chipset if the front-end couldn't do so,
    411 	 * show board details, set media.
    412 	 */
    413 
    414 	/*
    415 	 * Print RAM size.  We also print the Ethernet address in here.
    416 	 * It's extracted from the ifp, so we have to make sure it's
    417 	 * been attached first.
    418 	 */
    419 	ep_internalconfig(sc);
    420 	GO_WINDOW(0);
    421 
    422 	/*
    423 	 * Display some additional information, if pertinent.
    424 	 */
    425 	if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER)
    426 		aprint_normal_dev(sc->sc_dev, "RoadRunner FIFO buffer enabled\n");
    427 
    428 	/*
    429 	 * Initialize our media structures and MII info.  We'll
    430 	 * probe the MII if we discover that we have one.
    431 	 */
    432 	sc->sc_mii.mii_ifp = ifp;
    433 	sc->sc_mii.mii_readreg = ep_mii_readreg;
    434 	sc->sc_mii.mii_writereg = ep_mii_writereg;
    435 	sc->sc_mii.mii_statchg = ep_statchg;
    436 	ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, ep_media_change,
    437 	    ep_media_status);
    438 
    439 	/*
    440 	 * All CORKSCREW chips have MII.
    441 	 */
    442 	if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW)
    443 		sc->ep_flags |= ELINK_FLAGS_MII;
    444 
    445 	/*
    446 	 * Now, determine which media we have.
    447 	 */
    448 	switch (sc->ep_chipset) {
    449 	case ELINK_CHIPSET_ROADRUNNER:
    450 		if (sc->ep_flags & ELINK_FLAGS_MII) {
    451 			ep_roadrunner_mii_enable(sc);
    452 			GO_WINDOW(0);
    453 		}
    454 		/* FALLTHROUGH */
    455 
    456 	case ELINK_CHIPSET_CORKSCREW:
    457 	case ELINK_CHIPSET_BOOMERANG:
    458 		/*
    459 		 * If the device has MII, probe it.  We won't be using
    460 		 * any `native' media in this case, only PHYs.  If
    461 		 * we don't, just treat the Boomerang like the Vortex.
    462 		 */
    463 		if (sc->ep_flags & ELINK_FLAGS_MII) {
    464 			mii_attach(sc->sc_dev, &sc->sc_mii, 0xffffffff,
    465 			    MII_PHY_ANY, MII_OFFSET_ANY, 0);
    466 			if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
    467 				ifmedia_add(&sc->sc_mii.mii_media,
    468 				    IFM_ETHER|IFM_NONE, 0, NULL);
    469 				ifmedia_set(&sc->sc_mii.mii_media,
    470 				    IFM_ETHER|IFM_NONE);
    471 			} else {
    472 				ifmedia_set(&sc->sc_mii.mii_media,
    473 				    IFM_ETHER|IFM_AUTO);
    474 			}
    475 			break;
    476 		}
    477 		/* FALLTHROUGH */
    478 
    479 	case ELINK_CHIPSET_VORTEX:
    480 		ep_vortex_probemedia(sc);
    481 		break;
    482 
    483 	default:
    484 		ep_509_probemedia(sc);
    485 		break;
    486 	}
    487 
    488 	GO_WINDOW(1);		/* Window 1 is operating window */
    489 
    490 	rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev),
    491 	    RND_TYPE_NET, RND_FLAG_DEFAULT);
    492 
    493 	sc->tx_start_thresh = 20;	/* probably a good starting point. */
    494 
    495 	/*  Establish callback to reset card when we reboot. */
    496 	if (pmf_device_register1(sc->sc_dev, NULL, NULL, epshutdown))
    497 		pmf_class_network_register(sc->sc_dev, ifp);
    498 	else
    499 		aprint_error_dev(sc->sc_dev,
    500 		    "couldn't establish power handler\n");
    501 
    502 	ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET);
    503 	ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET);
    504 
    505 	/* The attach is successful. */
    506 	sc->sc_flags |= ELINK_FLAGS_ATTACHED;
    507 	return (0);
    508 }
    509 
    510 
    511 /*
    512  * Show interface-model-independent info from window 3
    513  * internal-configuration register.
    514  */
    515 void
    516 ep_internalconfig(struct ep_softc *sc)
    517 {
    518 	bus_space_tag_t iot = sc->sc_iot;
    519 	bus_space_handle_t ioh = sc->sc_ioh;
    520 
    521 	u_int config0;
    522 	u_int config1;
    523 
    524 	int  ram_size, ram_width, ram_split;
    525 	/*
    526 	 * NVRAM buffer Rx:Tx config names for busmastering cards
    527 	 * (Demon, Vortex, and later).
    528 	 */
    529 	const char *const onboard_ram_config[] = {
    530 		"5:3", "3:1", "1:1", "3:5" };
    531 
    532 	GO_WINDOW(3);
    533 	config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
    534 	config1 = (u_int)bus_space_read_2(iot, ioh,
    535 	    ELINK_W3_INTERNAL_CONFIG + 2);
    536 	GO_WINDOW(0);
    537 
    538 	ram_size  = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT;
    539 	ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT;
    540 
    541 	ram_split  = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT;
    542 
    543 	aprint_normal_dev(sc->sc_dev, "address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n",
    544 	       ether_sprintf(CLLADDR(sc->sc_ethercom.ec_if.if_sadl)),
    545 	       8 << ram_size,
    546 	       (ram_width) ? "word" : "byte",
    547 	       onboard_ram_config[ram_split]);
    548 }
    549 
    550 
    551 /*
    552  * Find supported media on 3c509-generation hardware that doesn't have
    553  * a "reset_options" register in window 3.
    554  * Use the config_cntrl register  in window 0 instead.
    555  * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards
    556  * that implement  CONFIG_CTRL.  We don't have a good way to set the
    557  * default active medium; punt to ifconfig  instead.
    558  */
    559 void
    560 ep_509_probemedia(struct ep_softc *sc)
    561 {
    562 	bus_space_tag_t iot = sc->sc_iot;
    563 	bus_space_handle_t ioh = sc->sc_ioh;
    564 	struct ifmedia *ifm = &sc->sc_mii.mii_media;
    565 	u_int16_t ep_w0_config, port;
    566 	const struct ep_media *epm;
    567 	const char *sep = "", *defmedianame = NULL;
    568 	int defmedia = 0;
    569 
    570 	GO_WINDOW(0);
    571 	ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL);
    572 
    573 	aprint_normal_dev(sc->sc_dev, "");
    574 
    575 	/* Sanity check that there are any media! */
    576 	if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) {
    577 		aprint_error("no media present!\n");
    578 		ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL);
    579 		ifmedia_set(ifm, IFM_ETHER|IFM_NONE);
    580 		return;
    581 	}
    582 
    583 	/*
    584 	 * Get the default media from the EEPROM.
    585 	 */
    586 	port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14;
    587 
    588 #define	PRINT(str)	aprint_normal("%s%s", sep, str); sep = ", "
    589 
    590 	for (epm = ep_509_media; epm->epm_name != NULL; epm++) {
    591 		if (ep_w0_config & epm->epm_mpbit) {
    592 			/*
    593 			 * This simple test works because 509 chipsets
    594 			 * don't do full-duplex.
    595 			 */
    596 			if (epm->epm_epmedia == port || defmedia == 0) {
    597 				defmedia = epm->epm_ifmedia;
    598 				defmedianame = epm->epm_name;
    599 			}
    600 			ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia,
    601 			    NULL);
    602 			PRINT(epm->epm_name);
    603 		}
    604 	}
    605 
    606 #undef PRINT
    607 
    608 #ifdef DIAGNOSTIC
    609 	if (defmedia == 0)
    610 		panic("ep_509_probemedia: impossible");
    611 #endif
    612 
    613 	aprint_normal(" (default %s)\n", defmedianame);
    614 	ifmedia_set(ifm, defmedia);
    615 }
    616 
    617 /*
    618  * Find media present on large-packet-capable elink3 devices.
    619  * Show onboard configuration of large-packet-capable elink3 devices
    620  * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0.
    621  * Use media and card-version info in window 3 instead.
    622  */
    623 void
    624 ep_vortex_probemedia(struct ep_softc *sc)
    625 {
    626 	bus_space_tag_t iot = sc->sc_iot;
    627 	bus_space_handle_t ioh = sc->sc_ioh;
    628 	struct ifmedia *ifm = &sc->sc_mii.mii_media;
    629 	const struct ep_media *epm;
    630 	u_int config1;
    631 	int reset_options;
    632 	int default_media;	/* 3-bit encoding of default (EEPROM) media */
    633 	int defmedia = 0;
    634 	const char *sep = "", *defmedianame = NULL;
    635 
    636 	GO_WINDOW(3);
    637 	config1 = (u_int)bus_space_read_2(iot, ioh,
    638 	    ELINK_W3_INTERNAL_CONFIG + 2);
    639 	reset_options = (int)bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS);
    640 	GO_WINDOW(0);
    641 
    642 	default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT;
    643 
    644 	aprint_normal_dev(sc->sc_dev, "");
    645 
    646 	/* Sanity check that there are any media! */
    647 	if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) {
    648 		aprint_error("no media present!\n");
    649 		ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL);
    650 		ifmedia_set(ifm, IFM_ETHER|IFM_NONE);
    651 		return;
    652 	}
    653 
    654 #define	PRINT(str)	aprint_normal("%s%s", sep, str); sep = ", "
    655 
    656 	for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) {
    657 		if (reset_options & epm->epm_mpbit) {
    658 			/*
    659 			 * Default media is a little more complicated
    660 			 * on the Vortex.  We support full-duplex which
    661 			 * uses the same reset options bit.
    662 			 *
    663 			 * XXX Check EEPROM for default to FDX?
    664 			 */
    665 			if (epm->epm_epmedia == default_media) {
    666 				if ((epm->epm_ifmedia & IFM_FDX) == 0) {
    667 					defmedia = epm->epm_ifmedia;
    668 					defmedianame = epm->epm_name;
    669 				}
    670 			} else if (defmedia == 0) {
    671 				defmedia = epm->epm_ifmedia;
    672 				defmedianame = epm->epm_name;
    673 			}
    674 			ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia,
    675 			    NULL);
    676 			PRINT(epm->epm_name);
    677 		}
    678 	}
    679 
    680 #undef PRINT
    681 
    682 #ifdef DIAGNOSTIC
    683 	if (defmedia == 0)
    684 		panic("ep_vortex_probemedia: impossible");
    685 #endif
    686 
    687 	aprint_normal(" (default %s)\n", defmedianame);
    688 	ifmedia_set(ifm, defmedia);
    689 }
    690 
    691 /*
    692  * One second timer, used to tick the MII.
    693  */
    694 void
    695 ep_tick(void *arg)
    696 {
    697 	struct ep_softc *sc = arg;
    698 	int s;
    699 
    700 #ifdef DIAGNOSTIC
    701 	if ((sc->ep_flags & ELINK_FLAGS_MII) == 0)
    702 		panic("ep_tick");
    703 #endif
    704 
    705 	if (!device_is_active(sc->sc_dev))
    706 		return;
    707 
    708 	s = splnet();
    709 	mii_tick(&sc->sc_mii);
    710 	splx(s);
    711 
    712 	callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc);
    713 }
    714 
    715 /*
    716  * Bring device up.
    717  *
    718  * The order in here seems important. Otherwise we may not receive
    719  * interrupts. ?!
    720  */
    721 int
    722 epinit(struct ifnet *ifp)
    723 {
    724 	struct ep_softc *sc = ifp->if_softc;
    725 	bus_space_tag_t iot = sc->sc_iot;
    726 	bus_space_handle_t ioh = sc->sc_ioh;
    727 	int i, error;
    728 	const u_int8_t *addr;
    729 
    730 	if (!sc->enabled && (error = epenable(sc)) != 0)
    731 		return (error);
    732 
    733 	/* Make sure any pending reset has completed before touching board */
    734 	ep_finish_reset(iot, ioh);
    735 
    736 	/*
    737 	 * Cancel any pending I/O.
    738 	 */
    739 	epstop(ifp, 0);
    740 
    741 	if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA
    742 	    && sc->bustype != ELINK_BUS_MCA) {
    743 		GO_WINDOW(0);
    744 		bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0);
    745 		bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL,
    746 		    ENABLE_DRQ_IRQ);
    747 	}
    748 
    749 	if (sc->bustype == ELINK_BUS_PCMCIA) {
    750 		bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00);
    751 	}
    752 
    753 	GO_WINDOW(2);
    754 	/* Reload the ether_addr. */
    755 	addr = CLLADDR(ifp->if_sadl);
    756 	for (i = 0; i < 6; i += 2)
    757 		bus_space_write_2(iot, ioh, ELINK_W2_ADDR_0 + i,
    758 		    (addr[i] << 0) | (addr[i + 1] << 8));
    759 
    760 	/*
    761 	 * Reset the station-address receive filter.
    762 	 * A bug workaround for busmastering (Vortex, Demon) cards.
    763 	 */
    764 	for (i = 0; i < 6; i += 2)
    765 		bus_space_write_2(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0);
    766 
    767 	ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET);
    768 	ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET);
    769 
    770 	GO_WINDOW(1);		/* Window 1 is operating window */
    771 	for (i = 0; i < 31; i++)
    772 		(void)bus_space_read_2(iot, ioh,
    773 				       ep_w1_reg(sc, ELINK_W1_TX_STATUS));
    774 
    775 	/* Set threshold for Tx-space available interrupt. */
    776 	bus_space_write_2(iot, ioh, ELINK_COMMAND,
    777 	    SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift));
    778 
    779 	if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) {
    780 		/*
    781 		 * Enable options in the PCMCIA LAN COR register, via
    782 		 * RoadRunner Window 1.
    783 		 *
    784 		 * XXX MAGIC CONSTANTS!
    785 		 */
    786 		u_int16_t cor;
    787 
    788 		bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11));
    789 
    790 		cor = bus_space_read_2(iot, ioh, 0) & ~0x30;
    791 		if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM)
    792 			cor |= 0x10;
    793 		if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT)
    794 			cor |= 0x20;
    795 		bus_space_write_2(iot, ioh, 0, cor);
    796 
    797 		bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0);
    798 		bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0);
    799 
    800 		if (sc->ep_flags & ELINK_FLAGS_MII) {
    801 			ep_roadrunner_mii_enable(sc);
    802 			GO_WINDOW(1);
    803 		}
    804 	}
    805 
    806 	/* Enable interrupts. */
    807 	bus_space_write_2(iot, ioh, ELINK_COMMAND,
    808 	    SET_RD_0_MASK | WATCHED_INTERRUPTS);
    809 	bus_space_write_2(iot, ioh, ELINK_COMMAND,
    810 	    SET_INTR_MASK | WATCHED_INTERRUPTS);
    811 
    812 	/*
    813 	 * Attempt to get rid of any stray interrupts that occurred during
    814 	 * configuration.  On the i386 this isn't possible because one may
    815 	 * already be queued.  However, a single stray interrupt is
    816 	 * unimportant.
    817 	 */
    818 	bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff);
    819 
    820 	epsetfilter(sc);
    821 	epsetmedia(sc);
    822 
    823 	bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE);
    824 	bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
    825 
    826 	epmbuffill(sc);
    827 
    828 	/* Interface is now `running', with no output active. */
    829 	ifp->if_flags |= IFF_RUNNING;
    830 	ifp->if_flags &= ~IFF_OACTIVE;
    831 
    832 	if (sc->ep_flags & ELINK_FLAGS_MII) {
    833 		/* Start the one second clock. */
    834 		callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc);
    835 	}
    836 
    837 	/* Attempt to start output, if any. */
    838 	epstart(ifp);
    839 
    840 	return (0);
    841 }
    842 
    843 
    844 /*
    845  * Set multicast receive filter.
    846  * elink3 hardware has no selective multicast filter in hardware.
    847  * Enable reception of all multicasts and filter in software.
    848  */
    849 void
    850 epsetfilter(struct ep_softc *sc)
    851 {
    852 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
    853 
    854 	GO_WINDOW(1);		/* Window 1 is operating window */
    855 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND,
    856 	    SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST |
    857 	    ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) |
    858 	    ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0));
    859 }
    860 
    861 int
    862 ep_media_change(struct ifnet *ifp)
    863 {
    864 	struct ep_softc *sc = ifp->if_softc;
    865 
    866 	if (sc->enabled && (ifp->if_flags & IFF_UP) != 0)
    867 		epreset(sc);
    868 
    869 	return (0);
    870 }
    871 
    872 /*
    873  * Reset and enable the MII on the RoadRunner.
    874  */
    875 void
    876 ep_roadrunner_mii_enable(struct ep_softc *sc)
    877 {
    878 	bus_space_tag_t iot = sc->sc_iot;
    879 	bus_space_handle_t ioh = sc->sc_ioh;
    880 
    881 	GO_WINDOW(3);
    882 	bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS,
    883 	    ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII);
    884 	delay(1000);
    885 	bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS,
    886 	    ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET|
    887 	    ELINK_RUNNER_ENABLE_MII);
    888 	ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET);
    889 	ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET);
    890 	delay(1000);
    891 	bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS,
    892 	    ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII);
    893 }
    894 
    895 /*
    896  * Set the card to use the specified media.
    897  */
    898 void
    899 epsetmedia(struct ep_softc *sc)
    900 {
    901 	bus_space_tag_t iot = sc->sc_iot;
    902 	bus_space_handle_t ioh = sc->sc_ioh;
    903 
    904 	/* Turn everything off.  First turn off linkbeat and UTP. */
    905 	GO_WINDOW(4);
    906 	bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0);
    907 
    908 	/* Turn off coax */
    909 	bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
    910 	delay(1000);
    911 
    912 	/*
    913 	 * If the device has MII, select it, and then tell the
    914 	 * PHY which media to use.
    915 	 */
    916 	if (sc->ep_flags & ELINK_FLAGS_MII) {
    917 		int config0, config1;
    918 
    919 		GO_WINDOW(3);
    920 
    921 		if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) {
    922 			int resopt;
    923 
    924 			resopt = bus_space_read_2(iot, ioh,
    925 			    ELINK_W3_RESET_OPTIONS);
    926 			bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS,
    927 			    resopt | ELINK_RUNNER_ENABLE_MII);
    928 		}
    929 
    930 		config0 = (u_int)bus_space_read_2(iot, ioh,
    931 		    ELINK_W3_INTERNAL_CONFIG);
    932 		config1 = (u_int)bus_space_read_2(iot, ioh,
    933 		    ELINK_W3_INTERNAL_CONFIG + 2);
    934 
    935 		config1 = config1 & ~CONFIG_MEDIAMASK;
    936 		config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT);
    937 
    938 		bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0);
    939 		bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2,
    940 		    config1);
    941 		GO_WINDOW(1);	/* back to operating window */
    942 
    943 		mii_mediachg(&sc->sc_mii);
    944 		return;
    945 	}
    946 
    947 	/*
    948 	 * Now turn on the selected media/transceiver.
    949 	 */
    950 	GO_WINDOW(4);
    951 	switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) {
    952 	case IFM_10_T:
    953 		bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
    954 		    JABBER_GUARD_ENABLE|LINKBEAT_ENABLE);
    955 		break;
    956 
    957 	case IFM_10_2:
    958 		bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER);
    959 		DELAY(1000);	/* 50ms not enmough? */
    960 		break;
    961 
    962 	case IFM_100_TX:
    963 	case IFM_100_FX:
    964 	case IFM_100_T4:		/* XXX check documentation */
    965 		bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
    966 		    LINKBEAT_ENABLE);
    967 		DELAY(1000);	/* not strictly necessary? */
    968 		break;
    969 
    970 	case IFM_10_5:
    971 		bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
    972 		    SQE_ENABLE);
    973 		DELAY(1000);	/* not strictly necessary? */
    974 		break;
    975 
    976 	case IFM_MANUAL:
    977 		/*
    978 		 * Nothing to do here; we are actually enabling the
    979 		 * external PHY on the MII port.
    980 		 */
    981 		break;
    982 
    983 	case IFM_NONE:
    984 		printf("%s: interface disabled\n", device_xname(sc->sc_dev));
    985 		return;
    986 
    987 	default:
    988 		panic("epsetmedia: impossible");
    989 	}
    990 
    991 	/*
    992 	 * Tell the chip which port to use.
    993 	 */
    994 	switch (sc->ep_chipset) {
    995 	case ELINK_CHIPSET_VORTEX:
    996 	case ELINK_CHIPSET_BOOMERANG:
    997 	    {
    998 		int mctl, config0, config1;
    999 
   1000 		GO_WINDOW(3);
   1001 		config0 = (u_int)bus_space_read_2(iot, ioh,
   1002 		    ELINK_W3_INTERNAL_CONFIG);
   1003 		config1 = (u_int)bus_space_read_2(iot, ioh,
   1004 		    ELINK_W3_INTERNAL_CONFIG + 2);
   1005 
   1006 		config1 = config1 & ~CONFIG_MEDIAMASK;
   1007 		config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data <<
   1008 		    CONFIG_MEDIAMASK_SHIFT);
   1009 
   1010 		bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0);
   1011 		bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2,
   1012 		    config1);
   1013 
   1014 		mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL);
   1015 		if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX)
   1016 			mctl |= MAC_CONTROL_FDX;
   1017 		else
   1018 			mctl &= ~MAC_CONTROL_FDX;
   1019 		bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl);
   1020 		break;
   1021 	    }
   1022 	default:
   1023 	    {
   1024 		int w0_addr_cfg;
   1025 
   1026 		GO_WINDOW(0);
   1027 		w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG);
   1028 		w0_addr_cfg &= 0x3fff;
   1029 		bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg |
   1030 		    (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14));
   1031 		DELAY(1000);
   1032 		break;
   1033 	    }
   1034 	}
   1035 
   1036 	GO_WINDOW(1);		/* Window 1 is operating window */
   1037 }
   1038 
   1039 /*
   1040  * Get currently-selected media from card.
   1041  * (if_media callback, may be called before interface is brought up).
   1042  */
   1043 void
   1044 ep_media_status(struct ifnet *ifp, struct ifmediareq *req)
   1045 {
   1046 	struct ep_softc *sc = ifp->if_softc;
   1047 	bus_space_tag_t iot = sc->sc_iot;
   1048 	bus_space_handle_t ioh = sc->sc_ioh;
   1049 
   1050 	if (sc->enabled == 0) {
   1051 		req->ifm_active = IFM_ETHER|IFM_NONE;
   1052 		req->ifm_status = 0;
   1053 		return;
   1054 	}
   1055 
   1056 	/*
   1057 	 * If we have MII, go ask the PHY what's going on.
   1058 	 */
   1059 	if (sc->ep_flags & ELINK_FLAGS_MII) {
   1060 		mii_pollstat(&sc->sc_mii);
   1061 		req->ifm_active = sc->sc_mii.mii_media_active;
   1062 		req->ifm_status = sc->sc_mii.mii_media_status;
   1063 		return;
   1064 	}
   1065 
   1066 	/*
   1067 	 * Ok, at this point we claim that our active media is
   1068 	 * the currently selected media.  We'll update our status
   1069 	 * if our chipset allows us to detect link.
   1070 	 */
   1071 	req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media;
   1072 	req->ifm_status = 0;
   1073 
   1074 	switch (sc->ep_chipset) {
   1075 	case ELINK_CHIPSET_VORTEX:
   1076 	case ELINK_CHIPSET_BOOMERANG:
   1077 		GO_WINDOW(4);
   1078 		req->ifm_status = IFM_AVALID;
   1079 		if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) &
   1080 		    LINKBEAT_DETECT)
   1081 			req->ifm_status |= IFM_ACTIVE;
   1082 		GO_WINDOW(1);	/* back to operating window */
   1083 		break;
   1084 	}
   1085 }
   1086 
   1087 
   1088 
   1089 /*
   1090  * Start outputting on the interface.
   1091  * Always called as splnet().
   1092  */
   1093 void
   1094 epstart(struct ifnet *ifp)
   1095 {
   1096 	struct ep_softc *sc = ifp->if_softc;
   1097 	bus_space_tag_t iot = sc->sc_iot;
   1098 	bus_space_handle_t ioh = sc->sc_ioh;
   1099 	struct mbuf *m, *m0;
   1100 	int sh, len, pad;
   1101 	bus_size_t txreg;
   1102 
   1103 	/* Don't transmit if interface is busy or not running */
   1104 	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
   1105 		return;
   1106 
   1107 startagain:
   1108 	/* Sneak a peek at the next packet */
   1109 	IFQ_POLL(&ifp->if_snd, m0);
   1110 	if (m0 == 0)
   1111 		return;
   1112 
   1113 	/* We need to use m->m_pkthdr.len, so require the header */
   1114 	if ((m0->m_flags & M_PKTHDR) == 0)
   1115 		panic("epstart: no header mbuf");
   1116 	len = m0->m_pkthdr.len;
   1117 
   1118 	pad = (4 - len) & 3;
   1119 
   1120 	/*
   1121 	 * The 3c509 automatically pads short packets to minimum ethernet
   1122 	 * length, but we drop packets that are too large. Perhaps we should
   1123 	 * truncate them instead?
   1124 	 */
   1125 	if (len + pad > ETHER_MAX_LEN) {
   1126 		/* packet is obviously too large: toss it */
   1127 		++ifp->if_oerrors;
   1128 		IFQ_DEQUEUE(&ifp->if_snd, m0);
   1129 		m_freem(m0);
   1130 		goto readcheck;
   1131 	}
   1132 
   1133 	if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) <
   1134 	    len + pad + 4) {
   1135 		bus_space_write_2(iot, ioh, ELINK_COMMAND,
   1136 		    SET_TX_AVAIL_THRESH |
   1137 		    ((len + pad + 4) >> sc->ep_pktlenshift));
   1138 		/* not enough room in FIFO */
   1139 		ifp->if_flags |= IFF_OACTIVE;
   1140 		return;
   1141 	} else {
   1142 		bus_space_write_2(iot, ioh, ELINK_COMMAND,
   1143 		    SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE);
   1144 	}
   1145 
   1146 	IFQ_DEQUEUE(&ifp->if_snd, m0);
   1147 	if (m0 == 0)		/* not really needed */
   1148 		return;
   1149 
   1150 	bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH |
   1151 	    ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/));
   1152 
   1153 	bpf_mtap(ifp, m0);
   1154 
   1155 	/*
   1156 	 * Do the output at a high interrupt priority level so that an
   1157 	 * interrupt from another device won't cause a FIFO underrun.
   1158 	 * We choose splsched() since that blocks essentially everything
   1159 	 * except for interrupts from serial devices (which typically
   1160 	 * lose data if their interrupt isn't serviced fast enough).
   1161 	 *
   1162 	 * XXX THIS CAN CAUSE CLOCK DRIFT!
   1163 	 */
   1164 	sh = splsched();
   1165 
   1166 	txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1);
   1167 
   1168 	if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) {
   1169 		/*
   1170 		 * Prime the FIFO buffer counter (number of 16-bit
   1171 		 * words about to be written to the FIFO).
   1172 		 *
   1173 		 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS
   1174 		 * COUNTER IS NON-ZERO!
   1175 		 */
   1176 		bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL,
   1177 		    (len + pad) >> 1);
   1178 	}
   1179 
   1180 	bus_space_write_2(iot, ioh, txreg, len);
   1181 	bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */
   1182 	if (ELINK_IS_BUS_32(sc->bustype)) {
   1183 		for (m = m0; m;) {
   1184 			if (m->m_len > 3)  {
   1185 				/* align our reads from core */
   1186 				if (mtod(m, u_long) & 3)  {
   1187 					u_long count =
   1188 					    4 - (mtod(m, u_long) & 3);
   1189 					bus_space_write_multi_1(iot, ioh,
   1190 					    txreg, mtod(m, u_int8_t *), count);
   1191 					m->m_data =
   1192 					    (void *)(mtod(m, u_long) + count);
   1193 					m->m_len -= count;
   1194 				}
   1195 				bus_space_write_multi_stream_4(iot, ioh,
   1196 				    txreg, mtod(m, u_int32_t *), m->m_len >> 2);
   1197 				m->m_data = (void *)(mtod(m, u_long) +
   1198 					(u_long)(m->m_len & ~3));
   1199 				m->m_len -= m->m_len & ~3;
   1200 			}
   1201 			if (m->m_len)  {
   1202 				bus_space_write_multi_1(iot, ioh,
   1203 				    txreg, mtod(m, u_int8_t *), m->m_len);
   1204 			}
   1205 			MFREE(m, m0);
   1206 			m = m0;
   1207 		}
   1208 	} else {
   1209 		for (m = m0; m;) {
   1210 			if (m->m_len > 1)  {
   1211 				if (mtod(m, u_long) & 1)  {
   1212 					bus_space_write_1(iot, ioh,
   1213 					    txreg, *(mtod(m, u_int8_t *)));
   1214 					m->m_data =
   1215 					    (void *)(mtod(m, u_long) + 1);
   1216 					m->m_len -= 1;
   1217 				}
   1218 				bus_space_write_multi_stream_2(iot, ioh,
   1219 				    txreg, mtod(m, u_int16_t *),
   1220 				    m->m_len >> 1);
   1221 			}
   1222 			if (m->m_len & 1)  {
   1223 				bus_space_write_1(iot, ioh, txreg,
   1224 				     *(mtod(m, u_int8_t *) + m->m_len - 1));
   1225 			}
   1226 			MFREE(m, m0);
   1227 			m = m0;
   1228 		}
   1229 	}
   1230 	while (pad--)
   1231 		bus_space_write_1(iot, ioh, txreg, 0);
   1232 
   1233 	splx(sh);
   1234 
   1235 	++ifp->if_opackets;
   1236 
   1237 readcheck:
   1238 	if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) &
   1239 	    ERR_INCOMPLETE) == 0) {
   1240 		/* We received a complete packet. */
   1241 		u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS);
   1242 
   1243 		if ((status & INTR_LATCH) == 0) {
   1244 			/*
   1245 			 * No interrupt, read the packet and continue
   1246 			 * Is  this supposed to happen? Is my motherboard
   1247 			 * completely busted?
   1248 			 */
   1249 			epread(sc);
   1250 		} else {
   1251 			/* Got an interrupt, return so that it gets serviced. */
   1252 			return;
   1253 		}
   1254 	} else {
   1255 		/* Check if we are stuck and reset [see XXX comment] */
   1256 		if (epstatus(sc)) {
   1257 			if (ifp->if_flags & IFF_DEBUG)
   1258 				printf("%s: adapter reset\n",
   1259 				    device_xname(sc->sc_dev));
   1260 			epreset(sc);
   1261 		}
   1262 	}
   1263 
   1264 	goto startagain;
   1265 }
   1266 
   1267 
   1268 /*
   1269  * XXX: The 3c509 card can get in a mode where both the fifo status bit
   1270  *	FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set
   1271  *	We detect this situation and we reset the adapter.
   1272  *	It happens at times when there is a lot of broadcast traffic
   1273  *	on the cable (once in a blue moon).
   1274  */
   1275 static int
   1276 epstatus(struct ep_softc *sc)
   1277 {
   1278 	bus_space_tag_t iot = sc->sc_iot;
   1279 	bus_space_handle_t ioh = sc->sc_ioh;
   1280 	u_int16_t fifost;
   1281 
   1282 	/*
   1283 	 * Check the FIFO status and act accordingly
   1284 	 */
   1285 	GO_WINDOW(4);
   1286 	fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG);
   1287 	GO_WINDOW(1);
   1288 
   1289 	if (fifost & FIFOS_RX_UNDERRUN) {
   1290 		if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
   1291 			printf("%s: RX underrun\n", device_xname(sc->sc_dev));
   1292 		epreset(sc);
   1293 		return 0;
   1294 	}
   1295 
   1296 	if (fifost & FIFOS_RX_STATUS_OVERRUN) {
   1297 		if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
   1298 			printf("%s: RX Status overrun\n", device_xname(sc->sc_dev));
   1299 		return 1;
   1300 	}
   1301 
   1302 	if (fifost & FIFOS_RX_OVERRUN) {
   1303 		if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
   1304 			printf("%s: RX overrun\n", device_xname(sc->sc_dev));
   1305 		return 1;
   1306 	}
   1307 
   1308 	if (fifost & FIFOS_TX_OVERRUN) {
   1309 		if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
   1310 			printf("%s: TX overrun\n", device_xname(sc->sc_dev));
   1311 		epreset(sc);
   1312 		return 0;
   1313 	}
   1314 
   1315 	return 0;
   1316 }
   1317 
   1318 
   1319 static void
   1320 eptxstat(struct ep_softc *sc)
   1321 {
   1322 	bus_space_tag_t iot = sc->sc_iot;
   1323 	bus_space_handle_t ioh = sc->sc_ioh;
   1324 	int i;
   1325 
   1326 	/*
   1327 	 * We need to read+write TX_STATUS until we get a 0 status
   1328 	 * in order to turn off the interrupt flag.
   1329 	 */
   1330 	while ((i = bus_space_read_2(iot, ioh,
   1331 	     ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) {
   1332 		bus_space_write_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS),
   1333 		    0x0);
   1334 
   1335 		if (i & TXS_JABBER) {
   1336 			++sc->sc_ethercom.ec_if.if_oerrors;
   1337 			if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
   1338 				printf("%s: jabber (%x)\n",
   1339 				       device_xname(sc->sc_dev), i);
   1340 			epreset(sc);
   1341 		} else if (i & TXS_UNDERRUN) {
   1342 			++sc->sc_ethercom.ec_if.if_oerrors;
   1343 			if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
   1344 				printf("%s: fifo underrun (%x) @%d\n",
   1345 				       device_xname(sc->sc_dev), i,
   1346 				       sc->tx_start_thresh);
   1347 			if (sc->tx_succ_ok < 100)
   1348 				    sc->tx_start_thresh = min(ETHER_MAX_LEN,
   1349 					    sc->tx_start_thresh + 20);
   1350 			sc->tx_succ_ok = 0;
   1351 			epreset(sc);
   1352 		} else if (i & TXS_MAX_COLLISION) {
   1353 			++sc->sc_ethercom.ec_if.if_collisions;
   1354 			bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
   1355 			sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
   1356 		} else
   1357 			sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
   1358 	}
   1359 }
   1360 
   1361 int
   1362 epintr(void *arg)
   1363 {
   1364 	struct ep_softc *sc = arg;
   1365 	bus_space_tag_t iot = sc->sc_iot;
   1366 	bus_space_handle_t ioh = sc->sc_ioh;
   1367 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
   1368 	u_int16_t status;
   1369 	int ret = 0;
   1370 
   1371 	if (sc->enabled == 0 || !device_is_active(sc->sc_dev))
   1372 		return (0);
   1373 
   1374 
   1375 	for (;;) {
   1376 		status = bus_space_read_2(iot, ioh, ELINK_STATUS);
   1377 
   1378 		if ((status & WATCHED_INTERRUPTS) == 0) {
   1379 			if ((status & INTR_LATCH) == 0) {
   1380 #if 0
   1381 				printf("%s: intr latch cleared\n",
   1382 				       device_xname(sc->sc_dev));
   1383 #endif
   1384 				break;
   1385 			}
   1386 		}
   1387 
   1388 		ret = 1;
   1389 
   1390 		/*
   1391 		 * Acknowledge any interrupts.  It's important that we do this
   1392 		 * first, since there would otherwise be a race condition.
   1393 		 * Due to the i386 interrupt queueing, we may get spurious
   1394 		 * interrupts occasionally.
   1395 		 */
   1396 		bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR |
   1397 		    (status & (INTR_LATCH | ALL_INTERRUPTS)));
   1398 
   1399 #if 0
   1400 		status = bus_space_read_2(iot, ioh, ELINK_STATUS);
   1401 
   1402 		printf("%s: intr%s%s%s%s\n", device_xname(sc->sc_dev),
   1403 		       (status & RX_COMPLETE)?" RX_COMPLETE":"",
   1404 		       (status & TX_COMPLETE)?" TX_COMPLETE":"",
   1405 		       (status & TX_AVAIL)?" TX_AVAIL":"",
   1406 		       (status & CARD_FAILURE)?" CARD_FAILURE":"");
   1407 #endif
   1408 
   1409 		if (status & RX_COMPLETE) {
   1410 			epread(sc);
   1411 		}
   1412 		if (status & TX_AVAIL) {
   1413 			sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
   1414 			epstart(&sc->sc_ethercom.ec_if);
   1415 		}
   1416 		if (status & CARD_FAILURE) {
   1417 			printf("%s: adapter failure (%x)\n",
   1418 			    device_xname(sc->sc_dev), status);
   1419 #if 1
   1420 			epinit(ifp);
   1421 #else
   1422 			epreset(sc);
   1423 #endif
   1424 			return (1);
   1425 		}
   1426 		if (status & TX_COMPLETE) {
   1427 			eptxstat(sc);
   1428 			epstart(ifp);
   1429 		}
   1430 
   1431 		if (status)
   1432 			rnd_add_uint32(&sc->rnd_source, status);
   1433 	}
   1434 
   1435 	/* no more interrupts */
   1436 	return (ret);
   1437 }
   1438 
   1439 void
   1440 epread(struct ep_softc *sc)
   1441 {
   1442 	bus_space_tag_t iot = sc->sc_iot;
   1443 	bus_space_handle_t ioh = sc->sc_ioh;
   1444 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
   1445 	struct mbuf *m;
   1446 	int len;
   1447 
   1448 	len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS));
   1449 
   1450 again:
   1451 	if (ifp->if_flags & IFF_DEBUG) {
   1452 		int err = len & ERR_MASK;
   1453 		const char *s = NULL;
   1454 
   1455 		if (len & ERR_INCOMPLETE)
   1456 			s = "incomplete packet";
   1457 		else if (err == ERR_OVERRUN)
   1458 			s = "packet overrun";
   1459 		else if (err == ERR_RUNT)
   1460 			s = "runt packet";
   1461 		else if (err == ERR_ALIGNMENT)
   1462 			s = "bad alignment";
   1463 		else if (err == ERR_CRC)
   1464 			s = "bad crc";
   1465 		else if (err == ERR_OVERSIZE)
   1466 			s = "oversized packet";
   1467 		else if (err == ERR_DRIBBLE)
   1468 			s = "dribble bits";
   1469 
   1470 		if (s)
   1471 			printf("%s: %s\n", device_xname(sc->sc_dev), s);
   1472 	}
   1473 
   1474 	if (len & ERR_INCOMPLETE)
   1475 		return;
   1476 
   1477 	if (len & ERR_RX) {
   1478 		++ifp->if_ierrors;
   1479 		goto abort;
   1480 	}
   1481 
   1482 	len &= RX_BYTES_MASK;	/* Lower 11 bits = RX bytes. */
   1483 
   1484 	/* Pull packet off interface. */
   1485 	m = epget(sc, len);
   1486 	if (m == 0) {
   1487 		ifp->if_ierrors++;
   1488 		goto abort;
   1489 	}
   1490 
   1491 	++ifp->if_ipackets;
   1492 
   1493 	/*
   1494 	 * Check if there's a BPF listener on this interface.
   1495 	 * If so, hand off the raw packet to BPF.
   1496 	 */
   1497 	bpf_mtap(ifp, m);
   1498 
   1499 	if_percpuq_enqueue(ifp->if_percpuq, m);
   1500 
   1501 	/*
   1502 	 * In periods of high traffic we can actually receive enough
   1503 	 * packets so that the fifo overrun bit will be set at this point,
   1504 	 * even though we just read a packet. In this case we
   1505 	 * are not going to receive any more interrupts. We check for
   1506 	 * this condition and read again until the fifo is not full.
   1507 	 * We could simplify this test by not using epstatus(), but
   1508 	 * rechecking the RX_STATUS register directly. This test could
   1509 	 * result in unnecessary looping in cases where there is a new
   1510 	 * packet but the fifo is not full, but it will not fix the
   1511 	 * stuck behavior.
   1512 	 *
   1513 	 * Even with this improvement, we still get packet overrun errors
   1514 	 * which are hurting performance. Maybe when I get some more time
   1515 	 * I'll modify epread() so that it can handle RX_EARLY interrupts.
   1516 	 */
   1517 	if (epstatus(sc)) {
   1518 		len = bus_space_read_2(iot, ioh,
   1519 		    ep_w1_reg(sc, ELINK_W1_RX_STATUS));
   1520 		/* Check if we are stuck and reset [see XXX comment] */
   1521 		if (len & ERR_INCOMPLETE) {
   1522 			if (ifp->if_flags & IFF_DEBUG)
   1523 				printf("%s: adapter reset\n",
   1524 				    device_xname(sc->sc_dev));
   1525 			epreset(sc);
   1526 			return;
   1527 		}
   1528 		goto again;
   1529 	}
   1530 
   1531 	return;
   1532 
   1533 abort:
   1534 	ep_discard_rxtop(iot, ioh);
   1535 
   1536 }
   1537 
   1538 struct mbuf *
   1539 epget(struct ep_softc *sc, int totlen)
   1540 {
   1541 	bus_space_tag_t iot = sc->sc_iot;
   1542 	bus_space_handle_t ioh = sc->sc_ioh;
   1543 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
   1544 	struct mbuf *m;
   1545 	bus_size_t rxreg;
   1546 	int len, remaining;
   1547 	int s;
   1548 	void *newdata;
   1549 	u_long offset;
   1550 
   1551 	m = sc->mb[sc->next_mb];
   1552 	sc->mb[sc->next_mb] = 0;
   1553 	if (m == 0) {
   1554 		MGETHDR(m, M_DONTWAIT, MT_DATA);
   1555 		if (m == 0)
   1556 			return 0;
   1557 	} else {
   1558 		/* If the queue is no longer full, refill. */
   1559 		if (sc->last_mb == sc->next_mb)
   1560 			callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc);
   1561 
   1562 		/* Convert one of our saved mbuf's. */
   1563 		sc->next_mb = (sc->next_mb + 1) % MAX_MBS;
   1564 		m->m_data = m->m_pktdat;
   1565 		m->m_flags = M_PKTHDR;
   1566 		memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr));
   1567 	}
   1568 	m_set_rcvif(m, ifp);
   1569 	m->m_pkthdr.len = totlen;
   1570 	len = MHLEN;
   1571 
   1572 	/*
   1573 	 * Allocate big enough space to hold whole packet, to avoid
   1574 	 * allocating new mbufs on splsched().
   1575 	 */
   1576 	if (totlen + ALIGNBYTES > len) {
   1577 		if (totlen + ALIGNBYTES > MCLBYTES) {
   1578 			len = ALIGN(totlen + ALIGNBYTES);
   1579 			MEXTMALLOC(m, len, M_DONTWAIT);
   1580 		} else {
   1581 			len = MCLBYTES;
   1582 			MCLGET(m, M_DONTWAIT);
   1583 		}
   1584 		if ((m->m_flags & M_EXT) == 0) {
   1585 			m_free(m);
   1586 			return 0;
   1587 		}
   1588 	}
   1589 
   1590 	/* align the struct ip header */
   1591 	newdata = (char *)ALIGN(m->m_data + sizeof(struct ether_header))
   1592 	    - sizeof(struct ether_header);
   1593 	m->m_data = newdata;
   1594 	m->m_len = totlen;
   1595 
   1596 	rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1);
   1597 	remaining = totlen;
   1598 	offset = mtod(m, u_long);
   1599 
   1600 	/*
   1601 	 * We read the packet at a high interrupt priority level so that
   1602 	 * an interrupt from another device won't cause the card's packet
   1603 	 * buffer to overflow.  We choose splsched() since that blocks
   1604 	 * essentially everything except for interrupts from serial
   1605 	 * devices (which typically lose data if their interrupt isn't
   1606 	 * serviced fast enough).
   1607 	 *
   1608 	 * XXX THIS CAN CAUSE CLOCK DRIFT!
   1609 	 */
   1610 	s = splsched();
   1611 
   1612 	if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) {
   1613 		/*
   1614 		 * Prime the FIFO buffer counter (number of 16-bit
   1615 		 * words about to be read from the FIFO).
   1616 		 *
   1617 		 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS
   1618 		 * COUNTER IS NON-ZERO!
   1619 		 */
   1620 		bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1);
   1621 	}
   1622 
   1623 	if (ELINK_IS_BUS_32(sc->bustype)) {
   1624 		/*
   1625 		 * Read bytes up to the point where we are aligned.
   1626 		 * (We can align to 4 bytes, rather than ALIGNBYTES,
   1627 		 * here because we're later reading 4-byte chunks.)
   1628 		 */
   1629 		if ((remaining > 3) && (offset & 3))  {
   1630 			int count = (4 - (offset & 3));
   1631 			bus_space_read_multi_1(iot, ioh,
   1632 			    rxreg, (u_int8_t *) offset, count);
   1633 			offset += count;
   1634 			remaining -= count;
   1635 		}
   1636 		if (remaining > 3) {
   1637 			bus_space_read_multi_stream_4(iot, ioh,
   1638 			    rxreg, (u_int32_t *) offset,
   1639 				    remaining >> 2);
   1640 			offset += remaining & ~3;
   1641 			remaining &= 3;
   1642 		}
   1643 		if (remaining)  {
   1644 			bus_space_read_multi_1(iot, ioh,
   1645 			    rxreg, (u_int8_t *) offset, remaining);
   1646 		}
   1647 	} else {
   1648 		if ((remaining > 1) && (offset & 1))  {
   1649 			bus_space_read_multi_1(iot, ioh,
   1650 			    rxreg, (u_int8_t *) offset, 1);
   1651 			remaining -= 1;
   1652 			offset += 1;
   1653 		}
   1654 		if (remaining > 1) {
   1655 			bus_space_read_multi_stream_2(iot, ioh,
   1656 			    rxreg, (u_int16_t *) offset,
   1657 			    remaining >> 1);
   1658 			offset += remaining & ~1;
   1659 		}
   1660 		if (remaining & 1)  {
   1661 				bus_space_read_multi_1(iot, ioh,
   1662 			    rxreg, (u_int8_t *) offset, remaining & 1);
   1663 		}
   1664 	}
   1665 
   1666 	ep_discard_rxtop(iot, ioh);
   1667 
   1668 	if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER)
   1669 		bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0);
   1670 	splx(s);
   1671 
   1672 	return (m);
   1673 }
   1674 
   1675 int
   1676 epioctl(struct ifnet *ifp, u_long cmd, void *data)
   1677 {
   1678 	struct ep_softc *sc = ifp->if_softc;
   1679 	struct ifreq *ifr = (struct ifreq *)data;
   1680 	int s, error = 0;
   1681 
   1682 	s = splnet();
   1683 
   1684 	switch (cmd) {
   1685 
   1686 	case SIOCSIFMEDIA:
   1687 	case SIOCGIFMEDIA:
   1688 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
   1689 		break;
   1690 
   1691 	case SIOCADDMULTI:
   1692 	case SIOCDELMULTI:
   1693 		if (sc->enabled == 0) {
   1694 			error = EIO;
   1695 			break;
   1696 		}
   1697 
   1698 	default:
   1699 		error = ether_ioctl(ifp, cmd, data);
   1700 
   1701 		if (error == ENETRESET) {
   1702 			/*
   1703 			 * Multicast list has changed; set the hardware filter
   1704 			 * accordingly.
   1705 			 */
   1706 			if (ifp->if_flags & IFF_RUNNING)
   1707 				epreset(sc);
   1708 			error = 0;
   1709 		}
   1710 		break;
   1711 	}
   1712 
   1713 	splx(s);
   1714 	return (error);
   1715 }
   1716 
   1717 void
   1718 epreset(struct ep_softc *sc)
   1719 {
   1720 	int s;
   1721 
   1722 	s = splnet();
   1723 	epinit(&sc->sc_ethercom.ec_if);
   1724 	splx(s);
   1725 }
   1726 
   1727 void
   1728 epwatchdog(struct ifnet *ifp)
   1729 {
   1730 	struct ep_softc *sc = ifp->if_softc;
   1731 
   1732 	log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev));
   1733 	++sc->sc_ethercom.ec_if.if_oerrors;
   1734 
   1735 	epreset(sc);
   1736 }
   1737 
   1738 void
   1739 epstop(struct ifnet *ifp, int disable)
   1740 {
   1741 	struct ep_softc *sc = ifp->if_softc;
   1742 	bus_space_tag_t iot = sc->sc_iot;
   1743 	bus_space_handle_t ioh = sc->sc_ioh;
   1744 
   1745 	if (sc->ep_flags & ELINK_FLAGS_MII) {
   1746 		/* Stop the one second clock. */
   1747 		callout_stop(&sc->sc_mbuf_callout);
   1748 
   1749 		/* Down the MII. */
   1750 		mii_down(&sc->sc_mii);
   1751 	}
   1752 
   1753 	if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) {
   1754 		/*
   1755 		 * Clear the FIFO buffer count, thus halting
   1756 		 * any currently-running transactions.
   1757 		 */
   1758 		GO_WINDOW(1);		/* sanity */
   1759 		bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0);
   1760 		bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0);
   1761 	}
   1762 
   1763 	bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE);
   1764 	ep_discard_rxtop(iot, ioh);
   1765 
   1766 	bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE);
   1767 	bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
   1768 
   1769 	ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET);
   1770 	ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET);
   1771 
   1772 	bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH);
   1773 	bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK);
   1774 	bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK);
   1775 	bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER);
   1776 
   1777 	epmbufempty(sc);
   1778 
   1779 	if (disable)
   1780 		epdisable(sc);
   1781 
   1782 	ifp->if_flags &= ~IFF_RUNNING;
   1783 }
   1784 
   1785 
   1786 /*
   1787  * Before reboots, reset card completely.
   1788  */
   1789 static bool
   1790 epshutdown(device_t self, int howto)
   1791 {
   1792 	struct ep_softc *sc = device_private(self);
   1793 	int s = splnet();
   1794 
   1795 	if (sc->enabled) {
   1796 		epstop(&sc->sc_ethercom.ec_if, 0);
   1797 		ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET);
   1798 		epdisable(sc);
   1799 		sc->enabled = 0;
   1800 	}
   1801 	splx(s);
   1802 
   1803 	return true;
   1804 }
   1805 
   1806 /*
   1807  * We get eeprom data from the id_port given an offset into the
   1808  * eeprom.  Basically; after the ID_sequence is sent to all of
   1809  * the cards; they enter the ID_CMD state where they will accept
   1810  * command requests. 0x80-0xbf loads the eeprom data.  We then
   1811  * read the port 16 times and with every read; the cards check
   1812  * for contention (ie: if one card writes a 0 bit and another
   1813  * writes a 1 bit then the host sees a 0. At the end of the cycle;
   1814  * each card compares the data on the bus; if there is a difference
   1815  * then that card goes into ID_WAIT state again). In the meantime;
   1816  * one bit of data is returned in the AX register which is conveniently
   1817  * returned to us by bus_space_read_2().  Hence; we read 16 times getting one
   1818  * bit of data with each read.
   1819  *
   1820  * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT!
   1821  */
   1822 u_int16_t
   1823 epreadeeprom(bus_space_tag_t iot, bus_space_handle_t ioh, int offset)
   1824 {
   1825 	u_int16_t data = 0;
   1826 	int i;
   1827 
   1828 	bus_space_write_2(iot, ioh, 0, 0x80 + offset);
   1829 	delay(1000);
   1830 	for (i = 0; i < 16; i++)
   1831 		data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1);
   1832 	return (data);
   1833 }
   1834 
   1835 static int
   1836 epbusyeeprom(struct ep_softc *sc)
   1837 {
   1838 	bus_space_tag_t iot = sc->sc_iot;
   1839 	bus_space_handle_t ioh = sc->sc_ioh;
   1840 	bus_size_t eecmd;
   1841 	int i = 100, j;
   1842 	uint16_t busybit;
   1843 
   1844 	if (sc->bustype == ELINK_BUS_PCMCIA) {
   1845 		delay(1000);
   1846 		return 0;
   1847 	}
   1848 
   1849 	if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) {
   1850 		eecmd = CORK_ASIC_EEPROM_COMMAND;
   1851 		busybit = CORK_EEPROM_BUSY;
   1852 	} else {
   1853 		eecmd = ELINK_W0_EEPROM_COMMAND;
   1854 		busybit = EEPROM_BUSY;
   1855 	}
   1856 
   1857 	j = 0;		/* bad GCC flow analysis */
   1858 	while (i--) {
   1859 		j = bus_space_read_2(iot, ioh, eecmd);
   1860 		if (j & busybit)
   1861 			delay(100);
   1862 		else
   1863 			break;
   1864 	}
   1865 	if (i == 0) {
   1866 		aprint_normal("\n");
   1867 		aprint_error_dev(sc->sc_dev, "eeprom failed to come ready\n");
   1868 		return (1);
   1869 	}
   1870 	if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW &&
   1871 	    (j & EEPROM_TST_MODE) != 0) {
   1872 		/* XXX PnP mode? */
   1873 		printf("\n%s: erase pencil mark!\n", device_xname(sc->sc_dev));
   1874 		return (1);
   1875 	}
   1876 	return (0);
   1877 }
   1878 
   1879 u_int16_t
   1880 ep_read_eeprom(struct ep_softc *sc, u_int16_t offset)
   1881 {
   1882 	bus_size_t eecmd, eedata;
   1883 	u_int16_t readcmd;
   1884 
   1885 	if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) {
   1886 		eecmd = CORK_ASIC_EEPROM_COMMAND;
   1887 		eedata = CORK_ASIC_EEPROM_DATA;
   1888 	} else {
   1889 		eecmd = ELINK_W0_EEPROM_COMMAND;
   1890 		eedata = ELINK_W0_EEPROM_DATA;
   1891 	}
   1892 
   1893 	/*
   1894 	 * RoadRunner has a larger EEPROM, so a different read command
   1895 	 * is required.
   1896 	 */
   1897 	if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER)
   1898 		readcmd = READ_EEPROM_RR;
   1899 	else
   1900 		readcmd = READ_EEPROM;
   1901 
   1902 	if (epbusyeeprom(sc))
   1903 		return (0);		/* XXX why is eeprom busy? */
   1904 
   1905 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset);
   1906 
   1907 	if (epbusyeeprom(sc))
   1908 		return (0);		/* XXX why is eeprom busy? */
   1909 
   1910 	return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata));
   1911 }
   1912 
   1913 void
   1914 epmbuffill(void *v)
   1915 {
   1916 	struct ep_softc *sc = v;
   1917 	struct mbuf *m;
   1918 	int s, i;
   1919 
   1920 	s = splnet();
   1921 	i = sc->last_mb;
   1922 	do {
   1923 		if (sc->mb[i] == 0) {
   1924 			MGET(m, M_DONTWAIT, MT_DATA);
   1925 			if (m == 0)
   1926 				break;
   1927 			sc->mb[i] = m;
   1928 		}
   1929 		i = (i + 1) % MAX_MBS;
   1930 	} while (i != sc->next_mb);
   1931 	sc->last_mb = i;
   1932 	/* If the queue was not filled, try again. */
   1933 	if (sc->last_mb != sc->next_mb)
   1934 		callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc);
   1935 	splx(s);
   1936 }
   1937 
   1938 void
   1939 epmbufempty(struct ep_softc *sc)
   1940 {
   1941 	int s, i;
   1942 
   1943 	s = splnet();
   1944 	for (i = 0; i < MAX_MBS; i++) {
   1945 		if (sc->mb[i]) {
   1946 			m_freem(sc->mb[i]);
   1947 			sc->mb[i] = NULL;
   1948 		}
   1949 	}
   1950 	sc->last_mb = sc->next_mb = 0;
   1951 	callout_stop(&sc->sc_mbuf_callout);
   1952 	splx(s);
   1953 }
   1954 
   1955 int
   1956 epenable(struct ep_softc *sc)
   1957 {
   1958 
   1959 	if (sc->enabled == 0 && sc->enable != NULL) {
   1960 		if ((*sc->enable)(sc) != 0) {
   1961 			aprint_error_dev(sc->sc_dev, "device enable failed\n");
   1962 			return (EIO);
   1963 		}
   1964 	}
   1965 
   1966 	sc->enabled = 1;
   1967 	return (0);
   1968 }
   1969 
   1970 void
   1971 epdisable(struct ep_softc *sc)
   1972 {
   1973 
   1974 	if (sc->enabled != 0 && sc->disable != NULL) {
   1975 		(*sc->disable)(sc);
   1976 		sc->enabled = 0;
   1977 	}
   1978 }
   1979 
   1980 /*
   1981  * ep_activate:
   1982  *
   1983  *	Handle device activation/deactivation requests.
   1984  */
   1985 int
   1986 ep_activate(device_t self, enum devact act)
   1987 {
   1988 	struct ep_softc *sc = device_private(self);
   1989 
   1990 	switch (act) {
   1991 	case DVACT_DEACTIVATE:
   1992 		if_deactivate(&sc->sc_ethercom.ec_if);
   1993 		return 0;
   1994 	default:
   1995 		return EOPNOTSUPP;
   1996 	}
   1997 }
   1998 
   1999 /*
   2000  * ep_detach:
   2001  *
   2002  *	Detach a elink3 interface.
   2003  */
   2004 int
   2005 ep_detach(device_t self, int flags)
   2006 {
   2007 	struct ep_softc *sc = device_private(self);
   2008 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
   2009 
   2010 	/* Succeed now if there's no work to do. */
   2011 	if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0)
   2012 		return (0);
   2013 
   2014 	epdisable(sc);
   2015 
   2016 	callout_stop(&sc->sc_mii_callout);
   2017 	callout_stop(&sc->sc_mbuf_callout);
   2018 
   2019 	if (sc->ep_flags & ELINK_FLAGS_MII) {
   2020 		/* Detach all PHYs */
   2021 		mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
   2022 	}
   2023 
   2024 	/* Delete all remaining media. */
   2025 	ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
   2026 
   2027 	rnd_detach_source(&sc->rnd_source);
   2028 	ether_ifdetach(ifp);
   2029 	if_detach(ifp);
   2030 
   2031 	pmf_device_deregister(sc->sc_dev);
   2032 
   2033 	return (0);
   2034 }
   2035 
   2036 u_int32_t
   2037 ep_mii_bitbang_read(device_t self)
   2038 {
   2039 	struct ep_softc *sc = device_private(self);
   2040 
   2041 	/* We're already in Window 4. */
   2042 	return (bus_space_read_2(sc->sc_iot, sc->sc_ioh,
   2043 	    ELINK_W4_BOOM_PHYSMGMT));
   2044 }
   2045 
   2046 void
   2047 ep_mii_bitbang_write(device_t self, u_int32_t val)
   2048 {
   2049 	struct ep_softc *sc = device_private(self);
   2050 
   2051 	/* We're already in Window 4. */
   2052 	bus_space_write_2(sc->sc_iot, sc->sc_ioh,
   2053 	    ELINK_W4_BOOM_PHYSMGMT, val);
   2054 }
   2055 
   2056 int
   2057 ep_mii_readreg(device_t self, int phy, int reg)
   2058 {
   2059 	struct ep_softc *sc = device_private(self);
   2060 	int val;
   2061 
   2062 	GO_WINDOW(4);
   2063 
   2064 	val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg);
   2065 
   2066 	GO_WINDOW(1);
   2067 
   2068 	return (val);
   2069 }
   2070 
   2071 void
   2072 ep_mii_writereg(device_t self, int phy, int reg, int val)
   2073 {
   2074 	struct ep_softc *sc = device_private(self);
   2075 
   2076 	GO_WINDOW(4);
   2077 
   2078 	mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val);
   2079 
   2080 	GO_WINDOW(1);
   2081 }
   2082 
   2083 void
   2084 ep_statchg(struct ifnet *ifp)
   2085 {
   2086 	struct ep_softc *sc = ifp->if_softc;
   2087 	bus_space_tag_t iot = sc->sc_iot;
   2088 	bus_space_handle_t ioh = sc->sc_ioh;
   2089 	int mctl;
   2090 
   2091 	GO_WINDOW(3);
   2092 	mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL);
   2093 	if (sc->sc_mii.mii_media_active & IFM_FDX)
   2094 		mctl |= MAC_CONTROL_FDX;
   2095 	else
   2096 		mctl &= ~MAC_CONTROL_FDX;
   2097 	bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl);
   2098 	GO_WINDOW(1);	/* back to operating window */
   2099 }
   2100 
   2101 void
   2102 ep_power(int why, void *arg)
   2103 {
   2104 	struct ep_softc *sc = arg;
   2105 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
   2106 	int s;
   2107 
   2108 	s = splnet();
   2109 	switch (why) {
   2110 	case PWR_SUSPEND:
   2111 	case PWR_STANDBY:
   2112 		epstop(ifp, 1);
   2113 		break;
   2114 	case PWR_RESUME:
   2115 		if (ifp->if_flags & IFF_UP) {
   2116 			(void)epinit(ifp);
   2117 		}
   2118 		break;
   2119 	case PWR_SOFTSUSPEND:
   2120 	case PWR_SOFTSTANDBY:
   2121 	case PWR_SOFTRESUME:
   2122 		break;
   2123 	}
   2124 	splx(s);
   2125 }
   2126