elink3.c revision 1.14 1 /* $NetBSD: elink3.c,v 1.14 1996/12/07 08:33:07 cjs Exp $ */
2
3 /*
4 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Herb Peyerl.
18 * 4. The name of Herb Peyerl may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include "bpfilter.h"
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/mbuf.h>
38 #include <sys/socket.h>
39 #include <sys/ioctl.h>
40 #include <sys/errno.h>
41 #include <sys/syslog.h>
42 #include <sys/select.h>
43 #include <sys/device.h>
44
45 #include <net/if.h>
46 #include <net/netisr.h>
47 #include <net/if_dl.h>
48 #include <net/if_types.h>
49 #include <net/netisr.h>
50
51 #ifdef INET
52 #include <netinet/in.h>
53 #include <netinet/in_systm.h>
54 #include <netinet/in_var.h>
55 #include <netinet/ip.h>
56 #include <netinet/if_ether.h>
57 #endif
58
59 #ifdef NS
60 #include <netns/ns.h>
61 #include <netns/ns_if.h>
62 #endif
63
64 #if NBPFILTER > 0
65 #include <net/bpf.h>
66 #include <net/bpfdesc.h>
67 #endif
68
69 #include <machine/cpu.h>
70 #include <machine/bus.h>
71 #include <machine/intr.h>
72
73 #include <dev/ic/elink3var.h>
74 #include <dev/ic/elink3reg.h>
75
76 #define ETHER_MIN_LEN 64
77 #define ETHER_MAX_LEN 1518
78 #define ETHER_ADDR_LEN 6
79
80 struct cfdriver ep_cd = {
81 NULL, "ep", DV_IFNET
82 };
83
84 static void eptxstat __P((struct ep_softc *));
85 static int epstatus __P((struct ep_softc *));
86 void epinit __P((struct ep_softc *));
87 int epioctl __P((struct ifnet *, u_long, caddr_t));
88 void epstart __P((struct ifnet *));
89 void epwatchdog __P((struct ifnet *));
90 void epreset __P((struct ep_softc *));
91 void epread __P((struct ep_softc *));
92 struct mbuf *epget __P((struct ep_softc *, int));
93 void epmbuffill __P((void *));
94 void epmbufempty __P((struct ep_softc *));
95 void epsetfilter __P((struct ep_softc *));
96 void epsetlink __P((struct ep_softc *));
97
98 static int epbusyeeprom __P((struct ep_softc *));
99
100 void
101 epconfig(sc, conn)
102 struct ep_softc *sc;
103 u_int16_t conn;
104 {
105 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
106 bus_space_tag_t iot = sc->sc_iot;
107 bus_space_handle_t ioh = sc->sc_ioh;
108 u_int16_t i;
109 u_int32_t r;
110
111 printf("%s: ", sc->sc_dev.dv_xname);
112
113 /* print RAM size */
114 GO_WINDOW(3);
115 r = bus_space_read_2(iot, ioh, EP_W3_INTERNAL_CONFIG);
116 printf("%dKB %s-wide RAM, ", 8 << (r & 0x07),
117 (r & 0x08) ? "word" : "byte");
118 GO_WINDOW(0);
119
120 /* determine connectors available */
121 sc->ep_connectors = 0;
122 if (conn & IS_AUI) {
123 printf("aui");
124 sc->ep_connectors |= AUI;
125 }
126 if (conn & IS_BNC) {
127 if (sc->ep_connectors)
128 printf("/");
129 printf("bnc");
130 sc->ep_connectors |= BNC;
131 }
132 if (conn & IS_UTP) {
133 if (sc->ep_connectors)
134 printf("/");
135 printf("utp");
136 sc->ep_connectors |= UTP;
137 }
138 if (!sc->ep_connectors)
139 printf("no connectors!");
140
141 /*
142 * Read the station address from the eeprom
143 */
144 for (i = 0; i < 3; i++) {
145 u_int16_t x;
146 if (epbusyeeprom(sc))
147 return;
148 bus_space_write_2(iot, ioh, EP_W0_EEPROM_COMMAND,
149 READ_EEPROM | i);
150 if (epbusyeeprom(sc))
151 return;
152 x = bus_space_read_2(iot, ioh, EP_W0_EEPROM_DATA);
153 sc->sc_arpcom.ac_enaddr[(i << 1)] = x >> 8;
154 sc->sc_arpcom.ac_enaddr[(i << 1) + 1] = x;
155 }
156
157 printf(", address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
158
159 /*
160 * Vortex-based (3c59x, eisa)? and Boomerang (3c900)cards allow
161 * FDDI-sized (4500) byte packets. Commands only take an 11-bit
162 * parameter, and 11 bits isn't enough to hold a full-size pkt length.
163 * Commands to these cards implicitly upshift a packet size
164 * or threshold by 2 bits.
165 * To detect cards with large-packet support, we probe by setting
166 * the transmit threshold register, then change windows and
167 * read back the threshold register directly, and see if the
168 * threshold value was shifted or not.
169 */
170 bus_space_write_2(iot, ioh, EP_COMMAND,
171 SET_TX_AVAIL_THRESH | EP_LARGEWIN_PROBE );
172 GO_WINDOW(5);
173 i = bus_space_read_2(iot, ioh, EP_W5_TX_AVAIL_THRESH);
174 GO_WINDOW(1);
175 switch (i) {
176 case EP_LARGEWIN_PROBE:
177 case (EP_LARGEWIN_PROBE & EP_LARGEWIN_MASK):
178 sc->ep_pktlenshift = 0;
179 break;
180
181 case (EP_LARGEWIN_PROBE << 2):
182 sc->ep_pktlenshift = 2;
183 break;
184
185 default:
186 printf("%s: wrote %d to TX_AVAIL_THRESH, read back %d. "
187 "Interface disabled\n",
188 sc->sc_dev.dv_xname, EP_THRESH_DISABLE, (int) i);
189 return;
190 }
191 /*
192 * Ensure Tx-available interrupts are enabled for
193 * start the interface.
194 * XXX should be in epinit().
195 */
196 bus_space_write_2(iot, ioh, EP_COMMAND,
197 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift));
198
199 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
200 ifp->if_softc = sc;
201 ifp->if_start = epstart;
202 ifp->if_ioctl = epioctl;
203 ifp->if_watchdog = epwatchdog;
204 ifp->if_flags =
205 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
206
207 if_attach(ifp);
208 ether_ifattach(ifp);
209
210 #if NBPFILTER > 0
211 bpfattach(&sc->sc_arpcom.ac_if.if_bpf, ifp, DLT_EN10MB,
212 sizeof(struct ether_header));
213 #endif
214
215 sc->tx_start_thresh = 20; /* probably a good starting point. */
216
217 #if 0
218 /* XXX */
219 bus_space_write_2(iot, ioh, EP_COMMAND, RX_RESET);
220 bus_space_write_2(iot, ioh, EP_COMMAND, TX_RESET);
221 #else
222
223 epinit(sc); /*XXX fix up after probe */
224 DELAY(20000);
225 epstop(sc); /*XXX reset after probe, stop interface. */
226 DELAY(20000);
227 #endif
228 }
229
230 /*
231 * The order in here seems important. Otherwise we may not receive
232 * interrupts. ?!
233 */
234 void
235 epinit(sc)
236 register struct ep_softc *sc;
237 {
238 register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
239 bus_space_tag_t iot = sc->sc_iot;
240 bus_space_handle_t ioh = sc->sc_ioh;
241 int i;
242
243 while (bus_space_read_2(iot, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
244 ;
245
246 if (sc->bustype != EP_BUS_PCI) {
247 GO_WINDOW(0);
248 bus_space_write_2(iot, ioh, EP_W0_CONFIG_CTRL, 0);
249 bus_space_write_2(iot, ioh, EP_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ);
250 }
251
252 if (sc->bustype == EP_BUS_PCMCIA) {
253 #ifdef EP_COAX_DEFAULT
254 bus_space_write_2(iot, ioh, EP_W0_ADDRESS_CFG,3<<14);
255 #else
256 bus_space_write_2(iot, ioh, EP_W0_ADDRESS_CFG,0<<14);
257 #endif
258 bus_space_write_2(iot, ioh, EP_W0_RESOURCE_CFG, 0x3f00);
259 }
260
261 GO_WINDOW(2);
262 for (i = 0; i < 6; i++) /* Reload the ether_addr. */
263 bus_space_write_1(iot, ioh, EP_W2_ADDR_0 + i,
264 sc->sc_arpcom.ac_enaddr[i]);
265
266 /*
267 * Reset the station-address receive filter.
268 * A bug workaround for busmastering (Vortex, Demon) cards.
269 */
270 for (i = 0; i < 6; i++)
271 bus_space_write_1(iot, ioh, EP_W2_RECVMASK_0 + i, 0);
272
273 bus_space_write_2(iot, ioh, EP_COMMAND, RX_RESET);
274 bus_space_write_2(iot, ioh, EP_COMMAND, TX_RESET);
275
276 GO_WINDOW(1); /* Window 1 is operating window */
277 for (i = 0; i < 31; i++)
278 bus_space_read_1(iot, ioh, EP_W1_TX_STATUS);
279
280 bus_space_write_2(iot, ioh, EP_COMMAND, SET_RD_0_MASK | S_CARD_FAILURE |
281 S_RX_COMPLETE | S_TX_COMPLETE | S_TX_AVAIL);
282 bus_space_write_2(iot, ioh, EP_COMMAND, SET_INTR_MASK | S_CARD_FAILURE |
283 S_RX_COMPLETE | S_TX_COMPLETE | S_TX_AVAIL);
284
285 /*
286 * Attempt to get rid of any stray interrupts that occured during
287 * configuration. On the i386 this isn't possible because one may
288 * already be queued. However, a single stray interrupt is
289 * unimportant.
290 */
291 bus_space_write_2(iot, ioh, EP_COMMAND, ACK_INTR | 0xff);
292
293 epsetfilter(sc);
294 epsetlink(sc);
295
296 bus_space_write_2(iot, ioh, EP_COMMAND, RX_ENABLE);
297 bus_space_write_2(iot, ioh, EP_COMMAND, TX_ENABLE);
298
299 epmbuffill(sc);
300
301 /* Interface is now `running', with no output active. */
302 ifp->if_flags |= IFF_RUNNING;
303 ifp->if_flags &= ~IFF_OACTIVE;
304
305 /* Attempt to start output, if any. */
306 epstart(ifp);
307 }
308
309 void
310 epsetfilter(sc)
311 register struct ep_softc *sc;
312 {
313 register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
314
315 GO_WINDOW(1); /* Window 1 is operating window */
316 bus_space_write_2(sc->sc_iot, sc->sc_ioh, EP_COMMAND, SET_RX_FILTER |
317 FIL_INDIVIDUAL | FIL_BRDCST |
318 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0 ) |
319 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0 ));
320 }
321
322 void
323 epsetlink(sc)
324 register struct ep_softc *sc;
325 {
326 register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
327 bus_space_tag_t iot = sc->sc_iot;
328 bus_space_handle_t ioh = sc->sc_ioh;
329
330 /*
331 * you can `ifconfig (link0|-link0) ep0' to get the following
332 * behaviour:
333 * -link0 disable AUI/UTP. enable BNC.
334 * link0 disable BNC. enable AUI.
335 * link1 if the card has a UTP connector, and link0 is
336 * set too, then you get the UTP port.
337 */
338 GO_WINDOW(4);
339 bus_space_write_2(iot, ioh, EP_W4_MEDIA_TYPE, DISABLE_UTP);
340 if (!(ifp->if_flags & IFF_LINK0) && (sc->ep_connectors & BNC)) {
341 if (sc->bustype == EP_BUS_PCMCIA) {
342 GO_WINDOW(0);
343 bus_space_write_2(iot, ioh, EP_W0_ADDRESS_CFG,3<<14);
344 GO_WINDOW(1);
345 }
346 bus_space_write_2(iot, ioh, EP_COMMAND, START_TRANSCEIVER);
347 delay(1000);
348 }
349 if (ifp->if_flags & IFF_LINK0) {
350 bus_space_write_2(iot, ioh, EP_COMMAND, STOP_TRANSCEIVER);
351 delay(1000);
352 if ((ifp->if_flags & IFF_LINK1) && (sc->ep_connectors & UTP)) {
353 if (sc->bustype == EP_BUS_PCMCIA) {
354 GO_WINDOW(0);
355 bus_space_write_2(iot, ioh,
356 EP_W0_ADDRESS_CFG,0<<14);
357 GO_WINDOW(4);
358 }
359 bus_space_write_2(iot, ioh, EP_W4_MEDIA_TYPE, ENABLE_UTP);
360 }
361 }
362 GO_WINDOW(1);
363 }
364
365 /*
366 * Start outputting on the interface.
367 * Always called as splnet().
368 */
369 void
370 epstart(ifp)
371 struct ifnet *ifp;
372 {
373 register struct ep_softc *sc = ifp->if_softc;
374 bus_space_tag_t iot = sc->sc_iot;
375 bus_space_handle_t ioh = sc->sc_ioh;
376 struct mbuf *m, *m0;
377 int sh, len, pad;
378
379 /* Don't transmit if interface is busy or not running */
380 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
381 return;
382
383 startagain:
384 /* Sneak a peek at the next packet */
385 m0 = ifp->if_snd.ifq_head;
386 if (m0 == 0)
387 return;
388
389 /* We need to use m->m_pkthdr.len, so require the header */
390 if ((m0->m_flags & M_PKTHDR) == 0)
391 panic("epstart: no header mbuf");
392 len = m0->m_pkthdr.len;
393
394 pad = (4 - len) & 3;
395
396 /*
397 * The 3c509 automatically pads short packets to minimum ethernet
398 * length, but we drop packets that are too large. Perhaps we should
399 * truncate them instead?
400 */
401 if (len + pad > ETHER_MAX_LEN) {
402 /* packet is obviously too large: toss it */
403 ++ifp->if_oerrors;
404 IF_DEQUEUE(&ifp->if_snd, m0);
405 m_freem(m0);
406 goto readcheck;
407 }
408
409 if (bus_space_read_2(iot, ioh, EP_W1_FREE_TX) < len + pad + 4) {
410 bus_space_write_2(iot, ioh, EP_COMMAND,
411 SET_TX_AVAIL_THRESH |
412 ((len + pad + 4) >> sc->ep_pktlenshift));
413 /* not enough room in FIFO */
414 ifp->if_flags |= IFF_OACTIVE;
415 return;
416 } else {
417 bus_space_write_2(iot, ioh, EP_COMMAND,
418 SET_TX_AVAIL_THRESH | EP_THRESH_DISABLE );
419 }
420
421 IF_DEQUEUE(&ifp->if_snd, m0);
422 if (m0 == 0) /* not really needed */
423 return;
424
425 bus_space_write_2(iot, ioh, EP_COMMAND, SET_TX_START_THRESH |
426 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/) );
427
428 #if NBPFILTER > 0
429 if (ifp->if_bpf)
430 bpf_mtap(ifp->if_bpf, m0);
431 #endif
432
433 /*
434 * Do the output at splhigh() so that an interrupt from another device
435 * won't cause a FIFO underrun.
436 */
437 sh = splhigh();
438
439 bus_space_write_2(iot, ioh, EP_W1_TX_PIO_WR_1, len);
440 bus_space_write_2(iot, ioh, EP_W1_TX_PIO_WR_1,
441 0xffff); /* Second dword meaningless */
442 if (EP_IS_BUS_32(sc->bustype)) {
443 for (m = m0; m; ) {
444 if (m->m_len > 3) {
445 /* align our reads from core */
446 if (mtod(m, u_long) & 3) {
447 u_long count =
448 4 - (mtod(m, u_long) & 3);
449 bus_space_write_multi_1(iot, ioh,
450 EP_W1_TX_PIO_WR_1,
451 mtod(m, u_int8_t *), count);
452 m->m_data =
453 (void *)(mtod(m, u_long) + count);
454 m->m_len -= count;
455 }
456 bus_space_write_multi_4(iot, ioh,
457 EP_W1_TX_PIO_WR_1,
458 mtod(m, u_int32_t *), m->m_len >> 2);
459 m->m_data = (void *)(mtod(m, u_long) +
460 (u_long)(m->m_len & ~3));
461 m->m_len -= m->m_len & ~3;
462 }
463 if (m->m_len) {
464 bus_space_write_multi_1(iot, ioh,
465 EP_W1_TX_PIO_WR_1,
466 mtod(m, u_int8_t *), m->m_len);
467 }
468 MFREE(m, m0);
469 m = m0;
470 }
471 } else {
472 for (m = m0; m; ) {
473 if (m->m_len > 1) {
474 if (mtod(m, u_long) & 1) {
475 bus_space_write_1(iot, ioh,
476 EP_W1_TX_PIO_WR_1,
477 *(mtod(m, u_int8_t *)));
478 m->m_data =
479 (void *)(mtod(m, u_long) + 1);
480 m->m_len -= 1;
481 }
482 bus_space_write_multi_2(iot, ioh,
483 EP_W1_TX_PIO_WR_1, mtod(m, u_int16_t *),
484 m->m_len >> 1);
485 }
486 if (m->m_len & 1) {
487 bus_space_write_1(iot, ioh, EP_W1_TX_PIO_WR_1,
488 *(mtod(m, u_int8_t *) + m->m_len - 1));
489 }
490 MFREE(m, m0);
491 m = m0;
492 }
493 }
494 while (pad--)
495 bus_space_write_1(iot, ioh, EP_W1_TX_PIO_WR_1, 0);
496
497 splx(sh);
498
499 ++ifp->if_opackets;
500
501 readcheck:
502 if ((bus_space_read_2(iot, ioh, EP_W1_RX_STATUS) & ERR_INCOMPLETE) == 0) {
503 /* We received a complete packet. */
504 u_int16_t status = bus_space_read_2(iot, ioh, EP_STATUS);
505
506 if ((status & S_INTR_LATCH) == 0) {
507 /*
508 * No interrupt, read the packet and continue
509 * Is this supposed to happen? Is my motherboard
510 * completely busted?
511 */
512 epread(sc);
513 }
514 else
515 /* Got an interrupt, return so that it gets serviced. */
516 return;
517 }
518 else {
519 /* Check if we are stuck and reset [see XXX comment] */
520 if (epstatus(sc)) {
521 if (ifp->if_flags & IFF_DEBUG)
522 printf("%s: adapter reset\n",
523 sc->sc_dev.dv_xname);
524 epreset(sc);
525 }
526 }
527
528 goto startagain;
529 }
530
531
532 /*
533 * XXX: The 3c509 card can get in a mode where both the fifo status bit
534 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set
535 * We detect this situation and we reset the adapter.
536 * It happens at times when there is a lot of broadcast traffic
537 * on the cable (once in a blue moon).
538 */
539 static int
540 epstatus(sc)
541 register struct ep_softc *sc;
542 {
543 bus_space_tag_t iot = sc->sc_iot;
544 bus_space_handle_t ioh = sc->sc_ioh;
545 u_int16_t fifost;
546
547 /*
548 * Check the FIFO status and act accordingly
549 */
550 GO_WINDOW(4);
551 fifost = bus_space_read_2(iot, ioh, EP_W4_FIFO_DIAG);
552 GO_WINDOW(1);
553
554 if (fifost & FIFOS_RX_UNDERRUN) {
555 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
556 printf("%s: RX underrun\n", sc->sc_dev.dv_xname);
557 epreset(sc);
558 return 0;
559 }
560
561 if (fifost & FIFOS_RX_STATUS_OVERRUN) {
562 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
563 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname);
564 return 1;
565 }
566
567 if (fifost & FIFOS_RX_OVERRUN) {
568 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
569 printf("%s: RX overrun\n", sc->sc_dev.dv_xname);
570 return 1;
571 }
572
573 if (fifost & FIFOS_TX_OVERRUN) {
574 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
575 printf("%s: TX overrun\n", sc->sc_dev.dv_xname);
576 epreset(sc);
577 return 0;
578 }
579
580 return 0;
581 }
582
583
584 static void
585 eptxstat(sc)
586 register struct ep_softc *sc;
587 {
588 bus_space_tag_t iot = sc->sc_iot;
589 bus_space_handle_t ioh = sc->sc_ioh;
590 int i;
591
592 /*
593 * We need to read+write TX_STATUS until we get a 0 status
594 * in order to turn off the interrupt flag.
595 */
596 while ((i = bus_space_read_1(iot, ioh, EP_W1_TX_STATUS)) & TXS_COMPLETE) {
597 bus_space_write_1(iot, ioh, EP_W1_TX_STATUS, 0x0);
598
599 if (i & TXS_JABBER) {
600 ++sc->sc_arpcom.ac_if.if_oerrors;
601 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
602 printf("%s: jabber (%x)\n",
603 sc->sc_dev.dv_xname, i);
604 epreset(sc);
605 } else if (i & TXS_UNDERRUN) {
606 ++sc->sc_arpcom.ac_if.if_oerrors;
607 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
608 printf("%s: fifo underrun (%x) @%d\n",
609 sc->sc_dev.dv_xname, i,
610 sc->tx_start_thresh);
611 if (sc->tx_succ_ok < 100)
612 sc->tx_start_thresh = min(ETHER_MAX_LEN,
613 sc->tx_start_thresh + 20);
614 sc->tx_succ_ok = 0;
615 epreset(sc);
616 } else if (i & TXS_MAX_COLLISION) {
617 ++sc->sc_arpcom.ac_if.if_collisions;
618 bus_space_write_2(iot, ioh, EP_COMMAND, TX_ENABLE);
619 sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
620 } else
621 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
622 }
623 }
624
625 int
626 epintr(arg)
627 void *arg;
628 {
629 register struct ep_softc *sc = arg;
630 bus_space_tag_t iot = sc->sc_iot;
631 bus_space_handle_t ioh = sc->sc_ioh;
632 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
633 u_int16_t status;
634 int ret = 0;
635
636 for (;;) {
637 bus_space_write_2(iot, ioh, EP_COMMAND, C_INTR_LATCH);
638
639 status = bus_space_read_2(iot, ioh, EP_STATUS);
640
641 if ((status & (S_TX_COMPLETE | S_TX_AVAIL |
642 S_RX_COMPLETE | S_CARD_FAILURE)) == 0)
643 break;
644
645 ret = 1;
646
647 /*
648 * Acknowledge any interrupts. It's important that we do this
649 * first, since there would otherwise be a race condition.
650 * Due to the i386 interrupt queueing, we may get spurious
651 * interrupts occasionally.
652 */
653 bus_space_write_2(iot, ioh, EP_COMMAND, ACK_INTR | status);
654
655 if (status & S_RX_COMPLETE)
656 epread(sc);
657 if (status & S_TX_AVAIL) {
658 sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
659 epstart(&sc->sc_arpcom.ac_if);
660 }
661 if (status & S_CARD_FAILURE) {
662 printf("%s: adapter failure (%x)\n",
663 sc->sc_dev.dv_xname, status);
664 epreset(sc);
665 return (1);
666 }
667 if (status & S_TX_COMPLETE) {
668 eptxstat(sc);
669 epstart(ifp);
670 }
671 }
672
673 /* no more interrupts */
674 return (ret);
675 }
676
677 void
678 epread(sc)
679 register struct ep_softc *sc;
680 {
681 bus_space_tag_t iot = sc->sc_iot;
682 bus_space_handle_t ioh = sc->sc_ioh;
683 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
684 struct mbuf *m;
685 struct ether_header *eh;
686 int len;
687
688 len = bus_space_read_2(iot, ioh, EP_W1_RX_STATUS);
689
690 again:
691 if (ifp->if_flags & IFF_DEBUG) {
692 int err = len & ERR_MASK;
693 char *s = NULL;
694
695 if (len & ERR_INCOMPLETE)
696 s = "incomplete packet";
697 else if (err == ERR_OVERRUN)
698 s = "packet overrun";
699 else if (err == ERR_RUNT)
700 s = "runt packet";
701 else if (err == ERR_ALIGNMENT)
702 s = "bad alignment";
703 else if (err == ERR_CRC)
704 s = "bad crc";
705 else if (err == ERR_OVERSIZE)
706 s = "oversized packet";
707 else if (err == ERR_DRIBBLE)
708 s = "dribble bits";
709
710 if (s)
711 printf("%s: %s\n", sc->sc_dev.dv_xname, s);
712 }
713
714 if (len & ERR_INCOMPLETE)
715 return;
716
717 if (len & ERR_RX) {
718 ++ifp->if_ierrors;
719 goto abort;
720 }
721
722 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */
723
724 /* Pull packet off interface. */
725 m = epget(sc, len);
726 if (m == 0) {
727 ifp->if_ierrors++;
728 goto abort;
729 }
730
731 ++ifp->if_ipackets;
732
733 /* We assume the header fit entirely in one mbuf. */
734 eh = mtod(m, struct ether_header *);
735
736 #if NBPFILTER > 0
737 /*
738 * Check if there's a BPF listener on this interface.
739 * If so, hand off the raw packet to BPF.
740 */
741 if (ifp->if_bpf) {
742 bpf_mtap(ifp->if_bpf, m);
743
744 /*
745 * Note that the interface cannot be in promiscuous mode if
746 * there are no BPF listeners. And if we are in promiscuous
747 * mode, we have to check if this packet is really ours.
748 */
749 if ((ifp->if_flags & IFF_PROMISC) &&
750 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
751 bcmp(eh->ether_dhost, sc->sc_arpcom.ac_enaddr,
752 sizeof(eh->ether_dhost)) != 0) {
753 m_freem(m);
754 return;
755 }
756 }
757 #endif
758
759 /* We assume the header fit entirely in one mbuf. */
760 m_adj(m, sizeof(struct ether_header));
761 ether_input(ifp, eh, m);
762
763 /*
764 * In periods of high traffic we can actually receive enough
765 * packets so that the fifo overrun bit will be set at this point,
766 * even though we just read a packet. In this case we
767 * are not going to receive any more interrupts. We check for
768 * this condition and read again until the fifo is not full.
769 * We could simplify this test by not using epstatus(), but
770 * rechecking the RX_STATUS register directly. This test could
771 * result in unnecessary looping in cases where there is a new
772 * packet but the fifo is not full, but it will not fix the
773 * stuck behavior.
774 *
775 * Even with this improvement, we still get packet overrun errors
776 * which are hurting performance. Maybe when I get some more time
777 * I'll modify epread() so that it can handle RX_EARLY interrupts.
778 */
779 if (epstatus(sc)) {
780 len = bus_space_read_2(iot, ioh, EP_W1_RX_STATUS);
781 /* Check if we are stuck and reset [see XXX comment] */
782 if (len & ERR_INCOMPLETE) {
783 if (ifp->if_flags & IFF_DEBUG)
784 printf("%s: adapter reset\n",
785 sc->sc_dev.dv_xname);
786 epreset(sc);
787 return;
788 }
789 goto again;
790 }
791
792 return;
793
794 abort:
795 bus_space_write_2(iot, ioh, EP_COMMAND, RX_DISCARD_TOP_PACK);
796 while (bus_space_read_2(iot, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
797 ;
798 }
799
800 struct mbuf *
801 epget(sc, totlen)
802 struct ep_softc *sc;
803 int totlen;
804 {
805 bus_space_tag_t iot = sc->sc_iot;
806 bus_space_handle_t ioh = sc->sc_ioh;
807 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
808 struct mbuf *top, **mp, *m;
809 int len, remaining;
810 int sh;
811
812 m = sc->mb[sc->next_mb];
813 sc->mb[sc->next_mb] = 0;
814 if (m == 0) {
815 MGETHDR(m, M_DONTWAIT, MT_DATA);
816 if (m == 0)
817 return 0;
818 } else {
819 /* If the queue is no longer full, refill. */
820 if (sc->last_mb == sc->next_mb)
821 timeout(epmbuffill, sc, 1);
822 /* Convert one of our saved mbuf's. */
823 sc->next_mb = (sc->next_mb + 1) % MAX_MBS;
824 m->m_data = m->m_pktdat;
825 m->m_flags = M_PKTHDR;
826 }
827 m->m_pkthdr.rcvif = ifp;
828 m->m_pkthdr.len = totlen;
829 len = MHLEN;
830 top = 0;
831 mp = ⊤
832
833 /*
834 * We read the packet at splhigh() so that an interrupt from another
835 * device doesn't cause the card's buffer to overflow while we're
836 * reading it. We may still lose packets at other times.
837 */
838 sh = splhigh();
839
840 while (totlen > 0) {
841 if (top) {
842 m = sc->mb[sc->next_mb];
843 sc->mb[sc->next_mb] = 0;
844 if (m == 0) {
845 MGET(m, M_DONTWAIT, MT_DATA);
846 if (m == 0) {
847 splx(sh);
848 m_freem(top);
849 return 0;
850 }
851 } else {
852 sc->next_mb = (sc->next_mb + 1) % MAX_MBS;
853 }
854 len = MLEN;
855 }
856 if (totlen >= MINCLSIZE) {
857 MCLGET(m, M_DONTWAIT);
858 if (m->m_flags & M_EXT)
859 len = MCLBYTES;
860 }
861 if (EP_IS_BUS_32(sc->bustype) ) {
862 u_long pad;
863 if (top == 0) {
864 /* align the struct ip header */
865 pad = ALIGN(sizeof(struct ether_header))
866 - sizeof(struct ether_header);
867 } else {
868 /* XXX do we really need this? */
869 pad = ALIGN(m->m_data) - (u_long) m->m_data;
870 }
871 m->m_data += pad;
872 len -= pad;
873 }
874 remaining = len = min(totlen, len);
875 if (EP_IS_BUS_32(sc->bustype)) {
876 u_long offset = mtod(m, u_long);
877 /*
878 * Read bytes up to the point where we are aligned.
879 * (We can align to 4 bytes, rather than ALIGNBYTES,
880 * here because we're later reading 4-byte chunks.)
881 */
882 if ((remaining > 3) && (offset & 3)) {
883 int count = (4 - (offset & 3));
884 bus_space_read_multi_1(iot, ioh,
885 EP_W1_RX_PIO_RD_1,
886 (u_int8_t *) offset, count);
887 offset += count;
888 remaining -= count;
889 }
890 if (remaining > 3) {
891 bus_space_read_multi_4(iot, ioh,
892 EP_W1_RX_PIO_RD_1,
893 (u_int32_t *) offset, remaining >> 2);
894 offset += remaining & ~3;
895 remaining &= 3;
896 }
897 if (remaining) {
898 bus_space_read_multi_1(iot, ioh,
899 EP_W1_RX_PIO_RD_1,
900 (u_int8_t *) offset, remaining);
901 }
902 } else {
903 u_long offset = mtod(m, u_long);
904 if ((remaining > 1) && (offset & 1)) {
905 bus_space_read_multi_1(iot, ioh,
906 EP_W1_RX_PIO_RD_1,
907 (u_int8_t *) offset, 1);
908 remaining -= 1;
909 offset += 1;
910 }
911 if (remaining > 1) {
912 bus_space_read_multi_2(iot, ioh,
913 EP_W1_RX_PIO_RD_1,
914 (u_int16_t *) offset, remaining >> 1);
915 offset += remaining & ~1;
916 }
917 if (remaining & 1) {
918 bus_space_read_multi_1(iot, ioh,
919 EP_W1_RX_PIO_RD_1,
920 (u_int8_t *) offset, remaining & 1);
921 }
922 }
923 m->m_len = len;
924 totlen -= len;
925 *mp = m;
926 mp = &m->m_next;
927 }
928
929 bus_space_write_2(iot, ioh, EP_COMMAND, RX_DISCARD_TOP_PACK);
930 while (bus_space_read_2(iot, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
931 ;
932
933 splx(sh);
934
935 return top;
936 }
937
938 int
939 epioctl(ifp, cmd, data)
940 register struct ifnet *ifp;
941 u_long cmd;
942 caddr_t data;
943 {
944 struct ep_softc *sc = ifp->if_softc;
945 struct ifaddr *ifa = (struct ifaddr *)data;
946 struct ifreq *ifr = (struct ifreq *)data;
947 int s, error = 0;
948
949 s = splnet();
950
951 switch (cmd) {
952
953 case SIOCSIFADDR:
954 ifp->if_flags |= IFF_UP;
955
956 switch (ifa->ifa_addr->sa_family) {
957 #ifdef INET
958 case AF_INET:
959 epinit(sc);
960 arp_ifinit(&sc->sc_arpcom, ifa);
961 break;
962 #endif
963 #ifdef NS
964 case AF_NS:
965 {
966 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
967
968 if (ns_nullhost(*ina))
969 ina->x_host =
970 *(union ns_host *)(sc->sc_arpcom.ac_enaddr);
971 else
972 bcopy(ina->x_host.c_host,
973 sc->sc_arpcom.ac_enaddr,
974 sizeof(sc->sc_arpcom.ac_enaddr));
975 /* Set new address. */
976 epinit(sc);
977 break;
978 }
979 #endif
980 default:
981 epinit(sc);
982 break;
983 }
984 break;
985
986 case SIOCSIFFLAGS:
987 if ((ifp->if_flags & IFF_UP) == 0 &&
988 (ifp->if_flags & IFF_RUNNING) != 0) {
989 /*
990 * If interface is marked down and it is running, then
991 * stop it.
992 */
993 epstop(sc);
994 ifp->if_flags &= ~IFF_RUNNING;
995 } else if ((ifp->if_flags & IFF_UP) != 0 &&
996 (ifp->if_flags & IFF_RUNNING) == 0) {
997 /*
998 * If interface is marked up and it is stopped, then
999 * start it.
1000 */
1001 epinit(sc);
1002 } else {
1003 /*
1004 * deal with flags changes:
1005 * IFF_MULTICAST, IFF_PROMISC,
1006 * IFF_LINK0, IFF_LINK1,
1007 */
1008 epsetfilter(sc);
1009 epsetlink(sc);
1010 }
1011 break;
1012
1013 case SIOCADDMULTI:
1014 case SIOCDELMULTI:
1015 error = (cmd == SIOCADDMULTI) ?
1016 ether_addmulti(ifr, &sc->sc_arpcom) :
1017 ether_delmulti(ifr, &sc->sc_arpcom);
1018
1019 if (error == ENETRESET) {
1020 /*
1021 * Multicast list has changed; set the hardware filter
1022 * accordingly.
1023 */
1024 epreset(sc);
1025 error = 0;
1026 }
1027 break;
1028
1029 default:
1030 error = EINVAL;
1031 break;
1032 }
1033
1034 splx(s);
1035 return (error);
1036 }
1037
1038 void
1039 epreset(sc)
1040 struct ep_softc *sc;
1041 {
1042 int s;
1043
1044 s = splnet();
1045 epstop(sc);
1046 epinit(sc);
1047 splx(s);
1048 }
1049
1050 void
1051 epwatchdog(ifp)
1052 struct ifnet *ifp;
1053 {
1054 struct ep_softc *sc = ifp->if_softc;
1055
1056 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1057 ++sc->sc_arpcom.ac_if.if_oerrors;
1058
1059 epreset(sc);
1060 }
1061
1062 void
1063 epstop(sc)
1064 register struct ep_softc *sc;
1065 {
1066 bus_space_tag_t iot = sc->sc_iot;
1067 bus_space_handle_t ioh = sc->sc_ioh;
1068
1069 bus_space_write_2(iot, ioh, EP_COMMAND, RX_DISABLE);
1070 bus_space_write_2(iot, ioh, EP_COMMAND, RX_DISCARD_TOP_PACK);
1071 while (bus_space_read_2(iot, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
1072 ;
1073 bus_space_write_2(iot, ioh, EP_COMMAND, TX_DISABLE);
1074 bus_space_write_2(iot, ioh, EP_COMMAND, STOP_TRANSCEIVER);
1075 bus_space_write_2(iot, ioh, EP_COMMAND, RX_RESET);
1076 bus_space_write_2(iot, ioh, EP_COMMAND, TX_RESET);
1077 bus_space_write_2(iot, ioh, EP_COMMAND, C_INTR_LATCH);
1078 bus_space_write_2(iot, ioh, EP_COMMAND, SET_RD_0_MASK);
1079 bus_space_write_2(iot, ioh, EP_COMMAND, SET_INTR_MASK);
1080 bus_space_write_2(iot, ioh, EP_COMMAND, SET_RX_FILTER);
1081
1082 epmbufempty(sc);
1083 }
1084
1085 /*
1086 * We get eeprom data from the id_port given an offset into the
1087 * eeprom. Basically; after the ID_sequence is sent to all of
1088 * the cards; they enter the ID_CMD state where they will accept
1089 * command requests. 0x80-0xbf loads the eeprom data. We then
1090 * read the port 16 times and with every read; the cards check
1091 * for contention (ie: if one card writes a 0 bit and another
1092 * writes a 1 bit then the host sees a 0. At the end of the cycle;
1093 * each card compares the data on the bus; if there is a difference
1094 * then that card goes into ID_WAIT state again). In the meantime;
1095 * one bit of data is returned in the AX register which is conveniently
1096 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one
1097 * bit of data with each read.
1098 *
1099 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT!
1100 */
1101 u_int16_t
1102 epreadeeprom(iot, ioh, offset)
1103 bus_space_tag_t iot;
1104 bus_space_handle_t ioh;
1105 int offset;
1106 {
1107 u_int16_t data = 0;
1108 int i;
1109
1110 bus_space_write_1(iot, ioh, 0, 0x80 + offset);
1111 delay(1000);
1112 for (i = 0; i < 16; i++)
1113 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1);
1114 return (data);
1115 }
1116
1117 static int
1118 epbusyeeprom(sc)
1119 struct ep_softc *sc;
1120 {
1121 bus_space_tag_t iot = sc->sc_iot;
1122 bus_space_handle_t ioh = sc->sc_ioh;
1123 int i = 100, j;
1124
1125 if (sc->bustype == EP_BUS_PCMCIA) {
1126 delay(1000);
1127 return 0;
1128 }
1129
1130 while (i--) {
1131 j = bus_space_read_2(iot, ioh, EP_W0_EEPROM_COMMAND);
1132 if (j & EEPROM_BUSY)
1133 delay(100);
1134 else
1135 break;
1136 }
1137 if (!i) {
1138 printf("\n%s: eeprom failed to come ready\n",
1139 sc->sc_dev.dv_xname);
1140 return (1);
1141 }
1142 if (j & EEPROM_TST_MODE) {
1143 printf("\n%s: erase pencil mark, or disable plug-n-play mode!\n",
1144 sc->sc_dev.dv_xname);
1145 return (1);
1146 }
1147 return (0);
1148 }
1149
1150 void
1151 epmbuffill(v)
1152 void *v;
1153 {
1154 struct ep_softc *sc = v;
1155 int s, i;
1156
1157 s = splnet();
1158 i = sc->last_mb;
1159 do {
1160 if (sc->mb[i] == NULL)
1161 MGET(sc->mb[i], M_DONTWAIT, MT_DATA);
1162 if (sc->mb[i] == NULL)
1163 break;
1164 i = (i + 1) % MAX_MBS;
1165 } while (i != sc->next_mb);
1166 sc->last_mb = i;
1167 /* If the queue was not filled, try again. */
1168 if (sc->last_mb != sc->next_mb)
1169 timeout(epmbuffill, sc, 1);
1170 splx(s);
1171 }
1172
1173 void
1174 epmbufempty(sc)
1175 struct ep_softc *sc;
1176 {
1177 int s, i;
1178
1179 s = splnet();
1180 for (i = 0; i<MAX_MBS; i++) {
1181 if (sc->mb[i]) {
1182 m_freem(sc->mb[i]);
1183 sc->mb[i] = NULL;
1184 }
1185 }
1186 sc->last_mb = sc->next_mb = 0;
1187 untimeout(epmbuffill, sc);
1188 splx(s);
1189 }
1190