elink3.c revision 1.144
1 /* $NetBSD: elink3.c,v 1.144 2019/01/22 03:42:26 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 35 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by Herb Peyerl. 49 * 4. The name of Herb Peyerl may not be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 #include <sys/cdefs.h> 65 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.144 2019/01/22 03:42:26 msaitoh Exp $"); 66 67 #include "opt_inet.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/callout.h> 72 #include <sys/kernel.h> 73 #include <sys/mbuf.h> 74 #include <sys/socket.h> 75 #include <sys/ioctl.h> 76 #include <sys/errno.h> 77 #include <sys/syslog.h> 78 #include <sys/select.h> 79 #include <sys/device.h> 80 #include <sys/rndsource.h> 81 82 #include <net/if.h> 83 #include <net/if_dl.h> 84 #include <net/if_ether.h> 85 #include <net/if_media.h> 86 #include <net/bpf.h> 87 88 #include <sys/cpu.h> 89 #include <sys/bus.h> 90 #include <sys/intr.h> 91 92 #include <dev/mii/mii.h> 93 #include <dev/mii/miivar.h> 94 #include <dev/mii/mii_bitbang.h> 95 96 #include <dev/ic/elink3var.h> 97 #include <dev/ic/elink3reg.h> 98 99 #ifdef DEBUG 100 int epdebug = 0; 101 #endif 102 103 /* 104 * XXX endian workaround for big-endian CPUs with pcmcia: 105 * if stream methods for bus_space_multi are not provided, define them 106 * using non-stream bus_space_{read,write}_multi_. 107 * Assumes host CPU is same endian-ness as bus. 108 */ 109 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 110 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 111 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 112 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 113 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 114 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 115 116 /* 117 * Structure to map media-present bits in boards to ifmedia codes and 118 * printable media names. Used for table-driven ifmedia initialization. 119 */ 120 struct ep_media { 121 int epm_mpbit; /* media present bit */ 122 const char *epm_name; /* name of medium */ 123 int epm_ifmedia; /* ifmedia word for medium */ 124 int epm_epmedia; /* ELINKMEDIA_* constant */ 125 }; 126 127 /* 128 * Media table for the Demon/Vortex/Boomerang chipsets. 129 * 130 * Note that MII on the Demon and Vortex (3c59x) indicates an external 131 * MII connector (for connecting an external PHY) ... I think. Treat 132 * it as `manual' on these chips. 133 * 134 * Any Boomerang (3c90x) chips with MII really do have an internal 135 * MII and real PHYs attached; no `native' media. 136 */ 137 const struct ep_media ep_vortex_media[] = { 138 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 139 ELINKMEDIA_10BASE_T }, 140 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 141 ELINKMEDIA_10BASE_T }, 142 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 143 ELINKMEDIA_AUI }, 144 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 145 ELINKMEDIA_10BASE_2 }, 146 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 147 ELINKMEDIA_100BASE_TX }, 148 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 149 ELINKMEDIA_100BASE_TX }, 150 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 151 ELINKMEDIA_100BASE_FX }, 152 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 153 ELINKMEDIA_MII }, 154 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 155 ELINKMEDIA_100BASE_T4 }, 156 { 0, NULL, 0, 157 0 }, 158 }; 159 160 /* 161 * Media table for the older 3Com Etherlink III chipset, used 162 * in the 3c509, 3c579, and 3c589. 163 */ 164 const struct ep_media ep_509_media[] = { 165 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 166 ELINKMEDIA_10BASE_T }, 167 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 168 ELINKMEDIA_AUI }, 169 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 170 ELINKMEDIA_10BASE_2 }, 171 { 0, NULL, 0, 172 0 }, 173 }; 174 175 void ep_internalconfig(struct ep_softc *sc); 176 void ep_vortex_probemedia(struct ep_softc *sc); 177 void ep_509_probemedia(struct ep_softc *sc); 178 179 static void eptxstat(struct ep_softc *); 180 static int epstatus(struct ep_softc *); 181 int epinit(struct ifnet *); 182 void epstop(struct ifnet *, int); 183 int epioctl(struct ifnet *, u_long, void *); 184 void epstart(struct ifnet *); 185 void epwatchdog(struct ifnet *); 186 void epreset(struct ep_softc *); 187 static bool epshutdown(device_t, int); 188 void epread(struct ep_softc *); 189 struct mbuf *epget(struct ep_softc *, int); 190 void epmbuffill(void *); 191 void epmbufempty(struct ep_softc *); 192 void epsetfilter(struct ep_softc *); 193 void ep_roadrunner_mii_enable(struct ep_softc *); 194 void epsetmedia(struct ep_softc *); 195 196 /* ifmedia callbacks */ 197 int ep_media_change(struct ifnet *ifp); 198 void ep_media_status(struct ifnet *ifp, struct ifmediareq *req); 199 200 /* MII callbacks */ 201 int ep_mii_readreg(device_t, int, int, uint16_t *); 202 int ep_mii_writereg(device_t, int, int, uint16_t); 203 void ep_statchg(struct ifnet *); 204 205 void ep_tick(void *); 206 207 static int epbusyeeprom(struct ep_softc *); 208 u_int16_t ep_read_eeprom(struct ep_softc *, u_int16_t); 209 static inline void ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg); 210 static inline void ep_finish_reset(bus_space_tag_t, bus_space_handle_t); 211 static inline void ep_discard_rxtop(bus_space_tag_t, bus_space_handle_t); 212 static inline int ep_w1_reg(struct ep_softc *, int); 213 214 /* 215 * MII bit-bang glue. 216 */ 217 u_int32_t ep_mii_bitbang_read(device_t); 218 void ep_mii_bitbang_write(device_t, u_int32_t); 219 220 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 221 ep_mii_bitbang_read, 222 ep_mii_bitbang_write, 223 { 224 PHYSMGMT_DATA, /* MII_BIT_MDO */ 225 PHYSMGMT_DATA, /* MII_BIT_MDI */ 226 PHYSMGMT_CLK, /* MII_BIT_MDC */ 227 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 228 0, /* MII_BIT_DIR_PHY_HOST */ 229 } 230 }; 231 232 /* 233 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 234 * Window 1 registers offset! 235 */ 236 static inline int 237 ep_w1_reg(struct ep_softc *sc, int reg) 238 { 239 240 switch (sc->ep_chipset) { 241 case ELINK_CHIPSET_CORKSCREW: 242 return (reg + 0x10); 243 244 case ELINK_CHIPSET_ROADRUNNER: 245 switch (reg) { 246 case ELINK_W1_FREE_TX: 247 case ELINK_W1_RUNNER_RDCTL: 248 case ELINK_W1_RUNNER_WRCTL: 249 return (reg); 250 } 251 return (reg + 0x10); 252 } 253 254 return (reg); 255 } 256 257 /* 258 * Wait for any pending reset to complete. 259 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 260 * but older hardware doesn't implement it and we must delay. 261 */ 262 static inline void 263 ep_finish_reset(bus_space_tag_t iot, bus_space_handle_t ioh) 264 { 265 int i; 266 267 for (i = 0; i < 10000; i++) { 268 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 269 COMMAND_IN_PROGRESS) == 0) 270 break; 271 DELAY(10); 272 } 273 } 274 275 /* 276 * Issue a (reset) command, and be sure it has completed. 277 * Used for global reset, TX_RESET, RX_RESET. 278 */ 279 static inline void 280 ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg) 281 { 282 bus_space_tag_t iot = sc->sc_iot; 283 bus_space_handle_t ioh = sc->sc_ioh; 284 285 bus_space_write_2(iot, ioh, cmd, arg); 286 ep_finish_reset(iot, ioh); 287 } 288 289 290 static inline void 291 ep_discard_rxtop(bus_space_tag_t iot, bus_space_handle_t ioh) 292 { 293 int i; 294 295 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 296 297 /* 298 * Spin for about 1 msec, to avoid forcing a DELAY() between 299 * every received packet (adding latency and limiting pkt-recv rate). 300 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 301 * is about right. 302 */ 303 for (i = 0; i < 8000; i++) { 304 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 305 COMMAND_IN_PROGRESS) == 0) 306 return; 307 } 308 309 /* Didn't complete in a hurry. Do DELAY()s. */ 310 ep_finish_reset(iot, ioh); 311 } 312 313 /* 314 * Back-end attach and configure. 315 */ 316 int 317 epconfig(struct ep_softc *sc, u_short chipset, u_int8_t *enaddr) 318 { 319 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 320 bus_space_tag_t iot = sc->sc_iot; 321 bus_space_handle_t ioh = sc->sc_ioh; 322 u_int16_t i; 323 u_int8_t myla[ETHER_ADDR_LEN]; 324 325 callout_init(&sc->sc_mii_callout, 0); 326 callout_init(&sc->sc_mbuf_callout, 0); 327 328 sc->ep_chipset = chipset; 329 330 /* 331 * We could have been groveling around in other register 332 * windows in the front-end; make sure we're in window 0 333 * to read the EEPROM. 334 */ 335 GO_WINDOW(0); 336 337 if (enaddr == NULL) { 338 /* 339 * Read the station address from the eeprom. 340 */ 341 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 342 u_int16_t x = ep_read_eeprom(sc, i); 343 myla[(i << 1)] = x >> 8; 344 myla[(i << 1) + 1] = x; 345 } 346 enaddr = myla; 347 } 348 349 /* 350 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 351 * allow FDDI-sized (4500) byte packets. Commands only take an 352 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 353 * packet length. 354 * Commands to these cards implicitly upshift a packet size 355 * or threshold by 2 bits. 356 * To detect cards with large-packet support, we probe by setting 357 * the transmit threshold register, then change windows and 358 * read back the threshold register directly, and see if the 359 * threshold value was shifted or not. 360 */ 361 bus_space_write_2(iot, ioh, ELINK_COMMAND, 362 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 363 GO_WINDOW(5); 364 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 365 GO_WINDOW(1); 366 switch (i) { 367 case ELINK_LARGEWIN_PROBE: 368 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 369 sc->ep_pktlenshift = 0; 370 break; 371 372 case (ELINK_LARGEWIN_PROBE << 2): 373 sc->ep_pktlenshift = 2; 374 break; 375 376 default: 377 aprint_error_dev(sc->sc_dev, 378 "wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 379 "Interface disabled\n", 380 ELINK_LARGEWIN_PROBE, (int) i); 381 return (1); 382 } 383 384 /* 385 * Ensure Tx-available interrupts are enabled for 386 * start the interface. 387 * XXX should be in epinit()? 388 */ 389 bus_space_write_2(iot, ioh, ELINK_COMMAND, 390 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 391 392 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 393 ifp->if_softc = sc; 394 ifp->if_start = epstart; 395 ifp->if_ioctl = epioctl; 396 ifp->if_watchdog = epwatchdog; 397 ifp->if_init = epinit; 398 ifp->if_stop = epstop; 399 ifp->if_flags = 400 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 401 IFQ_SET_READY(&ifp->if_snd); 402 403 if_attach(ifp); 404 ether_ifattach(ifp, enaddr); 405 406 /* 407 * Finish configuration: 408 * determine chipset if the front-end couldn't do so, 409 * show board details, set media. 410 */ 411 412 /* 413 * Print RAM size. We also print the Ethernet address in here. 414 * It's extracted from the ifp, so we have to make sure it's 415 * been attached first. 416 */ 417 ep_internalconfig(sc); 418 GO_WINDOW(0); 419 420 /* 421 * Display some additional information, if pertinent. 422 */ 423 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 424 aprint_normal_dev(sc->sc_dev, "RoadRunner FIFO buffer enabled\n"); 425 426 /* 427 * Initialize our media structures and MII info. We'll 428 * probe the MII if we discover that we have one. 429 */ 430 sc->sc_mii.mii_ifp = ifp; 431 sc->sc_mii.mii_readreg = ep_mii_readreg; 432 sc->sc_mii.mii_writereg = ep_mii_writereg; 433 sc->sc_mii.mii_statchg = ep_statchg; 434 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, ep_media_change, 435 ep_media_status); 436 437 /* 438 * All CORKSCREW chips have MII. 439 */ 440 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) 441 sc->ep_flags |= ELINK_FLAGS_MII; 442 443 /* 444 * Now, determine which media we have. 445 */ 446 switch (sc->ep_chipset) { 447 case ELINK_CHIPSET_ROADRUNNER: 448 if (sc->ep_flags & ELINK_FLAGS_MII) { 449 ep_roadrunner_mii_enable(sc); 450 GO_WINDOW(0); 451 } 452 /* FALLTHROUGH */ 453 454 case ELINK_CHIPSET_CORKSCREW: 455 case ELINK_CHIPSET_BOOMERANG: 456 /* 457 * If the device has MII, probe it. We won't be using 458 * any `native' media in this case, only PHYs. If 459 * we don't, just treat the Boomerang like the Vortex. 460 */ 461 if (sc->ep_flags & ELINK_FLAGS_MII) { 462 mii_attach(sc->sc_dev, &sc->sc_mii, 0xffffffff, 463 MII_PHY_ANY, MII_OFFSET_ANY, 0); 464 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 465 ifmedia_add(&sc->sc_mii.mii_media, 466 IFM_ETHER|IFM_NONE, 0, NULL); 467 ifmedia_set(&sc->sc_mii.mii_media, 468 IFM_ETHER|IFM_NONE); 469 } else { 470 ifmedia_set(&sc->sc_mii.mii_media, 471 IFM_ETHER|IFM_AUTO); 472 } 473 break; 474 } 475 /* FALLTHROUGH */ 476 477 case ELINK_CHIPSET_VORTEX: 478 ep_vortex_probemedia(sc); 479 break; 480 481 default: 482 ep_509_probemedia(sc); 483 break; 484 } 485 486 GO_WINDOW(1); /* Window 1 is operating window */ 487 488 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 489 RND_TYPE_NET, RND_FLAG_DEFAULT); 490 491 sc->tx_start_thresh = 20; /* probably a good starting point. */ 492 493 /* Establish callback to reset card when we reboot. */ 494 if (pmf_device_register1(sc->sc_dev, NULL, NULL, epshutdown)) 495 pmf_class_network_register(sc->sc_dev, ifp); 496 else 497 aprint_error_dev(sc->sc_dev, 498 "couldn't establish power handler\n"); 499 500 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 501 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 502 503 /* The attach is successful. */ 504 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 505 return (0); 506 } 507 508 509 /* 510 * Show interface-model-independent info from window 3 511 * internal-configuration register. 512 */ 513 void 514 ep_internalconfig(struct ep_softc *sc) 515 { 516 bus_space_tag_t iot = sc->sc_iot; 517 bus_space_handle_t ioh = sc->sc_ioh; 518 519 u_int config0; 520 u_int config1; 521 522 int ram_size, ram_width, ram_split; 523 /* 524 * NVRAM buffer Rx:Tx config names for busmastering cards 525 * (Demon, Vortex, and later). 526 */ 527 const char *const onboard_ram_config[] = { 528 "5:3", "3:1", "1:1", "3:5" }; 529 530 GO_WINDOW(3); 531 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 532 config1 = (u_int)bus_space_read_2(iot, ioh, 533 ELINK_W3_INTERNAL_CONFIG + 2); 534 GO_WINDOW(0); 535 536 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 537 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 538 539 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 540 541 aprint_normal_dev(sc->sc_dev, "address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 542 ether_sprintf(CLLADDR(sc->sc_ethercom.ec_if.if_sadl)), 543 8 << ram_size, 544 (ram_width) ? "word" : "byte", 545 onboard_ram_config[ram_split]); 546 } 547 548 549 /* 550 * Find supported media on 3c509-generation hardware that doesn't have 551 * a "reset_options" register in window 3. 552 * Use the config_cntrl register in window 0 instead. 553 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 554 * that implement CONFIG_CTRL. We don't have a good way to set the 555 * default active medium; punt to ifconfig instead. 556 */ 557 void 558 ep_509_probemedia(struct ep_softc *sc) 559 { 560 bus_space_tag_t iot = sc->sc_iot; 561 bus_space_handle_t ioh = sc->sc_ioh; 562 struct ifmedia *ifm = &sc->sc_mii.mii_media; 563 u_int16_t ep_w0_config, port; 564 const struct ep_media *epm; 565 const char *sep = "", *defmedianame = NULL; 566 int defmedia = 0; 567 568 GO_WINDOW(0); 569 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 570 571 aprint_normal_dev(sc->sc_dev, ""); 572 573 /* Sanity check that there are any media! */ 574 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 575 aprint_error("no media present!\n"); 576 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 577 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 578 return; 579 } 580 581 /* 582 * Get the default media from the EEPROM. 583 */ 584 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 585 586 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 587 588 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 589 if (ep_w0_config & epm->epm_mpbit) { 590 /* 591 * This simple test works because 509 chipsets 592 * don't do full-duplex. 593 */ 594 if (epm->epm_epmedia == port || defmedia == 0) { 595 defmedia = epm->epm_ifmedia; 596 defmedianame = epm->epm_name; 597 } 598 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 599 NULL); 600 PRINT(epm->epm_name); 601 } 602 } 603 604 #undef PRINT 605 606 #ifdef DIAGNOSTIC 607 if (defmedia == 0) 608 panic("ep_509_probemedia: impossible"); 609 #endif 610 611 aprint_normal(" (default %s)\n", defmedianame); 612 ifmedia_set(ifm, defmedia); 613 } 614 615 /* 616 * Find media present on large-packet-capable elink3 devices. 617 * Show onboard configuration of large-packet-capable elink3 devices 618 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 619 * Use media and card-version info in window 3 instead. 620 */ 621 void 622 ep_vortex_probemedia(struct ep_softc *sc) 623 { 624 bus_space_tag_t iot = sc->sc_iot; 625 bus_space_handle_t ioh = sc->sc_ioh; 626 struct ifmedia *ifm = &sc->sc_mii.mii_media; 627 const struct ep_media *epm; 628 u_int config1; 629 int reset_options; 630 int default_media; /* 3-bit encoding of default (EEPROM) media */ 631 int defmedia = 0; 632 const char *sep = "", *defmedianame = NULL; 633 634 GO_WINDOW(3); 635 config1 = (u_int)bus_space_read_2(iot, ioh, 636 ELINK_W3_INTERNAL_CONFIG + 2); 637 reset_options = (int)bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 638 GO_WINDOW(0); 639 640 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 641 642 aprint_normal_dev(sc->sc_dev, ""); 643 644 /* Sanity check that there are any media! */ 645 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 646 aprint_error("no media present!\n"); 647 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 648 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 649 return; 650 } 651 652 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 653 654 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 655 if (reset_options & epm->epm_mpbit) { 656 /* 657 * Default media is a little more complicated 658 * on the Vortex. We support full-duplex which 659 * uses the same reset options bit. 660 * 661 * XXX Check EEPROM for default to FDX? 662 */ 663 if (epm->epm_epmedia == default_media) { 664 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 665 defmedia = epm->epm_ifmedia; 666 defmedianame = epm->epm_name; 667 } 668 } else if (defmedia == 0) { 669 defmedia = epm->epm_ifmedia; 670 defmedianame = epm->epm_name; 671 } 672 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 673 NULL); 674 PRINT(epm->epm_name); 675 } 676 } 677 678 #undef PRINT 679 680 #ifdef DIAGNOSTIC 681 if (defmedia == 0) 682 panic("ep_vortex_probemedia: impossible"); 683 #endif 684 685 aprint_normal(" (default %s)\n", defmedianame); 686 ifmedia_set(ifm, defmedia); 687 } 688 689 /* 690 * One second timer, used to tick the MII. 691 */ 692 void 693 ep_tick(void *arg) 694 { 695 struct ep_softc *sc = arg; 696 int s; 697 698 #ifdef DIAGNOSTIC 699 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 700 panic("ep_tick"); 701 #endif 702 703 if (!device_is_active(sc->sc_dev)) 704 return; 705 706 s = splnet(); 707 mii_tick(&sc->sc_mii); 708 splx(s); 709 710 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 711 } 712 713 /* 714 * Bring device up. 715 * 716 * The order in here seems important. Otherwise we may not receive 717 * interrupts. ?! 718 */ 719 int 720 epinit(struct ifnet *ifp) 721 { 722 struct ep_softc *sc = ifp->if_softc; 723 bus_space_tag_t iot = sc->sc_iot; 724 bus_space_handle_t ioh = sc->sc_ioh; 725 int i, error; 726 const u_int8_t *addr; 727 728 if (!sc->enabled && (error = epenable(sc)) != 0) 729 return (error); 730 731 /* Make sure any pending reset has completed before touching board */ 732 ep_finish_reset(iot, ioh); 733 734 /* 735 * Cancel any pending I/O. 736 */ 737 epstop(ifp, 0); 738 739 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 740 && sc->bustype != ELINK_BUS_MCA) { 741 GO_WINDOW(0); 742 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 743 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 744 ENABLE_DRQ_IRQ); 745 } 746 747 if (sc->bustype == ELINK_BUS_PCMCIA) { 748 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 749 } 750 751 GO_WINDOW(2); 752 /* Reload the ether_addr. */ 753 addr = CLLADDR(ifp->if_sadl); 754 for (i = 0; i < 6; i += 2) 755 bus_space_write_2(iot, ioh, ELINK_W2_ADDR_0 + i, 756 (addr[i] << 0) | (addr[i + 1] << 8)); 757 758 /* 759 * Reset the station-address receive filter. 760 * A bug workaround for busmastering (Vortex, Demon) cards. 761 */ 762 for (i = 0; i < 6; i += 2) 763 bus_space_write_2(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 764 765 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 766 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 767 768 GO_WINDOW(1); /* Window 1 is operating window */ 769 for (i = 0; i < 31; i++) 770 (void)bus_space_read_2(iot, ioh, 771 ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 772 773 /* Set threshold for Tx-space available interrupt. */ 774 bus_space_write_2(iot, ioh, ELINK_COMMAND, 775 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 776 777 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 778 /* 779 * Enable options in the PCMCIA LAN COR register, via 780 * RoadRunner Window 1. 781 * 782 * XXX MAGIC CONSTANTS! 783 */ 784 u_int16_t cor; 785 786 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 787 788 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 789 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 790 cor |= 0x10; 791 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 792 cor |= 0x20; 793 bus_space_write_2(iot, ioh, 0, cor); 794 795 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 796 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 797 798 if (sc->ep_flags & ELINK_FLAGS_MII) { 799 ep_roadrunner_mii_enable(sc); 800 GO_WINDOW(1); 801 } 802 } 803 804 /* Enable interrupts. */ 805 bus_space_write_2(iot, ioh, ELINK_COMMAND, 806 SET_RD_0_MASK | WATCHED_INTERRUPTS); 807 bus_space_write_2(iot, ioh, ELINK_COMMAND, 808 SET_INTR_MASK | WATCHED_INTERRUPTS); 809 810 /* 811 * Attempt to get rid of any stray interrupts that occurred during 812 * configuration. On the i386 this isn't possible because one may 813 * already be queued. However, a single stray interrupt is 814 * unimportant. 815 */ 816 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 817 818 epsetfilter(sc); 819 epsetmedia(sc); 820 821 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 822 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 823 824 epmbuffill(sc); 825 826 /* Interface is now `running', with no output active. */ 827 ifp->if_flags |= IFF_RUNNING; 828 ifp->if_flags &= ~IFF_OACTIVE; 829 830 if (sc->ep_flags & ELINK_FLAGS_MII) { 831 /* Start the one second clock. */ 832 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 833 } 834 835 /* Attempt to start output, if any. */ 836 epstart(ifp); 837 838 return (0); 839 } 840 841 842 /* 843 * Set multicast receive filter. 844 * elink3 hardware has no selective multicast filter in hardware. 845 * Enable reception of all multicasts and filter in software. 846 */ 847 void 848 epsetfilter(struct ep_softc *sc) 849 { 850 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 851 852 GO_WINDOW(1); /* Window 1 is operating window */ 853 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 854 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 855 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 856 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 857 } 858 859 int 860 ep_media_change(struct ifnet *ifp) 861 { 862 struct ep_softc *sc = ifp->if_softc; 863 864 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 865 epreset(sc); 866 867 return (0); 868 } 869 870 /* 871 * Reset and enable the MII on the RoadRunner. 872 */ 873 void 874 ep_roadrunner_mii_enable(struct ep_softc *sc) 875 { 876 bus_space_tag_t iot = sc->sc_iot; 877 bus_space_handle_t ioh = sc->sc_ioh; 878 879 GO_WINDOW(3); 880 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 881 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 882 delay(1000); 883 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 884 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 885 ELINK_RUNNER_ENABLE_MII); 886 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 887 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 888 delay(1000); 889 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 890 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 891 } 892 893 /* 894 * Set the card to use the specified media. 895 */ 896 void 897 epsetmedia(struct ep_softc *sc) 898 { 899 bus_space_tag_t iot = sc->sc_iot; 900 bus_space_handle_t ioh = sc->sc_ioh; 901 902 /* Turn everything off. First turn off linkbeat and UTP. */ 903 GO_WINDOW(4); 904 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 905 906 /* Turn off coax */ 907 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 908 delay(1000); 909 910 /* 911 * If the device has MII, select it, and then tell the 912 * PHY which media to use. 913 */ 914 if (sc->ep_flags & ELINK_FLAGS_MII) { 915 int config0, config1; 916 917 GO_WINDOW(3); 918 919 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 920 int resopt; 921 922 resopt = bus_space_read_2(iot, ioh, 923 ELINK_W3_RESET_OPTIONS); 924 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 925 resopt | ELINK_RUNNER_ENABLE_MII); 926 } 927 928 config0 = (u_int)bus_space_read_2(iot, ioh, 929 ELINK_W3_INTERNAL_CONFIG); 930 config1 = (u_int)bus_space_read_2(iot, ioh, 931 ELINK_W3_INTERNAL_CONFIG + 2); 932 933 config1 = config1 & ~CONFIG_MEDIAMASK; 934 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 935 936 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 937 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 938 config1); 939 GO_WINDOW(1); /* back to operating window */ 940 941 mii_mediachg(&sc->sc_mii); 942 return; 943 } 944 945 /* 946 * Now turn on the selected media/transceiver. 947 */ 948 GO_WINDOW(4); 949 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 950 case IFM_10_T: 951 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 952 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 953 break; 954 955 case IFM_10_2: 956 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 957 DELAY(1000); /* 50ms not enmough? */ 958 break; 959 960 case IFM_100_TX: 961 case IFM_100_FX: 962 case IFM_100_T4: /* XXX check documentation */ 963 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 964 LINKBEAT_ENABLE); 965 DELAY(1000); /* not strictly necessary? */ 966 break; 967 968 case IFM_10_5: 969 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 970 SQE_ENABLE); 971 DELAY(1000); /* not strictly necessary? */ 972 break; 973 974 case IFM_MANUAL: 975 /* 976 * Nothing to do here; we are actually enabling the 977 * external PHY on the MII port. 978 */ 979 break; 980 981 case IFM_NONE: 982 printf("%s: interface disabled\n", device_xname(sc->sc_dev)); 983 return; 984 985 default: 986 panic("epsetmedia: impossible"); 987 } 988 989 /* 990 * Tell the chip which port to use. 991 */ 992 switch (sc->ep_chipset) { 993 case ELINK_CHIPSET_VORTEX: 994 case ELINK_CHIPSET_BOOMERANG: 995 { 996 int mctl, config0, config1; 997 998 GO_WINDOW(3); 999 config0 = (u_int)bus_space_read_2(iot, ioh, 1000 ELINK_W3_INTERNAL_CONFIG); 1001 config1 = (u_int)bus_space_read_2(iot, ioh, 1002 ELINK_W3_INTERNAL_CONFIG + 2); 1003 1004 config1 = config1 & ~CONFIG_MEDIAMASK; 1005 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1006 CONFIG_MEDIAMASK_SHIFT); 1007 1008 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1009 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1010 config1); 1011 1012 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1013 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1014 mctl |= MAC_CONTROL_FDX; 1015 else 1016 mctl &= ~MAC_CONTROL_FDX; 1017 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1018 break; 1019 } 1020 default: 1021 { 1022 int w0_addr_cfg; 1023 1024 GO_WINDOW(0); 1025 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1026 w0_addr_cfg &= 0x3fff; 1027 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1028 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1029 DELAY(1000); 1030 break; 1031 } 1032 } 1033 1034 GO_WINDOW(1); /* Window 1 is operating window */ 1035 } 1036 1037 /* 1038 * Get currently-selected media from card. 1039 * (if_media callback, may be called before interface is brought up). 1040 */ 1041 void 1042 ep_media_status(struct ifnet *ifp, struct ifmediareq *req) 1043 { 1044 struct ep_softc *sc = ifp->if_softc; 1045 bus_space_tag_t iot = sc->sc_iot; 1046 bus_space_handle_t ioh = sc->sc_ioh; 1047 1048 if (sc->enabled == 0) { 1049 req->ifm_active = IFM_ETHER|IFM_NONE; 1050 req->ifm_status = 0; 1051 return; 1052 } 1053 1054 /* 1055 * If we have MII, go ask the PHY what's going on. 1056 */ 1057 if (sc->ep_flags & ELINK_FLAGS_MII) { 1058 mii_pollstat(&sc->sc_mii); 1059 req->ifm_active = sc->sc_mii.mii_media_active; 1060 req->ifm_status = sc->sc_mii.mii_media_status; 1061 return; 1062 } 1063 1064 /* 1065 * Ok, at this point we claim that our active media is 1066 * the currently selected media. We'll update our status 1067 * if our chipset allows us to detect link. 1068 */ 1069 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1070 req->ifm_status = 0; 1071 1072 switch (sc->ep_chipset) { 1073 case ELINK_CHIPSET_VORTEX: 1074 case ELINK_CHIPSET_BOOMERANG: 1075 GO_WINDOW(4); 1076 req->ifm_status = IFM_AVALID; 1077 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1078 LINKBEAT_DETECT) 1079 req->ifm_status |= IFM_ACTIVE; 1080 GO_WINDOW(1); /* back to operating window */ 1081 break; 1082 } 1083 } 1084 1085 1086 1087 /* 1088 * Start outputting on the interface. 1089 * Always called as splnet(). 1090 */ 1091 void 1092 epstart(struct ifnet *ifp) 1093 { 1094 struct ep_softc *sc = ifp->if_softc; 1095 bus_space_tag_t iot = sc->sc_iot; 1096 bus_space_handle_t ioh = sc->sc_ioh; 1097 struct mbuf *m, *m0; 1098 int sh, len, pad; 1099 bus_size_t txreg; 1100 1101 /* Don't transmit if interface is busy or not running */ 1102 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1103 return; 1104 1105 startagain: 1106 /* Sneak a peek at the next packet */ 1107 IFQ_POLL(&ifp->if_snd, m0); 1108 if (m0 == 0) 1109 return; 1110 1111 /* We need to use m->m_pkthdr.len, so require the header */ 1112 if ((m0->m_flags & M_PKTHDR) == 0) 1113 panic("epstart: no header mbuf"); 1114 len = m0->m_pkthdr.len; 1115 1116 pad = (4 - len) & 3; 1117 1118 /* 1119 * The 3c509 automatically pads short packets to minimum ethernet 1120 * length, but we drop packets that are too large. Perhaps we should 1121 * truncate them instead? 1122 */ 1123 if (len + pad > ETHER_MAX_LEN) { 1124 /* packet is obviously too large: toss it */ 1125 ++ifp->if_oerrors; 1126 IFQ_DEQUEUE(&ifp->if_snd, m0); 1127 m_freem(m0); 1128 goto readcheck; 1129 } 1130 1131 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1132 len + pad + 4) { 1133 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1134 SET_TX_AVAIL_THRESH | 1135 ((len + pad + 4) >> sc->ep_pktlenshift)); 1136 /* not enough room in FIFO */ 1137 ifp->if_flags |= IFF_OACTIVE; 1138 return; 1139 } else { 1140 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1141 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1142 } 1143 1144 IFQ_DEQUEUE(&ifp->if_snd, m0); 1145 if (m0 == 0) /* not really needed */ 1146 return; 1147 1148 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1149 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1150 1151 bpf_mtap(ifp, m0, BPF_D_OUT); 1152 1153 /* 1154 * Do the output at a high interrupt priority level so that an 1155 * interrupt from another device won't cause a FIFO underrun. 1156 * We choose splsched() since that blocks essentially everything 1157 * except for interrupts from serial devices (which typically 1158 * lose data if their interrupt isn't serviced fast enough). 1159 * 1160 * XXX THIS CAN CAUSE CLOCK DRIFT! 1161 */ 1162 sh = splsched(); 1163 1164 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1165 1166 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1167 /* 1168 * Prime the FIFO buffer counter (number of 16-bit 1169 * words about to be written to the FIFO). 1170 * 1171 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1172 * COUNTER IS NON-ZERO! 1173 */ 1174 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1175 (len + pad) >> 1); 1176 } 1177 1178 bus_space_write_2(iot, ioh, txreg, len); 1179 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1180 if (ELINK_IS_BUS_32(sc->bustype)) { 1181 for (m = m0; m;) { 1182 if (m->m_len > 3) { 1183 /* align our reads from core */ 1184 if (mtod(m, u_long) & 3) { 1185 u_long count = 1186 4 - (mtod(m, u_long) & 3); 1187 bus_space_write_multi_1(iot, ioh, 1188 txreg, mtod(m, u_int8_t *), count); 1189 m->m_data = 1190 (void *)(mtod(m, u_long) + count); 1191 m->m_len -= count; 1192 } 1193 bus_space_write_multi_stream_4(iot, ioh, 1194 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1195 m->m_data = (void *)(mtod(m, u_long) + 1196 (u_long)(m->m_len & ~3)); 1197 m->m_len -= m->m_len & ~3; 1198 } 1199 if (m->m_len) { 1200 bus_space_write_multi_1(iot, ioh, 1201 txreg, mtod(m, u_int8_t *), m->m_len); 1202 } 1203 m = m0 = m_free(m); 1204 } 1205 } else { 1206 for (m = m0; m;) { 1207 if (m->m_len > 1) { 1208 if (mtod(m, u_long) & 1) { 1209 bus_space_write_1(iot, ioh, 1210 txreg, *(mtod(m, u_int8_t *))); 1211 m->m_data = 1212 (void *)(mtod(m, u_long) + 1); 1213 m->m_len -= 1; 1214 } 1215 bus_space_write_multi_stream_2(iot, ioh, 1216 txreg, mtod(m, u_int16_t *), 1217 m->m_len >> 1); 1218 } 1219 if (m->m_len & 1) { 1220 bus_space_write_1(iot, ioh, txreg, 1221 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1222 } 1223 m = m0 = m_free(m); 1224 } 1225 } 1226 while (pad--) 1227 bus_space_write_1(iot, ioh, txreg, 0); 1228 1229 splx(sh); 1230 1231 ++ifp->if_opackets; 1232 1233 readcheck: 1234 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1235 ERR_INCOMPLETE) == 0) { 1236 /* We received a complete packet. */ 1237 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1238 1239 if ((status & INTR_LATCH) == 0) { 1240 /* 1241 * No interrupt, read the packet and continue 1242 * Is this supposed to happen? Is my motherboard 1243 * completely busted? 1244 */ 1245 epread(sc); 1246 } else { 1247 /* Got an interrupt, return so that it gets serviced. */ 1248 return; 1249 } 1250 } else { 1251 /* Check if we are stuck and reset [see XXX comment] */ 1252 if (epstatus(sc)) { 1253 if (ifp->if_flags & IFF_DEBUG) 1254 printf("%s: adapter reset\n", 1255 device_xname(sc->sc_dev)); 1256 epreset(sc); 1257 } 1258 } 1259 1260 goto startagain; 1261 } 1262 1263 1264 /* 1265 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1266 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1267 * We detect this situation and we reset the adapter. 1268 * It happens at times when there is a lot of broadcast traffic 1269 * on the cable (once in a blue moon). 1270 */ 1271 static int 1272 epstatus(struct ep_softc *sc) 1273 { 1274 bus_space_tag_t iot = sc->sc_iot; 1275 bus_space_handle_t ioh = sc->sc_ioh; 1276 u_int16_t fifost; 1277 1278 /* 1279 * Check the FIFO status and act accordingly 1280 */ 1281 GO_WINDOW(4); 1282 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1283 GO_WINDOW(1); 1284 1285 if (fifost & FIFOS_RX_UNDERRUN) { 1286 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1287 printf("%s: RX underrun\n", device_xname(sc->sc_dev)); 1288 epreset(sc); 1289 return 0; 1290 } 1291 1292 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1293 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1294 printf("%s: RX Status overrun\n", device_xname(sc->sc_dev)); 1295 return 1; 1296 } 1297 1298 if (fifost & FIFOS_RX_OVERRUN) { 1299 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1300 printf("%s: RX overrun\n", device_xname(sc->sc_dev)); 1301 return 1; 1302 } 1303 1304 if (fifost & FIFOS_TX_OVERRUN) { 1305 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1306 printf("%s: TX overrun\n", device_xname(sc->sc_dev)); 1307 epreset(sc); 1308 return 0; 1309 } 1310 1311 return 0; 1312 } 1313 1314 1315 static void 1316 eptxstat(struct ep_softc *sc) 1317 { 1318 bus_space_tag_t iot = sc->sc_iot; 1319 bus_space_handle_t ioh = sc->sc_ioh; 1320 int i; 1321 1322 /* 1323 * We need to read+write TX_STATUS until we get a 0 status 1324 * in order to turn off the interrupt flag. 1325 */ 1326 while ((i = bus_space_read_2(iot, ioh, 1327 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1328 bus_space_write_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1329 0x0); 1330 1331 if (i & TXS_JABBER) { 1332 ++sc->sc_ethercom.ec_if.if_oerrors; 1333 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1334 printf("%s: jabber (%x)\n", 1335 device_xname(sc->sc_dev), i); 1336 epreset(sc); 1337 } else if (i & TXS_UNDERRUN) { 1338 ++sc->sc_ethercom.ec_if.if_oerrors; 1339 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1340 printf("%s: fifo underrun (%x) @%d\n", 1341 device_xname(sc->sc_dev), i, 1342 sc->tx_start_thresh); 1343 if (sc->tx_succ_ok < 100) 1344 sc->tx_start_thresh = uimin(ETHER_MAX_LEN, 1345 sc->tx_start_thresh + 20); 1346 sc->tx_succ_ok = 0; 1347 epreset(sc); 1348 } else if (i & TXS_MAX_COLLISION) { 1349 ++sc->sc_ethercom.ec_if.if_collisions; 1350 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1351 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1352 } else 1353 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1354 } 1355 } 1356 1357 int 1358 epintr(void *arg) 1359 { 1360 struct ep_softc *sc = arg; 1361 bus_space_tag_t iot = sc->sc_iot; 1362 bus_space_handle_t ioh = sc->sc_ioh; 1363 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1364 u_int16_t status; 1365 int ret = 0; 1366 1367 if (sc->enabled == 0 || !device_is_active(sc->sc_dev)) 1368 return (0); 1369 1370 1371 for (;;) { 1372 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1373 1374 if ((status & WATCHED_INTERRUPTS) == 0) { 1375 if ((status & INTR_LATCH) == 0) { 1376 #if 0 1377 printf("%s: intr latch cleared\n", 1378 device_xname(sc->sc_dev)); 1379 #endif 1380 break; 1381 } 1382 } 1383 1384 ret = 1; 1385 1386 /* 1387 * Acknowledge any interrupts. It's important that we do this 1388 * first, since there would otherwise be a race condition. 1389 * Due to the i386 interrupt queueing, we may get spurious 1390 * interrupts occasionally. 1391 */ 1392 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1393 (status & (INTR_LATCH | ALL_INTERRUPTS))); 1394 1395 #if 0 1396 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1397 1398 printf("%s: intr%s%s%s%s\n", device_xname(sc->sc_dev), 1399 (status & RX_COMPLETE)?" RX_COMPLETE":"", 1400 (status & TX_COMPLETE)?" TX_COMPLETE":"", 1401 (status & TX_AVAIL)?" TX_AVAIL":"", 1402 (status & CARD_FAILURE)?" CARD_FAILURE":""); 1403 #endif 1404 1405 if (status & RX_COMPLETE) { 1406 epread(sc); 1407 } 1408 if (status & TX_AVAIL) { 1409 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1410 epstart(&sc->sc_ethercom.ec_if); 1411 } 1412 if (status & CARD_FAILURE) { 1413 printf("%s: adapter failure (%x)\n", 1414 device_xname(sc->sc_dev), status); 1415 #if 1 1416 epinit(ifp); 1417 #else 1418 epreset(sc); 1419 #endif 1420 return (1); 1421 } 1422 if (status & TX_COMPLETE) { 1423 eptxstat(sc); 1424 epstart(ifp); 1425 } 1426 1427 if (status) 1428 rnd_add_uint32(&sc->rnd_source, status); 1429 } 1430 1431 /* no more interrupts */ 1432 return (ret); 1433 } 1434 1435 void 1436 epread(struct ep_softc *sc) 1437 { 1438 bus_space_tag_t iot = sc->sc_iot; 1439 bus_space_handle_t ioh = sc->sc_ioh; 1440 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1441 struct mbuf *m; 1442 int len; 1443 1444 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1445 1446 again: 1447 if (ifp->if_flags & IFF_DEBUG) { 1448 int err = len & ERR_MASK; 1449 const char *s = NULL; 1450 1451 if (len & ERR_INCOMPLETE) 1452 s = "incomplete packet"; 1453 else if (err == ERR_OVERRUN) 1454 s = "packet overrun"; 1455 else if (err == ERR_RUNT) 1456 s = "runt packet"; 1457 else if (err == ERR_ALIGNMENT) 1458 s = "bad alignment"; 1459 else if (err == ERR_CRC) 1460 s = "bad crc"; 1461 else if (err == ERR_OVERSIZE) 1462 s = "oversized packet"; 1463 else if (err == ERR_DRIBBLE) 1464 s = "dribble bits"; 1465 1466 if (s) 1467 printf("%s: %s\n", device_xname(sc->sc_dev), s); 1468 } 1469 1470 if (len & ERR_INCOMPLETE) 1471 return; 1472 1473 if (len & ERR_RX) { 1474 ++ifp->if_ierrors; 1475 goto abort; 1476 } 1477 1478 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1479 1480 /* Pull packet off interface. */ 1481 m = epget(sc, len); 1482 if (m == 0) { 1483 ifp->if_ierrors++; 1484 goto abort; 1485 } 1486 1487 if_percpuq_enqueue(ifp->if_percpuq, m); 1488 1489 /* 1490 * In periods of high traffic we can actually receive enough 1491 * packets so that the fifo overrun bit will be set at this point, 1492 * even though we just read a packet. In this case we 1493 * are not going to receive any more interrupts. We check for 1494 * this condition and read again until the fifo is not full. 1495 * We could simplify this test by not using epstatus(), but 1496 * rechecking the RX_STATUS register directly. This test could 1497 * result in unnecessary looping in cases where there is a new 1498 * packet but the fifo is not full, but it will not fix the 1499 * stuck behavior. 1500 * 1501 * Even with this improvement, we still get packet overrun errors 1502 * which are hurting performance. Maybe when I get some more time 1503 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1504 */ 1505 if (epstatus(sc)) { 1506 len = bus_space_read_2(iot, ioh, 1507 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1508 /* Check if we are stuck and reset [see XXX comment] */ 1509 if (len & ERR_INCOMPLETE) { 1510 if (ifp->if_flags & IFF_DEBUG) 1511 printf("%s: adapter reset\n", 1512 device_xname(sc->sc_dev)); 1513 epreset(sc); 1514 return; 1515 } 1516 goto again; 1517 } 1518 1519 return; 1520 1521 abort: 1522 ep_discard_rxtop(iot, ioh); 1523 1524 } 1525 1526 struct mbuf * 1527 epget(struct ep_softc *sc, int totlen) 1528 { 1529 bus_space_tag_t iot = sc->sc_iot; 1530 bus_space_handle_t ioh = sc->sc_ioh; 1531 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1532 struct mbuf *m; 1533 bus_size_t rxreg; 1534 int len, remaining; 1535 int s; 1536 void *newdata; 1537 u_long offset; 1538 1539 m = sc->mb[sc->next_mb]; 1540 sc->mb[sc->next_mb] = 0; 1541 if (m == 0) { 1542 MGETHDR(m, M_DONTWAIT, MT_DATA); 1543 if (m == 0) 1544 return 0; 1545 } else { 1546 /* If the queue is no longer full, refill. */ 1547 if (sc->last_mb == sc->next_mb) 1548 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1549 1550 /* Convert one of our saved mbuf's. */ 1551 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1552 m->m_data = m->m_pktdat; 1553 m->m_flags = M_PKTHDR; 1554 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr)); 1555 } 1556 m_set_rcvif(m, ifp); 1557 m->m_pkthdr.len = totlen; 1558 len = MHLEN; 1559 1560 /* 1561 * Allocate big enough space to hold whole packet, to avoid 1562 * allocating new mbufs on splsched(). 1563 */ 1564 if (totlen + ALIGNBYTES > len) { 1565 if (totlen + ALIGNBYTES > MCLBYTES) { 1566 len = ALIGN(totlen + ALIGNBYTES); 1567 MEXTMALLOC(m, len, M_DONTWAIT); 1568 } else { 1569 len = MCLBYTES; 1570 MCLGET(m, M_DONTWAIT); 1571 } 1572 if ((m->m_flags & M_EXT) == 0) { 1573 m_free(m); 1574 return 0; 1575 } 1576 } 1577 1578 /* align the struct ip header */ 1579 newdata = (char *)ALIGN(m->m_data + sizeof(struct ether_header)) 1580 - sizeof(struct ether_header); 1581 m->m_data = newdata; 1582 m->m_len = totlen; 1583 1584 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1585 remaining = totlen; 1586 offset = mtod(m, u_long); 1587 1588 /* 1589 * We read the packet at a high interrupt priority level so that 1590 * an interrupt from another device won't cause the card's packet 1591 * buffer to overflow. We choose splsched() since that blocks 1592 * essentially everything except for interrupts from serial 1593 * devices (which typically lose data if their interrupt isn't 1594 * serviced fast enough). 1595 * 1596 * XXX THIS CAN CAUSE CLOCK DRIFT! 1597 */ 1598 s = splsched(); 1599 1600 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1601 /* 1602 * Prime the FIFO buffer counter (number of 16-bit 1603 * words about to be read from the FIFO). 1604 * 1605 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1606 * COUNTER IS NON-ZERO! 1607 */ 1608 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1609 } 1610 1611 if (ELINK_IS_BUS_32(sc->bustype)) { 1612 /* 1613 * Read bytes up to the point where we are aligned. 1614 * (We can align to 4 bytes, rather than ALIGNBYTES, 1615 * here because we're later reading 4-byte chunks.) 1616 */ 1617 if ((remaining > 3) && (offset & 3)) { 1618 int count = (4 - (offset & 3)); 1619 bus_space_read_multi_1(iot, ioh, 1620 rxreg, (u_int8_t *) offset, count); 1621 offset += count; 1622 remaining -= count; 1623 } 1624 if (remaining > 3) { 1625 bus_space_read_multi_stream_4(iot, ioh, 1626 rxreg, (u_int32_t *) offset, 1627 remaining >> 2); 1628 offset += remaining & ~3; 1629 remaining &= 3; 1630 } 1631 if (remaining) { 1632 bus_space_read_multi_1(iot, ioh, 1633 rxreg, (u_int8_t *) offset, remaining); 1634 } 1635 } else { 1636 if ((remaining > 1) && (offset & 1)) { 1637 bus_space_read_multi_1(iot, ioh, 1638 rxreg, (u_int8_t *) offset, 1); 1639 remaining -= 1; 1640 offset += 1; 1641 } 1642 if (remaining > 1) { 1643 bus_space_read_multi_stream_2(iot, ioh, 1644 rxreg, (u_int16_t *) offset, 1645 remaining >> 1); 1646 offset += remaining & ~1; 1647 } 1648 if (remaining & 1) { 1649 bus_space_read_multi_1(iot, ioh, 1650 rxreg, (u_int8_t *) offset, remaining & 1); 1651 } 1652 } 1653 1654 ep_discard_rxtop(iot, ioh); 1655 1656 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1657 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1658 splx(s); 1659 1660 return (m); 1661 } 1662 1663 int 1664 epioctl(struct ifnet *ifp, u_long cmd, void *data) 1665 { 1666 struct ep_softc *sc = ifp->if_softc; 1667 struct ifreq *ifr = (struct ifreq *)data; 1668 int s, error = 0; 1669 1670 s = splnet(); 1671 1672 switch (cmd) { 1673 1674 case SIOCSIFMEDIA: 1675 case SIOCGIFMEDIA: 1676 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1677 break; 1678 1679 case SIOCADDMULTI: 1680 case SIOCDELMULTI: 1681 if (sc->enabled == 0) { 1682 error = EIO; 1683 break; 1684 } 1685 1686 default: 1687 error = ether_ioctl(ifp, cmd, data); 1688 1689 if (error == ENETRESET) { 1690 /* 1691 * Multicast list has changed; set the hardware filter 1692 * accordingly. 1693 */ 1694 if (ifp->if_flags & IFF_RUNNING) 1695 epreset(sc); 1696 error = 0; 1697 } 1698 break; 1699 } 1700 1701 splx(s); 1702 return (error); 1703 } 1704 1705 void 1706 epreset(struct ep_softc *sc) 1707 { 1708 int s; 1709 1710 s = splnet(); 1711 epinit(&sc->sc_ethercom.ec_if); 1712 splx(s); 1713 } 1714 1715 void 1716 epwatchdog(struct ifnet *ifp) 1717 { 1718 struct ep_softc *sc = ifp->if_softc; 1719 1720 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev)); 1721 ++sc->sc_ethercom.ec_if.if_oerrors; 1722 1723 epreset(sc); 1724 } 1725 1726 void 1727 epstop(struct ifnet *ifp, int disable) 1728 { 1729 struct ep_softc *sc = ifp->if_softc; 1730 bus_space_tag_t iot = sc->sc_iot; 1731 bus_space_handle_t ioh = sc->sc_ioh; 1732 1733 if (sc->ep_flags & ELINK_FLAGS_MII) { 1734 /* Stop the one second clock. */ 1735 callout_stop(&sc->sc_mbuf_callout); 1736 1737 /* Down the MII. */ 1738 mii_down(&sc->sc_mii); 1739 } 1740 1741 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1742 /* 1743 * Clear the FIFO buffer count, thus halting 1744 * any currently-running transactions. 1745 */ 1746 GO_WINDOW(1); /* sanity */ 1747 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1748 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1749 } 1750 1751 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1752 ep_discard_rxtop(iot, ioh); 1753 1754 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1755 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1756 1757 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1758 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1759 1760 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1761 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1762 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1763 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1764 1765 epmbufempty(sc); 1766 1767 if (disable) 1768 epdisable(sc); 1769 1770 ifp->if_flags &= ~IFF_RUNNING; 1771 } 1772 1773 1774 /* 1775 * Before reboots, reset card completely. 1776 */ 1777 static bool 1778 epshutdown(device_t self, int howto) 1779 { 1780 struct ep_softc *sc = device_private(self); 1781 int s = splnet(); 1782 1783 if (sc->enabled) { 1784 epstop(&sc->sc_ethercom.ec_if, 0); 1785 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1786 epdisable(sc); 1787 sc->enabled = 0; 1788 } 1789 splx(s); 1790 1791 return true; 1792 } 1793 1794 /* 1795 * We get eeprom data from the id_port given an offset into the 1796 * eeprom. Basically; after the ID_sequence is sent to all of 1797 * the cards; they enter the ID_CMD state where they will accept 1798 * command requests. 0x80-0xbf loads the eeprom data. We then 1799 * read the port 16 times and with every read; the cards check 1800 * for contention (ie: if one card writes a 0 bit and another 1801 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1802 * each card compares the data on the bus; if there is a difference 1803 * then that card goes into ID_WAIT state again). In the meantime; 1804 * one bit of data is returned in the AX register which is conveniently 1805 * returned to us by bus_space_read_2(). Hence; we read 16 times getting one 1806 * bit of data with each read. 1807 * 1808 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1809 */ 1810 u_int16_t 1811 epreadeeprom(bus_space_tag_t iot, bus_space_handle_t ioh, int offset) 1812 { 1813 u_int16_t data = 0; 1814 int i; 1815 1816 bus_space_write_2(iot, ioh, 0, 0x80 + offset); 1817 delay(1000); 1818 for (i = 0; i < 16; i++) 1819 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1820 return (data); 1821 } 1822 1823 static int 1824 epbusyeeprom(struct ep_softc *sc) 1825 { 1826 bus_space_tag_t iot = sc->sc_iot; 1827 bus_space_handle_t ioh = sc->sc_ioh; 1828 bus_size_t eecmd; 1829 int i = 100, j; 1830 uint16_t busybit; 1831 1832 if (sc->bustype == ELINK_BUS_PCMCIA) { 1833 delay(1000); 1834 return 0; 1835 } 1836 1837 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1838 eecmd = CORK_ASIC_EEPROM_COMMAND; 1839 busybit = CORK_EEPROM_BUSY; 1840 } else { 1841 eecmd = ELINK_W0_EEPROM_COMMAND; 1842 busybit = EEPROM_BUSY; 1843 } 1844 1845 j = 0; /* bad GCC flow analysis */ 1846 while (i--) { 1847 j = bus_space_read_2(iot, ioh, eecmd); 1848 if (j & busybit) 1849 delay(100); 1850 else 1851 break; 1852 } 1853 if (i == 0) { 1854 aprint_normal("\n"); 1855 aprint_error_dev(sc->sc_dev, "eeprom failed to come ready\n"); 1856 return (1); 1857 } 1858 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW && 1859 (j & EEPROM_TST_MODE) != 0) { 1860 /* XXX PnP mode? */ 1861 printf("\n%s: erase pencil mark!\n", device_xname(sc->sc_dev)); 1862 return (1); 1863 } 1864 return (0); 1865 } 1866 1867 u_int16_t 1868 ep_read_eeprom(struct ep_softc *sc, u_int16_t offset) 1869 { 1870 bus_size_t eecmd, eedata; 1871 u_int16_t readcmd; 1872 1873 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1874 eecmd = CORK_ASIC_EEPROM_COMMAND; 1875 eedata = CORK_ASIC_EEPROM_DATA; 1876 } else { 1877 eecmd = ELINK_W0_EEPROM_COMMAND; 1878 eedata = ELINK_W0_EEPROM_DATA; 1879 } 1880 1881 /* 1882 * RoadRunner has a larger EEPROM, so a different read command 1883 * is required. 1884 */ 1885 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1886 readcmd = READ_EEPROM_RR; 1887 else 1888 readcmd = READ_EEPROM; 1889 1890 if (epbusyeeprom(sc)) 1891 return (0); /* XXX why is eeprom busy? */ 1892 1893 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset); 1894 1895 if (epbusyeeprom(sc)) 1896 return (0); /* XXX why is eeprom busy? */ 1897 1898 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata)); 1899 } 1900 1901 void 1902 epmbuffill(void *v) 1903 { 1904 struct ep_softc *sc = v; 1905 struct mbuf *m; 1906 int s, i; 1907 1908 s = splnet(); 1909 i = sc->last_mb; 1910 do { 1911 if (sc->mb[i] == 0) { 1912 MGET(m, M_DONTWAIT, MT_DATA); 1913 if (m == 0) 1914 break; 1915 sc->mb[i] = m; 1916 } 1917 i = (i + 1) % MAX_MBS; 1918 } while (i != sc->next_mb); 1919 sc->last_mb = i; 1920 /* If the queue was not filled, try again. */ 1921 if (sc->last_mb != sc->next_mb) 1922 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1923 splx(s); 1924 } 1925 1926 void 1927 epmbufempty(struct ep_softc *sc) 1928 { 1929 int s, i; 1930 1931 s = splnet(); 1932 for (i = 0; i < MAX_MBS; i++) { 1933 if (sc->mb[i]) { 1934 m_freem(sc->mb[i]); 1935 sc->mb[i] = NULL; 1936 } 1937 } 1938 sc->last_mb = sc->next_mb = 0; 1939 callout_stop(&sc->sc_mbuf_callout); 1940 splx(s); 1941 } 1942 1943 int 1944 epenable(struct ep_softc *sc) 1945 { 1946 1947 if (sc->enabled == 0 && sc->enable != NULL) { 1948 if ((*sc->enable)(sc) != 0) { 1949 aprint_error_dev(sc->sc_dev, "device enable failed\n"); 1950 return (EIO); 1951 } 1952 } 1953 1954 sc->enabled = 1; 1955 return (0); 1956 } 1957 1958 void 1959 epdisable(struct ep_softc *sc) 1960 { 1961 1962 if (sc->enabled != 0 && sc->disable != NULL) { 1963 (*sc->disable)(sc); 1964 sc->enabled = 0; 1965 } 1966 } 1967 1968 /* 1969 * ep_activate: 1970 * 1971 * Handle device activation/deactivation requests. 1972 */ 1973 int 1974 ep_activate(device_t self, enum devact act) 1975 { 1976 struct ep_softc *sc = device_private(self); 1977 1978 switch (act) { 1979 case DVACT_DEACTIVATE: 1980 if_deactivate(&sc->sc_ethercom.ec_if); 1981 return 0; 1982 default: 1983 return EOPNOTSUPP; 1984 } 1985 } 1986 1987 /* 1988 * ep_detach: 1989 * 1990 * Detach a elink3 interface. 1991 */ 1992 int 1993 ep_detach(device_t self, int flags) 1994 { 1995 struct ep_softc *sc = device_private(self); 1996 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1997 1998 /* Succeed now if there's no work to do. */ 1999 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2000 return (0); 2001 2002 epdisable(sc); 2003 2004 callout_stop(&sc->sc_mii_callout); 2005 callout_stop(&sc->sc_mbuf_callout); 2006 2007 if (sc->ep_flags & ELINK_FLAGS_MII) { 2008 /* Detach all PHYs */ 2009 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2010 } 2011 2012 /* Delete all remaining media. */ 2013 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2014 2015 rnd_detach_source(&sc->rnd_source); 2016 ether_ifdetach(ifp); 2017 if_detach(ifp); 2018 2019 pmf_device_deregister(sc->sc_dev); 2020 2021 return (0); 2022 } 2023 2024 u_int32_t 2025 ep_mii_bitbang_read(device_t self) 2026 { 2027 struct ep_softc *sc = device_private(self); 2028 2029 /* We're already in Window 4. */ 2030 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2031 ELINK_W4_BOOM_PHYSMGMT)); 2032 } 2033 2034 void 2035 ep_mii_bitbang_write(device_t self, u_int32_t val) 2036 { 2037 struct ep_softc *sc = device_private(self); 2038 2039 /* We're already in Window 4. */ 2040 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2041 ELINK_W4_BOOM_PHYSMGMT, val); 2042 } 2043 2044 int 2045 ep_mii_readreg(device_t self, int phy, int reg, uint16_t *val) 2046 { 2047 struct ep_softc *sc = device_private(self); 2048 int rv; 2049 2050 GO_WINDOW(4); 2051 2052 rv = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg, val); 2053 2054 GO_WINDOW(1); 2055 2056 return rv; 2057 } 2058 2059 int 2060 ep_mii_writereg(device_t self, int phy, int reg, uint16_t val) 2061 { 2062 struct ep_softc *sc = device_private(self); 2063 int rv; 2064 2065 GO_WINDOW(4); 2066 2067 rv = mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2068 2069 GO_WINDOW(1); 2070 2071 return rv; 2072 } 2073 2074 void 2075 ep_statchg(struct ifnet *ifp) 2076 { 2077 struct ep_softc *sc = ifp->if_softc; 2078 bus_space_tag_t iot = sc->sc_iot; 2079 bus_space_handle_t ioh = sc->sc_ioh; 2080 int mctl; 2081 2082 GO_WINDOW(3); 2083 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2084 if (sc->sc_mii.mii_media_active & IFM_FDX) 2085 mctl |= MAC_CONTROL_FDX; 2086 else 2087 mctl &= ~MAC_CONTROL_FDX; 2088 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2089 GO_WINDOW(1); /* back to operating window */ 2090 } 2091 2092 void 2093 ep_power(int why, void *arg) 2094 { 2095 struct ep_softc *sc = arg; 2096 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2097 int s; 2098 2099 s = splnet(); 2100 switch (why) { 2101 case PWR_SUSPEND: 2102 case PWR_STANDBY: 2103 epstop(ifp, 1); 2104 break; 2105 case PWR_RESUME: 2106 if (ifp->if_flags & IFF_UP) { 2107 (void)epinit(ifp); 2108 } 2109 break; 2110 case PWR_SOFTSUSPEND: 2111 case PWR_SOFTSTANDBY: 2112 case PWR_SOFTRESUME: 2113 break; 2114 } 2115 splx(s); 2116 } 2117
Indexes created Thu Sep 25 16:09:42 GMT 2025