elink3.c revision 1.151
1 /* $NetBSD: elink3.c,v 1.151 2020/02/04 05:25:39 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 35 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by Herb Peyerl. 49 * 4. The name of Herb Peyerl may not be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 #include <sys/cdefs.h> 65 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.151 2020/02/04 05:25:39 thorpej Exp $"); 66 67 #include "opt_inet.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/callout.h> 72 #include <sys/kernel.h> 73 #include <sys/mbuf.h> 74 #include <sys/socket.h> 75 #include <sys/ioctl.h> 76 #include <sys/errno.h> 77 #include <sys/syslog.h> 78 #include <sys/select.h> 79 #include <sys/device.h> 80 #include <sys/rndsource.h> 81 82 #include <net/if.h> 83 #include <net/if_dl.h> 84 #include <net/if_ether.h> 85 #include <net/if_media.h> 86 #include <net/bpf.h> 87 88 #include <sys/cpu.h> 89 #include <sys/bus.h> 90 #include <sys/intr.h> 91 92 #include <dev/mii/mii.h> 93 #include <dev/mii/miivar.h> 94 #include <dev/mii/mii_bitbang.h> 95 96 #include <dev/ic/elink3var.h> 97 #include <dev/ic/elink3reg.h> 98 99 #ifdef DEBUG 100 int epdebug = 0; 101 #endif 102 103 /* 104 * XXX endian workaround for big-endian CPUs with pcmcia: 105 * if stream methods for bus_space_multi are not provided, define them 106 * using non-stream bus_space_{read,write}_multi_. 107 * Assumes host CPU is same endian-ness as bus. 108 */ 109 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 110 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 111 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 112 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 113 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 114 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 115 116 /* 117 * Structure to map media-present bits in boards to ifmedia codes and 118 * printable media names. Used for table-driven ifmedia initialization. 119 */ 120 struct ep_media { 121 int epm_mpbit; /* media present bit */ 122 const char *epm_name; /* name of medium */ 123 int epm_ifmedia; /* ifmedia word for medium */ 124 int epm_epmedia; /* ELINKMEDIA_* constant */ 125 }; 126 127 /* 128 * Media table for the Demon/Vortex/Boomerang chipsets. 129 * 130 * Note that MII on the Demon and Vortex (3c59x) indicates an external 131 * MII connector (for connecting an external PHY) ... I think. Treat 132 * it as `manual' on these chips. 133 * 134 * Any Boomerang (3c90x) chips with MII really do have an internal 135 * MII and real PHYs attached; no `native' media. 136 */ 137 const struct ep_media ep_vortex_media[] = { 138 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER | IFM_10_T, 139 ELINKMEDIA_10BASE_T }, 140 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER | IFM_10_T | IFM_FDX, 141 ELINKMEDIA_10BASE_T }, 142 { ELINK_PCI_AUI, "10base5", IFM_ETHER | IFM_10_5, 143 ELINKMEDIA_AUI }, 144 { ELINK_PCI_BNC, "10base2", IFM_ETHER | IFM_10_2, 145 ELINKMEDIA_10BASE_2 }, 146 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER | IFM_100_TX, 147 ELINKMEDIA_100BASE_TX }, 148 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER | IFM_100_TX|IFM_FDX, 149 ELINKMEDIA_100BASE_TX }, 150 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER | IFM_100_FX, 151 ELINKMEDIA_100BASE_FX }, 152 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER | IFM_MANUAL, 153 ELINKMEDIA_MII }, 154 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER | IFM_100_T4, 155 ELINKMEDIA_100BASE_T4 }, 156 { 0, NULL, 0, 157 0 }, 158 }; 159 160 /* 161 * Media table for the older 3Com Etherlink III chipset, used 162 * in the 3c509, 3c579, and 3c589. 163 */ 164 const struct ep_media ep_509_media[] = { 165 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER | IFM_10_T, 166 ELINKMEDIA_10BASE_T }, 167 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER | IFM_10_5, 168 ELINKMEDIA_AUI }, 169 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER | IFM_10_2, 170 ELINKMEDIA_10BASE_2 }, 171 { 0, NULL, 0, 172 0 }, 173 }; 174 175 void ep_internalconfig(struct ep_softc *sc); 176 void ep_vortex_probemedia(struct ep_softc *sc); 177 void ep_509_probemedia(struct ep_softc *sc); 178 179 static void eptxstat(struct ep_softc *); 180 static int epstatus(struct ep_softc *); 181 int epinit(struct ifnet *); 182 void epstop(struct ifnet *, int); 183 int epioctl(struct ifnet *, u_long, void *); 184 void epstart(struct ifnet *); 185 void epwatchdog(struct ifnet *); 186 void epreset(struct ep_softc *); 187 static bool epshutdown(device_t, int); 188 void epread(struct ep_softc *); 189 struct mbuf *epget(struct ep_softc *, int); 190 void epmbuffill(void *); 191 void epmbufempty(struct ep_softc *); 192 void epsetfilter(struct ep_softc *); 193 void ep_roadrunner_mii_enable(struct ep_softc *); 194 void epsetmedia(struct ep_softc *); 195 196 /* ifmedia callbacks */ 197 int ep_media_change(struct ifnet *ifp); 198 void ep_media_status(struct ifnet *ifp, struct ifmediareq *req); 199 200 /* MII callbacks */ 201 int ep_mii_readreg(device_t, int, int, uint16_t *); 202 int ep_mii_writereg(device_t, int, int, uint16_t); 203 void ep_statchg(struct ifnet *); 204 205 void ep_tick(void *); 206 207 static int epbusyeeprom(struct ep_softc *); 208 u_int16_t ep_read_eeprom(struct ep_softc *, u_int16_t); 209 static inline void ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg); 210 static inline void ep_finish_reset(bus_space_tag_t, bus_space_handle_t); 211 static inline void ep_discard_rxtop(bus_space_tag_t, bus_space_handle_t); 212 static inline int ep_w1_reg(struct ep_softc *, int); 213 214 /* 215 * MII bit-bang glue. 216 */ 217 u_int32_t ep_mii_bitbang_read(device_t); 218 void ep_mii_bitbang_write(device_t, u_int32_t); 219 220 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 221 ep_mii_bitbang_read, 222 ep_mii_bitbang_write, 223 { 224 PHYSMGMT_DATA, /* MII_BIT_MDO */ 225 PHYSMGMT_DATA, /* MII_BIT_MDI */ 226 PHYSMGMT_CLK, /* MII_BIT_MDC */ 227 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 228 0, /* MII_BIT_DIR_PHY_HOST */ 229 } 230 }; 231 232 /* 233 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 234 * Window 1 registers offset! 235 */ 236 static inline int 237 ep_w1_reg(struct ep_softc *sc, int reg) 238 { 239 240 switch (sc->ep_chipset) { 241 case ELINK_CHIPSET_CORKSCREW: 242 return (reg + 0x10); 243 244 case ELINK_CHIPSET_ROADRUNNER: 245 switch (reg) { 246 case ELINK_W1_FREE_TX: 247 case ELINK_W1_RUNNER_RDCTL: 248 case ELINK_W1_RUNNER_WRCTL: 249 return (reg); 250 } 251 return (reg + 0x10); 252 } 253 254 return (reg); 255 } 256 257 /* 258 * Wait for any pending reset to complete. 259 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 260 * but older hardware doesn't implement it and we must delay. 261 */ 262 static inline void 263 ep_finish_reset(bus_space_tag_t iot, bus_space_handle_t ioh) 264 { 265 int i; 266 267 for (i = 0; i < 10000; i++) { 268 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 269 COMMAND_IN_PROGRESS) == 0) 270 break; 271 DELAY(10); 272 } 273 } 274 275 /* 276 * Issue a (reset) command, and be sure it has completed. 277 * Used for global reset, TX_RESET, RX_RESET. 278 */ 279 static inline void 280 ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg) 281 { 282 bus_space_tag_t iot = sc->sc_iot; 283 bus_space_handle_t ioh = sc->sc_ioh; 284 285 bus_space_write_2(iot, ioh, cmd, arg); 286 ep_finish_reset(iot, ioh); 287 } 288 289 290 static inline void 291 ep_discard_rxtop(bus_space_tag_t iot, bus_space_handle_t ioh) 292 { 293 int i; 294 295 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 296 297 /* 298 * Spin for about 1 msec, to avoid forcing a DELAY() between 299 * every received packet (adding latency and limiting pkt-recv rate). 300 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 301 * is about right. 302 */ 303 for (i = 0; i < 8000; i++) { 304 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 305 COMMAND_IN_PROGRESS) == 0) 306 return; 307 } 308 309 /* Didn't complete in a hurry. Do DELAY()s. */ 310 ep_finish_reset(iot, ioh); 311 } 312 313 /* 314 * Back-end attach and configure. 315 */ 316 int 317 epconfig(struct ep_softc *sc, u_short chipset, u_int8_t *enaddr) 318 { 319 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 320 bus_space_tag_t iot = sc->sc_iot; 321 bus_space_handle_t ioh = sc->sc_ioh; 322 struct mii_data *mii = &sc->sc_mii; 323 u_int16_t i; 324 u_int8_t myla[ETHER_ADDR_LEN]; 325 326 callout_init(&sc->sc_mii_callout, 0); 327 callout_init(&sc->sc_mbuf_callout, 0); 328 329 sc->ep_chipset = chipset; 330 331 /* 332 * We could have been groveling around in other register 333 * windows in the front-end; make sure we're in window 0 334 * to read the EEPROM. 335 */ 336 GO_WINDOW(0); 337 338 if (enaddr == NULL) { 339 /* 340 * Read the station address from the eeprom. 341 */ 342 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 343 u_int16_t x = ep_read_eeprom(sc, i); 344 myla[(i << 1)] = x >> 8; 345 myla[(i << 1) + 1] = x; 346 } 347 enaddr = myla; 348 } 349 350 /* 351 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 352 * allow FDDI-sized (4500) byte packets. Commands only take an 353 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 354 * packet length. 355 * Commands to these cards implicitly upshift a packet size 356 * or threshold by 2 bits. 357 * To detect cards with large-packet support, we probe by setting 358 * the transmit threshold register, then change windows and 359 * read back the threshold register directly, and see if the 360 * threshold value was shifted or not. 361 */ 362 bus_space_write_2(iot, ioh, ELINK_COMMAND, 363 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 364 GO_WINDOW(5); 365 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 366 GO_WINDOW(1); 367 switch (i) { 368 case ELINK_LARGEWIN_PROBE: 369 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 370 sc->ep_pktlenshift = 0; 371 break; 372 373 case (ELINK_LARGEWIN_PROBE << 2): 374 sc->ep_pktlenshift = 2; 375 break; 376 377 default: 378 aprint_error_dev(sc->sc_dev, 379 "wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 380 "Interface disabled\n", 381 ELINK_LARGEWIN_PROBE, (int) i); 382 return (1); 383 } 384 385 /* 386 * Ensure Tx-available interrupts are enabled for 387 * start the interface. 388 * XXX should be in epinit()? 389 */ 390 bus_space_write_2(iot, ioh, ELINK_COMMAND, 391 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 392 393 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 394 ifp->if_softc = sc; 395 ifp->if_start = epstart; 396 ifp->if_ioctl = epioctl; 397 ifp->if_watchdog = epwatchdog; 398 ifp->if_init = epinit; 399 ifp->if_stop = epstop; 400 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 401 IFQ_SET_READY(&ifp->if_snd); 402 403 if_attach(ifp); 404 ether_ifattach(ifp, enaddr); 405 406 /* 407 * Finish configuration: 408 * determine chipset if the front-end couldn't do so, 409 * show board details, set media. 410 */ 411 412 /* 413 * Print RAM size. We also print the Ethernet address in here. 414 * It's extracted from the ifp, so we have to make sure it's 415 * been attached first. 416 */ 417 ep_internalconfig(sc); 418 GO_WINDOW(0); 419 420 /* 421 * Display some additional information, if pertinent. 422 */ 423 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 424 aprint_normal_dev(sc->sc_dev, "RoadRunner FIFO buffer enabled\n"); 425 426 /* 427 * Initialize our media structures and MII info. We'll 428 * probe the MII if we discover that we have one. 429 */ 430 mii->mii_ifp = ifp; 431 mii->mii_readreg = ep_mii_readreg; 432 mii->mii_writereg = ep_mii_writereg; 433 mii->mii_statchg = ep_statchg; 434 sc->sc_ethercom.ec_mii = mii; 435 ifmedia_init(&mii->mii_media, IFM_IMASK, ep_media_change, 436 ep_media_status); 437 438 /* 439 * All CORKSCREW chips have MII. 440 */ 441 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) 442 sc->ep_flags |= ELINK_FLAGS_MII; 443 444 /* 445 * Now, determine which media we have. 446 */ 447 switch (sc->ep_chipset) { 448 case ELINK_CHIPSET_ROADRUNNER: 449 if (sc->ep_flags & ELINK_FLAGS_MII) { 450 ep_roadrunner_mii_enable(sc); 451 GO_WINDOW(0); 452 } 453 /* FALLTHROUGH */ 454 455 case ELINK_CHIPSET_CORKSCREW: 456 case ELINK_CHIPSET_BOOMERANG: 457 /* 458 * If the device has MII, probe it. We won't be using 459 * any `native' media in this case, only PHYs. If 460 * we don't, just treat the Boomerang like the Vortex. 461 */ 462 if (sc->ep_flags & ELINK_FLAGS_MII) { 463 mii_attach(sc->sc_dev, mii, 0xffffffff, 464 MII_PHY_ANY, MII_OFFSET_ANY, 0); 465 if (LIST_FIRST(&mii->mii_phys) == NULL) { 466 ifmedia_add(&mii->mii_media, 467 IFM_ETHER | IFM_NONE, 0, NULL); 468 ifmedia_set(&mii->mii_media, 469 IFM_ETHER | IFM_NONE); 470 } else { 471 ifmedia_set(&mii->mii_media, 472 IFM_ETHER | IFM_AUTO); 473 } 474 break; 475 } 476 /* FALLTHROUGH */ 477 478 case ELINK_CHIPSET_VORTEX: 479 ep_vortex_probemedia(sc); 480 break; 481 482 default: 483 ep_509_probemedia(sc); 484 break; 485 } 486 487 GO_WINDOW(1); /* Window 1 is operating window */ 488 489 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 490 RND_TYPE_NET, RND_FLAG_DEFAULT); 491 492 sc->tx_start_thresh = 20; /* probably a good starting point. */ 493 494 /* Establish callback to reset card when we reboot. */ 495 if (pmf_device_register1(sc->sc_dev, NULL, NULL, epshutdown)) 496 pmf_class_network_register(sc->sc_dev, ifp); 497 else 498 aprint_error_dev(sc->sc_dev, 499 "couldn't establish power handler\n"); 500 501 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 502 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 503 504 /* The attach is successful. */ 505 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 506 return (0); 507 } 508 509 510 /* 511 * Show interface-model-independent info from window 3 512 * internal-configuration register. 513 */ 514 void 515 ep_internalconfig(struct ep_softc *sc) 516 { 517 bus_space_tag_t iot = sc->sc_iot; 518 bus_space_handle_t ioh = sc->sc_ioh; 519 520 u_int config0; 521 u_int config1; 522 523 int ram_size, ram_width, ram_split; 524 /* 525 * NVRAM buffer Rx:Tx config names for busmastering cards 526 * (Demon, Vortex, and later). 527 */ 528 const char *const onboard_ram_config[] = { 529 "5:3", "3:1", "1:1", "3:5" }; 530 531 GO_WINDOW(3); 532 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 533 config1 = (u_int)bus_space_read_2(iot, ioh, 534 ELINK_W3_INTERNAL_CONFIG + 2); 535 GO_WINDOW(0); 536 537 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 538 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 539 540 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 541 542 aprint_normal_dev(sc->sc_dev, "address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 543 ether_sprintf(CLLADDR(sc->sc_ethercom.ec_if.if_sadl)), 544 8 << ram_size, 545 (ram_width) ? "word" : "byte", 546 onboard_ram_config[ram_split]); 547 } 548 549 550 /* 551 * Find supported media on 3c509-generation hardware that doesn't have 552 * a "reset_options" register in window 3. 553 * Use the config_cntrl register in window 0 instead. 554 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 555 * that implement CONFIG_CTRL. We don't have a good way to set the 556 * default active medium; punt to ifconfig instead. 557 */ 558 void 559 ep_509_probemedia(struct ep_softc *sc) 560 { 561 bus_space_tag_t iot = sc->sc_iot; 562 bus_space_handle_t ioh = sc->sc_ioh; 563 struct ifmedia *ifm = &sc->sc_mii.mii_media; 564 u_int16_t ep_w0_config, port; 565 const struct ep_media *epm; 566 const char *sep = "", *defmedianame = NULL; 567 int defmedia = 0; 568 569 GO_WINDOW(0); 570 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 571 572 aprint_normal_dev(sc->sc_dev, ""); 573 574 /* Sanity check that there are any media! */ 575 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 576 aprint_error("no media present!\n"); 577 ifmedia_add(ifm, IFM_ETHER | IFM_NONE, 0, NULL); 578 ifmedia_set(ifm, IFM_ETHER | IFM_NONE); 579 return; 580 } 581 582 /* 583 * Get the default media from the EEPROM. 584 */ 585 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 586 587 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 588 589 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 590 if (ep_w0_config & epm->epm_mpbit) { 591 /* 592 * This simple test works because 509 chipsets 593 * don't do full-duplex. 594 */ 595 if (epm->epm_epmedia == port || defmedia == 0) { 596 defmedia = epm->epm_ifmedia; 597 defmedianame = epm->epm_name; 598 } 599 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 600 NULL); 601 PRINT(epm->epm_name); 602 } 603 } 604 605 #undef PRINT 606 607 #ifdef DIAGNOSTIC 608 if (defmedia == 0) 609 panic("ep_509_probemedia: impossible"); 610 #endif 611 612 aprint_normal(" (default %s)\n", defmedianame); 613 ifmedia_set(ifm, defmedia); 614 } 615 616 /* 617 * Find media present on large-packet-capable elink3 devices. 618 * Show onboard configuration of large-packet-capable elink3 devices 619 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 620 * Use media and card-version info in window 3 instead. 621 */ 622 void 623 ep_vortex_probemedia(struct ep_softc *sc) 624 { 625 bus_space_tag_t iot = sc->sc_iot; 626 bus_space_handle_t ioh = sc->sc_ioh; 627 struct ifmedia *ifm = &sc->sc_mii.mii_media; 628 const struct ep_media *epm; 629 u_int config1; 630 int reset_options; 631 int default_media; /* 3-bit encoding of default (EEPROM) media */ 632 int defmedia = 0; 633 const char *sep = "", *defmedianame = NULL; 634 635 GO_WINDOW(3); 636 config1 = (u_int)bus_space_read_2(iot, ioh, 637 ELINK_W3_INTERNAL_CONFIG + 2); 638 reset_options = (int)bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 639 GO_WINDOW(0); 640 641 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 642 643 aprint_normal_dev(sc->sc_dev, ""); 644 645 /* Sanity check that there are any media! */ 646 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 647 aprint_error("no media present!\n"); 648 ifmedia_add(ifm, IFM_ETHER | IFM_NONE, 0, NULL); 649 ifmedia_set(ifm, IFM_ETHER | IFM_NONE); 650 return; 651 } 652 653 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 654 655 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 656 if (reset_options & epm->epm_mpbit) { 657 /* 658 * Default media is a little more complicated 659 * on the Vortex. We support full-duplex which 660 * uses the same reset options bit. 661 * 662 * XXX Check EEPROM for default to FDX? 663 */ 664 if (epm->epm_epmedia == default_media) { 665 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 666 defmedia = epm->epm_ifmedia; 667 defmedianame = epm->epm_name; 668 } 669 } else if (defmedia == 0) { 670 defmedia = epm->epm_ifmedia; 671 defmedianame = epm->epm_name; 672 } 673 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 674 NULL); 675 PRINT(epm->epm_name); 676 } 677 } 678 679 #undef PRINT 680 681 #ifdef DIAGNOSTIC 682 if (defmedia == 0) 683 panic("ep_vortex_probemedia: impossible"); 684 #endif 685 686 aprint_normal(" (default %s)\n", defmedianame); 687 ifmedia_set(ifm, defmedia); 688 } 689 690 /* 691 * One second timer, used to tick the MII. 692 */ 693 void 694 ep_tick(void *arg) 695 { 696 struct ep_softc *sc = arg; 697 int s; 698 699 #ifdef DIAGNOSTIC 700 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 701 panic("ep_tick"); 702 #endif 703 704 if (!device_is_active(sc->sc_dev)) 705 return; 706 707 s = splnet(); 708 mii_tick(&sc->sc_mii); 709 splx(s); 710 711 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 712 } 713 714 /* 715 * Bring device up. 716 * 717 * The order in here seems important. Otherwise we may not receive 718 * interrupts. ?! 719 */ 720 int 721 epinit(struct ifnet *ifp) 722 { 723 struct ep_softc *sc = ifp->if_softc; 724 bus_space_tag_t iot = sc->sc_iot; 725 bus_space_handle_t ioh = sc->sc_ioh; 726 int i, error; 727 const u_int8_t *addr; 728 729 if (!sc->enabled && (error = epenable(sc)) != 0) 730 return (error); 731 732 /* Make sure any pending reset has completed before touching board */ 733 ep_finish_reset(iot, ioh); 734 735 /* 736 * Cancel any pending I/O. 737 */ 738 epstop(ifp, 0); 739 740 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 741 && sc->bustype != ELINK_BUS_MCA) { 742 GO_WINDOW(0); 743 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 744 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 745 ENABLE_DRQ_IRQ); 746 } 747 748 if (sc->bustype == ELINK_BUS_PCMCIA) { 749 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 750 } 751 752 GO_WINDOW(2); 753 /* Reload the ether_addr. */ 754 addr = CLLADDR(ifp->if_sadl); 755 for (i = 0; i < 6; i += 2) 756 bus_space_write_2(iot, ioh, ELINK_W2_ADDR_0 + i, 757 (addr[i] << 0) | (addr[i + 1] << 8)); 758 759 /* 760 * Reset the station-address receive filter. 761 * A bug workaround for busmastering (Vortex, Demon) cards. 762 */ 763 for (i = 0; i < 6; i += 2) 764 bus_space_write_2(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 765 766 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 767 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 768 769 GO_WINDOW(1); /* Window 1 is operating window */ 770 for (i = 0; i < 31; i++) 771 (void)bus_space_read_2(iot, ioh, 772 ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 773 774 /* Set threshold for Tx-space available interrupt. */ 775 bus_space_write_2(iot, ioh, ELINK_COMMAND, 776 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 777 778 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 779 /* 780 * Enable options in the PCMCIA LAN COR register, via 781 * RoadRunner Window 1. 782 * 783 * XXX MAGIC CONSTANTS! 784 */ 785 u_int16_t cor; 786 787 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 788 789 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 790 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 791 cor |= 0x10; 792 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 793 cor |= 0x20; 794 bus_space_write_2(iot, ioh, 0, cor); 795 796 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 797 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 798 799 if (sc->ep_flags & ELINK_FLAGS_MII) { 800 ep_roadrunner_mii_enable(sc); 801 GO_WINDOW(1); 802 } 803 } 804 805 /* Enable interrupts. */ 806 bus_space_write_2(iot, ioh, ELINK_COMMAND, 807 SET_RD_0_MASK | WATCHED_INTERRUPTS); 808 bus_space_write_2(iot, ioh, ELINK_COMMAND, 809 SET_INTR_MASK | WATCHED_INTERRUPTS); 810 811 /* 812 * Attempt to get rid of any stray interrupts that occurred during 813 * configuration. On the i386 this isn't possible because one may 814 * already be queued. However, a single stray interrupt is 815 * unimportant. 816 */ 817 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 818 819 epsetfilter(sc); 820 epsetmedia(sc); 821 822 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 823 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 824 825 epmbuffill(sc); 826 827 /* Interface is now `running', with no output active. */ 828 ifp->if_flags |= IFF_RUNNING; 829 ifp->if_flags &= ~IFF_OACTIVE; 830 831 if (sc->ep_flags & ELINK_FLAGS_MII) { 832 /* Start the one second clock. */ 833 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 834 } 835 836 /* Attempt to start output, if any. */ 837 epstart(ifp); 838 839 return (0); 840 } 841 842 843 /* 844 * Set multicast receive filter. 845 * elink3 hardware has no selective multicast filter in hardware. 846 * Enable reception of all multicasts and filter in software. 847 */ 848 void 849 epsetfilter(struct ep_softc *sc) 850 { 851 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 852 853 GO_WINDOW(1); /* Window 1 is operating window */ 854 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 855 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 856 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 857 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 858 } 859 860 int 861 ep_media_change(struct ifnet *ifp) 862 { 863 struct ep_softc *sc = ifp->if_softc; 864 865 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 866 epreset(sc); 867 868 return (0); 869 } 870 871 /* 872 * Reset and enable the MII on the RoadRunner. 873 */ 874 void 875 ep_roadrunner_mii_enable(struct ep_softc *sc) 876 { 877 bus_space_tag_t iot = sc->sc_iot; 878 bus_space_handle_t ioh = sc->sc_ioh; 879 880 GO_WINDOW(3); 881 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 882 ELINK_PCI_100BASE_MII | ELINK_RUNNER_ENABLE_MII); 883 delay(1000); 884 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 885 ELINK_PCI_100BASE_MII | ELINK_RUNNER_MII_RESET | 886 ELINK_RUNNER_ENABLE_MII); 887 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 888 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 889 delay(1000); 890 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 891 ELINK_PCI_100BASE_MII | ELINK_RUNNER_ENABLE_MII); 892 } 893 894 /* 895 * Set the card to use the specified media. 896 */ 897 void 898 epsetmedia(struct ep_softc *sc) 899 { 900 bus_space_tag_t iot = sc->sc_iot; 901 bus_space_handle_t ioh = sc->sc_ioh; 902 903 /* Turn everything off. First turn off linkbeat and UTP. */ 904 GO_WINDOW(4); 905 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 906 907 /* Turn off coax */ 908 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 909 delay(1000); 910 911 /* 912 * If the device has MII, select it, and then tell the 913 * PHY which media to use. 914 */ 915 if (sc->ep_flags & ELINK_FLAGS_MII) { 916 int config0, config1; 917 918 GO_WINDOW(3); 919 920 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 921 int resopt; 922 923 resopt = bus_space_read_2(iot, ioh, 924 ELINK_W3_RESET_OPTIONS); 925 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 926 resopt | ELINK_RUNNER_ENABLE_MII); 927 } 928 929 config0 = (u_int)bus_space_read_2(iot, ioh, 930 ELINK_W3_INTERNAL_CONFIG); 931 config1 = (u_int)bus_space_read_2(iot, ioh, 932 ELINK_W3_INTERNAL_CONFIG + 2); 933 934 config1 = config1 & ~CONFIG_MEDIAMASK; 935 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 936 937 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 938 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 939 config1); 940 GO_WINDOW(1); /* back to operating window */ 941 942 mii_mediachg(&sc->sc_mii); 943 return; 944 } 945 946 /* 947 * Now turn on the selected media/transceiver. 948 */ 949 GO_WINDOW(4); 950 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 951 case IFM_10_T: 952 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 953 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 954 break; 955 956 case IFM_10_2: 957 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 958 DELAY(1000); /* 50ms not enmough? */ 959 break; 960 961 case IFM_100_TX: 962 case IFM_100_FX: 963 case IFM_100_T4: /* XXX check documentation */ 964 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 965 LINKBEAT_ENABLE); 966 DELAY(1000); /* not strictly necessary? */ 967 break; 968 969 case IFM_10_5: 970 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 971 SQE_ENABLE); 972 DELAY(1000); /* not strictly necessary? */ 973 break; 974 975 case IFM_MANUAL: 976 /* 977 * Nothing to do here; we are actually enabling the 978 * external PHY on the MII port. 979 */ 980 break; 981 982 case IFM_NONE: 983 printf("%s: interface disabled\n", device_xname(sc->sc_dev)); 984 return; 985 986 default: 987 panic("epsetmedia: impossible"); 988 } 989 990 /* 991 * Tell the chip which port to use. 992 */ 993 switch (sc->ep_chipset) { 994 case ELINK_CHIPSET_VORTEX: 995 case ELINK_CHIPSET_BOOMERANG: 996 { 997 int mctl, config0, config1; 998 999 GO_WINDOW(3); 1000 config0 = (u_int)bus_space_read_2(iot, ioh, 1001 ELINK_W3_INTERNAL_CONFIG); 1002 config1 = (u_int)bus_space_read_2(iot, ioh, 1003 ELINK_W3_INTERNAL_CONFIG + 2); 1004 1005 config1 = config1 & ~CONFIG_MEDIAMASK; 1006 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1007 CONFIG_MEDIAMASK_SHIFT); 1008 1009 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1010 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1011 config1); 1012 1013 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1014 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1015 mctl |= MAC_CONTROL_FDX; 1016 else 1017 mctl &= ~MAC_CONTROL_FDX; 1018 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1019 break; 1020 } 1021 default: 1022 { 1023 int w0_addr_cfg; 1024 1025 GO_WINDOW(0); 1026 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1027 w0_addr_cfg &= 0x3fff; 1028 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1029 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1030 DELAY(1000); 1031 break; 1032 } 1033 } 1034 1035 GO_WINDOW(1); /* Window 1 is operating window */ 1036 } 1037 1038 /* 1039 * Get currently-selected media from card. 1040 * (if_media callback, may be called before interface is brought up). 1041 */ 1042 void 1043 ep_media_status(struct ifnet *ifp, struct ifmediareq *req) 1044 { 1045 struct ep_softc *sc = ifp->if_softc; 1046 bus_space_tag_t iot = sc->sc_iot; 1047 bus_space_handle_t ioh = sc->sc_ioh; 1048 1049 if (sc->enabled == 0) { 1050 req->ifm_active = IFM_ETHER | IFM_NONE; 1051 req->ifm_status = 0; 1052 return; 1053 } 1054 1055 /* 1056 * If we have MII, go ask the PHY what's going on. 1057 */ 1058 if (sc->ep_flags & ELINK_FLAGS_MII) { 1059 mii_pollstat(&sc->sc_mii); 1060 req->ifm_active = sc->sc_mii.mii_media_active; 1061 req->ifm_status = sc->sc_mii.mii_media_status; 1062 return; 1063 } 1064 1065 /* 1066 * Ok, at this point we claim that our active media is 1067 * the currently selected media. We'll update our status 1068 * if our chipset allows us to detect link. 1069 */ 1070 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1071 req->ifm_status = 0; 1072 1073 switch (sc->ep_chipset) { 1074 case ELINK_CHIPSET_VORTEX: 1075 case ELINK_CHIPSET_BOOMERANG: 1076 GO_WINDOW(4); 1077 req->ifm_status = IFM_AVALID; 1078 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1079 LINKBEAT_DETECT) 1080 req->ifm_status |= IFM_ACTIVE; 1081 GO_WINDOW(1); /* back to operating window */ 1082 break; 1083 } 1084 } 1085 1086 1087 1088 /* 1089 * Start outputting on the interface. 1090 * Always called as splnet(). 1091 */ 1092 void 1093 epstart(struct ifnet *ifp) 1094 { 1095 struct ep_softc *sc = ifp->if_softc; 1096 bus_space_tag_t iot = sc->sc_iot; 1097 bus_space_handle_t ioh = sc->sc_ioh; 1098 struct mbuf *m, *m0; 1099 int sh, len, pad; 1100 bus_size_t txreg; 1101 1102 /* Don't transmit if interface is busy or not running */ 1103 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1104 return; 1105 1106 startagain: 1107 /* Sneak a peek at the next packet */ 1108 IFQ_POLL(&ifp->if_snd, m0); 1109 if (m0 == 0) 1110 return; 1111 1112 /* We need to use m->m_pkthdr.len, so require the header */ 1113 if ((m0->m_flags & M_PKTHDR) == 0) 1114 panic("epstart: no header mbuf"); 1115 len = m0->m_pkthdr.len; 1116 1117 pad = (4 - len) & 3; 1118 1119 /* 1120 * The 3c509 automatically pads short packets to minimum ethernet 1121 * length, but we drop packets that are too large. Perhaps we should 1122 * truncate them instead? 1123 */ 1124 if (len + pad > ETHER_MAX_LEN) { 1125 /* packet is obviously too large: toss it */ 1126 if_statinc(ifp, if_oerrors); 1127 IFQ_DEQUEUE(&ifp->if_snd, m0); 1128 m_freem(m0); 1129 goto readcheck; 1130 } 1131 1132 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1133 len + pad + 4) { 1134 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1135 SET_TX_AVAIL_THRESH | 1136 ((len + pad + 4) >> sc->ep_pktlenshift)); 1137 /* not enough room in FIFO */ 1138 ifp->if_flags |= IFF_OACTIVE; 1139 return; 1140 } else { 1141 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1142 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1143 } 1144 1145 IFQ_DEQUEUE(&ifp->if_snd, m0); 1146 if (m0 == 0) /* not really needed */ 1147 return; 1148 1149 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1150 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1151 1152 bpf_mtap(ifp, m0, BPF_D_OUT); 1153 1154 /* 1155 * Do the output at a high interrupt priority level so that an 1156 * interrupt from another device won't cause a FIFO underrun. 1157 * We choose splsched() since that blocks essentially everything 1158 * except for interrupts from serial devices (which typically 1159 * lose data if their interrupt isn't serviced fast enough). 1160 * 1161 * XXX THIS CAN CAUSE CLOCK DRIFT! 1162 */ 1163 sh = splsched(); 1164 1165 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1166 1167 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1168 /* 1169 * Prime the FIFO buffer counter (number of 16-bit 1170 * words about to be written to the FIFO). 1171 * 1172 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1173 * COUNTER IS NON-ZERO! 1174 */ 1175 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1176 (len + pad) >> 1); 1177 } 1178 1179 bus_space_write_2(iot, ioh, txreg, len); 1180 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1181 if (ELINK_IS_BUS_32(sc->bustype)) { 1182 for (m = m0; m;) { 1183 if (m->m_len > 3) { 1184 /* align our reads from core */ 1185 if (mtod(m, u_long) & 3) { 1186 u_long count = 1187 4 - (mtod(m, u_long) & 3); 1188 bus_space_write_multi_1(iot, ioh, 1189 txreg, mtod(m, u_int8_t *), count); 1190 m->m_data = 1191 (void *)(mtod(m, u_long) + count); 1192 m->m_len -= count; 1193 } 1194 bus_space_write_multi_stream_4(iot, ioh, 1195 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1196 m->m_data = (void *)(mtod(m, u_long) + 1197 (u_long)(m->m_len & ~3)); 1198 m->m_len -= m->m_len & ~3; 1199 } 1200 if (m->m_len) { 1201 bus_space_write_multi_1(iot, ioh, 1202 txreg, mtod(m, u_int8_t *), m->m_len); 1203 } 1204 m = m0 = m_free(m); 1205 } 1206 } else { 1207 for (m = m0; m;) { 1208 if (m->m_len > 1) { 1209 if (mtod(m, u_long) & 1) { 1210 bus_space_write_1(iot, ioh, 1211 txreg, *(mtod(m, u_int8_t *))); 1212 m->m_data = 1213 (void *)(mtod(m, u_long) + 1); 1214 m->m_len -= 1; 1215 } 1216 bus_space_write_multi_stream_2(iot, ioh, 1217 txreg, mtod(m, u_int16_t *), 1218 m->m_len >> 1); 1219 } 1220 if (m->m_len & 1) { 1221 bus_space_write_1(iot, ioh, txreg, 1222 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1223 } 1224 m = m0 = m_free(m); 1225 } 1226 } 1227 while (pad--) 1228 bus_space_write_1(iot, ioh, txreg, 0); 1229 1230 splx(sh); 1231 1232 if_statinc(ifp, if_opackets); 1233 1234 readcheck: 1235 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1236 ERR_INCOMPLETE) == 0) { 1237 /* We received a complete packet. */ 1238 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1239 1240 if ((status & INTR_LATCH) == 0) { 1241 /* 1242 * No interrupt, read the packet and continue 1243 * Is this supposed to happen? Is my motherboard 1244 * completely busted? 1245 */ 1246 epread(sc); 1247 } else { 1248 /* Got an interrupt, return so that it gets serviced. */ 1249 return; 1250 } 1251 } else { 1252 /* Check if we are stuck and reset [see XXX comment] */ 1253 if (epstatus(sc)) { 1254 if (ifp->if_flags & IFF_DEBUG) 1255 printf("%s: adapter reset\n", 1256 device_xname(sc->sc_dev)); 1257 epreset(sc); 1258 } 1259 } 1260 1261 goto startagain; 1262 } 1263 1264 1265 /* 1266 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1267 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1268 * We detect this situation and we reset the adapter. 1269 * It happens at times when there is a lot of broadcast traffic 1270 * on the cable (once in a blue moon). 1271 */ 1272 static int 1273 epstatus(struct ep_softc *sc) 1274 { 1275 bus_space_tag_t iot = sc->sc_iot; 1276 bus_space_handle_t ioh = sc->sc_ioh; 1277 u_int16_t fifost; 1278 1279 /* 1280 * Check the FIFO status and act accordingly 1281 */ 1282 GO_WINDOW(4); 1283 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1284 GO_WINDOW(1); 1285 1286 if (fifost & FIFOS_RX_UNDERRUN) { 1287 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1288 printf("%s: RX underrun\n", device_xname(sc->sc_dev)); 1289 epreset(sc); 1290 return 0; 1291 } 1292 1293 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1294 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1295 printf("%s: RX Status overrun\n", device_xname(sc->sc_dev)); 1296 return 1; 1297 } 1298 1299 if (fifost & FIFOS_RX_OVERRUN) { 1300 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1301 printf("%s: RX overrun\n", device_xname(sc->sc_dev)); 1302 return 1; 1303 } 1304 1305 if (fifost & FIFOS_TX_OVERRUN) { 1306 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1307 printf("%s: TX overrun\n", device_xname(sc->sc_dev)); 1308 epreset(sc); 1309 return 0; 1310 } 1311 1312 return 0; 1313 } 1314 1315 1316 static void 1317 eptxstat(struct ep_softc *sc) 1318 { 1319 bus_space_tag_t iot = sc->sc_iot; 1320 bus_space_handle_t ioh = sc->sc_ioh; 1321 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1322 int i; 1323 1324 /* 1325 * We need to read+write TX_STATUS until we get a 0 status 1326 * in order to turn off the interrupt flag. 1327 */ 1328 while ((i = bus_space_read_2(iot, ioh, 1329 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1330 bus_space_write_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1331 0x0); 1332 1333 if (i & TXS_JABBER) { 1334 if_statinc(ifp, if_oerrors); 1335 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1336 printf("%s: jabber (%x)\n", 1337 device_xname(sc->sc_dev), i); 1338 epreset(sc); 1339 } else if (i & TXS_UNDERRUN) { 1340 if_statinc(ifp, if_oerrors); 1341 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1342 printf("%s: fifo underrun (%x) @%d\n", 1343 device_xname(sc->sc_dev), i, 1344 sc->tx_start_thresh); 1345 if (sc->tx_succ_ok < 100) 1346 sc->tx_start_thresh = uimin(ETHER_MAX_LEN, 1347 sc->tx_start_thresh + 20); 1348 sc->tx_succ_ok = 0; 1349 epreset(sc); 1350 } else if (i & TXS_MAX_COLLISION) { 1351 if_statinc(ifp, if_collisions); 1352 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1353 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1354 } else 1355 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1356 } 1357 } 1358 1359 int 1360 epintr(void *arg) 1361 { 1362 struct ep_softc *sc = arg; 1363 bus_space_tag_t iot = sc->sc_iot; 1364 bus_space_handle_t ioh = sc->sc_ioh; 1365 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1366 u_int16_t status; 1367 int ret = 0; 1368 1369 if (sc->enabled == 0 || !device_is_active(sc->sc_dev)) 1370 return (0); 1371 1372 1373 for (;;) { 1374 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1375 1376 if ((status & WATCHED_INTERRUPTS) == 0) { 1377 if ((status & INTR_LATCH) == 0) { 1378 #if 0 1379 printf("%s: intr latch cleared\n", 1380 device_xname(sc->sc_dev)); 1381 #endif 1382 break; 1383 } 1384 } 1385 1386 ret = 1; 1387 1388 /* 1389 * Acknowledge any interrupts. It's important that we do this 1390 * first, since there would otherwise be a race condition. 1391 * Due to the i386 interrupt queueing, we may get spurious 1392 * interrupts occasionally. 1393 */ 1394 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1395 (status & (INTR_LATCH | ALL_INTERRUPTS))); 1396 1397 #if 0 1398 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1399 1400 printf("%s: intr%s%s%s%s\n", device_xname(sc->sc_dev), 1401 (status & RX_COMPLETE)?" RX_COMPLETE":"", 1402 (status & TX_COMPLETE)?" TX_COMPLETE":"", 1403 (status & TX_AVAIL)?" TX_AVAIL":"", 1404 (status & CARD_FAILURE)?" CARD_FAILURE":""); 1405 #endif 1406 1407 if (status & RX_COMPLETE) { 1408 epread(sc); 1409 } 1410 if (status & TX_AVAIL) { 1411 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1412 epstart(&sc->sc_ethercom.ec_if); 1413 } 1414 if (status & CARD_FAILURE) { 1415 printf("%s: adapter failure (%x)\n", 1416 device_xname(sc->sc_dev), status); 1417 #if 1 1418 epinit(ifp); 1419 #else 1420 epreset(sc); 1421 #endif 1422 return (1); 1423 } 1424 if (status & TX_COMPLETE) { 1425 eptxstat(sc); 1426 epstart(ifp); 1427 } 1428 1429 if (status) 1430 rnd_add_uint32(&sc->rnd_source, status); 1431 } 1432 1433 /* no more interrupts */ 1434 return (ret); 1435 } 1436 1437 void 1438 epread(struct ep_softc *sc) 1439 { 1440 bus_space_tag_t iot = sc->sc_iot; 1441 bus_space_handle_t ioh = sc->sc_ioh; 1442 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1443 struct mbuf *m; 1444 int len; 1445 1446 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1447 1448 again: 1449 if (ifp->if_flags & IFF_DEBUG) { 1450 int err = len & ERR_MASK; 1451 const char *s = NULL; 1452 1453 if (len & ERR_INCOMPLETE) 1454 s = "incomplete packet"; 1455 else if (err == ERR_OVERRUN) 1456 s = "packet overrun"; 1457 else if (err == ERR_RUNT) 1458 s = "runt packet"; 1459 else if (err == ERR_ALIGNMENT) 1460 s = "bad alignment"; 1461 else if (err == ERR_CRC) 1462 s = "bad crc"; 1463 else if (err == ERR_OVERSIZE) 1464 s = "oversized packet"; 1465 else if (err == ERR_DRIBBLE) 1466 s = "dribble bits"; 1467 1468 if (s) 1469 printf("%s: %s\n", device_xname(sc->sc_dev), s); 1470 } 1471 1472 if (len & ERR_INCOMPLETE) 1473 return; 1474 1475 if (len & ERR_RX) { 1476 if_statinc(ifp, if_ierrors); 1477 goto abort; 1478 } 1479 1480 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1481 1482 /* Pull packet off interface. */ 1483 m = epget(sc, len); 1484 if (m == 0) { 1485 if_statinc(ifp, if_ierrors); 1486 goto abort; 1487 } 1488 1489 if_percpuq_enqueue(ifp->if_percpuq, m); 1490 1491 /* 1492 * In periods of high traffic we can actually receive enough 1493 * packets so that the fifo overrun bit will be set at this point, 1494 * even though we just read a packet. In this case we 1495 * are not going to receive any more interrupts. We check for 1496 * this condition and read again until the fifo is not full. 1497 * We could simplify this test by not using epstatus(), but 1498 * rechecking the RX_STATUS register directly. This test could 1499 * result in unnecessary looping in cases where there is a new 1500 * packet but the fifo is not full, but it will not fix the 1501 * stuck behavior. 1502 * 1503 * Even with this improvement, we still get packet overrun errors 1504 * which are hurting performance. Maybe when I get some more time 1505 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1506 */ 1507 if (epstatus(sc)) { 1508 len = bus_space_read_2(iot, ioh, 1509 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1510 /* Check if we are stuck and reset [see XXX comment] */ 1511 if (len & ERR_INCOMPLETE) { 1512 if (ifp->if_flags & IFF_DEBUG) 1513 printf("%s: adapter reset\n", 1514 device_xname(sc->sc_dev)); 1515 epreset(sc); 1516 return; 1517 } 1518 goto again; 1519 } 1520 1521 return; 1522 1523 abort: 1524 ep_discard_rxtop(iot, ioh); 1525 1526 } 1527 1528 struct mbuf * 1529 epget(struct ep_softc *sc, int totlen) 1530 { 1531 bus_space_tag_t iot = sc->sc_iot; 1532 bus_space_handle_t ioh = sc->sc_ioh; 1533 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1534 struct mbuf *m; 1535 bus_size_t rxreg; 1536 int len, remaining; 1537 int s; 1538 void *newdata; 1539 u_long offset; 1540 1541 m = sc->mb[sc->next_mb]; 1542 sc->mb[sc->next_mb] = 0; 1543 if (m == 0) { 1544 MGETHDR(m, M_DONTWAIT, MT_DATA); 1545 if (m == 0) 1546 return 0; 1547 } else { 1548 /* If the queue is no longer full, refill. */ 1549 if (sc->last_mb == sc->next_mb) 1550 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1551 1552 /* Convert one of our saved mbuf's. */ 1553 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1554 m->m_data = m->m_pktdat; 1555 m->m_flags = M_PKTHDR; 1556 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr)); 1557 } 1558 m_set_rcvif(m, ifp); 1559 m->m_pkthdr.len = totlen; 1560 len = MHLEN; 1561 1562 /* 1563 * Allocate big enough space to hold whole packet, to avoid 1564 * allocating new mbufs on splsched(). 1565 */ 1566 if (totlen + ALIGNBYTES > len) { 1567 if (totlen + ALIGNBYTES > MCLBYTES) { 1568 len = ALIGN(totlen + ALIGNBYTES); 1569 MEXTMALLOC(m, len, M_DONTWAIT); 1570 } else { 1571 len = MCLBYTES; 1572 MCLGET(m, M_DONTWAIT); 1573 } 1574 if ((m->m_flags & M_EXT) == 0) { 1575 m_free(m); 1576 return 0; 1577 } 1578 } 1579 1580 /* align the struct ip header */ 1581 newdata = (char *)ALIGN(m->m_data + sizeof(struct ether_header)) 1582 - sizeof(struct ether_header); 1583 m->m_data = newdata; 1584 m->m_len = totlen; 1585 1586 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1587 remaining = totlen; 1588 offset = mtod(m, u_long); 1589 1590 /* 1591 * We read the packet at a high interrupt priority level so that 1592 * an interrupt from another device won't cause the card's packet 1593 * buffer to overflow. We choose splsched() since that blocks 1594 * essentially everything except for interrupts from serial 1595 * devices (which typically lose data if their interrupt isn't 1596 * serviced fast enough). 1597 * 1598 * XXX THIS CAN CAUSE CLOCK DRIFT! 1599 */ 1600 s = splsched(); 1601 1602 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1603 /* 1604 * Prime the FIFO buffer counter (number of 16-bit 1605 * words about to be read from the FIFO). 1606 * 1607 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1608 * COUNTER IS NON-ZERO! 1609 */ 1610 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1611 } 1612 1613 if (ELINK_IS_BUS_32(sc->bustype)) { 1614 /* 1615 * Read bytes up to the point where we are aligned. 1616 * (We can align to 4 bytes, rather than ALIGNBYTES, 1617 * here because we're later reading 4-byte chunks.) 1618 */ 1619 if ((remaining > 3) && (offset & 3)) { 1620 int count = (4 - (offset & 3)); 1621 bus_space_read_multi_1(iot, ioh, 1622 rxreg, (u_int8_t *) offset, count); 1623 offset += count; 1624 remaining -= count; 1625 } 1626 if (remaining > 3) { 1627 bus_space_read_multi_stream_4(iot, ioh, 1628 rxreg, (u_int32_t *) offset, 1629 remaining >> 2); 1630 offset += remaining & ~3; 1631 remaining &= 3; 1632 } 1633 if (remaining) { 1634 bus_space_read_multi_1(iot, ioh, 1635 rxreg, (u_int8_t *) offset, remaining); 1636 } 1637 } else { 1638 if ((remaining > 1) && (offset & 1)) { 1639 bus_space_read_multi_1(iot, ioh, 1640 rxreg, (u_int8_t *) offset, 1); 1641 remaining -= 1; 1642 offset += 1; 1643 } 1644 if (remaining > 1) { 1645 bus_space_read_multi_stream_2(iot, ioh, 1646 rxreg, (u_int16_t *) offset, 1647 remaining >> 1); 1648 offset += remaining & ~1; 1649 } 1650 if (remaining & 1) { 1651 bus_space_read_multi_1(iot, ioh, 1652 rxreg, (u_int8_t *) offset, remaining & 1); 1653 } 1654 } 1655 1656 ep_discard_rxtop(iot, ioh); 1657 1658 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1659 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1660 splx(s); 1661 1662 return (m); 1663 } 1664 1665 int 1666 epioctl(struct ifnet *ifp, u_long cmd, void *data) 1667 { 1668 struct ep_softc *sc = ifp->if_softc; 1669 int s, error = 0; 1670 1671 s = splnet(); 1672 1673 switch (cmd) { 1674 case SIOCADDMULTI: 1675 case SIOCDELMULTI: 1676 if (sc->enabled == 0) { 1677 error = EIO; 1678 break; 1679 } 1680 1681 /* FALLTHROUGH */ 1682 default: 1683 error = ether_ioctl(ifp, cmd, data); 1684 1685 if (error == ENETRESET) { 1686 /* 1687 * Multicast list has changed; set the hardware filter 1688 * accordingly. 1689 */ 1690 if (ifp->if_flags & IFF_RUNNING) 1691 epreset(sc); 1692 error = 0; 1693 } 1694 break; 1695 } 1696 1697 splx(s); 1698 return (error); 1699 } 1700 1701 void 1702 epreset(struct ep_softc *sc) 1703 { 1704 int s; 1705 1706 s = splnet(); 1707 epinit(&sc->sc_ethercom.ec_if); 1708 splx(s); 1709 } 1710 1711 void 1712 epwatchdog(struct ifnet *ifp) 1713 { 1714 struct ep_softc *sc = ifp->if_softc; 1715 1716 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev)); 1717 if_statinc(ifp, if_oerrors); 1718 1719 epreset(sc); 1720 } 1721 1722 void 1723 epstop(struct ifnet *ifp, int disable) 1724 { 1725 struct ep_softc *sc = ifp->if_softc; 1726 bus_space_tag_t iot = sc->sc_iot; 1727 bus_space_handle_t ioh = sc->sc_ioh; 1728 1729 if (sc->ep_flags & ELINK_FLAGS_MII) { 1730 /* Stop the one second clock. */ 1731 callout_stop(&sc->sc_mbuf_callout); 1732 1733 /* Down the MII. */ 1734 mii_down(&sc->sc_mii); 1735 } 1736 1737 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1738 /* 1739 * Clear the FIFO buffer count, thus halting 1740 * any currently-running transactions. 1741 */ 1742 GO_WINDOW(1); /* sanity */ 1743 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1744 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1745 } 1746 1747 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1748 ep_discard_rxtop(iot, ioh); 1749 1750 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1751 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1752 1753 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1754 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1755 1756 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1757 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1758 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1759 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1760 1761 epmbufempty(sc); 1762 1763 if (disable) 1764 epdisable(sc); 1765 1766 ifp->if_flags &= ~IFF_RUNNING; 1767 } 1768 1769 1770 /* 1771 * Before reboots, reset card completely. 1772 */ 1773 static bool 1774 epshutdown(device_t self, int howto) 1775 { 1776 struct ep_softc *sc = device_private(self); 1777 int s = splnet(); 1778 1779 if (sc->enabled) { 1780 epstop(&sc->sc_ethercom.ec_if, 0); 1781 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1782 epdisable(sc); 1783 sc->enabled = 0; 1784 } 1785 splx(s); 1786 1787 return true; 1788 } 1789 1790 /* 1791 * We get eeprom data from the id_port given an offset into the 1792 * eeprom. Basically; after the ID_sequence is sent to all of 1793 * the cards; they enter the ID_CMD state where they will accept 1794 * command requests. 0x80-0xbf loads the eeprom data. We then 1795 * read the port 16 times and with every read; the cards check 1796 * for contention (ie: if one card writes a 0 bit and another 1797 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1798 * each card compares the data on the bus; if there is a difference 1799 * then that card goes into ID_WAIT state again). In the meantime; 1800 * one bit of data is returned in the AX register which is conveniently 1801 * returned to us by bus_space_read_2(). Hence; we read 16 times getting one 1802 * bit of data with each read. 1803 * 1804 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1805 */ 1806 u_int16_t 1807 epreadeeprom(bus_space_tag_t iot, bus_space_handle_t ioh, int offset) 1808 { 1809 u_int16_t data = 0; 1810 int i; 1811 1812 bus_space_write_2(iot, ioh, 0, 0x80 + offset); 1813 delay(1000); 1814 for (i = 0; i < 16; i++) 1815 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1816 return (data); 1817 } 1818 1819 static int 1820 epbusyeeprom(struct ep_softc *sc) 1821 { 1822 bus_space_tag_t iot = sc->sc_iot; 1823 bus_space_handle_t ioh = sc->sc_ioh; 1824 bus_size_t eecmd; 1825 int i = 100, j; 1826 uint16_t busybit; 1827 1828 if (sc->bustype == ELINK_BUS_PCMCIA) { 1829 delay(1000); 1830 return 0; 1831 } 1832 1833 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1834 eecmd = CORK_ASIC_EEPROM_COMMAND; 1835 busybit = CORK_EEPROM_BUSY; 1836 } else { 1837 eecmd = ELINK_W0_EEPROM_COMMAND; 1838 busybit = EEPROM_BUSY; 1839 } 1840 1841 j = 0; /* bad GCC flow analysis */ 1842 while (i--) { 1843 j = bus_space_read_2(iot, ioh, eecmd); 1844 if (j & busybit) 1845 delay(100); 1846 else 1847 break; 1848 } 1849 if (i == 0) { 1850 aprint_normal("\n"); 1851 aprint_error_dev(sc->sc_dev, "eeprom failed to come ready\n"); 1852 return (1); 1853 } 1854 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW && 1855 (j & EEPROM_TST_MODE) != 0) { 1856 /* XXX PnP mode? */ 1857 printf("\n%s: erase pencil mark!\n", device_xname(sc->sc_dev)); 1858 return (1); 1859 } 1860 return (0); 1861 } 1862 1863 u_int16_t 1864 ep_read_eeprom(struct ep_softc *sc, u_int16_t offset) 1865 { 1866 bus_size_t eecmd, eedata; 1867 u_int16_t readcmd; 1868 1869 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1870 eecmd = CORK_ASIC_EEPROM_COMMAND; 1871 eedata = CORK_ASIC_EEPROM_DATA; 1872 } else { 1873 eecmd = ELINK_W0_EEPROM_COMMAND; 1874 eedata = ELINK_W0_EEPROM_DATA; 1875 } 1876 1877 /* 1878 * RoadRunner has a larger EEPROM, so a different read command 1879 * is required. 1880 */ 1881 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1882 readcmd = READ_EEPROM_RR; 1883 else 1884 readcmd = READ_EEPROM; 1885 1886 if (epbusyeeprom(sc)) 1887 return (0); /* XXX why is eeprom busy? */ 1888 1889 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset); 1890 1891 if (epbusyeeprom(sc)) 1892 return (0); /* XXX why is eeprom busy? */ 1893 1894 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata)); 1895 } 1896 1897 void 1898 epmbuffill(void *v) 1899 { 1900 struct ep_softc *sc = v; 1901 struct mbuf *m; 1902 int s, i; 1903 1904 s = splnet(); 1905 i = sc->last_mb; 1906 do { 1907 if (sc->mb[i] == 0) { 1908 MGET(m, M_DONTWAIT, MT_DATA); 1909 if (m == 0) 1910 break; 1911 sc->mb[i] = m; 1912 } 1913 i = (i + 1) % MAX_MBS; 1914 } while (i != sc->next_mb); 1915 sc->last_mb = i; 1916 /* If the queue was not filled, try again. */ 1917 if (sc->last_mb != sc->next_mb) 1918 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1919 splx(s); 1920 } 1921 1922 void 1923 epmbufempty(struct ep_softc *sc) 1924 { 1925 int s, i; 1926 1927 s = splnet(); 1928 for (i = 0; i < MAX_MBS; i++) { 1929 if (sc->mb[i]) { 1930 m_freem(sc->mb[i]); 1931 sc->mb[i] = NULL; 1932 } 1933 } 1934 sc->last_mb = sc->next_mb = 0; 1935 callout_stop(&sc->sc_mbuf_callout); 1936 splx(s); 1937 } 1938 1939 int 1940 epenable(struct ep_softc *sc) 1941 { 1942 1943 if (sc->enabled == 0 && sc->enable != NULL) { 1944 if ((*sc->enable)(sc) != 0) { 1945 aprint_error_dev(sc->sc_dev, "device enable failed\n"); 1946 return (EIO); 1947 } 1948 } 1949 1950 sc->enabled = 1; 1951 return (0); 1952 } 1953 1954 void 1955 epdisable(struct ep_softc *sc) 1956 { 1957 1958 if (sc->enabled != 0 && sc->disable != NULL) { 1959 (*sc->disable)(sc); 1960 sc->enabled = 0; 1961 } 1962 } 1963 1964 /* 1965 * ep_activate: 1966 * 1967 * Handle device activation/deactivation requests. 1968 */ 1969 int 1970 ep_activate(device_t self, enum devact act) 1971 { 1972 struct ep_softc *sc = device_private(self); 1973 1974 switch (act) { 1975 case DVACT_DEACTIVATE: 1976 if_deactivate(&sc->sc_ethercom.ec_if); 1977 return 0; 1978 default: 1979 return EOPNOTSUPP; 1980 } 1981 } 1982 1983 /* 1984 * ep_detach: 1985 * 1986 * Detach a elink3 interface. 1987 */ 1988 int 1989 ep_detach(device_t self, int flags) 1990 { 1991 struct ep_softc *sc = device_private(self); 1992 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1993 1994 /* Succeed now if there's no work to do. */ 1995 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 1996 return (0); 1997 1998 epdisable(sc); 1999 2000 callout_stop(&sc->sc_mii_callout); 2001 callout_stop(&sc->sc_mbuf_callout); 2002 2003 if (sc->ep_flags & ELINK_FLAGS_MII) { 2004 /* Detach all PHYs */ 2005 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2006 } 2007 2008 rnd_detach_source(&sc->rnd_source); 2009 ether_ifdetach(ifp); 2010 if_detach(ifp); 2011 2012 /* Delete all remaining media. */ 2013 ifmedia_fini(&sc->sc_mii.mii_media); 2014 2015 pmf_device_deregister(sc->sc_dev); 2016 2017 return (0); 2018 } 2019 2020 u_int32_t 2021 ep_mii_bitbang_read(device_t self) 2022 { 2023 struct ep_softc *sc = device_private(self); 2024 2025 /* We're already in Window 4. */ 2026 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2027 ELINK_W4_BOOM_PHYSMGMT)); 2028 } 2029 2030 void 2031 ep_mii_bitbang_write(device_t self, u_int32_t val) 2032 { 2033 struct ep_softc *sc = device_private(self); 2034 2035 /* We're already in Window 4. */ 2036 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2037 ELINK_W4_BOOM_PHYSMGMT, val); 2038 } 2039 2040 int 2041 ep_mii_readreg(device_t self, int phy, int reg, uint16_t *val) 2042 { 2043 struct ep_softc *sc = device_private(self); 2044 int rv; 2045 2046 GO_WINDOW(4); 2047 2048 rv = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg, val); 2049 2050 GO_WINDOW(1); 2051 2052 return rv; 2053 } 2054 2055 int 2056 ep_mii_writereg(device_t self, int phy, int reg, uint16_t val) 2057 { 2058 struct ep_softc *sc = device_private(self); 2059 int rv; 2060 2061 GO_WINDOW(4); 2062 2063 rv = mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2064 2065 GO_WINDOW(1); 2066 2067 return rv; 2068 } 2069 2070 void 2071 ep_statchg(struct ifnet *ifp) 2072 { 2073 struct ep_softc *sc = ifp->if_softc; 2074 bus_space_tag_t iot = sc->sc_iot; 2075 bus_space_handle_t ioh = sc->sc_ioh; 2076 int mctl; 2077 2078 GO_WINDOW(3); 2079 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2080 if (sc->sc_mii.mii_media_active & IFM_FDX) 2081 mctl |= MAC_CONTROL_FDX; 2082 else 2083 mctl &= ~MAC_CONTROL_FDX; 2084 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2085 GO_WINDOW(1); /* back to operating window */ 2086 } 2087 2088 void 2089 ep_power(int why, void *arg) 2090 { 2091 struct ep_softc *sc = arg; 2092 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2093 int s; 2094 2095 s = splnet(); 2096 switch (why) { 2097 case PWR_SUSPEND: 2098 case PWR_STANDBY: 2099 epstop(ifp, 1); 2100 break; 2101 case PWR_RESUME: 2102 if (ifp->if_flags & IFF_UP) { 2103 (void)epinit(ifp); 2104 } 2105 break; 2106 case PWR_SOFTSUSPEND: 2107 case PWR_SOFTSTANDBY: 2108 case PWR_SOFTRESUME: 2109 break; 2110 } 2111 splx(s); 2112 } 2113
Indexes created Mon Sep 29 21:09:56 GMT 2025