elink3.c revision 1.55
1 /* $NetBSD: elink3.c,v 1.55 1999/04/13 20:23:52 jonathan Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include "opt_inet.h" 72 #include "opt_ns.h" 73 #include "bpfilter.h" 74 #include "rnd.h" 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/mbuf.h> 80 #include <sys/socket.h> 81 #include <sys/ioctl.h> 82 #include <sys/errno.h> 83 #include <sys/syslog.h> 84 #include <sys/select.h> 85 #include <sys/device.h> 86 #if NRND > 0 87 #include <sys/rnd.h> 88 #endif 89 90 #include <net/if.h> 91 #include <net/if_dl.h> 92 #include <net/if_ether.h> 93 #include <net/if_media.h> 94 95 #ifdef INET 96 #include <netinet/in.h> 97 #include <netinet/in_systm.h> 98 #include <netinet/in_var.h> 99 #include <netinet/ip.h> 100 #include <netinet/if_inarp.h> 101 #endif 102 103 #ifdef NS 104 #include <netns/ns.h> 105 #include <netns/ns_if.h> 106 #endif 107 108 #if NBPFILTER > 0 109 #include <net/bpf.h> 110 #include <net/bpfdesc.h> 111 #endif 112 113 #include <machine/cpu.h> 114 #include <machine/bus.h> 115 #include <machine/intr.h> 116 117 #include <dev/mii/mii.h> 118 #include <dev/mii/miivar.h> 119 120 #include <dev/ic/elink3var.h> 121 #include <dev/ic/elink3reg.h> 122 123 #ifdef DEBUG 124 int epdebug = 0; 125 #endif 126 127 /* 128 * XXX endian workaround for big-endian CPUs with pcmcia: 129 * if stream methods for bus_space_multi are not provided, define them 130 * using non-stream bus_space_{read,write}_multi_. 131 * Assumes host CPU is same endian-ness as bus. 132 */ 133 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 134 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 135 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 136 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 137 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 138 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 139 140 /* 141 * Structure to map media-present bits in boards to ifmedia codes and 142 * printable media names. Used for table-driven ifmedia initialization. 143 */ 144 struct ep_media { 145 int epm_mpbit; /* media present bit */ 146 const char *epm_name; /* name of medium */ 147 int epm_ifmedia; /* ifmedia word for medium */ 148 int epm_epmedia; /* ELINKMEDIA_* constant */ 149 }; 150 151 /* 152 * Media table for the Demon/Vortex/Boomerang chipsets. 153 * 154 * Note that MII on the Demon and Vortex (3c59x) indicates an external 155 * MII connector (for connecting an external PHY) ... I think. Treat 156 * it as `manual' on these chips. 157 * 158 * Any Boomerang (3c90x) chips with MII really do have an internal 159 * MII and real PHYs attached; no `native' media. 160 */ 161 struct ep_media ep_vortex_media[] = { 162 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 163 ELINKMEDIA_10BASE_T }, 164 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 165 ELINKMEDIA_10BASE_T }, 166 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 167 ELINKMEDIA_AUI }, 168 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 169 ELINKMEDIA_10BASE_2 }, 170 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 171 ELINKMEDIA_100BASE_TX }, 172 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 173 ELINKMEDIA_100BASE_TX }, 174 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 175 ELINKMEDIA_100BASE_FX }, 176 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 177 ELINKMEDIA_MII }, 178 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 179 ELINKMEDIA_100BASE_T4 }, 180 { 0, NULL, 0, 181 0 }, 182 }; 183 184 /* 185 * Media table for the older 3Com Etherlink III chipset, used 186 * in the 3c509, 3c579, and 3c589. 187 */ 188 struct ep_media ep_509_media[] = { 189 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 190 ELINKMEDIA_10BASE_T }, 191 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 192 ELINKMEDIA_AUI }, 193 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 194 ELINKMEDIA_10BASE_2 }, 195 { 0, NULL, 0, 196 0 }, 197 }; 198 199 void ep_internalconfig __P((struct ep_softc *sc)); 200 void ep_vortex_probemedia __P((struct ep_softc *sc)); 201 void ep_509_probemedia __P((struct ep_softc *sc)); 202 203 static void eptxstat __P((struct ep_softc *)); 204 static int epstatus __P((struct ep_softc *)); 205 void epinit __P((struct ep_softc *)); 206 int epioctl __P((struct ifnet *, u_long, caddr_t)); 207 void epstart __P((struct ifnet *)); 208 void epwatchdog __P((struct ifnet *)); 209 void epreset __P((struct ep_softc *)); 210 static void epshutdown __P((void *)); 211 void epread __P((struct ep_softc *)); 212 struct mbuf *epget __P((struct ep_softc *, int)); 213 void epmbuffill __P((void *)); 214 void epmbufempty __P((struct ep_softc *)); 215 void epsetfilter __P((struct ep_softc *)); 216 void epsetmedia __P((struct ep_softc *)); 217 218 /* ifmedia callbacks */ 219 int ep_media_change __P((struct ifnet *ifp)); 220 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 221 222 /* MII callbacks */ 223 int ep_mii_readreg __P((struct device *, int, int)); 224 void ep_mii_writereg __P((struct device *, int, int, int)); 225 void ep_statchg __P((struct device *)); 226 227 void ep_tick __P((void *)); 228 229 void ep_mii_setbit __P((struct ep_softc *, u_int16_t)); 230 void ep_mii_clrbit __P((struct ep_softc *, u_int16_t)); 231 u_int16_t ep_mii_readbit __P((struct ep_softc *, u_int16_t)); 232 void ep_mii_sync __P((struct ep_softc *)); 233 void ep_mii_sendbits __P((struct ep_softc *, u_int32_t, int)); 234 235 static int epbusyeeprom __P((struct ep_softc *)); 236 static inline void ep_complete_cmd __P((struct ep_softc *sc, 237 u_int cmd, u_int arg)); 238 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 239 240 /* 241 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 242 * Window 1 registers offset! 243 */ 244 static __inline int 245 ep_w1_reg(sc, reg) 246 struct ep_softc *sc; 247 int reg; 248 { 249 250 switch (sc->ep_chipset) { 251 case ELINK_CHIPSET_CORKSCREW: 252 return (reg + 0x10); 253 254 case ELINK_CHIPSET_ROADRUNNER: 255 switch (reg) { 256 case ELINK_W1_FREE_TX: 257 case ELINK_W1_RUNNER_RDCTL: 258 case ELINK_W1_RUNNER_WRCTL: 259 return (reg); 260 } 261 return (reg + 0x10); 262 } 263 264 return (reg); 265 } 266 267 /* 268 * Issue a (reset) command, and be sure it has completed. 269 * Used for commands that reset part or all of the board. 270 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 271 * but older hardware doesn't implement it and we must delay. 272 * It's easiest to just delay always. 273 */ 274 static inline void 275 ep_complete_cmd(sc, cmd, arg) 276 struct ep_softc *sc; 277 u_int cmd, arg; 278 { 279 register bus_space_tag_t iot = sc->sc_iot; 280 register bus_space_handle_t ioh = sc->sc_ioh; 281 282 bus_space_write_2(iot, ioh, cmd, arg); 283 284 #ifdef notyet 285 /* if this adapter family has S_COMMAND_IN_PROGRESS, use it */ 286 while (bus_space_read_2(iot, ioh, ELINK_STATUS) & S_COMMAND_IN_PROGRESS) 287 ; 288 else 289 #else 290 DELAY(100000); /* need at least 1 ms, but be generous. */ 291 #endif 292 } 293 294 /* 295 * Back-end attach and configure. 296 */ 297 void 298 epconfig(sc, chipset, enaddr) 299 struct ep_softc *sc; 300 u_short chipset; 301 u_int8_t *enaddr; 302 { 303 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 304 bus_space_tag_t iot = sc->sc_iot; 305 bus_space_handle_t ioh = sc->sc_ioh; 306 u_int16_t i; 307 u_int8_t myla[6]; 308 309 sc->ep_chipset = chipset; 310 311 /* 312 * We could have been groveling around in other register 313 * windows in the front-end; make sure we're in window 0 314 * to read the EEPROM. 315 */ 316 GO_WINDOW(0); 317 318 if (enaddr == NULL) { 319 /* 320 * Read the station address from the eeprom 321 */ 322 for (i = 0; i < 3; i++) { 323 u_int16_t x; 324 if (epbusyeeprom(sc)) 325 return; /* XXX why is eeprom busy? */ 326 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 327 READ_EEPROM | i); 328 if (epbusyeeprom(sc)) 329 return; /* XXX why is eeprom busy? */ 330 x = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 331 myla[(i << 1)] = x >> 8; 332 myla[(i << 1) + 1] = x; 333 } 334 enaddr = myla; 335 } 336 337 /* 338 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 339 * allow FDDI-sized (4500) byte packets. Commands only take an 340 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 341 * packet length. 342 * Commands to these cards implicitly upshift a packet size 343 * or threshold by 2 bits. 344 * To detect cards with large-packet support, we probe by setting 345 * the transmit threshold register, then change windows and 346 * read back the threshold register directly, and see if the 347 * threshold value was shifted or not. 348 */ 349 bus_space_write_2(iot, ioh, ELINK_COMMAND, 350 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE ); 351 GO_WINDOW(5); 352 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 353 GO_WINDOW(1); 354 switch (i) { 355 case ELINK_LARGEWIN_PROBE: 356 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 357 sc->ep_pktlenshift = 0; 358 break; 359 360 case (ELINK_LARGEWIN_PROBE << 2): 361 sc->ep_pktlenshift = 2; 362 break; 363 364 default: 365 printf("%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 366 "Interface disabled\n", 367 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 368 return; 369 } 370 371 /* 372 * Ensure Tx-available interrupts are enabled for 373 * start the interface. 374 * XXX should be in epinit()? 375 */ 376 bus_space_write_2(iot, ioh, ELINK_COMMAND, 377 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 378 379 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 380 ifp->if_softc = sc; 381 ifp->if_start = epstart; 382 ifp->if_ioctl = epioctl; 383 ifp->if_watchdog = epwatchdog; 384 ifp->if_flags = 385 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 386 387 if_attach(ifp); 388 ether_ifattach(ifp, enaddr); 389 390 /* 391 * Finish configuration: 392 * determine chipset if the front-end couldn't do so, 393 * show board details, set media. 394 */ 395 396 /* 397 * Print RAM size. We also print the Ethernet address in here. 398 * It's extracted from the ifp, so we have to make sure it's 399 * been attached first. 400 */ 401 ep_internalconfig(sc); 402 GO_WINDOW(0); 403 404 /* 405 * Display some additional information, if pertinent. 406 */ 407 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 408 printf("%s: RoadRunner FIFO buffer enabled\n", 409 sc->sc_dev.dv_xname); 410 411 /* 412 * Initialize our media structures and MII info. We'll 413 * probe the MII if we discover that we have one. 414 */ 415 sc->sc_mii.mii_ifp = ifp; 416 sc->sc_mii.mii_readreg = ep_mii_readreg; 417 sc->sc_mii.mii_writereg = ep_mii_writereg; 418 sc->sc_mii.mii_statchg = ep_statchg; 419 ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change, 420 ep_media_status); 421 422 /* 423 * Now, determine which media we have. 424 */ 425 switch (sc->ep_chipset) { 426 case ELINK_CHIPSET_BOOMERANG: 427 case ELINK_CHIPSET_ROADRUNNER: 428 /* 429 * If the device has MII, probe it. We won't be using 430 * any `native' media in this case, only PHYs. If 431 * we don't, just treat the Boomerang like the Vortex. 432 */ 433 if (sc->ep_flags & ELINK_FLAGS_MII) { 434 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 435 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 436 ifmedia_add(&sc->sc_mii.mii_media, 437 IFM_ETHER|IFM_NONE, 0, NULL); 438 ifmedia_set(&sc->sc_mii.mii_media, 439 IFM_ETHER|IFM_NONE); 440 } else { 441 ifmedia_set(&sc->sc_mii.mii_media, 442 IFM_ETHER|IFM_AUTO); 443 } 444 break; 445 } 446 /* FALLTHROUGH */ 447 448 case ELINK_CHIPSET_VORTEX: 449 ep_vortex_probemedia(sc); 450 break; 451 452 default: 453 ep_509_probemedia(sc); 454 break; 455 } 456 457 GO_WINDOW(1); /* Window 1 is operating window */ 458 459 #if NBPFILTER > 0 460 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 461 sizeof(struct ether_header)); 462 #endif 463 464 #if NRND > 0 465 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 466 RND_TYPE_NET, 0); 467 #endif 468 469 sc->tx_start_thresh = 20; /* probably a good starting point. */ 470 471 /* Establish callback to reset card when we reboot. */ 472 shutdownhook_establish(epshutdown, sc); 473 474 ep_complete_cmd(sc, ELINK_COMMAND, RX_RESET); 475 ep_complete_cmd(sc, ELINK_COMMAND, TX_RESET); 476 } 477 478 479 /* 480 * Show interface-model-independent info from window 3 481 * internal-configuration register. 482 */ 483 void 484 ep_internalconfig(sc) 485 struct ep_softc *sc; 486 { 487 bus_space_tag_t iot = sc->sc_iot; 488 bus_space_handle_t ioh = sc->sc_ioh; 489 490 u_int config0; 491 u_int config1; 492 493 int ram_size, ram_width, ram_speed, rom_size, ram_split; 494 /* 495 * NVRAM buffer Rx:Tx config names for busmastering cards 496 * (Demon, Vortex, and later). 497 */ 498 const char *onboard_ram_config[] = { 499 "5:3", "3:1", "1:1", "3:5" }; 500 501 GO_WINDOW(3); 502 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 503 config1 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 504 GO_WINDOW(0); 505 506 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 507 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 508 ram_speed = (config0 & CONFIG_RAMSPEED) >> CONFIG_RAMSPEED_SHIFT; 509 rom_size = (config0 & CONFIG_ROMSIZE) >> CONFIG_ROMSIZE_SHIFT; 510 511 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 512 513 printf("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 514 sc->sc_dev.dv_xname, 515 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 516 8 << ram_size, 517 (ram_width) ? "word" : "byte", 518 onboard_ram_config[ram_split]); 519 } 520 521 522 /* 523 * Find supported media on 3c509-generation hardware that doesn't have 524 * a "reset_options" register in window 3. 525 * Use the config_cntrl register in window 0 instead. 526 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 527 * that implement CONFIG_CTRL. We don't have a good way to set the 528 * default active mediuim; punt to ifconfig instead. 529 */ 530 void 531 ep_509_probemedia(sc) 532 struct ep_softc *sc; 533 { 534 bus_space_tag_t iot = sc->sc_iot; 535 bus_space_handle_t ioh = sc->sc_ioh; 536 struct ifmedia *ifm = &sc->sc_mii.mii_media; 537 u_int16_t ep_w0_config, port; 538 struct ep_media *epm; 539 const char *sep = "", *defmedianame = NULL; 540 int defmedia = 0; 541 542 GO_WINDOW(0); 543 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 544 545 printf("%s: ", sc->sc_dev.dv_xname); 546 547 /* Sanity check that there are any media! */ 548 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 549 printf("no media present!\n"); 550 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 551 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 552 return; 553 } 554 555 /* 556 * Get the default media from the EEPROM. 557 */ 558 if (epbusyeeprom(sc)) 559 return; /* XXX why is eeprom busy? */ 560 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 561 READ_EEPROM | EEPROM_ADDR_CFG); 562 if (epbusyeeprom(sc)) 563 return; /* XXX why is eeprom busy? */ 564 port = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA) >> 14; 565 566 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 567 568 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 569 if (ep_w0_config & epm->epm_mpbit) { 570 /* 571 * This simple test works because 509 chipsets 572 * don't do full-duplex. 573 */ 574 if (epm->epm_epmedia == port || defmedia == 0) { 575 defmedia = epm->epm_ifmedia; 576 defmedianame = epm->epm_name; 577 } 578 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 579 NULL); 580 PRINT(epm->epm_name); 581 } 582 } 583 584 #undef PRINT 585 586 #ifdef DIAGNOSTIC 587 if (defmedia == 0) 588 panic("ep_509_probemedia: impossible"); 589 #endif 590 591 printf(" (default %s)\n", defmedianame); 592 ifmedia_set(ifm, defmedia); 593 } 594 595 /* 596 * Find media present on large-packet-capable elink3 devices. 597 * Show onboard configuration of large-packet-capable elink3 devices 598 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 599 * Use media and card-version info in window 3 instead. 600 */ 601 void 602 ep_vortex_probemedia(sc) 603 struct ep_softc *sc; 604 { 605 bus_space_tag_t iot = sc->sc_iot; 606 bus_space_handle_t ioh = sc->sc_ioh; 607 struct ifmedia *ifm = &sc->sc_mii.mii_media; 608 struct ep_media *epm; 609 u_int config1; 610 int reset_options; 611 int default_media; /* 3-bit encoding of default (EEPROM) media */ 612 int defmedia = 0; 613 const char *sep = "", *defmedianame = NULL; 614 615 GO_WINDOW(3); 616 config1 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 617 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 618 GO_WINDOW(0); 619 620 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 621 622 printf("%s: ", sc->sc_dev.dv_xname); 623 624 /* Sanity check that there are any media! */ 625 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 626 printf("no media present!\n"); 627 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 628 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 629 return; 630 } 631 632 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 633 634 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 635 if (reset_options & epm->epm_mpbit) { 636 /* 637 * Default media is a little more complicated 638 * on the Vortex. We support full-duplex which 639 * uses the same reset options bit. 640 * 641 * XXX Check EEPROM for default to FDX? 642 */ 643 if (epm->epm_epmedia == default_media) { 644 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 645 defmedia = epm->epm_ifmedia; 646 defmedianame = epm->epm_name; 647 } 648 } else if (defmedia == 0) { 649 defmedia = epm->epm_ifmedia; 650 defmedianame = epm->epm_name; 651 } 652 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 653 NULL); 654 PRINT(epm->epm_name); 655 } 656 } 657 658 #undef PRINT 659 660 #ifdef DIAGNOSTIC 661 if (defmedia == 0) 662 panic("ep_vortex_probemedia: impossible"); 663 #endif 664 665 printf(" (default %s)\n", defmedianame); 666 ifmedia_set(ifm, defmedia); 667 } 668 669 /* 670 * One second timer, used to tick the MII. 671 */ 672 void 673 ep_tick(arg) 674 void *arg; 675 { 676 struct ep_softc *sc = arg; 677 int s; 678 679 #ifdef DIAGNOSTIC 680 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 681 panic("ep_tick"); 682 #endif 683 684 s = splnet(); 685 mii_tick(&sc->sc_mii); 686 splx(s); 687 688 timeout(ep_tick, sc, hz); 689 } 690 691 /* 692 * Bring device up. 693 * 694 * The order in here seems important. Otherwise we may not receive 695 * interrupts. ?! 696 */ 697 void 698 epinit(sc) 699 register struct ep_softc *sc; 700 { 701 register struct ifnet *ifp = &sc->sc_ethercom.ec_if; 702 bus_space_tag_t iot = sc->sc_iot; 703 bus_space_handle_t ioh = sc->sc_ioh; 704 int i; 705 706 while (bus_space_read_2(iot, ioh, ELINK_STATUS) & S_COMMAND_IN_PROGRESS) 707 ; 708 709 if (sc->bustype != ELINK_BUS_PCI) { 710 GO_WINDOW(0); 711 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 712 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ); 713 } 714 715 if (sc->bustype == ELINK_BUS_PCMCIA) { 716 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 717 } 718 719 GO_WINDOW(2); 720 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 721 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 722 LLADDR(ifp->if_sadl)[i]); 723 724 /* 725 * Reset the station-address receive filter. 726 * A bug workaround for busmastering (Vortex, Demon) cards. 727 */ 728 for (i = 0; i < 6; i++) 729 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 730 731 ep_complete_cmd(sc, ELINK_COMMAND, RX_RESET); 732 ep_complete_cmd(sc, ELINK_COMMAND, TX_RESET); 733 734 GO_WINDOW(1); /* Window 1 is operating window */ 735 for (i = 0; i < 31; i++) 736 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 737 738 /* Set threshhold for for Tx-space avaiable interrupt. */ 739 bus_space_write_2(iot, ioh, ELINK_COMMAND, 740 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 741 742 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 743 /* 744 * Enable options in the PCMCIA LAN COR register, via 745 * RoadRunner Window 1. 746 * 747 * XXX MAGIC CONSTANTS! 748 */ 749 u_int16_t cor; 750 751 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 752 753 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 754 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 755 cor |= 0x10; 756 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 757 cor |= 0x20; 758 bus_space_write_2(iot, ioh, 0, cor); 759 760 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 761 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 762 } 763 764 /* Enable interrupts. */ 765 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_CARD_FAILURE | 766 S_RX_COMPLETE | S_TX_COMPLETE | S_TX_AVAIL); 767 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_CARD_FAILURE | 768 S_RX_COMPLETE | S_TX_COMPLETE | S_TX_AVAIL); 769 770 /* 771 * Attempt to get rid of any stray interrupts that occured during 772 * configuration. On the i386 this isn't possible because one may 773 * already be queued. However, a single stray interrupt is 774 * unimportant. 775 */ 776 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 777 778 epsetfilter(sc); 779 epsetmedia(sc); 780 781 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 782 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 783 784 epmbuffill(sc); 785 786 /* Interface is now `running', with no output active. */ 787 ifp->if_flags |= IFF_RUNNING; 788 ifp->if_flags &= ~IFF_OACTIVE; 789 790 if (sc->ep_flags & ELINK_FLAGS_MII) { 791 /* Start the one second clock. */ 792 timeout(ep_tick, sc, hz); 793 } 794 795 /* Attempt to start output, if any. */ 796 epstart(ifp); 797 } 798 799 800 /* 801 * Set multicast receive filter. 802 * elink3 hardware has no selective multicast filter in hardware. 803 * Enable reception of all multicasts and filter in software. 804 */ 805 void 806 epsetfilter(sc) 807 register struct ep_softc *sc; 808 { 809 register struct ifnet *ifp = &sc->sc_ethercom.ec_if; 810 811 GO_WINDOW(1); /* Window 1 is operating window */ 812 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, SET_RX_FILTER | 813 FIL_INDIVIDUAL | FIL_BRDCST | 814 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0 ) | 815 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0 )); 816 } 817 818 int 819 ep_media_change(ifp) 820 struct ifnet *ifp; 821 { 822 register struct ep_softc *sc = ifp->if_softc; 823 824 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 825 epreset(sc); 826 827 return (0); 828 } 829 830 /* 831 * Set the card to use the specified media. 832 */ 833 void 834 epsetmedia(sc) 835 struct ep_softc *sc; 836 { 837 bus_space_tag_t iot = sc->sc_iot; 838 bus_space_handle_t ioh = sc->sc_ioh; 839 840 /* Turn everything off. First turn off linkbeat and UTP. */ 841 GO_WINDOW(4); 842 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 843 844 /* Turn off coax */ 845 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 846 delay(1000); 847 848 /* 849 * If the device has MII, select it, and then tell the 850 * PHY which media to use. 851 */ 852 if (sc->ep_flags & ELINK_FLAGS_MII) { 853 int config0, config1; 854 855 GO_WINDOW(3); 856 857 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 858 int resopt; 859 860 resopt = bus_space_read_2(iot, ioh, 861 ELINK_W3_RESET_OPTIONS); 862 bus_space_write_2(iot, ioh, 863 ELINK_W3_RESET_OPTIONS, resopt|ELINK_RUNNER_ENABLE_MII); 864 } 865 866 config0 = (u_int)bus_space_read_2(iot, ioh, 867 ELINK_W3_INTERNAL_CONFIG); 868 config1 = (u_int)bus_space_read_2(iot, ioh, 869 ELINK_W3_INTERNAL_CONFIG + 2); 870 871 config1 = config1 & ~CONFIG_MEDIAMASK; 872 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 873 874 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 875 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, config1); 876 GO_WINDOW(1); /* back to operating window */ 877 878 mii_mediachg(&sc->sc_mii); 879 return; 880 } 881 882 /* 883 * Now turn on the selected media/transceiver. 884 */ 885 GO_WINDOW(4); 886 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 887 case IFM_10_T: 888 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 889 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 890 break; 891 892 case IFM_10_2: 893 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 894 DELAY(1000); /* 50ms not enmough? */ 895 break; 896 897 case IFM_100_TX: 898 case IFM_100_FX: 899 case IFM_100_T4: /* XXX check documentation */ 900 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 901 LINKBEAT_ENABLE); 902 DELAY(1000); /* not strictly necessary? */ 903 break; 904 905 case IFM_10_5: 906 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 907 SQE_ENABLE); 908 DELAY(1000); /* not strictly necessary? */ 909 break; 910 911 case IFM_MANUAL: 912 /* 913 * Nothing to do here; we are actually enabling the 914 * external PHY on the MII port. 915 */ 916 break; 917 918 case IFM_NONE: 919 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 920 return; 921 922 default: 923 panic("epsetmedia: impossible"); 924 } 925 926 /* 927 * Tell the chip which port to use. 928 */ 929 switch (sc->ep_chipset) { 930 case ELINK_CHIPSET_VORTEX: 931 case ELINK_CHIPSET_BOOMERANG: 932 { 933 int mctl, config0, config1; 934 935 GO_WINDOW(3); 936 config0 = (u_int)bus_space_read_2(iot, ioh, 937 ELINK_W3_INTERNAL_CONFIG); 938 config1 = (u_int)bus_space_read_2(iot, ioh, 939 ELINK_W3_INTERNAL_CONFIG + 2); 940 941 config1 = config1 & ~CONFIG_MEDIAMASK; 942 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 943 CONFIG_MEDIAMASK_SHIFT); 944 945 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 946 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 947 config1); 948 949 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 950 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 951 mctl |= MAC_CONTROL_FDX; 952 else 953 mctl &= ~MAC_CONTROL_FDX; 954 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 955 break; 956 } 957 default: 958 { 959 int w0_addr_cfg; 960 961 GO_WINDOW(0); 962 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 963 w0_addr_cfg &= 0x3fff; 964 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 965 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 966 DELAY(1000); 967 break; 968 } 969 } 970 971 GO_WINDOW(1); /* Window 1 is operating window */ 972 } 973 974 /* 975 * Get currently-selected media from card. 976 * (if_media callback, may be called before interface is brought up). 977 */ 978 void 979 ep_media_status(ifp, req) 980 struct ifnet *ifp; 981 struct ifmediareq *req; 982 { 983 register struct ep_softc *sc = ifp->if_softc; 984 bus_space_tag_t iot = sc->sc_iot; 985 bus_space_handle_t ioh = sc->sc_ioh; 986 987 if (sc->enabled == 0) { 988 req->ifm_active = IFM_ETHER|IFM_NONE; 989 req->ifm_status = 0; 990 return; 991 } 992 993 /* 994 * If we have MII, go ask the PHY what's going on. 995 */ 996 if (sc->ep_flags & ELINK_FLAGS_MII) { 997 mii_pollstat(&sc->sc_mii); 998 req->ifm_active = sc->sc_mii.mii_media_active; 999 req->ifm_status = sc->sc_mii.mii_media_status; 1000 return; 1001 } 1002 1003 /* 1004 * Ok, at this point we claim that our active media is 1005 * the currently selected media. We'll update our status 1006 * if our chipset allows us to detect link. 1007 */ 1008 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1009 req->ifm_status = 0; 1010 1011 switch (sc->ep_chipset) { 1012 case ELINK_CHIPSET_VORTEX: 1013 case ELINK_CHIPSET_BOOMERANG: 1014 GO_WINDOW(4); 1015 req->ifm_status = IFM_AVALID; 1016 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1017 LINKBEAT_DETECT) 1018 req->ifm_status |= IFM_ACTIVE; 1019 GO_WINDOW(1); /* back to operating window */ 1020 break; 1021 } 1022 } 1023 1024 1025 1026 /* 1027 * Start outputting on the interface. 1028 * Always called as splnet(). 1029 */ 1030 void 1031 epstart(ifp) 1032 struct ifnet *ifp; 1033 { 1034 register struct ep_softc *sc = ifp->if_softc; 1035 bus_space_tag_t iot = sc->sc_iot; 1036 bus_space_handle_t ioh = sc->sc_ioh; 1037 struct mbuf *m, *m0; 1038 int sh, len, pad; 1039 bus_addr_t txreg; 1040 1041 /* Don't transmit if interface is busy or not running */ 1042 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1043 return; 1044 1045 startagain: 1046 /* Sneak a peek at the next packet */ 1047 m0 = ifp->if_snd.ifq_head; 1048 if (m0 == 0) 1049 return; 1050 1051 /* We need to use m->m_pkthdr.len, so require the header */ 1052 if ((m0->m_flags & M_PKTHDR) == 0) 1053 panic("epstart: no header mbuf"); 1054 len = m0->m_pkthdr.len; 1055 1056 pad = (4 - len) & 3; 1057 1058 /* 1059 * The 3c509 automatically pads short packets to minimum ethernet 1060 * length, but we drop packets that are too large. Perhaps we should 1061 * truncate them instead? 1062 */ 1063 if (len + pad > ETHER_MAX_LEN) { 1064 /* packet is obviously too large: toss it */ 1065 ++ifp->if_oerrors; 1066 IF_DEQUEUE(&ifp->if_snd, m0); 1067 m_freem(m0); 1068 goto readcheck; 1069 } 1070 1071 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1072 len + pad + 4) { 1073 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1074 SET_TX_AVAIL_THRESH | 1075 ((len + pad + 4) >> sc->ep_pktlenshift)); 1076 /* not enough room in FIFO */ 1077 ifp->if_flags |= IFF_OACTIVE; 1078 return; 1079 } else { 1080 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1081 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE ); 1082 } 1083 1084 IF_DEQUEUE(&ifp->if_snd, m0); 1085 if (m0 == 0) /* not really needed */ 1086 return; 1087 1088 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1089 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/) ); 1090 1091 #if NBPFILTER > 0 1092 if (ifp->if_bpf) 1093 bpf_mtap(ifp->if_bpf, m0); 1094 #endif 1095 1096 /* 1097 * Do the output at splhigh() so that an interrupt from another device 1098 * won't cause a FIFO underrun. 1099 */ 1100 sh = splhigh(); 1101 1102 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1103 1104 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1105 /* 1106 * Prime the FIFO buffer counter (number of 16-bit 1107 * words about to be written to the FIFO). 1108 * 1109 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1110 * COUNTER IS NON-ZERO! 1111 */ 1112 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1113 (len + pad) >> 1); 1114 } 1115 1116 bus_space_write_2(iot, ioh, txreg, len); 1117 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1118 if (ELINK_IS_BUS_32(sc->bustype)) { 1119 for (m = m0; m; ) { 1120 if (m->m_len > 3) { 1121 /* align our reads from core */ 1122 if (mtod(m, u_long) & 3) { 1123 u_long count = 1124 4 - (mtod(m, u_long) & 3); 1125 bus_space_write_multi_1(iot, ioh, 1126 txreg, mtod(m, u_int8_t *), count); 1127 m->m_data = 1128 (void *)(mtod(m, u_long) + count); 1129 m->m_len -= count; 1130 } 1131 bus_space_write_multi_stream_4(iot, ioh, 1132 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1133 m->m_data = (void *)(mtod(m, u_long) + 1134 (u_long)(m->m_len & ~3)); 1135 m->m_len -= m->m_len & ~3; 1136 } 1137 if (m->m_len) { 1138 bus_space_write_multi_1(iot, ioh, 1139 txreg, mtod(m, u_int8_t *), m->m_len); 1140 } 1141 MFREE(m, m0); 1142 m = m0; 1143 } 1144 } else { 1145 for (m = m0; m; ) { 1146 if (m->m_len > 1) { 1147 if (mtod(m, u_long) & 1) { 1148 bus_space_write_1(iot, ioh, 1149 txreg, *(mtod(m, u_int8_t *))); 1150 m->m_data = 1151 (void *)(mtod(m, u_long) + 1); 1152 m->m_len -= 1; 1153 } 1154 bus_space_write_multi_stream_2(iot, ioh, 1155 txreg, mtod(m, u_int16_t *), 1156 m->m_len >> 1); 1157 } 1158 if (m->m_len & 1) { 1159 bus_space_write_1(iot, ioh, txreg, 1160 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1161 } 1162 MFREE(m, m0); 1163 m = m0; 1164 } 1165 } 1166 while (pad--) 1167 bus_space_write_1(iot, ioh, txreg, 0); 1168 1169 splx(sh); 1170 1171 ++ifp->if_opackets; 1172 1173 readcheck: 1174 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1175 ERR_INCOMPLETE) == 0) { 1176 /* We received a complete packet. */ 1177 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1178 1179 if ((status & S_INTR_LATCH) == 0) { 1180 /* 1181 * No interrupt, read the packet and continue 1182 * Is this supposed to happen? Is my motherboard 1183 * completely busted? 1184 */ 1185 epread(sc); 1186 } else { 1187 /* Got an interrupt, return so that it gets serviced. */ 1188 return; 1189 } 1190 } else { 1191 /* Check if we are stuck and reset [see XXX comment] */ 1192 if (epstatus(sc)) { 1193 if (ifp->if_flags & IFF_DEBUG) 1194 printf("%s: adapter reset\n", 1195 sc->sc_dev.dv_xname); 1196 epreset(sc); 1197 } 1198 } 1199 1200 goto startagain; 1201 } 1202 1203 1204 /* 1205 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1206 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1207 * We detect this situation and we reset the adapter. 1208 * It happens at times when there is a lot of broadcast traffic 1209 * on the cable (once in a blue moon). 1210 */ 1211 static int 1212 epstatus(sc) 1213 register struct ep_softc *sc; 1214 { 1215 bus_space_tag_t iot = sc->sc_iot; 1216 bus_space_handle_t ioh = sc->sc_ioh; 1217 u_int16_t fifost; 1218 1219 /* 1220 * Check the FIFO status and act accordingly 1221 */ 1222 GO_WINDOW(4); 1223 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1224 GO_WINDOW(1); 1225 1226 if (fifost & FIFOS_RX_UNDERRUN) { 1227 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1228 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1229 epreset(sc); 1230 return 0; 1231 } 1232 1233 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1234 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1235 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1236 return 1; 1237 } 1238 1239 if (fifost & FIFOS_RX_OVERRUN) { 1240 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1241 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1242 return 1; 1243 } 1244 1245 if (fifost & FIFOS_TX_OVERRUN) { 1246 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1247 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1248 epreset(sc); 1249 return 0; 1250 } 1251 1252 return 0; 1253 } 1254 1255 1256 static void 1257 eptxstat(sc) 1258 register struct ep_softc *sc; 1259 { 1260 bus_space_tag_t iot = sc->sc_iot; 1261 bus_space_handle_t ioh = sc->sc_ioh; 1262 int i; 1263 1264 /* 1265 * We need to read+write TX_STATUS until we get a 0 status 1266 * in order to turn off the interrupt flag. 1267 */ 1268 while ((i = bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS))) 1269 & TXS_COMPLETE) { 1270 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1271 0x0); 1272 1273 if (i & TXS_JABBER) { 1274 ++sc->sc_ethercom.ec_if.if_oerrors; 1275 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1276 printf("%s: jabber (%x)\n", 1277 sc->sc_dev.dv_xname, i); 1278 epreset(sc); 1279 } else if (i & TXS_UNDERRUN) { 1280 ++sc->sc_ethercom.ec_if.if_oerrors; 1281 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1282 printf("%s: fifo underrun (%x) @%d\n", 1283 sc->sc_dev.dv_xname, i, 1284 sc->tx_start_thresh); 1285 if (sc->tx_succ_ok < 100) 1286 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1287 sc->tx_start_thresh + 20); 1288 sc->tx_succ_ok = 0; 1289 epreset(sc); 1290 } else if (i & TXS_MAX_COLLISION) { 1291 ++sc->sc_ethercom.ec_if.if_collisions; 1292 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1293 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1294 } else 1295 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1296 } 1297 } 1298 1299 int 1300 epintr(arg) 1301 void *arg; 1302 { 1303 register struct ep_softc *sc = arg; 1304 bus_space_tag_t iot = sc->sc_iot; 1305 bus_space_handle_t ioh = sc->sc_ioh; 1306 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1307 u_int16_t status; 1308 int ret = 0; 1309 int addrandom = 0; 1310 1311 if (sc->enabled == 0) 1312 return (0); 1313 1314 for (;;) { 1315 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1316 1317 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1318 1319 if ((status & (S_TX_COMPLETE | S_TX_AVAIL | 1320 S_RX_COMPLETE | S_CARD_FAILURE)) == 0) { 1321 if ((status & S_INTR_LATCH) == 0) { 1322 #if 0 1323 printf("%s: intr latch cleared\n", 1324 sc->sc_dev.dv_xname); 1325 #endif 1326 break; 1327 } 1328 } 1329 1330 ret = 1; 1331 1332 /* 1333 * Acknowledge any interrupts. It's important that we do this 1334 * first, since there would otherwise be a race condition. 1335 * Due to the i386 interrupt queueing, we may get spurious 1336 * interrupts occasionally. 1337 */ 1338 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1339 (status & (C_INTR_LATCH | 1340 C_CARD_FAILURE | 1341 C_TX_COMPLETE | 1342 C_TX_AVAIL | 1343 C_RX_COMPLETE | 1344 C_RX_EARLY | 1345 C_INT_RQD | 1346 C_UPD_STATS))); 1347 1348 #if 0 1349 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1350 1351 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1352 (status & S_RX_COMPLETE)?" RX_COMPLETE":"", 1353 (status & S_TX_COMPLETE)?" TX_COMPLETE":"", 1354 (status & S_TX_AVAIL)?" TX_AVAIL":"", 1355 (status & S_CARD_FAILURE)?" CARD_FAILURE":""); 1356 #endif 1357 1358 if (status & S_RX_COMPLETE) { 1359 epread(sc); 1360 addrandom = 1; 1361 } 1362 if (status & S_TX_AVAIL) { 1363 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1364 epstart(&sc->sc_ethercom.ec_if); 1365 addrandom = 1; 1366 } 1367 if (status & S_CARD_FAILURE) { 1368 printf("%s: adapter failure (%x)\n", 1369 sc->sc_dev.dv_xname, status); 1370 epreset(sc); 1371 return (1); 1372 } 1373 if (status & S_TX_COMPLETE) { 1374 eptxstat(sc); 1375 epstart(ifp); 1376 addrandom = 1; 1377 } 1378 1379 #if NRND > 0 1380 if (status) 1381 rnd_add_uint32(&sc->rnd_source, status); 1382 #endif 1383 } 1384 1385 /* no more interrupts */ 1386 return (ret); 1387 } 1388 1389 void 1390 epread(sc) 1391 register struct ep_softc *sc; 1392 { 1393 bus_space_tag_t iot = sc->sc_iot; 1394 bus_space_handle_t ioh = sc->sc_ioh; 1395 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1396 struct mbuf *m; 1397 struct ether_header *eh; 1398 int len; 1399 1400 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1401 1402 again: 1403 if (ifp->if_flags & IFF_DEBUG) { 1404 int err = len & ERR_MASK; 1405 char *s = NULL; 1406 1407 if (len & ERR_INCOMPLETE) 1408 s = "incomplete packet"; 1409 else if (err == ERR_OVERRUN) 1410 s = "packet overrun"; 1411 else if (err == ERR_RUNT) 1412 s = "runt packet"; 1413 else if (err == ERR_ALIGNMENT) 1414 s = "bad alignment"; 1415 else if (err == ERR_CRC) 1416 s = "bad crc"; 1417 else if (err == ERR_OVERSIZE) 1418 s = "oversized packet"; 1419 else if (err == ERR_DRIBBLE) 1420 s = "dribble bits"; 1421 1422 if (s) 1423 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1424 } 1425 1426 if (len & ERR_INCOMPLETE) 1427 return; 1428 1429 if (len & ERR_RX) { 1430 ++ifp->if_ierrors; 1431 goto abort; 1432 } 1433 1434 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1435 1436 /* Pull packet off interface. */ 1437 m = epget(sc, len); 1438 if (m == 0) { 1439 ifp->if_ierrors++; 1440 goto abort; 1441 } 1442 1443 ++ifp->if_ipackets; 1444 1445 /* We assume the header fit entirely in one mbuf. */ 1446 eh = mtod(m, struct ether_header *); 1447 1448 #if NBPFILTER > 0 1449 /* 1450 * Check if there's a BPF listener on this interface. 1451 * If so, hand off the raw packet to BPF. 1452 */ 1453 if (ifp->if_bpf) { 1454 bpf_mtap(ifp->if_bpf, m); 1455 1456 /* 1457 * Note that the interface cannot be in promiscuous mode if 1458 * there are no BPF listeners. And if we are in promiscuous 1459 * mode, we have to check if this packet is really ours. 1460 */ 1461 if ((ifp->if_flags & IFF_PROMISC) && 1462 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */ 1463 bcmp(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1464 sizeof(eh->ether_dhost)) != 0) { 1465 m_freem(m); 1466 return; 1467 } 1468 } 1469 #endif 1470 1471 /* We assume the header fit entirely in one mbuf. */ 1472 m_adj(m, sizeof(struct ether_header)); 1473 ether_input(ifp, eh, m); 1474 1475 /* 1476 * In periods of high traffic we can actually receive enough 1477 * packets so that the fifo overrun bit will be set at this point, 1478 * even though we just read a packet. In this case we 1479 * are not going to receive any more interrupts. We check for 1480 * this condition and read again until the fifo is not full. 1481 * We could simplify this test by not using epstatus(), but 1482 * rechecking the RX_STATUS register directly. This test could 1483 * result in unnecessary looping in cases where there is a new 1484 * packet but the fifo is not full, but it will not fix the 1485 * stuck behavior. 1486 * 1487 * Even with this improvement, we still get packet overrun errors 1488 * which are hurting performance. Maybe when I get some more time 1489 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1490 */ 1491 if (epstatus(sc)) { 1492 len = bus_space_read_2(iot, ioh, 1493 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1494 /* Check if we are stuck and reset [see XXX comment] */ 1495 if (len & ERR_INCOMPLETE) { 1496 if (ifp->if_flags & IFF_DEBUG) 1497 printf("%s: adapter reset\n", 1498 sc->sc_dev.dv_xname); 1499 epreset(sc); 1500 return; 1501 } 1502 goto again; 1503 } 1504 1505 return; 1506 1507 abort: 1508 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 1509 while (bus_space_read_2(iot, ioh, ELINK_STATUS) & S_COMMAND_IN_PROGRESS) 1510 ; 1511 } 1512 1513 struct mbuf * 1514 epget(sc, totlen) 1515 struct ep_softc *sc; 1516 int totlen; 1517 { 1518 bus_space_tag_t iot = sc->sc_iot; 1519 bus_space_handle_t ioh = sc->sc_ioh; 1520 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1521 struct mbuf *top, **mp, *m, *rv = NULL; 1522 bus_addr_t rxreg; 1523 int len, remaining; 1524 int sh; 1525 1526 m = sc->mb[sc->next_mb]; 1527 sc->mb[sc->next_mb] = 0; 1528 if (m == 0) { 1529 MGETHDR(m, M_DONTWAIT, MT_DATA); 1530 if (m == 0) 1531 return 0; 1532 } else { 1533 /* If the queue is no longer full, refill. */ 1534 if (sc->last_mb == sc->next_mb) 1535 timeout(epmbuffill, sc, 1); 1536 /* Convert one of our saved mbuf's. */ 1537 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1538 m->m_data = m->m_pktdat; 1539 m->m_flags = M_PKTHDR; 1540 } 1541 m->m_pkthdr.rcvif = ifp; 1542 m->m_pkthdr.len = totlen; 1543 len = MHLEN; 1544 top = 0; 1545 mp = ⊤ 1546 1547 /* 1548 * We read the packet at splhigh() so that an interrupt from another 1549 * device doesn't cause the card's buffer to overflow while we're 1550 * reading it. We may still lose packets at other times. 1551 */ 1552 sh = splhigh(); 1553 1554 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1555 1556 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1557 /* 1558 * Prime the FIFO buffer counter (number of 16-bit 1559 * words about to be read from the FIFO). 1560 * 1561 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1562 * COUNTER IS NON-ZERO! 1563 */ 1564 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1565 } 1566 1567 while (totlen > 0) { 1568 if (top) { 1569 m = sc->mb[sc->next_mb]; 1570 sc->mb[sc->next_mb] = 0; 1571 if (m == 0) { 1572 MGET(m, M_DONTWAIT, MT_DATA); 1573 if (m == 0) { 1574 m_freem(top); 1575 goto out; 1576 } 1577 } else { 1578 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1579 } 1580 len = MLEN; 1581 } 1582 if (totlen >= MINCLSIZE) { 1583 MCLGET(m, M_DONTWAIT); 1584 if ((m->m_flags & M_EXT) == 0) { 1585 m_free(m); 1586 m_freem(top); 1587 goto out; 1588 } 1589 len = MCLBYTES; 1590 } 1591 if (top == 0) { 1592 /* align the struct ip header */ 1593 caddr_t newdata = (caddr_t) 1594 ALIGN(m->m_data + sizeof(struct ether_header)) 1595 - sizeof(struct ether_header); 1596 len -= newdata - m->m_data; 1597 m->m_data = newdata; 1598 } 1599 remaining = len = min(totlen, len); 1600 if (ELINK_IS_BUS_32(sc->bustype)) { 1601 u_long offset = mtod(m, u_long); 1602 /* 1603 * Read bytes up to the point where we are aligned. 1604 * (We can align to 4 bytes, rather than ALIGNBYTES, 1605 * here because we're later reading 4-byte chunks.) 1606 */ 1607 if ((remaining > 3) && (offset & 3)) { 1608 int count = (4 - (offset & 3)); 1609 bus_space_read_multi_1(iot, ioh, 1610 rxreg, (u_int8_t *) offset, count); 1611 offset += count; 1612 remaining -= count; 1613 } 1614 if (remaining > 3) { 1615 bus_space_read_multi_stream_4(iot, ioh, 1616 rxreg, (u_int32_t *) offset, 1617 remaining >> 2); 1618 offset += remaining & ~3; 1619 remaining &= 3; 1620 } 1621 if (remaining) { 1622 bus_space_read_multi_1(iot, ioh, 1623 rxreg, (u_int8_t *) offset, remaining); 1624 } 1625 } else { 1626 u_long offset = mtod(m, u_long); 1627 if ((remaining > 1) && (offset & 1)) { 1628 bus_space_read_multi_1(iot, ioh, 1629 rxreg, (u_int8_t *) offset, 1); 1630 remaining -= 1; 1631 offset += 1; 1632 } 1633 if (remaining > 1) { 1634 bus_space_read_multi_stream_2(iot, ioh, 1635 rxreg, (u_int16_t *) offset, 1636 remaining >> 1); 1637 offset += remaining & ~1; 1638 } 1639 if (remaining & 1) { 1640 bus_space_read_multi_1(iot, ioh, 1641 rxreg, (u_int8_t *) offset, remaining & 1); 1642 } 1643 } 1644 m->m_len = len; 1645 totlen -= len; 1646 *mp = m; 1647 mp = &m->m_next; 1648 } 1649 1650 rv = top; 1651 1652 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 1653 while (bus_space_read_2(iot, ioh, ELINK_STATUS) & S_COMMAND_IN_PROGRESS) 1654 ; 1655 1656 out: 1657 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1658 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1659 splx(sh); 1660 1661 return rv; 1662 } 1663 1664 int 1665 epioctl(ifp, cmd, data) 1666 register struct ifnet *ifp; 1667 u_long cmd; 1668 caddr_t data; 1669 { 1670 struct ep_softc *sc = ifp->if_softc; 1671 struct ifaddr *ifa = (struct ifaddr *)data; 1672 struct ifreq *ifr = (struct ifreq *)data; 1673 int s, error = 0; 1674 1675 s = splnet(); 1676 1677 switch (cmd) { 1678 1679 case SIOCSIFADDR: 1680 if ((error = epenable(sc)) != 0) 1681 break; 1682 /* epinit is called just below */ 1683 ifp->if_flags |= IFF_UP; 1684 switch (ifa->ifa_addr->sa_family) { 1685 #ifdef INET 1686 case AF_INET: 1687 epinit(sc); 1688 arp_ifinit(&sc->sc_ethercom.ec_if, ifa); 1689 break; 1690 #endif 1691 #ifdef NS 1692 case AF_NS: 1693 { 1694 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1695 1696 if (ns_nullhost(*ina)) 1697 ina->x_host = *(union ns_host *) 1698 LLADDR(ifp->if_sadl); 1699 else 1700 bcopy(ina->x_host.c_host, 1701 LLADDR(ifp->if_sadl), 1702 ifp->if_addrlen); 1703 /* Set new address. */ 1704 epinit(sc); 1705 break; 1706 } 1707 #endif 1708 default: 1709 epinit(sc); 1710 break; 1711 } 1712 break; 1713 1714 case SIOCSIFMEDIA: 1715 case SIOCGIFMEDIA: 1716 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1717 break; 1718 1719 case SIOCSIFFLAGS: 1720 if ((ifp->if_flags & IFF_UP) == 0 && 1721 (ifp->if_flags & IFF_RUNNING) != 0) { 1722 /* 1723 * If interface is marked down and it is running, then 1724 * stop it. 1725 */ 1726 epstop(sc); 1727 ifp->if_flags &= ~IFF_RUNNING; 1728 epdisable(sc); 1729 } else if ((ifp->if_flags & IFF_UP) != 0 && 1730 (ifp->if_flags & IFF_RUNNING) == 0) { 1731 /* 1732 * If interface is marked up and it is stopped, then 1733 * start it. 1734 */ 1735 if ((error = epenable(sc)) != 0) 1736 break; 1737 epinit(sc); 1738 } else if ((ifp->if_flags & IFF_UP) != 0) { 1739 /* 1740 * deal with flags changes: 1741 * IFF_MULTICAST, IFF_PROMISC. 1742 */ 1743 epsetfilter(sc); 1744 } 1745 break; 1746 1747 case SIOCADDMULTI: 1748 case SIOCDELMULTI: 1749 if (sc->enabled == 0) { 1750 error = EIO; 1751 break; 1752 } 1753 1754 error = (cmd == SIOCADDMULTI) ? 1755 ether_addmulti(ifr, &sc->sc_ethercom) : 1756 ether_delmulti(ifr, &sc->sc_ethercom); 1757 1758 if (error == ENETRESET) { 1759 /* 1760 * Multicast list has changed; set the hardware filter 1761 * accordingly. 1762 */ 1763 epreset(sc); 1764 error = 0; 1765 } 1766 break; 1767 1768 default: 1769 error = EINVAL; 1770 break; 1771 } 1772 1773 splx(s); 1774 return (error); 1775 } 1776 1777 void 1778 epreset(sc) 1779 struct ep_softc *sc; 1780 { 1781 int s; 1782 1783 s = splnet(); 1784 epstop(sc); 1785 epinit(sc); 1786 splx(s); 1787 } 1788 1789 void 1790 epwatchdog(ifp) 1791 struct ifnet *ifp; 1792 { 1793 struct ep_softc *sc = ifp->if_softc; 1794 1795 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1796 ++sc->sc_ethercom.ec_if.if_oerrors; 1797 1798 epreset(sc); 1799 } 1800 1801 void 1802 epstop(sc) 1803 register struct ep_softc *sc; 1804 { 1805 bus_space_tag_t iot = sc->sc_iot; 1806 bus_space_handle_t ioh = sc->sc_ioh; 1807 1808 if (sc->ep_flags & ELINK_FLAGS_MII) { 1809 /* Stop the one second clock. */ 1810 untimeout(ep_tick, sc); 1811 } 1812 1813 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1814 /* 1815 * Clear the FIFO buffer count, thus halting 1816 * any currently-running transactions. 1817 */ 1818 GO_WINDOW(1); /* sanity */ 1819 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1820 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1821 } 1822 1823 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1824 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 1825 while (bus_space_read_2(iot, ioh, ELINK_STATUS) & S_COMMAND_IN_PROGRESS) 1826 ; 1827 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1828 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1829 1830 ep_complete_cmd(sc, ELINK_COMMAND, RX_RESET); 1831 ep_complete_cmd(sc, ELINK_COMMAND, TX_RESET); 1832 1833 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1834 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1835 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1836 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1837 1838 epmbufempty(sc); 1839 } 1840 1841 1842 /* 1843 * Before reboots, reset card completely. 1844 */ 1845 static void 1846 epshutdown(arg) 1847 void *arg; 1848 { 1849 register struct ep_softc *sc = arg; 1850 1851 if (sc->enabled) { 1852 epstop(sc); 1853 ep_complete_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1854 } 1855 } 1856 1857 /* 1858 * We get eeprom data from the id_port given an offset into the 1859 * eeprom. Basically; after the ID_sequence is sent to all of 1860 * the cards; they enter the ID_CMD state where they will accept 1861 * command requests. 0x80-0xbf loads the eeprom data. We then 1862 * read the port 16 times and with every read; the cards check 1863 * for contention (ie: if one card writes a 0 bit and another 1864 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1865 * each card compares the data on the bus; if there is a difference 1866 * then that card goes into ID_WAIT state again). In the meantime; 1867 * one bit of data is returned in the AX register which is conveniently 1868 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1869 * bit of data with each read. 1870 * 1871 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1872 */ 1873 u_int16_t 1874 epreadeeprom(iot, ioh, offset) 1875 bus_space_tag_t iot; 1876 bus_space_handle_t ioh; 1877 int offset; 1878 { 1879 u_int16_t data = 0; 1880 int i; 1881 1882 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1883 delay(1000); 1884 for (i = 0; i < 16; i++) 1885 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1886 return (data); 1887 } 1888 1889 static int 1890 epbusyeeprom(sc) 1891 struct ep_softc *sc; 1892 { 1893 bus_space_tag_t iot = sc->sc_iot; 1894 bus_space_handle_t ioh = sc->sc_ioh; 1895 int i = 100, j; 1896 1897 if (sc->bustype == ELINK_BUS_PCMCIA) { 1898 delay(1000); 1899 return 0; 1900 } 1901 1902 j = 0; /* bad GCC flow analysis */ 1903 while (i--) { 1904 j = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND); 1905 if (j & EEPROM_BUSY) 1906 delay(100); 1907 else 1908 break; 1909 } 1910 if (!i) { 1911 printf("\n%s: eeprom failed to come ready\n", 1912 sc->sc_dev.dv_xname); 1913 return (1); 1914 } 1915 if (j & EEPROM_TST_MODE) { 1916 /* XXX PnP mode? */ 1917 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 1918 return (1); 1919 } 1920 return (0); 1921 } 1922 1923 void 1924 epmbuffill(v) 1925 void *v; 1926 { 1927 struct ep_softc *sc = v; 1928 struct mbuf *m; 1929 int s, i; 1930 1931 s = splnet(); 1932 i = sc->last_mb; 1933 do { 1934 if (sc->mb[i] == 0) { 1935 MGET(m, M_DONTWAIT, MT_DATA); 1936 if (m == 0) 1937 break; 1938 sc->mb[i] = m; 1939 } 1940 i = (i + 1) % MAX_MBS; 1941 } while (i != sc->next_mb); 1942 sc->last_mb = i; 1943 /* If the queue was not filled, try again. */ 1944 if (sc->last_mb != sc->next_mb) 1945 timeout(epmbuffill, sc, 1); 1946 splx(s); 1947 } 1948 1949 void 1950 epmbufempty(sc) 1951 struct ep_softc *sc; 1952 { 1953 int s, i; 1954 1955 s = splnet(); 1956 for (i = 0; i<MAX_MBS; i++) { 1957 if (sc->mb[i]) { 1958 m_freem(sc->mb[i]); 1959 sc->mb[i] = NULL; 1960 } 1961 } 1962 sc->last_mb = sc->next_mb = 0; 1963 untimeout(epmbuffill, sc); 1964 splx(s); 1965 } 1966 1967 int 1968 epenable(sc) 1969 struct ep_softc *sc; 1970 { 1971 1972 if (sc->enabled == 0 && sc->enable != NULL) { 1973 if ((*sc->enable)(sc) != 0) { 1974 printf("%s: device enable failed\n", 1975 sc->sc_dev.dv_xname); 1976 return (EIO); 1977 } 1978 } 1979 1980 sc->enabled = 1; 1981 return (0); 1982 } 1983 1984 void 1985 epdisable(sc) 1986 struct ep_softc *sc; 1987 { 1988 1989 if (sc->enabled != 0 && sc->disable != NULL) { 1990 (*sc->disable)(sc); 1991 sc->enabled = 0; 1992 } 1993 } 1994 1995 int 1996 ep_activate(self, act) 1997 struct device *self; 1998 enum devact act; 1999 { 2000 struct ep_softc *sc = (struct ep_softc *)self; 2001 int rv = 0, s; 2002 2003 s = splnet(); 2004 switch (act) { 2005 case DVACT_ACTIVATE: 2006 rv = EOPNOTSUPP; 2007 break; 2008 2009 case DVACT_DEACTIVATE: 2010 #ifdef notyet 2011 /* First, kill off the interface. */ 2012 if_detach(sc->sc_ethercom.ec_if); 2013 #endif 2014 2015 /* Now disable the interface. */ 2016 epdisable(sc); 2017 break; 2018 } 2019 splx(s); 2020 return (rv); 2021 } 2022 2023 void 2024 ep_mii_setbit(sc, bit) 2025 struct ep_softc *sc; 2026 u_int16_t bit; 2027 { 2028 u_int16_t val; 2029 2030 /* We assume we're already in Window 4 */ 2031 val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_BOOM_PHYSMGMT); 2032 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_BOOM_PHYSMGMT, 2033 val | bit); 2034 } 2035 2036 void 2037 ep_mii_clrbit(sc, bit) 2038 struct ep_softc *sc; 2039 u_int16_t bit; 2040 { 2041 u_int16_t val; 2042 2043 /* We assume we're already in Window 4 */ 2044 val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_BOOM_PHYSMGMT); 2045 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_BOOM_PHYSMGMT, 2046 val & ~bit); 2047 } 2048 2049 u_int16_t 2050 ep_mii_readbit(sc, bit) 2051 struct ep_softc *sc; 2052 u_int16_t bit; 2053 { 2054 2055 /* We assume we're already in Window 4 */ 2056 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_BOOM_PHYSMGMT) & 2057 bit); 2058 } 2059 2060 void 2061 ep_mii_sync(sc) 2062 struct ep_softc *sc; 2063 { 2064 int i; 2065 2066 /* We assume we're already in Window 4 */ 2067 ep_mii_clrbit(sc, PHYSMGMT_DIR); 2068 for (i = 0; i < 32; i++) { 2069 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2070 ep_mii_setbit(sc, PHYSMGMT_CLK); 2071 } 2072 } 2073 2074 void 2075 ep_mii_sendbits(sc, data, nbits) 2076 struct ep_softc *sc; 2077 u_int32_t data; 2078 int nbits; 2079 { 2080 int i; 2081 2082 /* We assume we're already in Window 4 */ 2083 ep_mii_setbit(sc, PHYSMGMT_DIR); 2084 for (i = 1 << (nbits - 1); i; i = i >> 1) { 2085 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2086 ep_mii_readbit(sc, PHYSMGMT_CLK); 2087 if (data & i) 2088 ep_mii_setbit(sc, PHYSMGMT_DATA); 2089 else 2090 ep_mii_clrbit(sc, PHYSMGMT_DATA); 2091 ep_mii_setbit(sc, PHYSMGMT_CLK); 2092 ep_mii_readbit(sc, PHYSMGMT_CLK); 2093 } 2094 } 2095 2096 int 2097 ep_mii_readreg(self, phy, reg) 2098 struct device *self; 2099 int phy, reg; 2100 { 2101 struct ep_softc *sc = (struct ep_softc *)self; 2102 int val = 0, i, err; 2103 2104 /* 2105 * Read the PHY register by manually driving the MII control lines. 2106 */ 2107 2108 GO_WINDOW(4); 2109 2110 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_BOOM_PHYSMGMT, 0); 2111 2112 ep_mii_sync(sc); 2113 ep_mii_sendbits(sc, MII_COMMAND_START, 2); 2114 ep_mii_sendbits(sc, MII_COMMAND_READ, 2); 2115 ep_mii_sendbits(sc, phy, 5); 2116 ep_mii_sendbits(sc, reg, 5); 2117 2118 ep_mii_clrbit(sc, PHYSMGMT_DIR); 2119 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2120 ep_mii_setbit(sc, PHYSMGMT_CLK); 2121 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2122 2123 err = ep_mii_readbit(sc, PHYSMGMT_DATA); 2124 ep_mii_setbit(sc, PHYSMGMT_CLK); 2125 2126 /* Even if an error occurs, must still clock out the cycle. */ 2127 for (i = 0; i < 16; i++) { 2128 val <<= 1; 2129 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2130 if (err == 0 && ep_mii_readbit(sc, PHYSMGMT_DATA)) 2131 val |= 1; 2132 ep_mii_setbit(sc, PHYSMGMT_CLK); 2133 } 2134 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2135 ep_mii_setbit(sc, PHYSMGMT_CLK); 2136 2137 GO_WINDOW(1); /* back to operating window */ 2138 2139 return (err ? 0 : val); 2140 } 2141 2142 void 2143 ep_mii_writereg(self, phy, reg, val) 2144 struct device *self; 2145 int phy, reg, val; 2146 { 2147 struct ep_softc *sc = (struct ep_softc *)self; 2148 2149 /* 2150 * Write the PHY register by manually driving the MII control lines. 2151 */ 2152 2153 GO_WINDOW(4); 2154 2155 ep_mii_sync(sc); 2156 ep_mii_sendbits(sc, MII_COMMAND_START, 2); 2157 ep_mii_sendbits(sc, MII_COMMAND_WRITE, 2); 2158 ep_mii_sendbits(sc, phy, 5); 2159 ep_mii_sendbits(sc, reg, 5); 2160 ep_mii_sendbits(sc, MII_COMMAND_ACK, 2); 2161 ep_mii_sendbits(sc, val, 16); 2162 2163 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2164 ep_mii_setbit(sc, PHYSMGMT_CLK); 2165 2166 GO_WINDOW(1); /* back to operating window */ 2167 } 2168 2169 void 2170 ep_statchg(self) 2171 struct device *self; 2172 { 2173 struct ep_softc *sc = (struct ep_softc *)self; 2174 bus_space_tag_t iot = sc->sc_iot; 2175 bus_space_handle_t ioh = sc->sc_ioh; 2176 int mctl; 2177 2178 /* XXX Update ifp->if_baudrate */ 2179 2180 GO_WINDOW(3); 2181 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2182 if (sc->sc_mii.mii_media_active & IFM_FDX) 2183 mctl |= MAC_CONTROL_FDX; 2184 else 2185 mctl &= ~MAC_CONTROL_FDX; 2186 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2187 GO_WINDOW(1); /* back to operating window */ 2188 } 2189
Indexes created Fri Sep 26 08:10:20 GMT 2025